Cascaded devices

Abstract

The application provides a cascade device, and belongs to the technical field of power semiconductors. The cascade device comprises a cascade module and an improvement circuit. The cascade module comprises a normally-on device and a normally-off device. The source of the normally-on device and the drain of the normally-off device are connected to one end of the improvement circuit. The gate of the normally-on device and the source of the normally-off device are connected to the other end of the improvement circuit. The gate of the normally-off device is connected to a front-stage driving circuit. The drain of the normally-on device is connected to an external high-voltage power supply. The source of the normally-off device is grounded. The improvement circuit is used for suppressing voltage oscillation between the gate and the source of the normally-on device and clamping voltage spikes between the gate and the source of the normally-on device. The application can achieve the effects of suppressing oscillation and reducing on-resistance, adapt to high-power application scenarios, and meet high-efficiency requirements.

Description

Technical Field

[0001] This application relates to the field of power semiconductor technology, and more specifically, to a cascaded device. Background Technology

[0002] In the field of power semiconductor devices, the cascaded structure, consisting of a normally-on device and a normally-off device connected in series, is widely used to achieve high-performance, high-efficiency switching applications. However, due to the low-damping circuit formed by the parasitic inductance and capacitance within the cascaded device, it is susceptible to high-frequency oscillations in fast-switching applications.

[0003] In existing technologies, some manufacturers introduce additional resistors into low-damping circuits to suppress high-frequency oscillations. However, this resistor is located in the drive circuit of normally-on devices, which will affect the switching speed of cascaded devices. When the resistance value is too large, it will cause a significant decrease in the overall efficiency of the cascaded devices; when the resistance value is too small, it cannot effectively suppress the high-frequency oscillations of the cascaded devices.

[0004] Therefore, the existing technology can only be applied to low-power scenarios with low efficiency requirements and high on-resistance, and it is difficult to meet the application requirements of high-power scenarios with high efficiency requirements and low on-resistance. Utility Model Content

[0005] The purpose of this application is to provide a cascaded device that can suppress oscillations and reduce on-resistance, adapt to high-power applications, and meet high efficiency requirements.

[0006] The embodiments of this application are implemented as follows: A first aspect of this application provides a cascaded device, which includes a cascade module and an improvement circuit. The cascade module includes a normally-on device and a normally-off device. The source of the normally open device and the drain of the normally closed device are both connected to one end of the improvement circuit. The gate of the normally open device and the source of the normally closed device are both connected to the other end of the improvement circuit. The gate of the normally closed device is connected to the front-end drive circuit. The drain of the normally open device is connected to the external high-voltage power supply. The source of the normally closed device is grounded. The improved circuitry is used to suppress voltage oscillations between the gate and source of normally-on devices and to clamp voltage spikes between the gate and source of normally-on devices.

[0007] As one possible implementation, the improved circuit described above includes: a suppression unit and a unidirectional conduction unit; The suppression unit is connected to the unidirectional conduction unit, and the suppression unit and the unidirectional conduction unit are connected between the gate of the normally-on device and the source of the normally-on device; The suppression unit and the unidirectional conduction unit work together to suppress voltage oscillations between the gate and source of a normally-on device, and to clamp voltage spikes between the gate and source of a normally-on device.

[0008] As one possible implementation, the suppression unit includes a first capacitor and a first resistor, and the unidirectional conduction unit includes a first diode; One end of the first capacitor is connected to the source of the normally open device, the drain of the normally closed device, and one end of the first resistor, respectively. The other end of the first capacitor is connected to the cathode of the first diode and the other end of the first resistor, respectively. The anode of the first diode is connected to the gate of the normally open device and the source of the normally closed device, respectively.

[0009] As one possible implementation, the suppression unit includes a second capacitor and a second resistor, and the unidirectional conduction unit includes a second diode; The cathode of the second diode is connected to the source of the normally open device and the drain of the normally closed device, respectively. The anode of the second diode is connected to one end of the second resistor and one end of the second capacitor, respectively. The other end of the second resistor is connected to the other end of the second capacitor, the gate of the normally open device, and the source of the normally closed device, respectively.

[0010] As one possible implementation, the above-mentioned suppression unit includes: a third resistor, and the above-mentioned unidirectional conduction unit includes: a third diode; One end of the third resistor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the third resistor is connected to the cathode of the third diode, and the anode of the third diode is connected to the gate of the normally open device and the source of the normally closed device, respectively.

[0011] As one possible implementation, the above-mentioned suppression unit includes: a fourth resistor, and the above-mentioned unidirectional conduction unit includes: a fourth diode; The cathode of the fourth diode is connected to the source of the normally open device and the drain of the normally closed device, respectively. The anode of the fourth diode is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the gate of the normally open device and the source of the normally closed device, respectively.

[0012] As one possible implementation, the above-mentioned suppression unit includes: a third capacitor, and the above-mentioned unidirectional conduction unit includes: a fifth diode; One end of the third capacitor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the third capacitor is connected to the cathode of the fifth diode, and the anode of the fifth diode is connected to the gate of the normally open device and the source of the normally closed device, respectively.

[0013] As one possible implementation, the above-mentioned suppression unit includes: a fourth capacitor, and the above-mentioned unidirectional conduction unit includes: a sixth diode; The cathode of the sixth diode is connected to the source of the normally open device and the drain of the normally closed device, respectively. The anode of the sixth diode is connected to one end of the fourth capacitor, and the other end of the fourth capacitor is connected to the gate of the normally open device and the source of the normally closed device, respectively.

[0014] As one possible implementation, the above-mentioned suppression unit includes: a fifth capacitor and a fifth resistor, and the above-mentioned unidirectional conduction unit includes: a seventh diode; One end of the fifth capacitor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the fifth capacitor is connected to the cathode of the seventh diode and one end of the fifth resistor, respectively. The anode of the seventh diode is connected to the gate of the normally open device, the source of the normally closed device, and the other end of the fifth resistor, respectively.

[0015] As one possible implementation, the above-mentioned suppression unit includes: a sixth capacitor and a sixth resistor, and the above-mentioned unidirectional conduction unit includes: an eighth diode; One end of the sixth resistor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the sixth resistor is connected to the cathode of the eighth diode and one end of the sixth capacitor, respectively. The anode of the eighth diode is connected to the gate of the normally open device, the source of the normally closed device, and the other end of the sixth capacitor, respectively.

[0016] The beneficial effects of the embodiments of this application include: This application provides a cascaded device that incorporates an improvement circuit. One end of the improvement circuit is connected to the source of a normally-on device and the drain of a normally-off device, while the other end is connected to the gate of the normally-on device and the source of the normally-off device. The gate of the normally-off device is connected to the preceding drive circuit, and the drain of the normally-on device is connected to an external high-voltage power supply. Both the source of the normally-off device and the gate of the normally-on device are grounded. The improvement circuit is positioned between the gate and source of the normally-on device. Through its internal circuitry, the improvement circuit clamps voltage spikes between the gate and source of the normally-on device and dissipates the oscillation energy generated by voltage oscillations between the gate and source. Therefore, this cascaded device eliminates the need for additional resistors in the drive circuit of the normally-on device, thus reducing its switching efficiency. It is also no longer limited by the resistance value, making it suitable for high-power applications. This achieves the effects of suppressing oscillations, reducing on-resistance, adapting to high-power applications, and meeting high efficiency requirements. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of an existing cascaded device; Figure 2 This is a schematic diagram of the structure of an existing improved cascaded device; Figure 3 This is a schematic diagram of the structure of the first type of cascaded device provided in the embodiments of this application; Figure 4 This is a schematic diagram of the structure of the second type of cascaded device provided in the embodiments of this application; Figure 5 This is a schematic diagram of the structure of the third type of cascaded device provided in the embodiments of this application; Figure 6 This is a schematic diagram of the structure of the fourth type of cascaded device provided in the embodiments of this application; Figure 7 This is a schematic diagram of the structure of the fifth type of cascaded device provided in the embodiments of this application; Figure 8 This is a schematic diagram of the structure of the sixth type of cascaded device provided in the embodiments of this application; Figure 9 This is a schematic diagram of the structure of the seventh type of cascaded device provided in the embodiments of this application; Figure 10 This is a schematic diagram of the structure of the eighth type of cascaded device provided in the embodiments of this application; Figure 11 This is a schematic diagram of the structure of the ninth type of cascaded device provided in the embodiments of this application; Figure 12 This is a schematic diagram of the structure of the tenth cascaded device provided in the embodiments of this application; Figure 13 This is a schematic diagram of the structure of the eleventh cascaded device provided in the embodiments of this application; Figure 14 A schematic diagram of the structure of the twelfth type of cascaded device provided in the embodiments of this application; Figure 15 This is a schematic diagram of the structure of the dual-pulse test circuit provided in the embodiments of this application; Figure 16 This is a simulated waveform diagram of a cascaded device before it is inserted into an improvement circuit. Figure 17 This is a simulated waveform diagram of a cascaded device after being inserted into an improvement circuit.

[0019] Reference numerals: 10: Cascaded device; 101: Cascaded module; 1011: Normally open device; 1012: Normally closed device; 102: Improvement circuit; 1021: Suppression unit; 2101: First capacitor; 2102: First resistor; 2103: Second capacitor; 2104: Second resistor; 2105: Third resistor; 2106: Fourth resistor; 2107: Third capacitor; 2108: Fourth capacitor; 2109: Fifth capacitor; 2110: Fifth resistor; 2111: Sixth capacitor; 2112: Sixth resistor; 1022: Unidirectional conduction unit; 2201: First diode; 2202: Second diode; 2203: Third diode; 2204: Fourth diode; 2205: Fifth diode; 2206: Sixth diode; 2207: Seventh diode; 2208: Eighth diode. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0022] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0023] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0024] Furthermore, terms such as "horizontal" and "vertical" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0025] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0026] Figure 1 See the schematic diagram of an existing cascaded device. Figure 1 Existing cascaded devices are common-source, common-gate structures composed of normally-on devices and normally-off devices connected in series. The source of the normally-on device is connected to the drain of the normally-off device, the drain of the normally-on device is connected to an external high-voltage power supply, the gate of the normally-on device and the source of the normally-off device are grounded together, and the gate of the normally-off device is connected to the preceding driver circuit. The cascaded device is controlled by the preceding driver circuit connected to the gate of the normally-off device and receives the external power supply voltage through the drain of the normally-on device.

[0027] However, both normally-on and normally-off devices have parasitic inductance and capacitance. Due to the series connection between normally-on and normally-off devices, the parasitic inductance and capacitance of both normally-on and normally-off devices form a low-damping circuit inside the cascaded device. This leads to the risk of inducing high-frequency oscillations when the cascaded device is used in fast switching.

[0028] To solve this problem, see Figure 2 Some manufacturers introduce additional resistors in low-damping circuits to suppress high-frequency oscillations. However, in this approach, the resistor is located in the drive circuit of the normally-on device, which affects the switching speed. When the resistance value is too large, it will significantly reduce the overall efficiency of the cascaded device; when the resistance value is too small, it cannot effectively suppress the high-frequency oscillations of the cascaded device.

[0029] To address this, this application provides a cascaded device comprising a cascade module and an improvement circuit. In the cascade module, the source of the normally-on device and the drain of the normally-off device are connected to one end of the improvement circuit, while the gate of the normally-on device and the source of the normally-off device are connected to the other end of the improvement circuit. The gate of the normally-off device is connected to the preceding drive circuit, the drain of the normally-on device is connected to an external high-voltage power supply, and the source of the normally-off device is grounded. The improvement circuit is positioned between the gate and source of the normally-on device. The improvement circuit suppresses voltage oscillations between the gate and source of the normally-on device and clamps voltage spikes between them. This achieves the effects of suppressing oscillations and reducing on-resistance, adapting to high-power applications, and meeting high efficiency requirements.

[0030] The cascaded devices provided in the embodiments of this application will be explained in detail below with reference to the accompanying drawings.

[0031] Figure 3 For a schematic diagram of a cascaded device provided in this application, see [link to schematic diagram]. Figure 3 The cascaded device 10 provided in this application embodiment includes: a cascaded module 101 and an improvement circuit 102. The cascaded module 101 includes: a normally open device 1011 and a normally closed device 1012.

[0032] The source of the normally open device 1011 and the drain of the normally closed device 1012 are both connected to one end of the improvement circuit 102. The gate of the normally open device 1011 and the source of the normally closed device 1012 are both connected to the other end of the improvement circuit 102. The gate of the normally closed device 1012 is connected to the pre-stage drive circuit. The drain of the normally open device 1011 is connected to the external high-voltage power supply. The source of the normally closed device 1012 is grounded.

[0033] Optionally, the normally-on device 1011 is typically a high-voltage depletion-mode field-effect transistor (FET). The normally-on device 1011 is turned on when the voltage between its gate and source is 0V, indicating the presence of a conductive channel. The normally-on device 1011 is turned off when a negative voltage is applied to its gate, depleting the carriers in the conductive channel. It is worth noting that the on / off characteristics of the normally-on device 1011 are illustrated using an N-type depletion-mode FET as an example, and do not imply that the on / off characteristics of a P-type depletion-mode FET are the same. This application does not impose specific limitations on this.

[0034] Optionally, the normally closed device 1012 is typically a low-voltage enhancement-mode field-effect transistor (FET). The normally closed device 1012 is turned off when the voltage between the gate and source of the normally open device 1011 is 0V, at which point the conductive channel of the normally closed device 1012 disappears. The normally closed device 1012 is turned on when a positive voltage is applied to its gate, thereby enhancing the carriers in the conductive channel and forming a conductive channel. It is worth noting that the on / off characteristics of the normally closed device 1012 are illustrated using an N-type enhancement-mode FET as an example, and do not imply that the on / off characteristics of a P-type enhancement-mode FET are the same; this application does not impose specific limitations on this.

[0035] Optionally, the input terminal of the cascaded device 10 is realized by the drain of the normally-on device 1011, the control terminal of the cascaded device 10 is realized by the gate of the normally-closed device 1012, and the output terminal of the cascaded device 10 is realized by the source of the normally-on device 1011. The switching on and off of the normally-on device 1011 is affected by the normally-closed device 1012, and the control of the normally-closed device 1012 is realized by the preceding drive circuit.

[0036] Specifically, when the current stage driving circuit applies a positive voltage to the gate of the normally closed device 1012, the normally closed device 1012 conducts. The normally closed device 1012 acts as a small resistor, which pulls the source of the normally open device 1011 to ground. The voltage between the gate and source of the normally open device 1011 is approximately 0V, and the normally open device 1011 is in a naturally conducting state, while the cascaded device 10 is in the on state. When the current stage driving circuit applies a negative voltage to the gate of the normally closed device 1012, the normally closed device 1012 is turned off, and the current will... The drain and source of the normally closed device 1012 cannot flow, the source current of the normally open device 1011 is cut off, and the source potential of the normally open device 1011 is quickly pulled up to its drain potential. At this time, the gate voltage of the normally open device 1011 is grounded through a large resistor, and the source voltage of the normally open device 1011 is pulled up to a very high positive voltage. This will make the voltage difference between the gate and source of the normally open device 1011 become a large negative voltage, so that the normally open device 1011 is forcibly turned off, and the cascaded device 10 is in the off state.

[0037] It should be noted that the normally open device 1011 acts as the main power switch in the cascaded device 10, which is used to withstand high voltage; the normally closed device 1012 acts as the control switch in the cascaded device 10, which is used to determine the on and off of the main power switch.

[0038] The improvement circuit 102 is used to suppress voltage oscillations between the gate and source of the normally-on device 1011 and to clamp voltage spikes between the gate and source of the normally-on device 1011.

[0039] Optionally, the improvement circuit 102 is equivalent to an absorption circuit in the cascaded device 10. One end of the improvement circuit 102 is connected to the source of the normally-on device 1011, and the other end of the improvement circuit 102 is connected to the gate of the normally-on device 1011. The improvement circuit 102 clamps the voltage spike between the gate and the source of the normally-on device 1011 through its internal circuit properties. At the same time, it also consumes the oscillation energy generated by the voltage oscillation between the gate and the source of the normally-on device 1011 through its internal circuit properties.

[0040] Among them, the voltage oscillation is generated by the LC resonant circuit formed by the parasitic inductance and parasitic capacitance of the normally open device 1011 and the normally closed device 1012 in the cascaded device 10 under the excitation of switching transient energy. The improvement circuit 102 is equivalent to a specific energy dissipation path to block the influence of voltage oscillation on the cascaded device 10.

[0041] Specifically, when the cascaded device 10 is turned on or off rapidly, the large current change rate in the main circuit will induce a voltage through the parasitic inductance. These induced voltages will be coupled to the high-impedance gate drive circuit, causing the gate voltage of the normally-on device 1011 to oscillate.

[0042] In addition, the improved circuit 102 clamps the voltage spike between the gate and source of the normally-on device 1011, which can limit the voltage between the gate and source of the normally-on device 1011 to a safe maximum value, preventing it from being too high and damaging the normally-on device 1011.

[0043] Furthermore, at the moment the cascaded device 10 is turned off, the main current drops sharply, generating a large reverse electromotive force through the parasitic inductance. This high voltage may be coupled to the gate of the normally-on device 1011 through the Miller capacitance, causing the voltage between the gate and source of the normally-on device 1011 to be much higher than the positive or negative spike of the gate drive voltage of the normally-on device 1011. This may damage the gate of the normally-on device 1011.

[0044] Specifically, when external interference causes the voltage between the gate and source of the normally-on device 1011 to rise forward and exceed the forward voltage of the diode in the improvement circuit 102, the diode in the improvement circuit 102 turns on. This causes the voltage between the gate and source of the normally-on device 1011 to be clamped close to the forward voltage drop of the diode. At this time, the capacitor in the improvement circuit 102 charges, storing some energy, thereby smoothing the voltage ripple.

[0045] It is worth noting that the improvement circuit 102 is connected in parallel between the gate and source of the normally-on device 1011, and is not placed in the gate drive circuit of the normally-on device 1011. This will greatly reduce the impact on the switching speed of the normally-on device 1011. At the same time, the improvement circuit 102 will not affect the internal voltage distribution of the cascaded device 10, which can meet the requirements of high efficiency and high-power application scenarios. Furthermore, since the improvement circuit 102 improves the high-frequency oscillation problem of the cascaded device 10, the cascaded device 10 can be configured for faster switching, which can further improve the overall efficiency.

[0046] It should also be noted that the improvement circuit 102 can clamp the voltage spike between the gate and source of the normally-on device 1011, thus protecting the gate of the normally-on device 1011. It can also reduce the internal electric field of the cascade device 10, preventing the performance of the cascade device 10 from degrading under high-current freewheeling conditions, thereby improving the durability of the cascade device 10.

[0047] In this embodiment, an improvement circuit is added to the cascaded device. One end of the improvement circuit is connected to the source of the normally-on device and the drain of the normally-off device, while the other end is connected to the gate of the normally-on device and the source of the normally-off device. The gate of the normally-off device is connected to the preceding drive circuit, and the drain of the normally-on device is connected to an external high-voltage power supply. Both the source of the normally-off device and the gate of the normally-on device are grounded. The improvement circuit is positioned between the gate and source of the normally-on device. Through its internal circuit properties, the improvement circuit clamps the voltage spikes between the gate and source of the normally-on device and also dissipates the oscillation energy generated by the voltage oscillations between the gate and source of the normally-on device. Therefore, this cascaded device eliminates the need for an additional resistor in the normally-on device's drive circuit, thus limiting the switching efficiency of the normally-on device, and is no longer limited by the resistance value, making it suitable for high-power applications. This achieves the effects of suppressing oscillations and reducing on-resistance, adapting to high-power applications, and meeting high efficiency requirements.

[0048] In one alternative implementation, see [link to implementation details]. Figure 4 The improvement circuit 102 in the cascaded device 10 provided in this application embodiment includes: a suppression unit 1021 and a unidirectional conduction unit 1022.

[0049] Suppression unit 1021 is connected to unidirectional conduction unit 1022, and suppression unit 1021 and unidirectional conduction unit 1022 are connected between the gate of normally-conducting device 1011 and the source of normally-conducting device 1011.

[0050] Optionally, the suppression unit 1021 and the unidirectional conduction unit 1022 are connected in series between the gate and source of the normally-on device 1011. The suppression unit 1021 and the unidirectional conduction unit 1022 are connected in series between the gate and source of the normally-on device 1011 without any order. That is, whether the suppression unit 1021 is before or after the unidirectional conduction unit 1022, the high-frequency oscillation suppression function and voltage clamping function of the improvement circuit 102 are not affected.

[0051] Specifically, the suppression unit 1021 can be implemented by a resistor and a capacitor, or by a resistor or a capacitor alone; this application does not make any specific limitation in this regard.

[0052] Optionally, the unidirectional conduction unit 1022 can be implemented by a diode. The forward conduction direction of the unidirectional conduction unit 1022 is from the gate of the normally-on device 1011 to the source of the normally-on device 1011. When the gate potential of the normally-on device 1011 is higher than the source potential of the normally-on device 1011, the unidirectional conduction unit 1022 is turned on.

[0053] The suppression unit 1021 and the unidirectional conduction unit 1022 are used together to suppress voltage oscillations between the gate and source of the normally-on device 1011 and to clamp voltage spikes between the gate and source of the normally-on device 1011.

[0054] Optionally, when the voltage between the gate and source of the normally-on device 1011 oscillates, and the voltage value between the gate and source of the normally-on device 1011 exceeds the forward conduction voltage drop of the unidirectional conduction unit 1022, the unidirectional conduction unit 1022 is forward-conducted, and the suppression unit 1021 is connected between the gate and source of the normally-on device 1011. The capacitor in the suppression unit 1021 can provide a low-impedance bypass path for the oscillating voltage to absorb a portion of the transient charge; the resistor in the suppression unit 1021 dissipates the oscillation energy absorbed by the capacitor in the form of heat energy, thereby causing the oscillation to decay rapidly.

[0055] It should also be noted that the suppression unit 1021 and the unidirectional conduction unit 1022 can strictly limit the voltage spike between the gate and source of the normally-on device 1011 within a safe range, effectively protecting the gate of the normally-on device 1011, thereby preventing the normally-on device 1011 from breaking down or degrading due to overvoltage. This will directly improve the durability and reliability of the cascaded device 10 under harsh operating conditions.

[0056] In one alternative implementation, see [link to implementation details]. Figure 5 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes: a first capacitor 2101 and a first resistor 2102, and the unidirectional conduction unit 1022 includes: a first diode 2201.

[0057] One end of the first capacitor 2101 is connected to the source of the normally open device 1011, the drain of the normally closed device 1012, and one end of the first resistor 2102, respectively. The other end of the first capacitor 2101 is connected to the cathode of the first diode 2201 and the other end of the first resistor 2102, respectively. The anode of the first diode 2201 is connected to the gate of the normally open device 1011 and the source of the normally closed device 1012, respectively.

[0058] Optionally, when the voltage between the gate and source of the normally-on device 1011 exceeds the forward voltage drop of the first diode 2201, the first diode 2201 conducts, and the suppression unit 1021 is connected between the gate and source of the normally-on device 1011. The first capacitor 2101 can provide a low-impedance bypass path for the oscillation voltage to absorb some transient charge, while the first resistor 2102 dissipates the oscillation energy absorbed by the first capacitor 2101 as heat, thereby rapidly decaying the oscillation. Simultaneously, after the first diode 2201 conducts, it can clamp the voltage spike between the gate and source of the normally-on device 1011 near the forward voltage drop of the first diode 2201.

[0059] In one alternative implementation, see [link to implementation details]. Figure 6 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes a second capacitor 2103 and a second resistor 2104, and the unidirectional conduction unit 1022 includes a second diode 2202.

[0060] The cathode of the second diode 2202 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The anode of the second diode 2202 is connected to one end of the second resistor 2104 and one end of the second capacitor 2103, respectively. The other end of the second resistor 2104 is connected to the other end of the second capacitor 2103, the gate of the normally open device 1011 and the source of the normally closed device 1012, respectively.

[0061] Optionally, when the voltage between the gate and source of the normally-on device 1011 exceeds the forward voltage drop of the second diode 2202, the second diode 2202 conducts, and the suppression unit 1021 is connected between the gate and source of the normally-on device 1011. The second capacitor 2103 can provide a low-impedance bypass path for the oscillation voltage to absorb some transient charge, and the second resistor 2104 dissipates the oscillation energy absorbed by the second capacitor 2103 as heat, thereby rapidly decaying the oscillation. Simultaneously, after the second diode 2202 conducts, it can clamp the voltage spike between the gate and source of the normally-on device 1011 near the forward voltage drop of the second diode 2202.

[0062] Therefore, it can be seen that swapping the left and right positions of resistors, capacitors and diodes in the improvement circuit 102, as well as swapping their top and bottom positions, will not affect the high-frequency oscillation suppression performance and voltage clamping function of the improvement circuit 102 in the cascaded device 10.

[0063] In one alternative implementation, see [link to implementation details]. Figure 7 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes a third resistor 2105, and the unidirectional conduction unit 1022 includes a third diode 2203.

[0064] One end of the third resistor 2105 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The other end of the third resistor 2105 is connected to the cathode of the third diode 2203. The anode of the third diode 2203 is connected to the gate of the normally open device 1011 and the source of the normally closed device 1012, respectively.

[0065] In one alternative implementation, see [link to implementation details]. Figure 8 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes: a fourth resistor 2106, and the unidirectional conduction unit 1022 includes: a fourth diode 2204.

[0066] The cathode of the fourth diode 2204 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The anode of the fourth diode 2204 is connected to one end of the fourth resistor 2106, and the other end of the fourth resistor 2106 is connected to the gate of the normally open device 1011 and the source of the normally closed device 1012, respectively.

[0067] Optionally, see Figure 7 and Figure 8 Even after removing the capacitor from the improvement circuit 102, the improvement circuit 102 can still suppress voltage oscillations between the gate and source of the normally-on device 1011 through the resistor and diode. Simultaneously, it can clamp voltage spikes between the gate and source of the normally-on device 1011 within the forward voltage drop of the diode. It is worth noting that swapping the positions of the resistor and diode will not affect the function of the improvement circuit 102.

[0068] In one alternative implementation, see [link to implementation details]. Figure 9 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes a third capacitor 2107, and the unidirectional conduction unit 1022 includes a fifth diode 2205.

[0069] One end of the third capacitor 2107 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The other end of the third capacitor 2107 is connected to the cathode of the fifth diode 2205. The anode of the fifth diode 2205 is connected to the gate of the normally open device 1011 and the source of the normally closed device 1012, respectively.

[0070] In one alternative implementation, see [link to implementation details]. Figure 10 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes: a fourth capacitor 2108, and the unidirectional conduction unit 1022 includes: a sixth diode 2206.

[0071] The cathode of the sixth diode 2206 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The anode of the sixth diode 2206 is connected to one end of the fourth capacitor 2108, and the other end of the fourth capacitor 2108 is connected to the gate of the normally open device 1011 and the source of the normally closed device 1012, respectively.

[0072] Optionally, see Figure 9 and Figure 10 By removing the resistor in the improvement circuit 102, the improvement circuit 102 can still suppress the voltage oscillation between the gate and source of the normally-on device 1011 through the capacitor and diode. At the same time, it can also clamp the voltage spike between the gate and source of the normally-on device 1011 to the forward voltage drop of the diode. It is worth noting that swapping the positions of the capacitor and diode will not affect the function of the improvement circuit 102.

[0073] In one alternative implementation, see [link to implementation details]. Figure 11 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes a fifth capacitor 2109 and a fifth resistor 2110, and the unidirectional conduction unit 1022 includes a seventh diode 2207.

[0074] One end of the fifth capacitor 2109 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The other end of the fifth capacitor 2109 is connected to the cathode of the seventh diode 2207 and one end of the fifth resistor 2110, respectively. The anode of the seventh diode 2207 is connected to the gate of the normally open device 1011, the source of the normally closed device 1012, and the other end of the fifth resistor 2110, respectively.

[0075] In one alternative implementation, see [link to implementation details]. Figure 12 The suppression unit 1021 in the cascaded device 10 provided in this application embodiment includes: a sixth capacitor 2111 and a sixth resistor 2112, and the unidirectional conduction unit 1022 includes: an eighth diode 2208.

[0076] One end of the sixth resistor 2112 is connected to the source of the normally open device 1011 and the drain of the normally closed device 1012, respectively. The other end of the sixth resistor 2112 is connected to the cathode of the eighth diode 2208 and one end of the sixth capacitor 2111, respectively. The anode of the eighth diode 2208 is connected to the gate of the normally open device 1011, the source of the normally closed device 1012, and the other end of the sixth capacitor 2111, respectively.

[0077] In one alternative implementation, see [link to implementation details]. Figure 13 In the cascaded device 10 provided in this application embodiment, the source of the normally open device is connected to the drain of the normally closed device and the cathode of the ninth diode D9, respectively. The cathode of the ninth diode D9 is also connected to one end of the seventh resistor R7. The anode of the ninth diode D9 is connected to the other end of the seventh resistor R7 and one end of the seventh capacitor C7, respectively. The other end of the seventh capacitor C7 is connected to the gate of the normally open device and the source of the normally closed device, respectively. The source of the normally closed device is grounded. The drain of the normally open device is used to connect to an external high-voltage power supply. The gate of the normally closed device is connected to the preceding drive circuit.

[0078] In one alternative implementation, see [link to implementation details]. Figure 14 In the cascaded device 10 provided in this application embodiment, the source of the normally open device is connected to the drain of the normally closed device and the cathode of the tenth diode D10, respectively. The cathode of the tenth diode D10 is also connected to one end of the eighth capacitor C8. The anode of the tenth diode D10 is connected to the other end of the tenth capacitor C8 and one end of the eighth resistor R8, respectively. The other end of the eighth resistor R8 is connected to the gate of the normally open device and the source of the normally closed device, respectively. The source of the normally closed device is grounded. The drain of the normally open device is used to connect to an external high-voltage power supply. The gate of the normally closed device is connected to the front-end drive circuit.

[0079] It is worth noting that, Figure 11 , Figure 12 , Figure 13 , Figure 14 The cascaded device 10 shown and Figure 4 and Figure 5 The working principle and specific implementation process of the cascaded device 10 shown are essentially the same, and will not be described in detail here.

[0080] An alternative implementation method was used to perform a double-pulse test comparison on the cascaded devices; the test circuit is described below. Figure 15 It uses separately packaged normally-on devices and separately packaged normally-closed devices to simulate cascaded devices through external connections, so as to facilitate insertion into the improved circuit. See Figure 16Because the simulated cascaded device packaging and printed circuit board traces introduce significant parasitic inductance, the simulated cascaded device before being inserted into the improved circuit of this application experiences severe high-frequency oscillations during testing; see also Figure 17 The analog cascaded device 10, after being inserted with the improved circuit 102 of this application, can quickly suppress high-frequency oscillations during testing. However, because the parasitic inductance between the gate and source of the separately packaged normally-on device 1011 hinders current surges, the improved circuit 102 cannot quickly and effectively suppress high-frequency oscillations during the turn-on transient of the normally-on device 1011. Therefore, while the improved circuit 102 can perform well when placed outside the package of the cascaded device 10, its effect will be even better if it is integrated inside the package of the cascaded device 10, as close as possible to the gate and source of the normally-on device 1011 (to reduce parasitic inductance).

[0081] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0082] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A cascaded device, characterized in that, The cascaded device includes: a cascade module and an improvement circuit, wherein the cascade module includes: normally open device and normally closed device; The source of the normally open device and the drain of the normally closed device are both connected to one end of the improvement circuit. The gate of the normally open device and the source of the normally closed device are both connected to the other end of the improvement circuit. The gate of the normally closed device is connected to the front-end drive circuit. The drain of the normally open device is connected to an external high-voltage power supply. The source of the normally closed device is grounded. The improvement circuit is used to suppress voltage oscillations between the gate and source of the normally-on device and to clamp voltage spikes between the gate and source of the normally-on device.

2. The cascaded device according to claim 1, characterized in that, The improved circuit includes: a suppression unit and a unidirectional conduction unit; The suppression unit is connected to the unidirectional conduction unit, and the suppression unit and the unidirectional conduction unit are connected between the gate of the normally-conducting device and the source of the normally-conducting device. The suppression unit and the unidirectional conduction unit are used together to suppress voltage oscillations between the gate and source of the normally-conducting device and to clamp voltage spikes between the gate and source of the normally-conducting device.

3. The cascaded device according to claim 2, characterized in that, The suppression unit includes a first capacitor and a first resistor, and the unidirectional conduction unit includes a first diode; One end of the first capacitor is connected to the source of the normally open device, the drain of the normally closed device, and one end of the first resistor, respectively. The other end of the first capacitor is connected to the cathode of the first diode and the other end of the first resistor, respectively. The anode of the first diode is connected to the gate of the normally open device and the source of the normally closed device, respectively.

4. The cascaded device according to claim 2, characterized in that, The suppression unit includes a second capacitor and a second resistor, and the unidirectional conduction unit includes a second diode; The cathode of the second diode is connected to the source of the normally open device and the drain of the normally closed device, respectively. The anode of the second diode is connected to one end of the second resistor and one end of the second capacitor, respectively. The other end of the second resistor is connected to the other end of the second capacitor, the gate of the normally open device, and the source of the normally closed device, respectively.

5. The cascaded device according to claim 2, characterized in that, The suppression unit includes a third resistor, and the unidirectional conduction unit includes a third diode; One end of the third resistor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the third resistor is connected to the cathode of the third diode, and the anode of the third diode is connected to the gate of the normally open device and the source of the normally closed device, respectively.

6. The cascaded device according to claim 2, characterized in that, The suppression unit includes a fourth resistor, and the unidirectional conduction unit includes a fourth diode; The cathode of the fourth diode is connected to the source of the normally open device and the drain of the normally closed device, respectively. The anode of the fourth diode is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the gate of the normally open device and the source of the normally closed device, respectively.

7. The cascaded device according to claim 2, characterized in that, The suppression unit includes a third capacitor, and the unidirectional conduction unit includes a fifth diode; One end of the third capacitor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the third capacitor is connected to the cathode of the fifth diode, and the anode of the fifth diode is connected to the gate of the normally open device and the source of the normally closed device, respectively.

8. The cascaded device according to claim 2, characterized in that, The suppression unit includes a fourth capacitor, and the unidirectional conduction unit includes a sixth diode; The cathode of the sixth diode is connected to the source of the normally open device and the drain of the normally closed device, respectively. The anode of the sixth diode is connected to one end of the fourth capacitor, and the other end of the fourth capacitor is connected to the gate of the normally open device and the source of the normally closed device, respectively.

9. The cascaded device according to claim 2, characterized in that, The suppression unit includes a fifth capacitor and a fifth resistor, and the unidirectional conduction unit includes a seventh diode; One end of the fifth capacitor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the fifth capacitor is connected to the cathode of the seventh diode and one end of the fifth resistor, respectively. The anode of the seventh diode is connected to the gate of the normally open device, the source of the normally closed device, and the other end of the fifth resistor, respectively.

10. The cascaded device according to claim 2, characterized in that, The suppression unit includes a sixth capacitor and a sixth resistor, and the unidirectional conduction unit includes an eighth diode; One end of the sixth resistor is connected to the source of the normally open device and the drain of the normally closed device, respectively. The other end of the sixth resistor is connected to the cathode of the eighth diode and one end of the sixth capacitor, respectively. The anode of the eighth diode is connected to the gate of the normally open device, the source of the normally closed device, and the other end of the sixth capacitor, respectively.

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