Power semiconductor diode and methods for its manufacture

Abstract

Power semiconductor diode, comprising: a semiconductor substrate (110) with a first emitter region (130) of n conductivity type, a second emitter region (120) of p conductivity type and a drift region (140) of n conductivity type arranged between the first emitter region (130) and the second emitter region (120), wherein the drift region (140) forms a pn junction with the second emitter region (120); a first emitter metallization (151) in contact with the first emitter region (130), wherein the first emitter region (130) has a first doping region (131) of the n-conductivity type and a second doping region (132) of the n-conductivity type, wherein the first doping region (131) forms an ohmic contact with the first emitter metallization (151) and the second doping region (132) forms a non-ohmic contact with the first emitter metallization (151), wherein the first doping region (131) has first dopants of the n-type and the second doping region (132) has second dopants of the n-type, wherein the second dopants are different from the first dopants; and a second emitter metallization (152) in contact with the second emitter region (120), wherein the semiconductor substrate (110) has a second surface (112) on which the second emitter metallization (152) is formed, a first surface (111) opposite the second surface (112) on which the first emitter metallization (151) is formed, and a lateral edge (113); the second emitter region (120) is spaced from the lateral edge (113); and the first doping region (130) is formed in an area formed by projecting the second emitter region (120) onto the first surface (111).

Description

TECHNICAL AREA

[0001] The embodiments described here relate to power semiconductor diodes and to methods for manufacturing power semiconductor diodes. BACKGROUND

[0002] Semiconductor power diodes typically contain an anode, a cathode, and a drift region between the anode and cathode. The switching losses of power semiconductor diodes are primarily caused by charges stored during the on-state, which must be removed when the diode is switched off. These stored charges, sometimes called flood charges, are desirable during the on-state because they reduce the so-called on-resistance RDS(on). ONdecrease. The amount of stored charge is mainly determined by the injection efficiency of the anode, the injection efficiency of the cathode, and the ambipolar lifetime of the charge carriers in the drift region.

[0003] Several attempts have been made to optimize these parameters, for example, by providing specific doping profiles for the anode and cathode to adjust the lifetime of the charge carriers, e.g., to limit their lifespan. However, there are limitations on the maximum concentration of recombination centers because a large number of recombination centers leads to a high leakage current.

[0004] With regard to cathode efficiency, a reduction in doping concentration is desirable, which, however, increases the on-resistance. Further approaches include locally adjusting the lifetime of the charge carriers. The cathode can also contain n-doped regions in contact with p-regions located between the n-doped regions and the drift region, in order to reduce charge carrier flooding of the drift region during the on-state.

[0005] DE 43 42 482 A1 describes a power semiconductor device in which a base zone consists of a layer of a lightly doped n-type substrate material and at least one further layer, which differs from the substrate material with respect to the conductor type and / or the doping concentration. The base zone lies between an anode-side structure and a layer of the substrate material. DE 103 30 571 B4 describes a vertical power semiconductor device in which a back-side emitter and a back-side metal layer, at least partially covering it, are formed on the back side of a substrate. Injection damping agents are provided in the edge region of the device to reduce the injection of charge carriers from the back-side emitter into the edge region. A diode with a pin structure is known from JP H07 - 106 605 A.

[0006] Although these and other approaches partially improve the switching behavior of the diodes, there is still a need for further improvement. SUMMARY

[0007] According to one or more embodiments, a power semiconductor diode comprises a semiconductor substrate with a first emitter region of n-type conductivity, a second emitter region of p-type conductivity, and a drift region of n-type conductivity located between the first and second emitter regions. The drift region forms a pn junction with the second emitter region. A first emitter metallization is in contact with the first emitter region.The first emitter region comprises a first n-type doping region and a second n-type doping region, wherein the first doping region forms an ohmic contact with the first emitter metallization and the second doping region forms a non-ohmic contact with the first emitter metallization. The first doping region contains first n-type dopants, and the second doping region contains second n-type dopants, the second dopants being different from the first dopants. A second emitter metallization is in contact with the second emitter region. The semiconductor substrate has a second surface on which the second emitter metallization is formed, a first surface opposite the second surface on which the first emitter metallization is formed, and a lateral edge. The second emitter region is spaced from the lateral edge.The first doping region is formed in an area created by projecting the second emitter region onto the first surface.

[0008] According to one or more embodiments, a power semiconductor diode comprises a semiconductor substrate with a first emitter region, a second emitter region of p-type conductivity, and a drift region of n-type conductivity forming a pn junction with the second emitter region. A second emitter metallization is in contact with the second emitter region. A first emitter metallization is in contact with the first emitter region.The first emitter region comprises first n-type doping regions that form ohmic contacts with the first emitter metallization, and at least one second n-type doping region located laterally adjacent to the first doping regions and forming a Schottky contact with the first emitter metallization. The first doping region contains first n-type dopants, and the second doping region contains second n-type dopants, the second dopants being different from the first dopants. The semiconductor substrate has a second surface on which the second emitter metallization is formed, a first surface opposite the second surface on which the first emitter metallization is formed, and a lateral edge. The second emitter region is spaced apart from the lateral edge.The first doping region is formed in an area created by projecting the second emitter region onto the first surface.

[0009] According to one or more embodiments, a method for fabricating a power semiconductor diode is provided. The method comprises: providing a semiconductor substrate; forming an n-type drift region, a p-type second emitter region, a pn junction between the second emitter region and the drift region, and a first emitter region having a first n-type doping region and a second n-type doping region, wherein first n-type dopants are implanted into the first doping region and second n-type dopants are implanted into the second doping region, the second dopants being different from the first dopants;Forming a first emitter metallization that is in contact with the first emitter region to form an ohmic contact between the first emitter metallization and the first doping region of the first emitter region and to form a non-ohmic contact between the first emitter metallization and the second doping region of the first emitter region; and forming a second emitter metallization that is in contact with the second emitter region, wherein the semiconductor substrate has a second surface on which the second emitter metallization is formed, a first surface opposite the second surface on which the first emitter metallization is formed, and a lateral margin, the second emitter region being formed such that it is spaced apart from the lateral margin; and the first doping region being formed in a region formed by projecting the second emitter region onto the first surface.

[0010] The expert in the field will recognize additional features and advantages when reading the following detailed description and examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The components in the figures are not necessarily to scale; instead, the emphasis has been placed on illustrating the principles of the invention. Furthermore, identical reference numerals in the figures denote corresponding parts. The drawings show... Fig. 1A to 1C a power semiconductor diode according to one embodiment; Fig. 2 an IGBT according to one embodiment; Fig. 3A to 3C the arrangement of the first and second doping regions according to different embodiments; Fig. 4A and Fig. 4B the arrangement of the first doping regions according to different embodiments; Fig. 5 experimental results that were carried out to determine the blocking delay charge for different layouts of the first emitter region; Fig. 6 the simulation results of the blocking delay charge for different layouts of the first emitter region; Fig. 7 the measured characteristic curves of the power diodes, which have different layouts of the first emitter region; and Fig. 8 and Fig. 9 the differential resistance, which is due to Fig. 7 has been derived for different temperatures. DETAILED DESCRIPTION

[0012] The following detailed description refers to the accompanying drawings, which form part thereof and illustrate specific embodiments in which the invention can be carried out. In this context, directional terminology, such as "top," "bottom," "front," "back," "in front," "outside," etc., is used with reference to the orientation of the described figure(s). Because the components of the embodiments can be positioned in numerous different orientations, the directional terminology is used for illustrative purposes and is in no way limiting. Naturally, other embodiments can be used, and structural or logical modifications can be made without departing from the scope of the present invention.The following detailed description is therefore not to be interpreted restrictively, the scope of the present invention being defined by the accompanying claims. The embodiments are described using specific language, which should not be interpreted as limiting the scope of the accompanying claims.

[0013] Naturally, the features of the various exemplary embodiments described herein can be combined with one another unless specifically stated otherwise. Features illustrated or described as part of one embodiment can be used in conjunction with the features of other embodiments to produce yet another embodiment. It is intended that this description encompasses such modifications and variations.

[0014] The term “lateral”, as used in this description, is intended to describe an orientation parallel to the main surface of a semiconductor substrate.

[0015] The term “vertical”, as used in this description, is intended to describe an orientation that is perpendicular to the main surface of the semiconductor substrate.

[0016] In this description, a first surface of a semiconductor substrate is assumed to be formed by the bottom or back side, while a second surface is assumed to be formed by the top, front, or main surface of the semiconductor substrate. The terms "above" and "below," as used in this description, therefore describe the relative location of one structural feature to another, taking this orientation into account.

[0017] When semiconductor devices are mentioned, bipolar devices with at least two terminals are meant; an example is a diode. Semiconductor devices can also be devices with three terminals, such as insulated-gate bipolar transistors (IGBTs). Semiconductor devices can also have more than three terminals. According to one embodiment, the semiconductor devices are power devices.

[0018] With reference to the Fig. In sections 1A to 1C, a first embodiment of a power semiconductor diode 100 is described. The diode 100 comprises a semiconductor substrate 110 having a first surface 111 and a second surface 112 opposite the first surface 111. A second emitter region 120 of a second conductivity type, which in this embodiment is the p-type, is formed on the second surface 112 of the semiconductor substrate 110. A first emitter region 130 of a first conductivity type, which in this embodiment is the n-type, is formed on the first surface 111 of the semiconductor substrate 110. A drift region 140 of the first conductivity type is formed between the second emitter region 120 and the first emitter region 130. The drift region 140 forms a pn junction with the second emitter region 120. An optional field stop region 141 can be formed between the drift region 140 and the first emitter region 130.The field stop region 141 has the same conductivity type (first conductivity type) as the drift region 140 and the first emitter region 130 and has a higher doping concentration than the drift region 140.

[0019] Although in this embodiment the first conductivity type is the n-type and the second conductivity type is the p-type, the first conductivity type can also be the p-type and the second conductivity type can be the n-type.

[0020] The first emitter region 130 contains at least one first doping region 131 and one second doping region 132. Both the first and second doping regions 131 and 132, respectively, have the same conductivity type (first conductivity type). However, the first doping region 131 has a higher surface doping concentration (denoted by n+) than the second doping region 132 (denoted by n).

[0021] The semiconductor substrate 110 can consist of any semiconductor material suitable for the fabrication of semiconductor devices. Examples of such materials include elemental semiconductor materials, such as silicon (Si); group IV compound semiconductor materials, such as silicon carbide (SiC) or silicon germanium (SiGe); binary, ternary, or quaternary III-V semiconductor materials, such as gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium phosphide (InGaP), or indium gallium arsenide phosphide (InGaAsP); and binary or ternary II-VI semiconductor materials, such as... Examples include cadmium telluride (CdTe) and mercury cadmium telluride (HgCdTe), but these are not the only examples. The semiconductor materials mentioned above are also known as homojunction semiconductor materials.When two different semiconductor materials are combined, a heterojunction semiconductor material is formed. Examples of heterojunction semiconductor materials include silicon (Si). x C 1-x ) and a SiGe heterojunction semiconductor material, but are not limited to these. Si, SiC, and GaN materials are currently the most commonly used for power semiconductor applications. In the embodiments described here, the semiconductor substrate 110 consists of Si.

[0022] The power semiconductor diode 100 further comprises a second emitter metallization 152, which is arranged on the second surface 112 of the semiconductor substrate 110, and a first emitter metallization 151, which is arranged on the first surface 111 of the semiconductor substrate 110. The second emitter metallization 152 is in ohmic contact with the second emitter region 120. The first emitter metallization 151 is in ohmic contact with the first doping region 131 of the first emitter region 130. To ensure reliable ohmic contact between the first doping region 131 and the first emitter metallization 151, the surface doping concentration of the first doping region 131 is, according to one embodiment, at least 10 19 / cm 3 According to a further embodiment, the surface doping concentration of the first doping region 131 is at least 5 × 10 19 cm 3 .

[0023] In contrast, the first emitter metallization 151 forms a non-ohmic contact with the second doping region 132 of the first emitter region 130. The surface doping concentration of the second doping region 132 of the first emitter region 130 is therefore lower than the surface doping concentration of the first doping region 131. According to one embodiment, the surface doping concentration of the second doping region 132 of the first emitter region 130 is less than 10 19 / cm 3 According to another embodiment, the surface doping concentration of the second doping region 132 of the first emitter region 130 is less than 10 13 / cm 3 According to another embodiment, the surface doping concentration of the second doping region 132 of the first emitter region 130 is less than 10 17 / cm 3 .

[0024] According to one embodiment, the first emitter region 130 forms a cathode region of the diode 100, and the second emitter region 120 forms an anode region 120 of the diode 100. Furthermore, the first emitter metallization 151 forms a cathode metallization on the first surface 111 of the semiconductor substrate 110 and is thus in direct contact. The second emitter metallization 152 forms an anode metallization on the second surface 112 of the semiconductor substrate 110 and is thus in direct contact.

[0025] When referring to the surface doping concentration of a doping region, this means the doping concentration on the surface of the doping region. The surface doping concentration can differ from the mean or peak doping concentration of the doping region. Typically, the surface doping concentration is lower than the mean or peak doping concentration due to the implantation of dopants at a given distance from the surface.

[0026] When referring to an ohmic contact, this means a contact between two regions, in particular between a metal and a semiconductor region, that are in direct contact, and where the contact has a symmetrical characteristic curve. Non-ohmic contacts, such as pn junctions or Schottky junctions, have asymmetrical characteristic curves.

[0027] According to one embodiment, the first emitter region 130 is structured such that it has at least one first doping region 131 with a higher surface doping concentration than at least one second doping region 132. The first emitter region 130 therefore has a varying lateral surface doping concentration. According to one embodiment, the first emitter region 130 contains several spaced-apart first doping regions 131 extending to the first surface 111 of the semiconductor substrate 110. According to one embodiment, the first emitter region 130 contains several spaced-apart second doping regions 132 extending to the first surface 111 of the semiconductor substrate 110. According to one embodiment, the first emitter region 130 contains several first and second doping regions 131, 132 extending to the first surface 111 of the semiconductor substrate 110.

[0028] According to one embodiment, dopants are implanted into the first surface 111 of the semiconductor substrate 110 using a mask to form the structured first emitter region 130. A higher dose is used for the formation of the first doping regions 131 compared to the formation of the second doping regions 132. Therefore, high-dose implantation is not performed globally, but locally in selected areas, defined, for example, by a mask. The regions with a high surface doping concentration and also with a high peak concentration cover an area that is smaller than the entire area of ​​the first surface 111.

[0029] The surface doping concentration of the first doping regions 131 can be at least 10, at least 100, or even at least 1000 times higher than the surface doping concentration of the second doping regions 132. The first doping regions 131 form areas, for example, several spaced-apart areas, with high specific conductivity and high emitter efficiency. The first doping regions 131 also establish good ohmic contact with the first emitter metallization 151. The second doping regions 132, with a lower emitter efficiency and lower specific conductivity than the first doping regions 131, are arranged between the spaced-apart first doping regions 131. According to one embodiment, the second doping regions 132 form Schottky contacts with the first emitter metallization 151; that is, the non-ohmic contacts are Schottky contacts.The surface doping concentration of the second doping regions 132 can be selected according to specific requirements. Typically, the surface doping concentration of the second doping regions 132 is sufficiently lower than that of the first doping region 131 to ensure the formation of a Schottky contact with the first emitter metallization 151.

[0030] The lower limit of the doping concentration in the second doping regions 132 (less heavily doped regions) can be selected with regard to the desired reverse voltage of the diode 100. For example, the electric field should not reach the first emitter metallization 151 when reverse biased. This can be achieved by providing a total dose from the pn junction to the first emitter metallization 151 that is equal to or greater than the breakdown charge, which for silicon is in the range of approximately 1 to 2 × 10⁻⁶, depending on the background doping. 12 / cm 2 This can be the case. This is typically the case when, as in Fig. 1A a field stop region 141 is present. The required dose can be provided by the second doping regions 132, whose doping concentrations can be adjusted accordingly.

[0031] As in Fig. As shown in Figure 1A, one or more second doping regions 132 can be formed by sections of the field stop region 141. In this case, the second doping regions 132 have the same doping concentration as the field stop region 141. In further embodiments without the field stop region 141, one or more second doping regions 132 can be formed by sections of the drift region 140, so that the second doping regions 132 have the same doping concentration as the drift region 140. In further embodiments, the second doping regions 132 have a higher doping concentration than the drift region 140 and the field stop region 141 if the field stop region 141 is integrated.

[0032] The doping profile along the vertical line AA', which runs through the first doping region 131, is in Fig. Figure 1B shows that the doping concentration of the first doping region 131 is significantly higher than that of the drift region 140 and also that of the optional field-stop region 141. Furthermore, it is very high on the first surface 111 of the semiconductor substrate 110. In contrast, the doping concentration of the second doping region 132 is equal to that of the drift region 140 when no field-stop region 141 is provided, and equal to that of the field-stop region 141 when such a region is provided. Fig. Figure 1C illustrates the doping profile along the vertical line BB', which passes through the second doping region 132.

[0033] The first doping regions 131 can be formed by spaced-apart separate regions or can be a connected region. The second doping regions 132 can also be formed by spaced-apart separate regions or be a connected region. According to one embodiment, the power semiconductor diode 100 comprises a connected second doping region 132 and several spaced-apart first doping regions 131, which are laterally spaced apart by regions of the second doping region 132. According to another embodiment, the power semiconductor diode 100 comprises a connected first doping region 131 and several spaced-apart second doping regions 132, which are laterally spaced apart by regions of the second doping region 131. According to further embodiments, the power semiconductor diode 100 comprises several first and second doping regions 131, 132, which are arranged alternately.

[0034] The Fig. Figures 3A to 3C illustrate several layouts for the arrangement of the first doping regions 131 and the second doping region 132 when viewed from the first surface 111 of the semiconductor substrate 110. According to one embodiment, the first doping regions 131 can be formed as spaced-apart spots or circular doping regions arranged within a singly connected second doping region 132, as shown in Fig. Figure 3A shows that, according to a further embodiment, the first and second doping regions 131, 132 can be formed as alternating stripes, as shown in Fig. Figure 3B illustrates this. According to a further embodiment, the first doping region 131 can be formed as a single connected doping region surrounding several of the second doping regions 132, as shown in Fig. Figure 3C illustrates this. The arrangement of the first and second doping regions 131, 132 may be reversed in the illustrated layouts.

[0035] Specific embodiments include at least one of the following arrangements: - Districts of the first endowment regions 131, which are embedded in a single second endowment region 132; - Districts of the second endowment regions 131 that are embedded in a single first endowment region 131; - alternating stripes of the first and second doping regions 131, 132; - polygonal first doping regions 131 such as rectangles and hexagons embedded in a single second doping region 132; - polygonal second doping regions 132 such as rectangles and hexagons embedded in a single first doping region 131; - regularly arranged first doping regions 131 and second doping regions 132 with selective modifications, as described below; - polygonal first doping regions 131 such as rectangles and hexagons and / or regularly arranged first doping regions 131 embedded in a single second doping region 132, wherein the regular arrangement is achieved, for example, by omitting first doping regions 131 at selection sites (see Fig. 3A, which has a missing first doping region in the otherwise regularly arranged first doping regions 131) contains defects; - any of the above-mentioned arrangements, wherein the regularly arranged first and / or second doping regions 131, 132 are arranged only in the active area of ​​the power diode, as will be described later.

[0036] The specific layout and geometric relationship between the first and second doping regions 131, 132 can be selected according to specific requirements for adjusting the electrical characteristic of the power diode 100. For example, the emitter efficiency of the first emitter region 130 can be adjusted by selecting geometric parameters d and / as shown in the Fig. The values ​​specified are 3A to 3C. Furthermore, the emitter efficiency can be adjusted by selecting suitable area relationships between the total area covered by the first doping regions 131 relative to the total area covered by the second doping regions 132.

[0037] The Schottky contacts formed between the second doping regions 132 and the first emitter metallization 151 are advantageous from an operational perspective. At higher temperatures and higher current densities that occur during operation, the carrier injection of the second doping regions 132 increases because the resistance formed by the Schottky contacts decreases with temperature. This allows the device to handle higher surge currents compared to devices with constant lateral doping. Diodes with Schottky contacts formed at the junction between the first emitter metallization 151 and the semiconductor substrate 110 exhibit an improved characteristic curve, for example, a reduced increase in forward voltage with increasing current compared to conventional diodes. The forward voltage reflects the on-resistance of the device and therefore the magnitude of the losses.The differential resistance for the nominal current and for high currents can be adjusted by appropriately selecting the design and layout of the first and second doping regions 131, 132, as will be illustrated later.

[0038] The field stop region 141 can be formed, for example, by proton implantation. This allows for independent adjustment of the surface doping concentration of the first and second doping regions 131, 132 with respect to the total dose of the field stop region 141. The surface doping concentration of the second doping region 132 defines the characteristic curve of the Schottky contact. Proton implantation results in a doping profile with a maximum dose at the depth of the semiconductor substrate, where the depth of the maximum can be controlled by the implantation energy and the total dose can be controlled by the implantation dose. The surface doping concentration, which defines the contact resistance of the Schottky contact and therefore its temperature characteristic, can be adjusted both by the implantation dose and by an annealing step following the implantation.According to one embodiment, an annealing step is therefore carried out to adjust the surface doping concentration of the second and / or the first doping regions 131, 132.

[0039] According to one embodiment, the first doping region 131 contains first dopants and the second doping region 132 contains second dopants that are different from the first dopants but of the same doping type. The first and second dopants can form first and second donors, respectively, if suitable donors are selected. For example, the second donors can have an energy level different from that of the first donors. For instance, the second donors can have a lower energy level than the first donors. Low-energy donors (second donors) can also be used to form the field stop region 141. It is therefore possible to form second doping regions 132 with low-energy donors independently of the field stop region 141 or together with the field stop region 141.The use of low-energy donors is particularly advantageous because the desired temperature characteristic of the charge carrier injection of the second doping regions 132 can be further improved, as the effective concentration and therefore the injection efficiency (emitter efficiency) of the second doping regions (lightly doped regions) increases with temperature. According to one embodiment, the low-energy donors (second donors) can be formed by implanting second dopants. Subsequently, laser annealing can be performed, which is particularly useful if the second dopants are implanted only into the second doping regions 132 without forming a field-stop region 141, since the laser annealing can be very short and prevents unwanted diffusion.Alternatively, furnace annealing can be performed to drive in the second dopants, which is particularly useful when the second doping regions 132 and the field-stop region 141 are formed together, for example, when sections of the field-stop region 141 extending to the first surface 111 form second doping regions 132. Independent and separate formation of the field-stop region 141 and the second doping regions 132 is also possible and allows greater freedom in adjusting the electrical characteristics, for example, to prevent or reduce current filamentation and thermomigration of the characteristic curve.

[0040] According to one embodiment, the second donors are formed by dopants selected from the group consisting of selenium, sulfur, bismuth, and titanium. Selenium and sulfur are particularly useful.

[0041] According to one embodiment, the first emitter metallization 151 comprises a first metal region 151a containing a first metal and a second metal region 151b containing a second metal different from the first. The first metal region 151a is in contact with the first doping region 131 of the first emitter region 130, while the second metal region 151b is in contact with the second doping region 132 of the first emitter region 130. Using different metals for contacting the first and second doping regions 131, 132 allows for greater freedom in choosing the desired characteristic curves. This is particularly useful for the second doping regions 132, which form Schottky contacts, since different metals form Schottky contacts with different characteristic curves.

[0042] According to one embodiment, the first metal contains aluminum, an aluminum alloy, or titanium. According to another embodiment, the second metal contains titanium, a titanium alloy, tungsten, or a tungsten alloy.

[0043] According to one embodiment, the drift region 140 has a doping concentration lower than that of the first doping region 131 of the first emitter region 130, and is in direct contact with it. The drift region 140 and the first doping region 131 are therefore in direct contact without any other doping regions, such as complementary doped regions, which are conventionally used to adjust the emitter efficiency of the first emitter regions. Therefore, the diode 100 has a simpler layout and more robust operating characteristics than conventional devices.

[0044] According to one embodiment, the field stop region 141 between the drift region 140 and the first emitter region 130 has a doping concentration that is higher than that of the drift region 140 and lower than that of the first doping region 131 of the first emitter region 130, wherein the field stop region 141 is at least in direct contact with the first doping region 131 of the first emitter region 130. The field stop region 141 and the first doping region 131 are in direct contact with each other, so that, depending on the conductivity type, an nn or a pp junction is formed between the field stop region 141 and the first doping region 131. Further complementarily doped regions are not necessary here. Furthermore, no structured field regions are required, which are sometimes used to improve the electrical characteristics.

[0045] The modifications described above are particularly useful for devices with medium blocking voltages, for example in a range of approximately 500 V to 1200 V. For devices with higher blocking voltages, additional complementarily doped regions may be provided.

[0046] According to one embodiment, the semiconductor substrate 100 contains a lateral edge 113, as shown in the Fig. 4A and Fig. Figure 4B illustrates this. The second emitter region 120 is spaced from the lateral edge 113. The first doping regions 131 are formed within a region created by projecting the second emitter region 120 onto the first surface 111, as shown in the Fig. 4A and Fig. 4B illustrates this. Fig. 4A and Fig. Figure 4B illustrates different layouts of circular first doping regions 131 when viewed from the first surface 111. Comparing the Fig. 4A and Fig. In 4B, the first doping regions 131 have different diameters and are arranged along grids with different step sizes. The structuring of the first emitter region 130 is therefore limited to the active area of ​​the power diode 100, which is defined by the lateral extent of the second emitter region 120. According to one embodiment, the first doping regions 131 are therefore formed only within the active area. Furthermore, according to another embodiment, Schottky contacts are formed within the active area.

[0047] For example, it illustrates Fig. 4A a layout of the first emitter region 130, which contains first doping regions 131 shaped as points or circles having a diameter of 20 µm and arranged on a grid having a step size of 25 µm. Fig. Figure 4B illustrates a layout of a first emitter region 130 containing several first doping regions 131 shaped as points or circles with a diameter of 80 µm, arranged on a grid with a 100 µm step size. According to another embodiment, a layout of a first emitter region 130 contains several first doping regions 131 shaped as points or circles with a diameter of 10 µm, arranged on a grid with a 12.5 µm step size. In all the above embodiments, the total area of ​​the first doping regions 131 is approximately 50% of the area covered by the second emitter region 120 when projected onto the first surface 111.In further embodiments, the step size can be varied while keeping the size of each first doping region 131 constant in order to vary the area ratio of the first doping regions 131 relative to the second doping region 132 or to the projected area of ​​the second emitter region 120.

[0048] In the embodiments described above, the first doping regions 131 extend to the edge of the projected second emitter region 120. In further embodiments, the first doping regions 131 can be formed in a smaller area than the projected second emitter region 120. This smaller area may, for example, be reduced to create a circular gap between the outer edge of the projected area of ​​the second emitter region 120 and the outer edge of the smaller area. Typically, the first doping regions 131 are formed in an oriented relationship to the second emitter region 120; that is, the mask used during implantation is oriented with respect to the second emitter region 120.

[0049] According to one embodiment, such as that found, for example, in Fig. As illustrated in Figure 1, a power semiconductor diode 100 comprises a semiconductor substrate 110 with a second emitter region 120 of a second conductivity type, a drift region 130 of a first conductivity type forming a pn junction with the second emitter region 120, and a first emitter region 130. A second emitter metallization 152 is in contact with the second emitter region 120, while a first emitter metallization 151 is in contact with the first emitter region 130. The first emitter region 130 contains first doping regions 131 of the first conductivity type, which form ohmic contacts with the first emitter metallization 151, and second doping regions 132 of the first conductivity type laterally adjacent to the first doping regions 131, which form Schottky contacts with the first emitter metallization 151. The power semiconductor diode 100 can be modified as described above.

[0050] According to one embodiment, such as that found, for example, in Fig. As illustrated in Figure 2, an IGBT 200 is created. The IGBT 200 contains a semiconductor substrate 210 with a source region 243 of the first conductivity type, a body region 242 of the second conductivity type, a drift region 240 of the first conductivity type, and an emitter region 230 of the second conductivity type. A source metallization 252 is in contact with the source region 243, while an emitter metallization 251 is in contact with the emitter region 230. The emitter region 230 contains a first doping region 231 of the second conductivity type and a second doping region 232 of the second conductivity type. The first doping region 231 forms an ohmic contact with the emitter metallization 251. The second doping region 232 forms a non-ohmic contact with the emitter metallization 251. The first doping region 231 can have a higher surface doping concentration than the second doping region 231.

[0051] The semiconductor substrate 210 can be any of the semiconductor materials described above and comprises a first surface 211 and a second surface 212. A gate electrode 260 is insulated with respect to the semiconductor substrate 210. The emitter region 230 comprises first and second doping regions 231, 232, wherein the emitter metallization 251 can be formed and designed as described above in conjunction with the first emitter region 130 and the first emitter metallization 151.

[0052] According to one embodiment, a method for manufacturing the power semiconductor diode 100 comprises at least one of the following processes.

[0053] First, a semiconductor substrate 110 is provided. In a further process, a first-type conductivity drift region 140, a second-type conductivity emitter region 120, a pn junction between the first-type emitter region 120 and the drift region 140, and a first-type emitter region 130 with a first-type conductivity doping region 131 and a second-type doping region 132 are formed. The first-type doping region 131 can have a higher surface doping concentration than the second-type doping region 132. Typically, the second-type emitter region 120 and the first-type emitter region 130 are formed by implantation, with the second-type emitter region 120 being formed on the second surface 112 of the semiconductor substrate 110 and the first-type emitter region 130 being formed on the first surface 111 of the semiconductor substrate 110.

[0054] For the formation of the first and / or second doping regions 131, 132 of the first emitter region 130, an implantation mask is formed on the first surface 111, after which suitable dopants, for example as described above, are implanted.

[0055] In a further process, a second emitter metallization 152 is formed on and in contact with the second emitter region 120. Typically, the second emitter metallization 152 forms an ohmic contact with the second emitter region 120. In a further process, a first emitter metallization 151 is formed on and in contact with the first emitter region 130 to form an ohmic contact between the first emitter metallization 151 and the first doping region 131 of the first emitter region 130, and a non-ohmic contact between the first emitter metallization 151 and the second doping region 132 of the first emitter region 130. The non-ohmic contact is typically a Schottky contact. For this purpose, doping doses for the first and second doping regions 131 and 132 are selected as described above.Alternatively, no additional dopants are implanted into the second doping region 132, for example if an optional field stop region 141 has been formed, and dopants are implanted only into the first doping region 131.

[0056] According to one embodiment, the first dopants are implanted into the first doping region 131 to form first donors. Second dopants, which are different from the first dopants but of the same doping type, are implanted into the second doping region 132 to form second donors. The second donors can form an energy level that is lower than that of the first donors in the semiconductor substrate 110, as described above.

[0057] According to one embodiment, dopants are implanted into the first doping region 131 at a higher dose than into the second doping region 132 in order to obtain a higher surface doping concentration of the first doping region 131 with respect to the second doping region 132.

[0058] According to one embodiment, an annealing process is performed after implantation. This annealing process can be laser annealing. Alternatively or additionally, the annealing process can be carried out in an oven.

[0059] According to one embodiment, a further process includes the formation of a first metal region 151a containing a first metal that is in contact with the first doping region 131 of the first emitter region 130, and the formation of a second metal region 151b containing a second metal that is different from the first metal and is in contact with the second doping region 132 of the first emitter region 130, as described above.

[0060] According to one embodiment, a further process includes the implantation of protons to form a field-stop region 141 near the first emitter region 130, as described above.

[0061] According to one embodiment, the method further comprises modifying the first surface 111 of the first emitter region 130 by implanting undoapplying elements and / or locally or globally porosifying the surface of the first emitter region 130. These processes can be used to modify the charge carrier recombination at the semiconductor / metal interface (between the first / second doping region 131, 132 and the first emitter metallization 151), particularly in the region of the Schottky contacts formed between the second doping regions 132 and the first emitter metallization 151. This contact surface between the semiconductor regions 131, 132 and the first emitter metallization 151 can additionally be modified by damage implantation using undoapplying elements. Examples include argon, silicon, and germanium.Alternatively, the contact surface can be porosified either locally or globally. It is also possible to form recombination regions spaced from the interface between the semiconductor regions 131, 132 and the first emitter metallization 151, for example at a given distance from the first surface 111.

[0062] According to one embodiment, the first surface 111 is treated by phosphorus implantation with a dose of, for example, 4 × 10 14 / cm 2 The material is made amorphous, followed by the deposition of the first emitter metallization 151. An annealing step at elevated temperatures, for example between 350 °C and 420 °C, can follow. This leads to a so-called metal-reinforced solid-phase epitaxy (ME-SPE), which enables the formation of ohmic contacts with low emitter efficiency.

[0063] According to one embodiment, the lifetime of the charge carriers in the semiconductor substrate 110 can be further adjusted by implanting lifetime-limiting elements such as platinum.

[0064] The processes and structures described above are suitable for thin wafer processes because the processes used, such as lithography, ion implantation and annealing processes, are compatible with commonly used carrier systems for thin wafers.

[0065] With reference to Fig. Section 5 describes experimental results obtained to determine the reverse recovery charge for different first-emitter region layouts. Item 501 gives the result for a diode with a homogeneously doped first-emitter region (cathode region), as is commonly used. Item 502 gives the result for a diode with a structured first-emitter region, as described in Fig. 4B is illustrated, while point 503 gives the result for a diode that has a structured first emitter region, as shown in Fig. Figure 4A illustrates this. The first doping regions of the diodes for points 502 and 503 have the same doping concentration as the first emitter region of the homogeneously doped diode of point 501.

[0066] As can be seen from the experimental results, the blocking retardation charge flooding the drift region is significantly lower for the first emitter regions, which possess the first and second doping regions as described above. Furthermore, the amount of blocking retardation charge can be adjusted by appropriately selecting the layout design of the first and second doping regions.

[0067] Fig. Figure 6 illustrates simulation results of the reverse recovery charges for different first-emitter region layouts. Curve 601 illustrates the simulation results for a diode with a homogeneously doped first-emitter region (cathode region), as is commonly used. Curve 602 illustrates the simulation results for a diode with a structured first-emitter region, where the total area of ​​the first doping regions covers approximately 50% of the total area of ​​the first-emitter region. Curve 603 shows the simulation results for a diode with a structured first-emitter region, where the total area of ​​the first doping regions covers approximately 71% of the total area of ​​the first-emitter region. In curve 601, the points represent different doses, with the leftmost point of curve 601 corresponding to a dose of 10 15 / cm 2refers to the area used to create the homogeneous first emitter region, while the rightmost point is located at 10 12 / cm 2 refers to. The other two refer to 10. 14 / cm 2 or 10 13 / cm 2 .

[0068] For curves 602 and 603, the size of the first doping regions decreases from left to right, while the total area of ​​the first doping regions is kept constant to simulate a change in the layout design.

[0069] Fig. Figure 6 shows that the lock-up delay charge can be reduced by changing the layout design.

[0070] Fig. Figure 7 illustrates measured characteristic curves of power diodes with different first-emitter region layouts. Characteristic curves 701a and 701b refer to a diode with a homogeneous first-emitter region (cathode region), while characteristic curves 702a and 702b refer to a diode with a first-emitter region as shown in Fig. 4A illustrates and the characteristic curves 703a, 703b refer to a diode with a first emitter region as in Fig. Figure 4B illustrates this. The characteristic curves labeled "a" are measured at 125 °C, while those labeled "b" are measured at 25 °C. Although the forward voltage drop V F For diodes with a structured first emitter region, the charge potential appears to be larger, but their reverse recovery charge is smaller, which is particularly important for fast switching applications.

[0071] The Fig. 8 and Fig. Figure 9 illustrates the differential resistance resulting from Fig. 7 has been derived for different temperatures. Group “A” designates diodes with a homogeneous first emitter region (derived from characteristic curves 701a and 701b), while “B” designates diodes with a first emitter region as in Fig. 4A illustrates (derived from the characteristic curves 702a and 702b) and designates "C" diodes with a first emitter region as in Fig. 4B illustrates (derived from the characteristic curves 703a and 703b). Fig. Figure 8 illustrates the results for 25 °C, while Fig. Figure 9 illustrates the results for 125 °C. The ranges for which the differential resistance R diff The values ​​that have been determined are shown in the figures. The differential resistance R diff is a measure of the local curvature of the characteristic curves. A low differential resistance R diff This is desirable under high current loads to improve the diode's surge current robustness. As can be seen from the Fig. 8 and Fig.9 can be taken from the differential resistance R diff in particular by changing the layout and design of the first doping regions.

[0072] As described above, providing regions with different doping concentrations but the same conductivity type below (in the projection) the second emitter region, which forms an anode region, to create a structured first emitter region, which forms a cathode region of a diode, improves the emitter efficiency and also reduces switching losses. The more heavily doped regions (first doping regions) form ohmic contacts with the first emitter metallization (cathode metallization), while the less heavily doped regions (second doping regions) form non-ohmic contacts, particularly Schottky contacts, with the first emitter metallization.

[0073] Spatial terms such as "under," "below," "lower," "above," "upper / upper / upper," and the like are used to simplify the description and to explain the positioning of one element relative to another. These terms are intended to encompass various orientations of the device in addition to those shown in the figures. Furthermore, terms such as "first / first / first," "second / second / second," and the like are also used to describe different elements, regions, sections, and the like, and are likewise not intended to be restrictive. The same terms refer to the same elements throughout the description.

[0074] The terms used here, such as "possessing," "containing," "exhibiting," "comprising," and the like, are open expressions that indicate the presence of the mentioned elements or features, but do not exclude further elements or features. The definite and indefinite articles are intended to include both the plural and singular forms, unless the context clearly indicates otherwise.

Claims

[1] Power semiconductor diode, comprising: a semiconductor substrate (110) with a first emitter region (130) of n conductivity type, a second emitter region (120) of p conductivity type and a drift region (140) of n conductivity type arranged between the first emitter region (130) and the second emitter region (120), wherein the drift region (140) forms a pn junction with the second emitter region (120); a first emitter metallization (151) in contact with the first emitter region (130), wherein the first emitter region (130) has a first doping region (131) of the n-conductivity type and a second doping region (132) of the n-conductivity type, wherein the first doping region (131) forms an ohmic contact with the first emitter metallization (151) and the second doping region (132) forms a non-ohmic contact with the first emitter metallization (151), wherein the first doping region (131) has first dopants of the n-type and the second doping region (132) has second dopants of the n-type, wherein the second dopants are different from the first dopants; and a second emitter metallization (152) in contact with the second emitter region (120), wherein the semiconductor substrate (110) has a second surface (112) on which the second emitter metallization (152) is formed, a first surface (111) opposite the second surface (112) on which the first emitter metallization (151) is formed, and a lateral edge (113); the second emitter region (120) is spaced from the lateral edge (113); and the first doping region (130) is formed in an area formed by projecting the second emitter region (120) onto the first surface (111). [2] Power semiconductor diode according to claim 1, wherein the non-ohmic contact is a Schottky contact. [3] Power semiconductor diode according to claim 1 or 2, wherein the first doping region (131) has a higher surface doping concentration than the second doping region (132). [4] Power semiconductor diode according to claim 3, wherein the first doping region (131) has a surface doping concentration of at least 10 19 / cm 3 owns. [5] Power semiconductor diode according to claim 3 or 4, wherein the second doping region (132) has a surface doping concentration of less than 10 19 / cm 3 owns. [6] Power semiconductor diode according to any of the preceding claims, wherein the second dopants are selected from the group consisting of selenium, sulfur, titanium and bismuth. [7] Power semiconductor diode according to one of the preceding claims, wherein the first emitter metallization (151) comprises a first metal region (151a) of a first metal and a second metal region (151b) of a second metal different from the first metal, wherein the first metal region (151a) is in contact with the first doping region (131) of the first emitter region (130) and the second metal region (151b) is in contact with the second doping region (132) of the first emitter region (130). [8] Power semiconductor diode according to claim 7, wherein the first metal comprises aluminium, aluminium alloy or titanium. [9] Power semiconductor diode according to claim 7 or 8, wherein the second metal comprises titanium, titanium alloy, tungsten or tungsten alloy. [10] Power semiconductor diode according to one of the preceding claims, wherein the drift region (140) has a doping concentration that is lower than the doping concentration of the first doping region (131) of the first emitter region (130) and is at least in direct contact with the first doping region (131) of the first emitter region (130). [11] Power semiconductor diode according to any one of the preceding claims 1 to 9, further comprising a field stop region (141) of n conductivity type between the drift region (140) and the first emitter region (130), wherein the field stop region (141) has a doping concentration higher than that of the drift region (140) and lower than that of the first doping region (131) of the first emitter region (130), wherein the field stop region (141) is at least in direct contact with the first doping region (131) of the first emitter region (130). [12] Power semiconductor diode according to one of the preceding claims, further comprising several spaced-apart first doping regions (131). [13] Power semiconductor diode according to one of the preceding claims, further comprising several spaced-apart second doping regions (120). [14] Power semiconductor diode according to one of the preceding claims, wherein the second doping region (120) is formed by sections of the drift region (140). [15] Power semiconductor diode according to any one of claims 1 to 9, further comprising a field stop region (141) of n conductivity type between the drift region (140) and the first emitter region (130), wherein the field stop region (141) has a doping concentration that is higher than the doping concentration of the drift region (140) and lower than the doping concentration of the first doping region (131) of the first emitter region (130), wherein the second doping region (120) is formed by sections of the field stop region (141). [16] Power semiconductor diode according to one of the preceding claims, wherein the first emitter region (130) forms a cathode region and the second emitter region (120) forms an anode region of the power semiconductor diode. [17] Power semiconductor diode, comprising: a semiconductor substrate (110) with a first emitter region (130), a second emitter region (120) of the p-type conductivity and a drift region (140) of the n-type conductivity, which forms a pn junction with the second emitter region (120); a second emitter metallization (152) in contact with the second emitter region (120); a first emitter metallization (151) in contact with the first emitter region (130), wherein the first emitter region (130) comprises first doping regions (131) of the n-conductivity type, which form ohmic contacts with the first emitter metallization (151), and at least one second doping region (132) of the n-conductivity type, which is laterally adjacent to the first doping regions (131) and forms a Schottky contact with the first emitter metallization (151); wherein the first doping regions (130) contain first dopants of the n-type and the at least one second doping region (120) contains second dopants of the n-type that are different from the first dopants, wherein the semiconductor substrate (110) has a second surface (112) on which the second emitter metallization (152) is formed, a first surface (111) opposite the second surface (112) on which the first emitter metallization (151) is formed, and a lateral edge (113); the second emitter region (120) is spaced from the lateral edge (113); and the first doping region (130) is formed in an area formed by projecting the second emitter region (120) onto the first surface (111). [18] Power semiconductor diode according to claim 17, wherein the at least one second doping region (132) is formed by sections of the drift region (140). [19] Power semiconductor diode according to claim 17, which further comprises a field stop region (141) of n conductivity type with a doping concentration that is higher than the doping concentration of the drift region (140) and lower than the doping concentration of the first doping region (131) of the first emitter region (130), wherein the at least one second doping region (120) is formed by sections of the field stop region (141). [20] Power semiconductor diode according to any one of claims 17 to 19, wherein the first emitter metallization (151) comprises first metal regions (151a) of a first metal and second metal regions (151b) of a second metal different from the first metal, and wherein the first metal regions (151a) are in contact with the first doping regions (131) of the first emitter region (130) and the second metal regions (151b) are in contact with the at least one second doping region (120) of the first emitter region (130). [21] Method for manufacturing a power semiconductor diode, comprising: Providing a semiconductor substrate (110); Forming an n-type drift region (140), a p-type second emitter region (120), a pn junction between the second emitter region (120) and the drift region (140), and a first emitter region (130) comprising a first n-type doping region (131) and a second n-type doping region (132), wherein first n-type dopants are implanted into the first doping region (131) and second n-type dopants are implanted into the second doping region (132), the second dopants being different from the first dopants; Forming a first emitter metallization (151) in contact with the first emitter region (130) to form an ohmic contact between the first emitter metallization (151) and the first doping region (131) of the first emitter region (130) and to form a non-ohmic contact between the first emitter metallization (151) and the second doping region (132) of the first emitter region (130); and Formation of a second emitter metallization (152) in contact with the second emitter region (120), wherein the semiconductor substrate (110) has a second surface (112) on which the second emitter metallization (152) is formed, a first surface (111) opposite the second surface (112) on which the first emitter metallization (151) is formed, and a lateral edge (113); the second emitter region (120) is formed such that it is spaced away from the lateral edge (113); and the first doping region (130) is formed in an area formed by projecting the second emitter region (120) onto the first surface (111). [22] Method according to claim 21, further comprising implanting dopants into the first doping region (131) with a higher dose than into the second doping region (132). [23] Method according to any one of claims 21 to 22, comprising forming the first emitter metallization (151): Formation of a first metal region (151a) from a first metal in contact with the first doping region (131) of the first emitter region (130); and Forming a second metal region (151b) from a second metal different from the first metal in contact with the second doping region (132) of the first emitter region (130). [24] Method according to any one of claims 21 to 23, further comprising the implantation of protons to form a field stop region (141) near the first emitter region (130). [25] Method according to any one of claims 21 to 24, further comprising modifying a surface of the first emitter region (130) by implanting non-doping elements and / or local or global porosification of the surface of the first emitter region (130).

Images