Method for manufacturing semiconductor devices with side connection pads

Abstract

Method for manufacturing semiconductor devices (10) whose functionality (11) is at least partially realized in the front face of the device and whose electrical contacting is carried out via at least one connection pad (13) formed on a side face of the device, wherein in addition to the functionality (11) of the semiconductor devices (10) the side connection pads (13) are also formed in the wafer assembly (100), • by defining at least one section of a side surface of the semiconductor device (10) by a first trench (1) in the front face of the wafer assembly (100), • by applying at least one dielectric insulating layer (5) to the front face of the wafer composite (100) structured in this way, in particular to the wall of the first trench (1), and • by applying at least one electrically conductive coating (6) in the form of a metal layer (6) to the dielectric insulating layer (5), in particular in the area of ​​the wall of the first trench (1), wherein at least one second trench (2) is introduced into the front face of the wafer assembly (100) for the isolation of the semiconductor device (10), wherein the dielectric insulating layer (5) on the wall of the first trench (1) is used as a lateral boundary for the second trench (2), wherein the semiconductor device (10) is separated from the wafer assembly (100) starting from the back side, whereby at least one cut (3) is produced in the back side of the wafer assembly (100) which leads into the second trench (2), and wherein the metal layer (6) realized as an electrically conductive coating (6) is reinforced in a further process step, characterized by the fact that The metal layer (6) realized as an electrically conductive coating (6) is reinforced by thickening the metal layer (6) in a currentless electroplating process.

Description

State of the art

[0001] The invention relates to a method for manufacturing semiconductor devices whose functionality is at least partially realized on the front face of the device and whose electrical contact is achieved via at least one connection pad formed on a side face of the device. In addition to the functionality of the semiconductor devices, their lateral connection pads are also formed in the wafer assembly. For this purpose, at least a section of a side face of the semiconductor device is defined by a first trench in the front face of the wafer assembly. Then, at least one dielectric insulating layer is applied to the front face of the wafer assembly thus structured, and in particular to the wall of the first trench. Finally, at least one electrically conductive coating is applied to the dielectric insulating layer, particularly in the region of the wall of the first trench.

[0002] Side connection pads prove particularly advantageous in the context of assembly and interconnection technology (AIT), i.e., in the mounting of semiconductor components on a printed circuit board or in a housing, as they enable particularly space-saving electrical contacting of the component front.

[0003] Thin chips with lateral pads, their fabrication, assembly, and electrical contacting on a printed circuit board are described in German patent application 10 2009 028 961 A1. The lateral pads are implemented as an electrically conductive coating on the chip's side faces. The thin chips are manufactured in a wafer stack using a so-called chip film process. In this process, the entire functionality of the thin chips is implemented in a layered structure on a semiconductor substrate. The chip's side faces are created using a trenching process. Accordingly, the chip's side faces are essentially oriented perpendicular to the chip plane. This trenching process extends across the entire layered structure, i.e., across the entire chip thickness, and is thus part of the singulation process.During the singulation process, cavities are also created beneath the layered structure, so that the individual chips are connected to the semiconductor substrate below the cavity only via support elements within the cavity. In the final step of the singulation process, the finished thin chips are then separated from the semiconductor substrate by mechanically separating these support elements, for example, in a pick-off process. German patent DE 10 2009 028 961 A1 proposes using solder balls for mounting and electrically contacting such a thin chip and arranging them in such a way that they wet both the conductive chip surface and a conductor track on the chip substrate.

[0004] The chip film process described in DE 10 2009 028 961 A1 is limited to the production of thin chips with side connection pads.

[0005] Furthermore, DE 10 2012 205 268 A1 and US 5 606 198 A each describe a manufacturing process for components with at least one connection pad formed on their component side surface, in which, after forming a first trench through a front face of a wafer assembly, at least one dielectric insulating layer and then at least one metal layer are applied to a wall of the first trench. For singulation, at least one second trench is then formed through the front face of the wafer assembly and at least one cut is made through a back face of the wafer assembly, wherein the dielectric insulating layer on the wall of the first trench is used as a lateral boundary for the respective second trench, and the at least one cut opens into the respective second trench. Disclosure of the invention

[0006] The present invention provides a method for manufacturing semiconductor devices with the features of claim 1.

[0007] The present invention proposes measures by which thicker semiconductor devices, such as micromechanical sensor and actuator devices, can be equipped with lateral connection pads, whereby the position and size of these connection pads can be determined largely independently of the size of the device side surface.

[0008] The inventive method is designed for the production of thicker components, since the singulation process includes both structuring the front side, in which the second trenches are created, and processing the back side of the wafer assembly to finally separate the wafer assembly. The second trenches act as "predetermined breaking points" for the backside singulation step. For this purpose, commonly used, cost-effective mechanical methods such as sawing, laser singulation, and splitting can be employed.

[0009] According to the invention, a certain degree of design freedom in the application of the lateral connection pads is achieved by performing the application of the connection pads and the singulation of the semiconductor components in largely independent process steps. Thus, the first trenches serve only to define the side surface areas to be provided with connection pads, while the second trenches exclusively define the predetermined breaking points.

[0010] As mentioned previously, side pads can be used for external contacting of electrical functions located on the front face of a component. This requires significantly less space on a printed circuit board or leadframe than contacting via wire bonds. Side pads are therefore preferred for external contacting of components that, due to their function, are not suitable for flip-chip mounting, such as pressure sensor components. Furthermore, side pads can be advantageously used for contacting components that are integrated within a chip stack. In this case, they function as vias, which are considerably more complex and therefore more expensive to manufacture compared to side pads.

[0011] The process yield, and thus the manufacturing costs per component, depend significantly on the arrangement of the components in the wafer array. In a preferred embodiment of the process according to the invention, the components are arranged and aligned side by side in the wafer array such that the mutually oriented side faces of adjacent components are either both provided with lateral connection pads or both without lateral connection pads. With this grid arrangement of the components, the dielectric insulating layer on the wall of the first two trenches of two adjacent semiconductor components can be used as a boundary on both sides for the second trench, which is introduced into the front face of the wafer array to separate the two semiconductor components. The second trenching process is then self-aligning in this area, which significantly simplifies process control.

[0012] Before separating the wafer assembly from the back side, at least the area of ​​the dielectric insulating layer that borders the second trench should be removed to expose the electrically conductive coating on the wall of the first trench. This conductive coating on the wall section will then be used as a lateral connection pad.

[0013] In the simplest case, the area of ​​the electrically conductive layer that borders the second trench is also removed, so that the conductive layer remains only on the wall section of the first trench, which forms an area of ​​the component's side surface.

[0014] By reinforcing the metal layer, the first trench can even be completely filled before the second trench is created in the surface of the wafer composite. Brief description of the drawings

[0015] As discussed above, there are various ways to advantageously elaborate and further develop the teaching of the present invention. Reference is made, on the one hand, to the claims subordinate to claim 1 and, on the other hand, to the following description of several exemplary embodiments of the invention with reference to the figures. Fig. Figure 1 shows a schematic cross-sectional view through an arrangement of semiconductor devices 10 manufactured according to the invention with lateral connection pads after separation of the wafer composite; Fig. Figures 2a to 2e each show a section through two semiconductor devices arranged side by side in the wafer assembly during a procedure for forming lateral connection pads, which is not covered by the present invention; Fig. Figures 3a to 3c illustrate the inventive realization of lateral connection pads by means of schematic sectional views of two adjacent semiconductor devices in the wafer composite and Fig. 3D shows a top view of this arrangement after the wafer composite has been separated; Fig. Figures 4 to 6 each show a schematic sectional view of an assembly example for a semiconductor device manufactured according to the invention with a side connection pad. Embodiments of the invention

[0016] The sectional view of the Fig. Figure 1 illustrates, firstly, the component concept of semiconductor components manufactured according to the invention, which provides lateral connection pads 13 for the functionality 11 of the component 10 implemented in the front face of the component. Secondly, it illustrates Fig. 1 the realization of these lateral connection pads during the manufacturing process in the wafer composite.

[0017] In the case of the in Fig. In the embodiment shown in Figure 1, the individual components 10 were arranged and aligned in a grid during manufacturing within the wafer assembly such that the mutually oriented side surfaces of adjacent components 10 were either both provided with lateral connection pads 13 or both were formed without lateral connection pads. The individual process steps for generating the connection pads 13 on the side surfaces of the individual components 10 are described below in conjunction with the Fig. 2a to 2e and 3a to 3d are explained in more detail. From Fig. 1 It is at least evident that the lateral connection pads 13 are implemented in the form of an electrically conductive coating of the upper area of ​​a component side surface and are connected to the component functionality 11 to be contacted via connection lines 12 on the front of the component.

[0018] To define the component dimensions, trenches 2 were created in the front side of the wafer assembly during front-side processing. Only then was the wafer assembly separated from the back side to isolate the semiconductor components 10. For this purpose, cuts 3 were made in the back side of the wafer assembly, which open into the trenches 2 on the front side.

[0019] A first method variant for realizing the lateral connection pads 13 is provided by the Fig. Figures 2a to 2e illustrate this. Each figure shows a section of the wafer assembly 100 in the connection area between two semiconductor devices 10. For the sake of clarity, the functionalities of these devices are not shown here.

[0020] In a first structuring process, those sections of the component's side surfaces are defined on which lateral connection pads are to be formed. For this purpose, a first trench 1 is created in the front face of the wafer assembly 100 for each component 10. Since the side surfaces of the adjacent components 10 facing each other in the connection area shown here are both to be provided with connection pads, two trenches 1, separated only by a central web 4 and running parallel to each other, were created, which in Fig. 2a is shown.

[0021] A dielectric insulating layer 5 is first applied to the structured front surface of the wafer composite 100. This layer can be, for example, an oxide layer 5, which can be thermally produced or deposited using a CVD process, so that the walls of the trenches 1 are also coated. An electrically conductive coating 6 is then applied to the dielectric insulating layer 5, which also extends over the walls of the trenches 1. A metallization is preferably chosen as the conductive coating 6. Fig. Figure 2b shows the coated wafer composite 100 after the metallization 6 and the insulation layer 5 have been structured as a mask for a second trenching process, in which the component dimensions in the wafer composite 100 are defined. In this structuring process, the metallization 6 and the insulation layer 5 were removed from the central web 4 between the two trenches 1.

[0022] It should be noted at this point that the central walkway in Fig. 2a can also be omitted entirely. In this case, the metallization 6 and the insulation layer 5 are removed from the bottom area of ​​the first trench 1 where a second trench 2 is subsequently to be created to define the component dimensions.

[0023] In the subsequent trenching process, the central web 4 is then removed by creating a second trench 2 between the two structural elements 10, i.e., between the two first trenches 1. This trenching process is laterally limited by the oxide layers 5 on the walls of the trenches 1, and is therefore self-adjusting in this area. However, the trenching process was continued here beyond the area of ​​the first trenches 1, so that the second trench 2 extends deeper into the wafer composite 100 than the first trenches 1, which in Fig. 2c is shown.

[0024] Subsequently, the oxide 5 exposed in the second trench process is first removed, followed by the removal of the metallization 6 that now borders the second trench 2. This is done using a wet chemical process, whereby the metallization 6 on the wall of the second trench 2 is attacked from both sides, while the metallization 6 on the component's side faces is only etched on one side. The duration of this etching process is chosen such that the metallization 6 on the wall of the second trench 2 is completely etched away, while the metallization 6 on the component's side faces is only thinned to slightly more than half its original thickness. The result of this front-side etching process is shown in Fig. Figure 2d shows the metallization 6 remaining on the component's side faces forming the lateral connection pads 13. These are insulated from the component substrate by the dielectric insulating layer 5 and can be connected to the component functionalities via connection leads on the component's front face. These connection leads 12 are advantageously structured from the metallization 6 on the front face of the wafer composite 100.

[0025] In the embodiment described here, the components 10 are finally separated in a rear-side sawing process. Fig. Figure 2e shows that the saw cuts 3 lead into the front trenches 2 that define the component dimensions.

[0026] The following in connection with the Fig. The method variant described in 3a to 3d enables the realization of particularly low-resistance lateral connection pads 13, which is achieved by a significantly greater metallization thickness.

[0027] As in the case of the first process variant described above, initial trenches 1 are first created in the front face of the wafer assembly 100 to define those sections of the component side faces of the semiconductor devices 20 on which lateral connection pads are to be formed. Then, a dielectric insulating layer 5 and a metallization 6 are applied to the structured front face of the wafer assembly 100, so that the walls of the trenches 1 are also coated. Here, too, the metallization 6 and the insulating layer 5 are structured as a mask for a second trenching process, whereby the metallization 6 and the insulating layer 5 are removed from the central web 4 between the two trenches 1.

[0028] However, the surface metallization 6 is first thickened in a currentless electroplating process. In the embodiment described here, the first trenches 1 are completely filled with metal 7, which results in Fig. Figure 3a shows that suitable metals for such an electroplating process include Cr, Ni, Pt, Au, or combinations of these metals.

[0029] Only then are the component boundaries introduced into the front face of the wafer composite 100 in a second trenching process. As in Fig. As shown in Figure 3b, the central web 4 between the two structural elements 20 is also removed. In this area, the trenching process is laterally limited by the oxide layers 5 on the walls of the trenches 1.

[0030] Subsequently, the oxide 5 exposed in the second trenching process is removed before the components 20 are finally separated in a back-side sawing process, which in Fig. 3c and Fig. is shown in 3D. Here too, the rear saw cuts 3 lead into the front trenches 2, which define the component dimensions. The top view of the Fig. The 3D figure illustrates that the connection pads 13 are integrated into the side faces of the components 20 and are insulated from the component substrate by the dielectric insulating layer 5. Since the connection pads 13 consist of the surface metallization 6 and the electroplated metal 7, they also have a depth, unlike a mere coating. The connecting leads 12 of the connection pads 13 are structured out of the thickened metallization 6, 7 on the front face of the components 20. A thick metallization is particularly advantageous for subsequent soldering; it represents a type of under-bump metallization.

[0031] As already mentioned, side connection pads enable particularly space-saving external contacting of components in a wide variety of mounting situations, which will be illustrated below using the example of micromechanical sensor components.

[0032] Fig. Figure 4 shows a surface micromechanical sensor element 40 for absolute pressure measurement with a pressure diaphragm 41 in the front of the component, which spans a cavity 42 in the component substrate 43. In addition to the pressure diaphragm 41, parts of an evaluation circuit 44 are integrated into the front of the component. The sensor element 40 is equipped with a lateral connection pad 13, which is connected to the evaluation circuit 44 via a connecting line 12 on the front of the component. It is mounted on the back, using chip adhesive 45, on a substrate 46 with conductive traces 47 for interconnection. This substrate can be a housing base or a printed circuit board. The electrical contact of the sensor element 40 is easily made using solder 48 or a solder adhesive, which wets both the conductive trace 47 and the lateral connection pad 13.touches and thus establishes an electrical connection between the conductor track 47 and the lateral connection pad 13. The conductor track 47 is otherwise passivated here by means of a solder mask 49.

[0033] At the in Fig. In the embodiment shown in Figure 5, the sensor element 40 was provided with a premold housing 50. For this purpose, the sensor element 40 was first mounted on a leadframe as a carrier 46. The electrical connection between the sensor element 40 and the leadframe was again made using solder or a solder adhesive 48, which was applied between the lateral connection pad 13 and the leadframe 40. This assembly was then overmolded with molding compound 51. Overmolding is also possible in the premold housing before the sensor element is installed.

[0034] At the in Fig.The component 60 shown in Figure 6 is a chip stack consisting of a micromechanical sensor chip 61 and an ASIC 62, which acts as a cap for the sensor structure. The sensor chip 61 is mounted on the back of a printed circuit board 63 with a via 64. Both the functionality of the sensor chip 61, i.e., the sensor structure, and the functionality of the ASIC 62, i.e., the circuit functions, are implemented on the front of the chip and connected via leads 121 and 122, respectively, to lateral pads 131 and 132. The electrical connections between the sensor chip 61 and the ASIC 62, as well as to the via 64 of the printed circuit board 63, are made using solder 65 and 66 between the lateral pads 131 and 132 and contact surfaces on the sensor chip 61 and on the printed circuit board 63, respectively.

Claims

Method for manufacturing semiconductor devices (10) whose functionality (11) is at least partially realized in the front face of the device and whose electrical contacting is effected via at least one connection pad (13) formed on a side face of the device, wherein, in addition to the functionality (11) of the semiconductor devices (10), the side connection pads (13) are also formed in the wafer assembly (100), • by defining at least a section of a side face of the semiconductor device (10) by a first trench (1) in the front face of the wafer assembly (100), • by applying at least one dielectric insulating layer (5) to the front face of the wafer assembly (100) thus structured, in particular to the wall of the first trench (1), and • by applying at least one electrically conductive coating (6) in the form of a metal layer (6) to the dielectric insulating layer (5).in particular in the area of ​​the wall of the first trench (1), wherein at least one second trench (2) is introduced into the front face of the wafer assembly (100) for the isolation of the semiconductor device (10), wherein the dielectric insulating layer (5) on the wall of the first trench (1) is used as a lateral boundary for the second trench (2), wherein the semiconductor device (10) is separated from the wafer assembly (100) starting from the back, wherein at least one cut (3) is produced in the back face of the wafer assembly (100) which opens into the second trench (2), and wherein the metal layer (6) realized as an electrically conductive coating (6) is reinforced in a further process step, characterized in that the metal layer (6) realized as an electrically conductive coating (6) is reinforced by thickening the metal layer (6) in a currentless electroplating process. Method according to claim 1, characterized in that the semiconductor devices (10) in the wafer assembly (100) are arranged and aligned side by side such that the mutually oriented side surfaces of adjacent semiconductor devices (10) are either both provided with lateral connection pads (13) or both are designed without lateral connection pads. Method according to claim 2, characterized in that the dielectric insulating layer (5) on the wall of the two first trenches (1) of two adjacent semiconductor devices (10) is used as a boundary on both sides for the second trench (2), which is introduced into the front of the wafer assembly (100) to separate the two semiconductor devices (10). Method according to one of claims 1 to 3, characterized in that before the wafer composite (100) is separated from the back side, at least the area of ​​the dielectric insulating layer (5) which limits the second trench (2) is removed. Method according to one of claims 1 to 4, characterized in that before the wafer composite (100) is separated from the back side, the area of ​​the electrically conductive layer (6) which borders the second trench (2) is also removed. Method according to claim 1, characterized in that the first trench (1) is filled by reinforcing the metal layer (6).

Images