Power supply unit

Abstract

Power supply unit (10), comprising: an output semiconductor element (11) provided between a power supply line (Vcc) and an output terminal (OUT), and which is controlled and switched to supply electrical energy to an inductive load connected to the output terminal (OUT); and a clamping circuit (15) which clamps a voltage applied between the power supply line (Vcc) and the output terminal (OUT) due to a counter-electromotive force with respect to an operating reference voltage of the output semiconductor element (11), wherein: the counter-electromotive force is generated in the inductive load when the output semiconductor element (11) switches OFF, the output semiconductor element (11) consists of a semiconductor element with an insulated gate electrode that can switch high electrical energy, the clamping circuit (15) comprises a switching semiconductor element (14) and an operating voltage adjusting diode, the switching semiconductor element (14) is connected by a backflow blocking diode between a gate of the semiconductor element with insulated gate electrode and the power supply line (Vcc), and The operating voltage setting diode determines an ON operating voltage of the switching semiconductor element (14) with respect to the operating reference voltage of the semiconductor element with insulated gate electrode.

Description

GENERAL STATE OF THE ART1. Field of the invention

[0001] The present invention relates to a power supply device that supplies electrical energy to an inductive load, such as a motor. 2. Description of the state of the art

[0002] Fig. Figure 10 is a circuit diagram of the schematic configuration of a representative power supply device 1 according to the state of the art. The power supply device 1 has an output semiconductor element Q1 provided between a power supply line VCC and an output terminal OUT. A positive supply voltage Vcc is supplied from a power supply BAT to the power supply line VCC. An inductive load RL, such as a motor, is connected to the output terminal OUT. Furthermore, the output semiconductor element Q1 consists of a semiconductor element with an insulated gate electrode, such as a power MOSFET or an IGBT, which is capable of switching high electrical energy.

[0003] A gate voltage of the output semiconductor element Q1 is controlled by a drive circuit 3, which is provided by a control circuit 2, for example, implemented as an integrated circuit. Thus, the output semiconductor element Q1 is driven and switched to control the electrical energy supplied to the inductive load RL. The control circuit 2 imports a control signal, which is output, for example, from a microcomputer MC via an input terminal IN to a logic circuit 4, where a gate control signal for the output semiconductor element Q1 is generated.

[0004] Here, logic circuit 4 receives an output from an overvoltage detection circuit 5, an output from a load enable detection circuit 6, and an output from an overcurrent detection circuit 7 to control the generation of the gate control signal. The overvoltage detection circuit 5 monitors the supply voltage Vcc. The load enable detection circuit 6 monitors the voltage at the output terminal OUT. The overcurrent detection circuit 7 is configured to monitor a current flowing from the output of a current-sensing semiconductor element Q2 to the output semiconductor element Q1. The current-sensing semiconductor element Q2 consists, for example, of a MOSFET and is connected in parallel to the output semiconductor element Q1.Furthermore, the reference numeral 8 denotes an internal power supply circuit that is inserted into the control circuit 2, so that an internal power supply required to operate the control circuit 2 can be generated from the supply voltage Vcc.

[0005] Control circuit 2 shifts the level of the gate control signal generated in logic circuit 4 via drive circuit 3 and applies the level-shifted gate control signal to a gate of output semiconductor element Q1. Based on this gate control signal, output semiconductor element Q1 is activated and switched. The gate control signal is also applied to a gate of current-sensing semiconductor element Q2. Thus, output semiconductor element Q1 and current-sensing semiconductor element Q2, in conjunction with each other, switch ON / OFF.

[0006] When the output semiconductor element Q1 switches off, a counter-electromotive force is generated in the inductive load RL, caused by an inductive component. A negative voltage pulse resulting from this counter-electromotive force is applied to the output terminal OUT. Furthermore, the output semiconductor element Q1 will break down if the negative voltage pulse exceeds its breakdown voltage. In this case, the output semiconductor element Q1 will fail due to a breakdown current flowing into it. Therefore, there is a risk that the output semiconductor element Q1 could be thermally destroyed.

[0007] To prevent such a problem, for example a clamping circuit 9 is provided between the power supply line VCC, to which the supply voltage Vcc is supplied, and the gate of the output semiconductor element Q1, as shown in Fig. Figure 10 shows the clamping circuit 9, for example, represented by a Zener diode ZD and a diode D connected in series. The clamping circuit 9 serves to clamp the negative voltage surge applied to the output terminal OUT with respect to the supply voltage Vcc. The clamping circuit 9, which clamps the negative voltage surge applied by the inductive load RL in this way to protect the output semiconductor element Q1, has been described in detail, for example, in JP 2007-028 747 A, JP 2006-148 323 A, JP 2009-130 949 A, etc.

[0008] Furthermore, if the clamping circuit 9 operates due to the negative voltage pulse, the drain-source voltage of the output semiconductor element Q1, for example, reaches the sum of a clamping voltage of the clamping circuit 9 and a threshold voltage of the output semiconductor element Q1, as disclosed in paragraph

[0007] of JP 2007-028 747 A. Other generic circuits are described, for example, in US 5 142 171 A and EP 2 071 724 A1.

[0009] Assume that the output semiconductor element Q1 performs switching operations at its highest rated voltage. In this case, a clamping voltage nearly as high as the highest rated voltage of the output semiconductor element Q1 is required in the clamping circuit 9 when the negative voltage surge is clamped with respect to the supply voltage Vcc, as described above. Such a high clamping voltage is intended to prevent the output semiconductor element Q1 from switching on erroneously due to a voltage surge caused by load shedding. Furthermore, the voltage surge caused by load shedding is a positive voltage surge applied to the power supply line VCC of the power supply unit 1 when a terminal of the power supply unit BAT is disconnected from a vehicle's generator, for example, when the power supply unit 1 is connected to the vehicle.

[0010] In the case where, for example, the highest rated voltage of the output semiconductor element Q1 is 50 V, a clamping voltage (standby voltage) of approximately 50 V is required in the diodes representing the clamping circuit 9. It follows that if, as in Fig. Figure 11 shows that the clamping voltage set by the clamping circuit 9 is set to 50 V with reference to the supply voltage Vcc, and the negative voltage pulse applied to the output terminal OUT, from which, for example, an output voltage Vout can be obtained, can be clamped to -38 V if the threshold voltage of the output semiconductor element Q1 is neglected.

[0011] Furthermore, it shows Fig. 11 The relationship between an output current lout of the output semiconductor element Q1 and the voltage Vout of the output terminal OUT in the power supply device 1, from which an output voltage of 12 V can be obtained when the output semiconductor element Q1 switches ON. Based on the assumption that, for example, the characteristic curve variation of the Zener diode ZD and the diode D representing the terminal circuit 9 is 10% in this case, the terminal voltage can fluctuate in the range of 45 V to 55 V. Furthermore, when the terminal voltage is high, the terminal resistance (which will be described later) is reduced during the terminal operation of the terminal circuit 9. This also leads to the problem that the required characteristics of the output semiconductor elements Q1 or the diodes representing the terminal circuit 9 must be strictly designed, which adversely affects the cost. BRIEF SUMMARY OF THE INVENTION

[0012] The invention was achieved taking such circumstances into account. One object of the invention is to provide a power supply device equipped with a clamping circuit that can effectively clamp a negative voltage pulse originating from a counter-electromotive force generated in an inductive load to a low clamping voltage.

[0013] According to one aspect of the present invention, a power supply device according to claim 1 is provided. Further aspects of the invention are the subject of the dependent claims, the drawings, and the description of exemplary embodiments.

[0014] Furthermore, the output semiconductor element consists of a semiconductor element with an insulated gate electrode, such as a power MOSFET or an IGBT.

[0015] The clamping circuit is preferably configured to include a switching semiconductor element and a supply voltage setting diode. The switching semiconductor element consists, for example, of a MOSFET. The switching semiconductor element is connected via a reverse-flow blocking diode between a gate of the power MOSFET or IGBT serving as the output semiconductor element and the power supply line. The supply voltage setting diode determines an ON supply voltage of the switching semiconductor element with respect to the supply reference voltage of the semiconductor element with an insulated gate electrode.

[0016] Furthermore, the clamping circuit includes a resistor and a reverse current protection diode. The resistor reduces the gate voltage of the semiconductor element with an insulated gate electrode to a voltage at the output terminal. The reverse current protection diode prevents current from flowing back through the resistor.

[0017] Furthermore, the clamping circuit includes a first control semiconductor element and a second control semiconductor element. The first control semiconductor element disconnects the switching semiconductor element from the power supply line when the power supply line goes to a low voltage. The second control semiconductor element is connected between the gate of the semiconductor element with an insulated gate electrode and the power supply line via a clamping voltage setting diode instead of the switching semiconductor element.

[0018] Furthermore, the second control semiconductor element clamps a voltage applied between the power supply line and the output terminal to a voltage set by the clamping voltage adjusting diode with respect to the voltage of the power supply line when the power supply line goes to a low voltage.

[0019] If the output semiconductor element is an n-channel power MOSFET or IGBT and the switching semiconductor element is an n-channel MOSFET, p-channel MOSFETs controlled for complementary ON / OFF switching are preferably used as the first and second control semiconductor elements.

[0020] Furthermore, if the output semiconductor element consists of a semiconductor element with an insulated gate electrode, across whose gate a control voltage is applied via a gate resistor, enabling the semiconductor element with an insulated gate electrode to switch ON / OFF to switch high electrical energy, then the semiconductor element with an insulated gate electrode is preferably equipped with a discharge circuit that discharges charges accumulated in the gate of the semiconductor element with an insulated gate electrode when the semiconductor element with an insulated gate electrode switches OFF. In this case, the clamping circuit can be implemented as a diode that is provided between a ground line defining an operating reference voltage of the semiconductor element with an insulated gate electrode and the gate of the semiconductor element with an insulated gate electrode, and that clamps a gate voltage of the semiconductor element with an insulated gate electrode.

[0021] The power supply device with the aforementioned configuration is configured to include a clamping circuit that performs a clamping operation with respect to an operating reference voltage of an output semiconductor element that is driven and switched, at a voltage (i.e., a negative voltage pulse) applied between the power supply line and an output terminal due to a counter-electromotive force generated in an inductive load. In other words, this type of clamping circuit according to the prior art is configured to clamp only the negative voltage pulse with respect to a supply voltage. In contrast, the clamping circuit of the invention is configured to clamp the negative voltage pulse with respect to a ground potential serving as the operating reference voltage of the output semiconductor element.

[0022] Consequently, the negative voltage surge applied to the output terminal by the inductive load can be clamped with respect to ground potential, thus reducing the clamping voltage of the clamping process performed by the clamping circuit to, for example, approximately 5 V. This allows the clamping resistance in the clamping circuit to be sufficiently increased. Furthermore, voltage fluctuations caused by characteristic curve variations of the elements constituting the clamping circuit can be suppressed. Moreover, the clamping circuit only performs a clamping process with respect to ground potential when a voltage surge caused by load shedding is applied to the power supply line. It is therefore advantageous that a malfunction due to a voltage surge caused by load shedding can be prevented. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a circuit diagram of the schematic configuration of a main part of a power supply device according to a first embodiment of the invention; Fig. 2 is a waveform diagram showing the clamping process of a clamping circuit at a negative voltage pulse in the Fig. 1 shows the power supply unit; Fig. Figure 3 is a diagram showing the relationship between a clamping voltage and a clamping resistance; Fig. Figure 4 is a diagram showing the clamping voltage and a waveform of a clamping process; Fig. Figure 5 is a circuit diagram of the schematic configuration of a main part of a power supply device according to a second embodiment of the invention; Fig. Figure 6 is a circuit diagram of the schematic configuration of a main part of a power supply device according to a third embodiment of the invention; Fig. 7 is a waveform diagram showing the clamping process of a clamping circuit at a negative voltage pulse in the Fig. The power supply unit shown in section 6 is shown; Fig. 8 is a view showing a business where the in Fig. 6. The power supply device shown is connected to a power supply with reversed polarity; Fig. Figure 9 is a diagram showing a load characteristic in relation to a gate voltage of an output semiconductor element with reverse polarity connected to the power supply; Fig. Figure 10 is a circuit diagram of the schematic configuration of a main part of a power supply device according to the state of the art; and Fig. Figure 11 is a waveform diagram showing the clamping process of a clamping circuit at a negative voltage pulse in the Fig. 10 shows a power supply device from the state of the art. DETAILED DESCRIPTION OF THE INVENTION

[0023] Power supply devices according to the embodiments of the invention are described below with reference to the drawings.

[0024] Fig. Figure 1 is a circuit diagram of the schematic configuration of a main part of a power supply device 10 according to a first embodiment of the invention. Reference numeral 11 designates an output semiconductor element that is provided between a power supply line VCC and an output terminal OUT for control and switching. A positive supply voltage Vcc of, for example, 12 V is supplied to the power supply line VCC by a power supply BAT. The output semiconductor element 11 consists of a semiconductor element with an insulated gate electrode that can switch high electrical energy, such as an n-channel power MOSFET or IGBT, preferably a trench-gate MOSFET.

[0025] A control circuit 12, built as an integrated circuit, generates a gate control voltage which is applied via an output terminal CP of the control circuit 12 in a fundamentally similar manner to the circuit described in Fig. The output is provided by the power supply unit 1 shown in Figure 10. The output semiconductor element (MOS) 11 receives the gate control voltage at its gate and performs a switching operation to control an output current to the output terminal OUT. Furthermore, the semiconductor element, consisting of a power MOSFET, is provided to connect its drain to the power supply line VCC and its source to the output terminal OUT. The output semiconductor element 11 receives the gate control voltage at its gate via the series-connected resistors R1 and R3 and performs an ON / OFF operation. Furthermore, for example, a motor serving as an inductive load is connected between the output terminal OUT and a negative electrode (ground) lead of the power supply BAT.

[0026] Furthermore, a discharge control semiconductor element 13 is provided between a connection point between resistors R1 and R3 and the output terminal OUT via resistor R2. The discharge control semiconductor element 13 consists of an n-channel MOSFET (NM2). The discharge control semiconductor element 13 is driven to switch ON / OFF under the control of the control circuit 12. The discharge control semiconductor element 13 is driven to switch ON / OFF in a complementary manner with the output semiconductor element (MOS) 11. Thus, the discharge control semiconductor element 13 serves to discharge charges accumulated in the gate of the output semiconductor element 11 when the output semiconductor element 11 switches OFF. Furthermore, a diode 5 is provided between a source of the discharge control semiconductor element 13 and the output terminal OUT to prevent current backflow from the output terminal OUT.

[0027] On the other hand, a switching semiconductor element 14 consisting of an n-channel MOSFET (NM1) is connected via two diodes D3 and D4 between the gate of the output semiconductor element 11 and the power supply line VCC, to which the positive supply voltage Vcc is supplied. Furthermore, diodes D3 and D4 are connected in series between a source of the switching semiconductor element 14 and the gate of the output semiconductor element 11. Additionally, a gate of the switching semiconductor element 14 is connected via a diode D1 to a ground line IC-GND of the control circuit 12. The ground line IC-GND is set to a ground potential that defines an operating reference voltage for the control circuit 12 and the output semiconductor element 11, specifically to the same potential as the negative electrode line of the power supply BAT.

[0028] Furthermore, the gate of the switching semiconductor element 14 is connected to the output terminal OUT via a resistor R4 to pull its potential down and secure the gate potential of the switching semiconductor element 14. Additionally, a diode D2 is connected between resistor R4 and the output terminal OUT to prevent current from flowing back into the gate of the switching semiconductor element 14. Resistor R4 has a resistance value of, for example, approximately 200 kΩ. The switching semiconductor element 14 and the diodes D1, D2, D3, and D4 form a clamping circuit 15 that clamps a negative voltage pulse applied to the output terminal with respect to ground potential.

[0029] When the negative voltage pulse is applied to the output terminal OUT according to the clamping circuit 15 configured as described above, the anode potential of diode D3 is determined by diode D1 via the switching semiconductor element (NM1) 14 with respect to ground potential (0 V). Furthermore, the potential of the output terminal OUT is determined by diodes D3 and D4 via the output semiconductor element (MOS) 11. The negative voltage pulse applied to the output terminal OUT is clamped to a voltage that has dropped relative to ground potential (0 V), corresponding to the potential of the IC-GND ground line, due to the forward voltages Vf of diodes D1, D3, and D4 and the operating threshold voltages Vth of the output semiconductor element 11 and the switching semiconductor element 14.

[0030] In other words, the negative voltage pulse applied to the output terminal OUT is clamped to a negative voltage [3 x Vf + 2 x Vth] with respect to the ground potential (0 V) of the IC-GND line, defined by the forward voltages of diodes D1, D3, and D4 and the operating threshold voltages Vth of the output semiconductor element 11 and the switching semiconductor element 14. Assume that the forward voltages Vf of diodes D1, D3, and D4 are each 0.6 V and that the operating threshold voltages Vth of the MOSFETs representing the output semiconductor element 11 and the switching semiconductor element 14 are each 1.8 V. In this case, a clamping voltage set by the clamping circuit 15 is approximately -5.4 V.

[0031] This means that the negative voltage pulse applied to the output terminal OUT due to a counter-electromotive force generated in the inductive load RL is clamped to the clamping voltage of approximately -5.4 V with respect to ground potential (0 V) set by the clamping circuit 15, as shown in Fig. 2 shown. Accordingly, it will be sufficient if the withstand voltage of the elements representing the terminal circuit 15, in particular the switching semiconductor element (NM1) 14 and the diodes D3 and D4, is set to approximately 17.4 V, which corresponds to the sum of the supply voltage Vcc of 12 V and the terminal voltage of 5.4 V.

[0032] Furthermore, according to the embodiment of the invention, there is no risk that the clamping circuit could erroneously switch ON due to the aforementioned voltage surge caused by load shedding. Therefore, it is not necessary to adjust the withstand voltage of the clamping circuit 15 to be almost as high as the highest rated voltage of the output semiconductor element 11, as is the case in the prior art. Consequently, the clamping circuit 15, which has a low withstand voltage, can effectively protect the output semiconductor element 11 from the negative voltage surge resulting from the counter-electromotive force generated in the inductive load RL.

[0033] Furthermore, even if, in this case, a fluctuation of 10% each occurs in the forward voltages Vf of diodes D1, D3, and D4 forming the terminal circuit 15 and the operating threshold voltages Vth of the output semiconductor element 11 and the switching semiconductor element 14, the terminal voltage can be set approximately in the range of approximately 4.9 V to approximately 5.9 V. That is, a setting error of the terminal voltage can be suppressed to approximately ±0.5 V. Accordingly, the setting error of the terminal voltage can be reduced to approximately 1 / 10 relative to approximately ±5 V of the value in the Fig. The power supply unit 1 shown in section 10 is reduced from the state of the art.

[0034] Furthermore, the clamping resistance of the clamping process carried out by the clamping circuit 15, that is, the total amount of energy that the output semiconductor element 11 has to cope with due to the clamping process, depends largely on the clamping voltage, as shown in Fig. Figure 3 shows that the clamping resistance decreases with increasing clamping voltage. Thus, according to the clamping circuit 15, which sets the clamping voltage relative to the ground voltage as in the invention, the clamping voltage against the negative voltage pulse can therefore be set to, for example, approximately 17.4 V, which is considerably lower than the maximum rated voltage of the output semiconductor element 11 compared to the prior art clamping circuit 9, which sets the clamping voltage relative to the supply voltage Vcc. As in an operating waveform during clamping in Fig. As shown in Figure 4, the energy accumulated in the inductive load RL can therefore be absorbed for a long time, depending on the terminal voltage, which can be set low, thus increasing the total amount of energy that can be handled. As shown in Figure 4, the energy accumulated in the inductive load RL can therefore be absorbed for a long time, depending on the terminal voltage, which can be set low, so that the total amount of energy that can be handled can be increased. Fig. As shown in Figure 3, the clamping resistance can therefore be increased according to the clamping voltage, which can be set low.

[0035] Furthermore, in the Fig. In the power supply device shown in Figure 10, a very small current is supplied from the ground line IC-GND through resistor R4 to the output terminal OUT when the negative voltage pulse is clamped. This protects the forward voltage Vf of diode D1. However, current also flows through resistor R4 to the output terminal OUT during normal operation. Consequently, it is desirable to set the value of resistor R4 to a large value and, if necessary, to protect the withstand voltage between the ground line IC-GND and the output terminal OUT in diode D2.

[0036] Regarding the clamping voltage, the voltage dependent on the through-voltage Vf of the diodes can also be adjusted, for example, by changing the number of diodes connected in series between the source of the switching semiconductor element 14 and the gate of the output semiconductor element 11. Alternatively, the clamping voltage can also be adjusted by matching the threshold voltages Vth in the ON operation of the output semiconductor element 11 and the switching semiconductor element 14. Furthermore, the aforementioned diode D1 can be removed so that the gate of the switching semiconductor element 14 can be connected directly to the IC-GND ground line. In this case, the gate voltage of the switching semiconductor element 14 is set to ground potential (0 V), thus eliminating the need for resistor R4 and diode D2.

[0037] Furthermore, diodes D3 and D4 are each provided to prevent backflow, thus preventing current from flowing from the output terminal CP into an n-type semiconductor substrate connected to the power supply line VCC during normal operation. That is, a voltage higher than the supply voltage Vcc is output from the output terminal CP to drive the output semiconductor element 11, which is an n-channel MOSFET. If diodes D3 and D4 are not provided, this voltage higher than the supply voltage Vcc is applied directly to a p-well region of the n-type semiconductor substrate where the switching semiconductor element 14 is located. Consequently, the current flows through this p-well region, containing the switching semiconductor element 14, into the n-type semiconductor substrate, where the terminal circuit 15 is located and which is connected to the power supply line VCC.Diodes D3 and D4 are provided to prevent this. Furthermore, the gate potential of the switching semiconductor element 14 is lower than the source voltage, which in this case is the supply voltage Vcc, during normal operation. Consequently, the switching semiconductor element 14 is OFF.

[0038] If a back-gate, which is itself a substrate of the switching semiconductor element 14 represented by the p-shaped well region, is connected to the output terminal OUT, the output from the output terminal CP is only connected to an n-type region, which is a source-drain terminal of the switching semiconductor element 14. A diode connected in reverse polarity is then represented by the n-type region and the p-shaped well region of the n-type semiconductor substrate, the potential of which is equal to the potential of the output terminal OUT. Consequently, backflow into the power supply line VCC does not need to be prevented. If there is no problem setting the terminal voltage of the terminal circuit 15, diodes D3 and D4 can therefore be removed.

[0039] In some applications of the power supply unit 10, the wiring of a control system to the ground line IC-GND in the power supply unit 10 and to the ground line connecting the inductive load RL connected to the output terminal OUT and the negative electrode of the power supply BAT can be routed separately.

[0040] For example, if a circuit between the IC-GND ground line and the ground line at the negative electrode side of the power supply BAT is opened in such an application, current from the microcomputer side can flow into the IC-GND ground line. The IC-GND ground line is then pulled to a higher potential by the current flowing in it. Consequently, the switching semiconductor element 14 can switch ON, and the output semiconductor element 11 can also switch ON. In this case, there is a concern that the output semiconductor element 11 could be thermally destroyed. In this embodiment, the clamping voltage is specifically set to -5.4 V. Therefore, there is a possibility that the output semiconductor element 11 could be thermally destroyed if the IC-GND ground line is pulled to a potential of at least -5.4 V.If such an application is assumed, it is desirable that the power supply device be as described in . Fig. 5 is configured.

[0041] Fig. Figure 5 is a circuit diagram of the schematic configuration of a main part of a power supply device 20 according to a second embodiment of the invention. The same parts as those of the in Fig. The power supply unit 10 shown in 1 is assigned the same reference numerals, so that a detailed description of it can be omitted.

[0042] The power supply device 20 comprises a first control semiconductor element 21 and a second control semiconductor element 22. The first control semiconductor element 21 is provided between the drain of the switching semiconductor element 14 and the power supply line VCC. The second control semiconductor element 22 is provided between the source of the switching semiconductor element 14 and the power supply line VCC via a Zener diode D6, which sets the clamping voltage and constitutes a second clamping circuit 16. These first and second control semiconductor elements 21 and 22 consist of p-channel MOSFETs (PM1 and PM2).

[0043] Furthermore, the control circuit 12 provides a low-voltage detection circuit 23 for detecting a relative decrease in the supply voltage caused by the potential increase of the IC-GND ground line. A low-voltage detection signal detected by the low-voltage detection circuit 23 is configured to be directly fed into a gate of the second control semiconductor element 22 via an inverting circuit 24 and applied to a gate of the first control semiconductor element 21. In other words, the first and second control semiconductor elements (PM1 and PM2) 21 and 22 are driven to switch ON / OFF in a complementary manner in accordance with the low-voltage detection signal.

[0044] Furthermore, the voltage detected by the low-voltage detection circuit must be set to a value that reliably detects the relative decrease in the supply voltage Vcc caused by the potential increase of the IC-GND ground line. Additionally, with the IC-GND ground line open, the potential of the IC-GND ground line can be reliably increased by increasing the impedance of resistor R4, increasing the static supply current of the control circuit 12, adjusting the impedance of the microcomputer MC, etc. Moreover, the voltage detected by the low-voltage detection circuit 23 is preferably set to the lowest possible voltage for the following reasons. For the sake of simplicity, the description here assumes that the voltage detected by the low-voltage detection circuit 23 is 5 V.

[0045] Furthermore, the first control semiconductor element (PM1) 21 serves to disconnect the switching semiconductor element (NM1) 14 from the power supply line VCC when the power supply line VCC goes to a low voltage. Additionally, the second control semiconductor element (PM2) 22 serves to connect the Zener diode D6 between the gate of the output semiconductor element (MOS) 11 and the power supply line VCC, instead of the switching semiconductor element 14 and in addition to diodes D3 and D4, so that the Zener diode D6 can be connected in series with diodes D3 and D4.

[0046] According to the power supply device 20 configured as described, the potential of the IC-GND ground line is increased by the current flowing from the microcomputer side due to the opening of the ground connection. The relative drop in the supply voltage Vcc caused by the potential increase of the IC-GND ground line is detected by the low-voltage detection circuit 23. When the low voltage is detected, the switching semiconductor element (NM1) 14 is disconnected due to complementary ON / OFF operations of the aforementioned first and second control semiconductor elements (PM1 and PM2) 21 and 22. The Zener diode D6 and the diodes D3 and D4 are connected in series between the gate of the output semiconductor element (MOS) 11 and the power supply line VCC.

[0047] A series circuit consisting of the Zener diode D6 and the diodes D3 and D4 serves as a clamping circuit, which absorbs the negative voltage surge with respect to the supply voltage Vcc in a similar manner to the circuit described in Fig. The power supply device 1 shown in Figure 10 is clamped. The clamping voltage in this case is approximately 23 V, which is the sum of the through-voltages Vf of diodes D3 and D4 and the operating threshold voltage Vth of the output semiconductor element (MOS) 11, when a Zener breakdown voltage of Zener diode D6 is 20 V.

[0048] Consequently, when the supply voltage Vcc decreases relatively due to the potential increase of the ground line IC-GND, the switching semiconductor element (NM1) 14 is disconnected from the power supply line VCC by the first control semiconductor element (PM1) 21 in response to the detection results of the low-voltage detection circuit 23. This prevents the output semiconductor element 11 from switching ON. In this embodiment, the clamping voltage is 23 V. Therefore, the effect can be achieved while the ground line IC-GND is open if the supply voltage of the power supply BAT is not higher than 23 V.

[0049] If the invention is applied in a case where the supply voltage of the power supply BAT is much higher, the invention can handle the case if the withstanding voltage of the Zener diode D6 is increased or several Zener diodes D6 are connected in series.

[0050] Furthermore, during normal operation, where the circuit between the IC-GND ground line and the negative electrode side of the power supply BAT is not open, a low voltage is also detected when the supply voltage Vcc itself decreases. Therefore, the switching semiconductor element 14 can be disconnected in such a case. The clamping circuit, consisting of the Zener diode D6 and diodes D3 and D4, is connected to the gate of the output semiconductor element (MOS) 11. In this case, the clamping voltage is 23 V with respect to the power supply line VCC.

[0051] The energy accumulated in the inductive load RL decreases in accordance with the significant decrease in the supply voltage Vcc. Consequently, the clamping resistance should not pose a practical problem. In other words, if the supply voltage of the power supply BAT is not less than 5 V and a high clamping voltage is required, the clamping voltage is set to -5.4 V with respect to the IC-GND ground line. If the supply voltage of the power supply BAT is not less than 5 V and a high clamping resistance is not required, the clamping voltage is set to -23 V with respect to the power supply line VCC. Furthermore, the low-voltage detection value can be changed according to the specifications to adjust the operating mode. The withstand voltage of the Zener diode D6 can also be reduced according to the specifications.

[0052] On the other hand, the clamping voltage relative to the ground voltage (0 V) serving as the operating reference voltage of the output semiconductor element (MOS) 11 can be adjusted by the clamping circuit, which, for example, is configured as shown in Fig. 6 is shown configured. Fig. Figure 6 is a circuit diagram of the schematic configuration of a main part of a power supply device 30 according to a third embodiment of the invention. The same parts as those of the in Fig. The power supply unit 10 shown in 1 is assigned the same reference numerals, so that a detailed description of it can be omitted.

[0053] The power supply device 30, for example, comprises three diodes D7, D8, and D9, which are connected in series and between the ground line IC-GND of the control circuit 12 and the gate of the output semiconductor element (MOS) 11. These diodes D7, D8, and D9 serve to clamp a negative voltage pulse applied to the output terminal OUT through the output semiconductor element (MOS) 11. Furthermore, the clamping circuit 16, configured in this way, clamps the negative voltage pulse to a voltage [3xVf+Vth], which is determined based on the forward voltages Vf of the three diodes D7, D8, and D9 and the operating threshold voltage Vth of the output semiconductor element (MOS) 11, with respect to the ground potential (0 V) of the ground line IC-GND, as shown in Fig. 7 shown.

[0054] Furthermore, if the terminal circuit 16 is configured as described above, a similar effect to that of the aforementioned first embodiment can be achieved. Additionally, according to the third embodiment, the circuit configuration of the power supply device 30 can be simplified due to the removal of the switching semiconductor element 14 in the aforementioned first embodiment.

[0055] Furthermore, the aforementioned configuration prevents thermal damage to the output semiconductor element (MOS) 11, even if, for example, the power supply unit 30 is connected to the power supply unit BAT with reverse polarity. This means that if the power supply unit 30 is connected to the power supply unit BAT with reverse polarity, a positive supply voltage Vcc is applied to the ground line IC-GND. The current from the power supply unit BAT branches off and, after passing through diodes D7, D8, and D9, flows through the discharge control semiconductor element (NM2) 13 into the control circuit 12 and the output terminal OUT, as shown in Fig. 8 shown.

[0056] Furthermore, a portion of the current flows into the gate of the output semiconductor element (MOS) 11. Then, the output semiconductor element (MOS) 11, into whose gate charges are being injected, switches ON, so that the current flows in the opposite direction, from the output terminal OUT towards the power supply line VCC in the output semiconductor element (MOS) 11. In this instance, the current only flows into the output semiconductor element (MOS) 11 when the ON resistance is low. Consequently, overheating of the output semiconductor element (MOS) 11 is prevented.

[0057] Furthermore, a load characteristic curve concerning the gate voltage of the output semiconductor element (MOS) 11 during reverse polarity connection is shown in Fig. Figure 9 is shown. Furthermore, it is assumed here that the supply voltage of the BAT power supply is set to 16 V. As shown in Fig.As shown in Figure 9, the load characteristic achieved by the combined resistance of resistors R1 and R2 is approximately linear with respect to changes in the supply voltage Vcc. On the other hand, the terminal voltage defined by diodes D7, D8, and D9 remains essentially constant regardless of changes in the supply voltage Vcc. Therefore, with respect to the gate voltage of the output semiconductor element (MOS) 11 during the aforementioned reverse polarity connection, the number of diodes D7, D8, and D9 defining the terminal voltage can be adjusted, or polysilicon resistors, etc., can be connected in series with the diodes to adjust the load characteristic of the terminal circuit 16 consisting of diodes D7, D8, and D9.

[0058] Furthermore, the invention is not limited to the aforementioned embodiments. Here, power supply devices 10, 20, and 30, each using an n-channel power MOSFET as the output semiconductor element 11, have been described. However, it is also self-evident that the power supply device 10, 20, or 30 can be formed using an n-channel IGBT. Moreover, the invention can also be applied to a power supply device that uses a p-channel power MOSFET or IGBT to drive the inductive load RL with reverse polarity when the battery supply polarities are reversed. This works well in this case as long as the polarities of the aforementioned elements are reversed. Therefore, the description need not be repeated.

[0059] With regard to the specific configuration of the control circuit 12, the control circuit 12 can also have various functions, as proposed in the prior art. In short, the invention comprises a clamping circuit that sets a clamping voltage against a negative voltage pulse with respect to a ground voltage that defines an operating reference voltage of an output semiconductor element. Accordingly, the invention can be modified and implemented in various ways without deviating from the inventive concept and scope of the invention.

Claims

[1] Power supply unit (10), comprising: an output semiconductor element (11) provided between a power supply line (Vcc) and an output terminal (OUT), and which is controlled and switched to supply electrical energy to an inductive load connected to the output terminal (OUT); and a clamping circuit (15) which clamps a voltage applied between the power supply line (Vcc) and the output terminal (OUT) due to a counter-electromotive force with respect to an operating reference voltage of the output semiconductor element (11), wherein: the counter-electromotive force is generated in the inductive load when the output semiconductor element (11) switches OFF, the output semiconductor element (11) consists of a semiconductor element with an insulated gate electrode that can switch high electrical energy, the clamping circuit (15) comprises a switching semiconductor element (14) and an operating voltage adjusting diode, the switching semiconductor element (14) is connected by a reverse-flow blocking diode between a gate of the semiconductor element with insulated gate electrode and the power supply line (Vcc), and The operating voltage setting diode determines an ON operating voltage of the switching semiconductor element (14) with respect to the operating reference voltage of the semiconductor element with insulated gate electrode. [2] Power supply device (10) according to claim 1, wherein: the output semiconductor element (11) consists of an n-channel power MOSFET or IGBT and the switching semiconductor element (14) consists of an n-channel MOSFET. [3] Power supply device (10) according to claim 1, wherein: the clamping circuit (15) further comprises a resistor (R4) and a reverse flow protection diode (D2), The resistor (R4) pulls down the gate voltage of the semiconductor element with insulated gate electrode to a voltage at the output terminal (OUT), and The reverse current protection diode (D2) prevents a current from flowing back through the resistor (R4). [4] Power supply device (10) according to claim 1, wherein: the terminal circuit (15) further comprises a first control semiconductor element and a second control semiconductor element, the first control semiconductor element disconnects the switching semiconductor element (14) from the power supply line (Vcc) when the power supply line (Vcc) goes to a low voltage, and the second control semiconductor element is connected between the gate of the semiconductor element with insulated gate electrode and the power supply line (Vcc) by means of a clamping voltage setting diode instead of the switching semiconductor element (14). [5] Power supply device (10) according to claim 4, wherein: The second control semiconductor element clamps a voltage applied between the power supply line (Vcc) and the output terminal (OUT) to a voltage that is set by the clamping voltage adjusting diode with respect to the voltage of the power supply line (Vcc) when the power supply line (Vcc) goes to a low voltage. [6] Power supply device (10) according to claim 4, wherein: the output semiconductor element consists of an n-channel power MOSFET or IGBT; the switching semiconductor element (14) consists of an n-channel MOSFET; and The first and second control semiconductor elements consist of p-channel MOSFETs, which are controlled to switch on / off in a complementary manner.

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