Array substrate, touch screen panel and touch screen device

Abstract

comprising an array substrate, a common electrode layer and a driver circuit, wherein the common electrode layer is divided into a plurality of self-capacitance electrodes, and the self-capacitance electrodes are electrically connected to the driver circuit via a plurality of touch leads; and Each touch conductor is electrically connected to one of the self-capacitance electrodes via a via hole, a first groove or gap is formed in the self-capacitance electrode in a region where a self-capacitance electrode overlaps a touch conductor, and a thickness of the self-capacitance electrode corresponding to the via hole is greater than zero, the gap referring to the self-capacitance electrode in a specific region where etching is present, and the specific region is located where the self-capacitance electrode overlaps the touch conductor.

Description

Technical field

[0001] The disclosure relates to the field of touch screen technology, and in particular to an array substrate, a touch screen panel and a touch screen device. background

[0002] Capacitive touchscreens (touchscreens) can be classified into two types based on the method used to detect capacitance changes: self-capacitance touchscreens and counter-capacitance touchscreens. Touchscreen devices can be classified into three types based on the relative position of a glass panel, touch panel, and screen panel: in-cell touchscreen devices, on-cell touchscreen devices, and outside-cell touchscreen devices. In-cell touchscreens are becoming a major trend in touch technology development due to their advantages of high integration, thin profile, and excellent performance.

[0003] Currently, existing touchscreen devices primarily utilize in-cell countercapacitance touch technology. Two separate driver circuits work together for the display panel electrode and the touch panel's touch electrode within the touchscreen device, resulting in high device costs.

[0004] In US 8766950 B1, an input device comprises a plurality of sensor electrodes, a modulated power supply, a plurality of analog front-end channels, and a sensor module. The modulated power supply is configured to generate a modulated reference signal. The plurality of analog front-end channels is connected to the plurality of sensor electrodes and to the modulated power supply and is configured to induce charge flow in response to an input object within a sensing area associated with the plurality of sensor electrodes. The sensor module comprises a transmit circuit coupled to the plurality of sensor electrodes and to the plurality of analog input channels. The sensor module is configured to drive the plurality of sensor electrodes with a modulated sensor electrode signal based on the modulated reference signal via the plurality of analog front-end channels.In 2010 / 0194707 A1, displays with touch detection circuits are provided that are integrated into the display pixel stack. Circuit elements, such as touch signal lines, control lines and detection lines, and grounding areas, within the display pixel stacks can be combined to form a touch detection circuit that detects a touch on or near the display.

[0005] An integrated touchscreen can contain multifunctional circuit elements that can function as part of the display system's circuitry to generate an image on the screen, and can also form part of a touch detection system that detects one or more touches on or near the screen. These multifunctional circuit elements can be, for example, capacitors within display pixels, configured to act as storage capacitors / electrodes, common electrodes, conductive wires / paths, etc., within the display system's circuitry, and can also be configured to function as components of the touch-sensitive circuitry. Summary

[0006] The present invention addresses the problem that a parasitic capacitance leaks between a self-capacitance electrode and a touch line, which affects the touch performance of an array substrate, a touch indicator field and touch indicator devices.

[0007] In light of the above, embodiments of the disclosure provide an array substrate, a touch screen panel, and a touch screen device to solve the problem of the high cost of touch screen devices, employing in-cell countercapacitance touch technology, and to reduce the problem of parasitic capacitance.

[0008] The problem underlying the invention is solved by the subject matter of the independent claims.

[0009] To achieve the above-stated objective, embodiments of the disclosure provide for the following technical solutions.

[0010] An array substrate comprises a common electrode layer and a driver circuit. The common electrode layer is divided into multiple self-capacitance electrodes. The self-capacitance electrodes are electrically connected to the driver circuit via touch leads; and Each touch line is electrically connected to a self-capacitance electrode via a via hole, a first groove or gap is formed in the self-capacitance electrode in a region where a self-capacitance electrode overlaps a touch line, penetrates where the self-capacitance electrode overlaps the touch line, and a thickness of the self-capacitance electrode corresponding to the via hole is greater than zero, wherein the gap refers to the self-capacitance electrode in a specific region where it is etched, and the specific region is located where the self-capacitance electrode overlaps the touch line.

[0011] A touchscreen panel comprises the aforementioned array substrate.

[0012] A touchscreen device includes the aforementioned touchscreen panel.

[0013] Compared to conventional technology, the technical solutions disclosed offer the following advantages.

[0014] For the array substrate, touchscreen panel, and touchscreen device according to the disclosure, the common electrode layer on the array substrate is divided into several self-capacitance electrodes that can serve as common electrodes and touch electrodes, the self-capacitance electrodes being electrically connected to the driver circuit of the array substrate by touch leads. Thus, a touch driver circuit and a screen circuit are integrated together, reducing the cost of the touchscreen panel and the touchscreen device. Since the first groove or gap in the self-capacitance electrode is formed in a region where the self-capacitance electrode overlaps the touch lead, the parasitic capacitance between the self-capacitance electrode and the touch lead is reduced. Brief description of the drawing

[0015] The drawings that may be used in the description of embodiments or of conventional technology are briefly described below so that technical solutions according to the embodiments of the present disclosure or according to conventional technology become clearer. Obviously, the drawing referred to in the following description illustrates only some embodiments of the disclosure and should not be taken as limiting the invention. Those skilled in the art will recognize other variations, modifications, and alternatives after reading this disclosure. Fig. Figure 1 is a schematic sectional view of the structure of an array substrate according to the disclosure; Fig. Figure 2 is a schematic sectional view of a structure of another array substrate according to the disclosure; Fig. Figure 3 is a top view of an array substrate according to the disclosure; Fig. 4a is a top view of an array substrate structure according to the disclosure, wherein the touch lines have a via-hole region; and Fig. 4b is a top view of an array substrate structure according to the disclosure, wherein the touch lines do not have a via hole area. Detailed description of embodiments

[0016] Technical solutions according to embodiments of the disclosure are described clearly and completely below in conjunction with the accompanying drawings. It is obvious that the described embodiments represent only a portion and not all of the embodiments according to the disclosure. All other embodiments that a person skilled in the art obtains based on the embodiments in the disclosure without any creative work fall within the scope of protection of the disclosure.

[0017] An array substrate is provided according to one embodiment of the disclosure. As in Fig. 1, Fig. 4a and Fig. As shown in Figure 4b, the array substrate comprises: a substrate 10, several gate lines 101 and several data lines 102 arranged on the substrate 10, and several pixel units surrounded by the gate lines 101 and the data lines 102.

[0018] The pixel units each comprise a thin-film transistor 20 and a pixel electrode 30. A gate 201 of the thin-film transistor 20 is electrically connected to the gate line 101, a source 202 of the thin-film transistor 20 is electrically connected to the data line 102, and a drain 203 of the thin-film transistor 20 is electrically connected to the pixel electrode 30. The array substrate further comprises a common electrode layer 40, which is arranged between the thin-film transistor 20 and the pixel electrode 30, and an insulating layer 50, which is arranged between the common electrode layer 40 and the pixel electrode 30. As shown in Fig. As shown in Figure 2, in other embodiments of the disclosure the pixel electrode 30 is optionally arranged between the thin-film transistor 20 and the common electrode layer 40, and the insulating layer 50 is arranged between the pixel electrode 30 and the common electrode layer 40.

[0019] In the embodiment as described in Fig. As shown in Figure 3, and as can be seen in the top view of the array substrate, the common electrode layer 40 is divided into several block-shaped self-capacitance electrodes 401, which are insulated from each other, and the self-capacitance electrodes 401 are electrically connected to a driver circuit IC of the array substrate by touch leads 402. The driver circuit IC is configured to provide a touch signal to the self-capacitance electrode 401, so that the self-capacitance electrode 401 acts as a touch electrode. The driver circuit IC is also configured to provide a common voltage to the self-capacitance electrode 401, so that the self-capacitance electrode 401 acts as a common electrode. Furthermore, the driver circuit IC is electrically connected to the data line 102 and the gate line 101 to provide a sampling signal for the gate line 101 and a data signal for the data line 102.

[0020] Based on this, the array substrate according to the embodiment utilizes self-capacitance technology, and the common electrode layer 40 is divided into several block-shaped self-capacitance electrodes 401. One projection of the self-capacitance electrode 401 covers the projections of several pixel units in a direction perpendicular to the array substrate. The self-capacitance electrode 401 can serve as the common electrode and can also serve as the touch electrode. Optionally, in one embodiment, a touch driver circuit and a touch screen circuit are integrated into a single driver IC, eliminating the need to drive the touch driver circuit and the touch screen circuit using two separate driver circuits, thereby reducing the cost of the array substrate.

[0021] In the embodiment as described in Fig. 1 and Fig. As shown in Figure 2, the touch line 402 is electrically connected to the self-capacitance electrode 401 via a through-hole 403. Optionally, the touch line 402 is arranged in the same layer as the pixel electrode 30. Optionally, the touch line 402 and the pixel electrode 30 are formed in a single manufacturing process, but the disclosure is not limited to this. Furthermore, in this embodiment, the touch line 402 is made of molybdenum, aluminum, or copper, but the disclosure is not limited to this.

[0022] As in Fig. As shown in Figure 4a, a first groove or gap 4010 is formed in the self-capacitance electrode 401. The first groove or gap 4010 is formed in a region where the self-capacitance electrode 401 overlaps the touch line 402, and the self-capacitance electrode 401 corresponding to the via hole 403 has a minimum thickness. Optionally, the projection of the self-capacitance electrode 401 completely covers the projection of the via hole 403 in a direction perpendicular to the array substrate. Optionally, no groove or gap is formed in the self-capacitance electrode 401 corresponding to the via hole 403. Optionally, a second groove (in Fig. 4a not shown) in the self-capacitance electrode 401, which corresponds to the via hole 403, and the depth of the second groove is smaller than the depth of the first groove or gap 4010.

[0023] As in Fig. As shown in Figure 1, in the case where the common electrode layer 40 is located beneath the pixel electrode 30, it is ensured that the self-capacitance electrode 401 of a predetermined thickness is located beneath the via hole 403 to prevent the layer beneath the via hole from being affected when the via hole is etched. Optionally, as shown in Fig. 2 shown, in the case that the common electrode layer 40 is arranged over the pixel electrode 30, it is ensured that the self-capacitance electrode 401 completely covers the via hole 403 to prevent the via hole 403 from being etched.

[0024] Furthermore, the first groove or gap 4010 in the self-capacitance electrode 401 is formed in an area where the self-capacitance electrode 401 overlaps the touch line 402, as shown in Fig. 4a and Fig. 4b shown. According to the disclosure, the overlap between the touch line 402 and the self-capacitance electrode 401 is reduced by etching the self-capacitance electrode 401 to form the first groove or gap 4010, therefore the parasitic capacitance between the touch line 402 and the self-capacitance electrode 401 is reduced, and the effect caused by the parasitic capacitance on the performance of the array substrate, a touch screen panel and a touch screen device is reduced.

[0025] As in Fig. 4a and Fig. As shown in Figure 4b, the first groove or gap 4010 on the self-capacitance electrode 401 has a strip-shaped structure. The projection of the first groove or gap 4010 is arranged between the pixel units in the direction perpendicular to the array substrate. One direction of extension of the first groove or gap 4010 is the same as one direction of extension of the data line 102. The first groove or gap 4010 has a width in the range of 0.1 µm to 10 µm. In this embodiment, the difference between a groove and a gap is that a groove means that the self-capacitance electrode is partially etched in a specific area but not completely etched, while a gap means that the self-capacitance electrode is completely etched in a specific area. Optionally, the gap is arranged on the self-capacitance electrode 401, the manufacturing process for the gap is simple, and the parasitic capacitance is greatly reduced by the gap.

[0026] It is pointed out that in an area enclosed by a block 1 shown with a dashed line, as in Fig. 4a and Fig. As shown in Figure 4b, the shape of the self-capacitance electrode 401 corresponding to the via hole 403 differs from the shape of the self-capacitance electrode 401 corresponding to the touch line 402 without the via hole 403. Optionally, the shape of the self-capacitance electrode 401 under the via hole 403 can be round or square, which is not restricted here as long as the self-capacitance electrode 401 corresponding to the via hole 403 can completely cover the via hole 403.

[0027] In the array substrate according to the disclosure, the common electrode layer is divided into several self-capacitance electrodes, which can serve as both a common electrode and a touch electrode. These self-capacitance electrodes are electrically connected to the driver circuit of the array substrate via touch leads. Thus, a touch driver circuit and a display circuit are integrated, reducing the cost of the touch screen panel and the touch screen device. The touch screen device utilizing the in-cell self-capacitance technology exhibits improved performance with respect to water resistance, rendering rate, and inhibition properties.Since the first groove or gap in the self-capacitance electrode is formed in an area where the self-capacitance electrode overlaps the touch conductor, the parasitic capacitance between the self-capacitance electrode and the touch conductor is also reduced.

[0028] A touchscreen panel according to one embodiment of the disclosure is provided. The touchscreen panel comprises the array substrate according to one of the embodiments described above, a color filter substrate arranged opposite the array substrate, and a liquid crystal layer arranged between the array substrate and the color filter substrate.

[0029] A touchscreen device according to one embodiment of the disclosure is provided. The touchscreen device comprises the aforementioned touchscreen panel.

[0030] In the touchscreen panel and touchscreen device according to the disclosure, the common electrode layer is divided into several self-capacitance electrodes, which can serve as both the common electrode and the touch electrode. These self-capacitance electrodes are electrically connected to the driver circuit of the array substrate via touch leads. Thus, a touch driver circuit and a screen circuit are integrated together, reducing the cost of the touchscreen panel and touchscreen device. The touchscreen device, which utilizes in-cell self-capacitance technology, exhibits improved performance with respect to water resistance, rendering rate, and inhibition properties.Since the first groove or gap in the self-capacitance electrode is formed in an area where the self-capacitance electrode overlaps the touch conductor, the parasitic capacitance between the self-capacitance electrode and the touch conductor is also reduced.

[0031] The details of the disclosure are described here progressively, with the emphasis placed on the difference between one embodiment and the other embodiments. Thus, for identical or similar parts among the embodiments, reference can be made to the other embodiments. The corresponding descriptions for the device disclosed in the embodiments are relatively simple because the device corresponds to the method disclosed in the embodiments. The relevant parts can refer to the description of the parts of the method.

[0032] The above description of the embodiments disclosed herein enables a person skilled in the art to implement or use the disclosure. Various modifications of the embodiments are obvious to a person skilled in the art, and the general principle contained herein can be implemented with other embodiments without deviating from the scope of the invention. Therefore, the disclosure is not limited to the embodiments described herein, but has the broadest scope that is consistent with the principle disclosed herein and the new features.

Claims

[1] Array substrate comprising a common electrode layer and a driver circuit, wherein the common electrode layer is divided into a plurality of self-capacitance electrodes, and the self-capacitance electrodes are electrically connected to the driver circuit via a plurality of touch leads; and Each touch conductor is electrically connected to one of the self-capacitance electrodes via a via hole, a first groove or gap is formed in the self-capacitance electrode in a region where a self-capacitance electrode overlaps a touch conductor, and a thickness of the self-capacitance electrode corresponding to the via hole is greater than zero, the gap referring to the self-capacitance electrode in a specific region where etching is present, and the specific region is located where the self-capacitance electrode overlaps the touch conductor. [2] Array substrate according to claim 1, further comprising a second groove formed in a self-capacitance electrode corresponding to the via hole, wherein the second groove has a depth that is less than the depth of the first groove or gap; or no groove or gap is formed in the self-capacitance electrode corresponding to the via hole. [3] Array substrate according to claim 2, wherein the self-capacitance electrode corresponding to the via hole completely covers the via hole, and a shape of the self-capacitance electrode corresponding to the via hole differs from the shape of the self-capacitance electrode in other areas. [4] Array substrate according to claim 3, further comprising: a large number of gate lines and a large number of data lines; and a plurality of pixel units surrounded by the gate lines and the data lines, each of the pixel units comprising a thin-film transistor and a pixel electrode, the thin-film transistor having a gate electrically connected to the gate line, a source electrically connected to the data line, and a drain electrically connected to the pixel electrode, and wherein a projection of the first groove or gap between pixel units is arranged in a direction perpendicular to the array substrate. [5] Array substrate according to claim 4, wherein the common electrode layer is arranged between the thin-film transistors and the pixel electrodes, and an insulating layer is arranged between the common electrode layer and the pixel electrodes. [6] Array substrate according to claim 4, wherein the pixel electrodes are arranged between the thin-film transistors and the common electrode layer, and an insulating layer is arranged between the pixel electrodes and the common electrode layer. [7] Array substrate according to claim 5 or 6, wherein the touch lines are arranged in the same layer as the pixel electrodes. [8] Array substrate according to claim 7, wherein the first groove or gap has a strip-shaped structure. [9] Array substrate according to claim 8, wherein one extension direction of the first groove or gap is the same as one extension direction of the data line. [10] Array substrate according to claim 9, wherein the first groove or gap has a width in the range of 0.1µm to 10µm. [11] Array substrate according to claim 10, wherein the self-capacitance electrodes are block-shaped electrodes, and a projection of the self-capacitance electrodes covers a projection of the pixel units in the direction perpendicular to the array substrate. [12] Touch screen panel comprising the array substrate according to any one of claims 1 to 11. [13] Touch screen device comprising the touch screen panel according to claim 12.

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