Method for controlling a storage device

Abstract

A process that features the following: a sampling, by a storage device (220, 220a-c, 2820), a temperature of the storage device (220, 220a-c, 2820); and a generation, by the storage device (220, 220a-c, 2820), of a response to a command (CMD), wherein the response has the following: Status information in response to the fact that the sampled temperature is within a first temperature range, where the response does not contain any temperature information (T_inf); the status information and temperature information (T_inf) in response to the fact that the sampled temperature is outside the first temperature range, where the temperature information (T_inf) includes a value corresponding to the sampled temperature.

Description

BACKGROUND

[0001] US Patent 2007 / 0140315A1 discloses a circuit and a method for providing temperature data indicating a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify, for a coarse temperature range, one of several fine temperature ranges corresponding to the temperature measured by the temperature sensor and generates temperature data that is provided on an asynchronous output data transport path.

[0002] US Patent 2010 / 0110815A1 discloses a semiconductor storage device. This semiconductor storage device comprises: a voltage generator that sets a DC voltage fed into the semiconductor storage device according to a current temperature; and control logic that activates a temperature sensing operation of the voltage generator and a DC voltage setting operation according to an operating mode, wherein the voltage generator sets the DC voltage according to offset information about the semiconductor storage device.

[0003] US Patent 2014 / 0185389A1 discloses storage systems. A storage system according to this prior art can include multiple non-volatile memories and a storage controller configured to control the multiple non-volatile memories. Furthermore, the storage system can include an input / output buffer circuit connected between the storage controller and the multiple non-volatile memories. A data channel can be connected between the storage controller and the input / output buffer circuit, and first and second internal data channels can be connected between the input / output buffer circuit and the respective first and second groups of the multiple non-volatile memories. The input / output buffer circuit can be configured to connect the data channel to one of the first and second internal data channels.

[0004] The inventive concepts relate to a storage device, a storage system and / or a method for controlling the storage device, which can easily and / or precisely check temperature information and control a temperature.

[0005] Storage devices have been highly integrated or miniaturized. Consequently, the influence of temperature variations has increased. Therefore, it is desirable to control a storage device based on its temperature. For example, the read voltage of the storage device can be adjusted according to its temperature. SUMMARY

[0006] The problem described above is solved by the methods of claims 1, 10 and 16. Further developments of the invention are specified in the dependent claims.

[0007] The inventive concepts provide for a storage device, a storage system and / or a method for controlling the storage device, which can easily and / or precisely check temperature information and control a temperature.

[0008] At least one embodiment relates to a method.

[0009] In one embodiment, the method comprises scanning, by a storage device, a temperature of the storage device; and generating, by the storage device, a response to a single received command. The response contains temperature information, and the temperature information provides information about the scanned temperature.

[0010] In one embodiment, the single received command is a temperature information request command, and the temperature information request command requests the temperature information.

[0011] In one embodiment, the single received command is a read status request command, wherein the read status request command requests status information about the storage device, and the status information includes the temperature information.

[0012] In one embodiment, the response includes status information about the storage device, and the status information includes temperature information.

[0013] In one embodiment, the status information also includes read status information, which indicates whether the storage device is busy and ready.

[0014] In one embodiment, the method further includes receiving each individual received command at any given time.

[0015] In one embodiment, the method further features receiving each individual received command regardless of whether the storage device is in a ready state.

[0016] In one embodiment, the temperature information consists of a plurality of index values, and each of the plurality of index values ​​is assigned to a different temperature range.

[0017] In one embodiment, the different temperature ranges are programmable.

[0018] In one embodiment, the method includes storing temperature range information in the storage device when the storage device is shut down or switched off, with the temperature range information indicating the different temperature ranges. The method can further include loading the temperature range information stored in the storage device into one or more registers when the storage device is powered on or switched on.

[0019] In one embodiment, the scanning is triggered by receiving at least one programming instruction, one read instruction, and one delete instruction.

[0020] In one embodiment, the method may include storing the sampled temperature; and for a plurality of sampled temperatures, the temperature information displays the sampled temperature triggered by the programming command.

[0021] In another embodiment, the temperature information displays a recently sampled temperature.

[0022] In another embodiment, the temperature information displays more than one sampled temperature, with each of the sampled temperatures being assigned to a different time prior to receiving the individual received command.

[0023] In one embodiment, the scanning is triggered by receiving the single received command.

[0024] In one embodiment, the scanning process periodically measures the temperature.

[0025] In one embodiment, the storage device is a vertical NAND storage device.

[0026] In another embodiment, the method includes sampling, by a storage device, a temperature of the storage device; and generating, by the storage device, a response to a read status command or read status command. The response contains status information, and the status information indicates that the sampled temperature is within a first range if the status information does not contain temperature information, and the status information indicates that the sampled temperature is within at least one range other than the first range if the status information contains temperature information. Here, the temperature information indicates the at least one other range.

[0027] In one embodiment, the method further includes receiving the read status command regardless of whether the storage device is in a ready state.

[0028] In one embodiment, the temperature information is represented by a plurality of index values, and each of the plurality of index values ​​is assigned to a different temperature range.

[0029] In one embodiment, the scanning is triggered by receiving the read status command.

[0030] In one embodiment, the scanning is triggered by receiving at least one programming instruction, one read instruction, and one delete instruction.

[0031] In one embodiment, the method further includes storing the sampled temperature; and for a plurality of sampled temperatures, the temperature information displays the sampled temperature triggered by the programming command.

[0032] In another embodiment, the method includes sending, by a controller, a single command to a storage device independently of a ready status of the storage device; receiving, by the controller, temperature information in response to the single command; and selectively changing, by the controller, at least one storage control characteristic for the storage device based on the temperature information.

[0033] In one embodiment, the single command is a temperature information request command, and the temperature information request command requests the temperature information.

[0034] In one embodiment, the single command is a read status request command, and the read status request command requests status information from the storage device. Here, the receive function receives the status information, which includes temperature information.

[0035] In one embodiment, the response includes status information about the storage device, and the status information includes temperature information.

[0036] In one embodiment, the status information also includes read status information indicating whether the storage device is busy and ready.

[0037] In one embodiment, the temperature information displays a range of temperatures from a plurality of different areas.

[0038] In one embodiment, the method further includes programming one or more of the plurality of different areas.

[0039] In one embodiment, the method further includes programming the storage device to modify one or more of the plurality of different areas.

[0040] In one embodiment, the memory control characteristic comprises read voltages, incremental step pulse programming voltages, erase voltages, programming check voltages or programming verification voltages, and a duration for applying the voltages to the memory device.

[0041] In yet another embodiment, the method includes scanning, by a storage device, a temperature of the storage device in response to receiving at least one programming instruction, one read instruction and one erase instruction.

[0042] In an additional embodiment, the method includes scanning, by a storage device, a temperature of the storage device in response to receiving a single received command, and the single received command requests one of status information and temperature information.

[0043] At least one embodiment relates to a storage device.

[0044] In one embodiment, the storage device includes a temperature sensor configured to sample the temperature of the storage device; and control logic configured to generate a response to a single received command. The response includes temperature information, and the temperature information provides details about the sampled temperature.

[0045] At least one embodiment relates to a memory controller or memory control system.

[0046] In one embodiment, the memory controller or memory control is configured to send a single command to a memory device regardless of a ready status of the memory device, to receive temperature information in response to the single command, and to selectively change at least one memory control characteristic for the memory device based on the temperature information. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Exemplary embodiments of the inventive concepts will be more clearly understood from the following detailed description, together with the accompanying drawings, in which: Fig. 1 is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts; Fig. 2 a diagram of a storage system according to an exemplary embodiment of the inventive concepts; Fig. 3 and Fig. 4 diagrams of storage devices according to exemplary embodiments of the inventive concepts are shown; Fig. 5 to 7 flowcharts are shown, illustrating methods for triggering temperature information generation according to exemplary embodiments of the inventive concepts; Fig. 8A is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts; Fig. 8B is a diagram of a storage system according to an exemplary embodiment of the inventive concepts; Fig. 9 is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts; Fig. 10 a diagram of temperature ranges according to an exemplary embodiment of the inventive concepts; Fig. 11 and Fig. 12 flowcharts are shown, illustrating methods for controlling a storage device according to exemplary embodiments of the inventive concepts; Fig. 13, Fig. 14, Fig. 15, Fig. 16A, Fig. 16B and Fig. 16C diagrams are which illustrate methods for executing an operating command which, based on temperature information, is set differently in a storage device according to exemplary embodiments of the inventive concepts; Fig. 17 is a flowchart which is a method for outputting a response which includes temperature information according to an exemplary embodiment of the inventive concepts; Fig. 18 is a diagram of conditions or states in which the response of Fig. 17 is issued; Fig. 19 a diagram of a response according to an exemplary embodiment of the inventive concepts; Fig. 20 is a flowchart illustrating a method for operating a storage device according to an exemplary embodiment of the inventive concepts; Fig. 21 is a flowchart illustrating a method for operating a storage system according to an exemplary embodiment of the inventive concepts; Fig. 22A is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts; Fig. Figure 22B is a flowchart illustrating an operation to output temperature information in response to a temperature sampling instruction supplied by a memory controller; Fig. 23 to 26 diagrams of a memory cell arrangement or a memory cell array of a VNAND flash memory device according to an exemplary embodiment of the inventive concepts are; Fig. 27 a diagram of a memory module according to an exemplary embodiment of the inventive concepts; Fig. 28 a diagram of a memory card according to an exemplary embodiment of the inventive concepts; Fig. 29 a diagram of a solid-state drive (SSD = solid-state device) according to an exemplary embodiment of the inventive concepts; Fig. 30 a block diagram of a calculation system or computer system which has a non-volatile storage system according to an exemplary embodiment of the inventive concepts; and Fig. 31 is a diagram of an example of a mobile data terminal or mobile device which has a storage system according to an exemplary embodiment of the inventive concepts. DETAILED DESCRIPTION OF THE EXECUTION FORMS

[0048] Detailed exemplary embodiments of the inventive concepts are disclosed herein. However, certain structural and functional details disclosed herein are merely representative for the purpose of describing exemplary embodiments of the inventive concepts.

[0049] Accordingly, while exemplary embodiments of the inventive concepts are capable of various modifications, variations, and alternative forms, embodiments thereof are shown by means of examples in the drawings and will be described in detail herein. The same reference numerals refer to the same elements throughout the description of the figures.

[0050] It will be understood that, although the terms "first / first / first", "second / second / second", etc., may be used herein to describe different elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element could be designated as a second element, and similarly, a second element could be designated as a first element, without departing from the scope of exemplary embodiments of the inventive concepts. When used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0051] It will be understood that when an element is referred to as "connected" or "coupled" with another element, it may be directly connected or coupled to the other element, or intervening elements may be present. Conversely, when an element is referred to as "directly connected" or "directly coupled" with another element, no intervening elements are present. Other words used to describe the relationship between elements should be interpreted similarly (for example, "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).

[0052] The terminology used herein is solely for the purpose of describing certain embodiments and is not intended to be limiting to exemplary embodiments of the inventive concepts. When used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, the terms "has," "having," "contains," and / or "containing" or "including," when used herein, shall be understood to specify the presence of said features, integers, steps, operations, elements, and / or components or constituents, but shall not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and subgroups thereof.

[0053] It should also be noted that in some alternative implementations, the indicated functions / actions may occur out of order, as indicated in the figures. For example, two figures shown in a certain sequence may in fact be performed essentially simultaneously, or may sometimes be performed in reverse order, depending on the functionality / actions involved.

[0054] Exemplary embodiments of the inventive concepts are described herein with reference to schematic illustrations of idealized embodiments (and intermediate structures) of the inventive concepts. As such, deviations from the forms shown in the illustrations are to be expected as a result of, for example, manufacturing techniques and / or tolerances.

[0055] Fig. Figure 1 is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts. Referring to Fig. 1. The method involves sampling the storage device and its temperature (S110). The sampling can be triggered by one or more different commands. For example, a read command, a program command, an erase command, a reset command, etc., can trigger the sampling.

[0056] Still with reference to Fig. 1. The method further includes generating, by the storage device, a response to a single received command (S120). The response may contain temperature information, and the temperature information includes information about the sampled temperature. In one embodiment, the response may be to a specific command, for example, a read status command. A response to a read status command includes status information, and the status information may indicate that the sampled temperature is within a first range if the status information does not include temperature information. Otherwise, if the status information includes temperature information, the status information indicates that the sampled temperature is within at least one range other than the first range, and the temperature information indicates the at least one other range.In one embodiment, the status information also includes read status information, which indicates whether the storage device is busy and ready.

[0057] Instead of a read status request, the single received command can be a temperature information request command, and the temperature information request command requests the temperature information.

[0058] In these embodiments, the individual received command can be received at any time. This is because the individual received command can be received regardless of whether the storage device is in a ready state.

[0059] The method for controlling the storage device, which is described in Fig. 1 described, can be achieved through a storage system of Fig. 2. However, the inventive concepts are not limited to this, and the method for controlling the storage device, which is described in Fig. As described in point 1, this can be done by an external host.

[0060] Fig. Figure 2 is a diagram of a storage system 200 according to an exemplary embodiment of the inventive concepts. The storage system 200 can comprise a storage controller 210 and a storage device 220. The storage controller 210 can apply various control signals, commands, addresses, and data to the storage device 220 for controlling the storage device 220 and can receive responses from the storage device 220 in response to the commands. The storage controller 210 can apply or transmit control signals, such as a chip activation signal indicating the activation of the storage device 220, to the storage device 220. For example, the storage controller 210 can apply or transmit operating commands to the storage device 220, indicating actuations or operations of the storage device 220 (for example, a programming command, a read command, and an erase command).to apply to these. For example, the memory controller can apply 210 data to be programmed to the storage device along with an address.

[0061] The storage device 220 can receive control signals, commands and data from the storage controller 210 and perform operations accordingly.

[0062] For example, the storage device 220 can be activated in response to a chip activation signal applied or generated by the memory controller 210. For example, the storage device 220 can store data applied by the memory controller 210 in response to a programming instruction applied by the memory controller 210 in a memory area of ​​the storage device 220 corresponding to the address applied by the memory controller 210. For example, the storage device 220 can transfer the data stored in the memory area of ​​the storage device 220 to the memory controller 210 in response to a read instruction applied by the memory controller 210. As further shown, the storage device 220 can include a temperature sensor 221. The temperature sensor 221 is described in detail below with regard to Fig. 4 will be described.

[0063] Fig. Figure 3 is a diagram of a storage device according to an exemplary embodiment of the inventive concepts. Fig. Figure 3 illustrates an example in which the storage device 220 of the Fig. 2 is implemented by a NAND flash memory device 220a. However, the inventive concepts are not limited to this. In addition to the NAND flash memory device 220a, the memory device 220 can be used. Fig. 2. can be implemented using volatile memory devices, such as dynamic random access memory (DRAM) and static RAM (SRAM), or non-volatile memory devices such as phase-change RAM (PRAM), magnetic RAM (MRAM), and resistive RAM (RRAM).

[0064] The NAND flash memory device 220a can have various pins. For example, the NAND flash memory device 220a can have a pin or connector pin R / B# from which a ready / busy signal is output, a pin CE# to which the chip activation signal described above is supplied, a pin CLE# to which a command latch activation signal is supplied, a pin ALE to which an address latch activation signal is supplied, a pin WE# to which a write activation signal is supplied, a pin WP# to which a write protection signal is supplied, and a data input / output (I / O) pin DQ, which is connected to a data bus.

[0065] As described above, the chip activation signal can indicate the activation of the NAND flash memory device 220a. The ready / busy signal can inform the memory controller 210 that the NAND flash memory device 220a is in a target state. The read activation signal can enable serial data output. The command latch activation signal can inform the NAND flash memory device 220a of a bus clock used for inputting a command. The address latch activation signal can inform the NAND flash memory device 220a of a bus clock used for inputting an address. The write activation signal can control an operation to latch data input. When the write activation signal rises to a logical high, data, commands, and addresses can be latched.The write-protect signal can disable or prevent write and erase operations of the 220a NAND flash memory device. Commands, data, and addresses can be supplied to the data I / O pin DQ, and responses to commands can be output from the data I / O pin DQ. An initial command is CMD1, and a response is RSP1. Fig. Two can each be supplied to and output from the data I / O pin DQ. Fig. Figure 2 illustrates an example in which the memory controller 210 applies the first instruction CMD1 to the storage device 220, and the storage device 220 applies the response RSP1 to the memory controller 210 in response to the first instruction CMD1.

[0066] Referring back to the Fig. 1 and Fig. 2. Operation S110 can be performed to sample the temperature using the storage device 220. In this regard, the storage device 220 can be configured as shown in Fig. 4 shown.

[0067] Fig. Figure 4 is a diagram of sections of a storage device 220b according to an exemplary embodiment of the inventive concepts. As will be acknowledged, it illustrates Fig. 4. For the sake of clarity, only those sections for temperature sampling and temperature information are shown, not all components or parts of a storage device. Referring to Fig. 4. The storage device 220b can include a temperature sensor 221, a temperature information generator 222, and a temperature information output unit 223. The temperature sensor 221 can sample the temperature of the storage device 220b and output the sampled temperature as a temperature sample value SVAL of an analog or digital value. The temperature information generator 222 can receive the temperature sample value SVAL from the temperature sensor 221 and generate temperature information T_inf corresponding to the temperature sample value SVAL. The temperature information generator 222 can generate the temperature sample value SVAL itself or generate temperature information T_inf as a value corresponding to the temperature sample value SVAL. The temperature information output unit 223 can receive the temperature information T_inf from the temperature information generator 222, include the temperature information T_inf in the response RSP1, or...The temperature information output unit 223 can include the temperature information T_inf in a reserved bit of the response RSP1. The temperature information output unit 223 can include the temperature information T_inf in a reserved bit of the response RSP1. Operations of the temperature information output unit 223 are described in more detail below. The temperature sensor 221 can be any well-known temperature sensing device, for example, in an integrated temperature sensor, which generates a current or voltage proportional to the sampled temperature. The temperature information generator 22, the temperature information output unit 223, and the temperature information control unit 224 can be hardware logic circuits configured by firmware.

[0068] The generation of temperature information T_inf according to an exemplary embodiment of the inventive concepts can be triggered using various methods. Fig. Figures 5 to 7 are flowcharts illustrating methods for triggering temperature information generation according to exemplary embodiments of the inventive concepts. The methods described in the Fig. Figures 5 to 7 illustrate the storage device 220b of the Fig. 4. However, the inventive concepts are not limited to this, and the methods described in the Fig. The processes illustrated in Figures 5 to 7 can be carried out by another storage device according to an exemplary embodiment of the inventive concepts.

[0069] To refer to the Fig. 4 and Fig. 5. Starting with a method S110a for sampling or checking a temperature and generating temperature information T_inf according to an exemplary embodiment of the inventive concepts, this method can include generating the temperature information T_inf by sampling or checking the temperature when the storage device 220b performs an operation, based on a temperature sample value SVAL obtained when the storage device 220b performs the operation. In particular, the method S110a can include an operation S511 for supplying orThe input of a CMD command to the memory device 220b, an operation S512 to execute, through the memory device 220b, the CMD command, an operation S513 to determine if the CMD command is a command indicating the operation, and an operation (S514) to sample the temperature through the memory device 220b and generate the temperature information T_inf if the CMD command is the command indicating the operation (reference is made to YES from S513).

[0070] As described above, the storage device 220b can receive various commands (S511) and perform operations accordingly (S512). In this case, the storage device 220b can determine whether a command named CMD is the command indicating the operation (S513). For example, if the operation is set to a programming operation, it can be determined whether the command CMD is a programming command. If the command CMD is the programming command (refer to YES in S513), temperature information T_inf can be generated (S514). In this case, the temperature information T_inf can be generated as a temperature of the storage device 220b, which is measured when a final programming operation is performed by the storage device 220b.

[0071] Alternatively, for example, if the operation is set to a read operation, the storage device 220b can determine whether the CMD instruction is a read instruction. If the CMD instruction is the read instruction (refer to YES from S513), temperature information T_inf can be generated (S514). In this case, the temperature information T_inf can be generated as a temperature of the storage device 220b, which is measured when a final read operation is performed by the storage device 220b. Alternatively, for example, if the operation is set to an erase operation, the storage device 220b can determine whether the CMD instruction is an erase instruction. If the CMD instruction is the erase instruction (refer to YES from S513), temperature information T_inf can be generated (S514).In this case, the temperature information T_inf can be generated as a temperature of the storage device 220b, which is measured when a final erase operation is performed in the storage device 220b.

[0072] To enable the operation described above, the storage device 220b may further include a temperature information control unit 224, as shown in Fig. Figure 4 shows the temperature information control unit 224, a control logic configured to receive a CMD command to determine if it is the command indicating the operation. If so, it generates an initial control signal XCON1 to activate the temperature information generator 222. The temperature information generator 222 can generate temperature information T_inf based on a temperature sample SVAL received with the application of the CMD command. In this case, the initial control signal XCON1 can be applied to the temperature sensor 221. The temperature sensor 221 can generate the temperature sample SVAL and reduce power consumption only during the activation of the initial control signal XCON1.

[0073] Additionally, for example, if the operation is set to a reset operation, the memory device 220b can determine whether the CMD command is a reset command, and if so, the temperature information T_inf can be generated to display a temperature of the memory device 220b that is measured when the reset operation is performed.

[0074] Furthermore, in one embodiment, more than one operation other than the operation that triggers the temperature sampling can be determined or named.

[0075] In the storage device, the storage system, and / or the method for controlling the storage device according to exemplary embodiments of the inventive concepts, a basis for a status or a point in time for determining a temperature variation in the storage device can be set in various ways, as required. For example, if a programming operation of the storage device is significantly affected or influenced by a temperature variation, the storage device can be controlled in the storage device, the storage system, and / or the method for controlling the storage device according to the exemplary embodiments of the inventive concepts based on a temperature variation during the programming operation.Accordingly, the storage device, storage system and / or method for controlling the storage device according to the exemplary embodiments of the inventive concepts can improve or optimize the control of the storage device.

[0076] Next, with reference to the Fig. 4 and Fig. 6. A method S110b for sampling or checking a temperature and generating temperature information T_inf according to an exemplary embodiment of the inventive concepts comprising inputting or supplying a command CMD to a storage device 220b (S611), determining whether the command CMD is a command to request status information concerning the storage device 220b (S612), and sampling or checking, by the storage device 220b, a temperature and generating temperature information T_inf if the command CMD is the command to request status information concerning the storage device 220b (reference is made to JA of S612). For example, if the storage device 220b is the NAND flash memory device 220a of the Fig. 3 is, the command to request the status information concerning the storage device 220b is a read status command.

[0077] In this case, the temperature information T_inf can be generated as a temperature of the storage device 220b, which is measured when the storage device 220b receives the read status command. In the method for controlling the storage device according to the present embodiment, as described in Fig. As shown in Figure 1, the read status command can be set as the first command CMD1, and a response to the read status command can be set as a response RSP1, which will be described in more detail below. If the CMD command is the command to request status information, the temperature information control unit 224 can generate the first control signal XCON1 described above.

[0078] As described below, a read status instruction and a read status instruction response can be generated each time a desired (or alternatively, a predetermined) number of normal operations (for example, each time the desired number of operation instructions are processed) are performed between a memory controller and a storage device. For example, a read status instruction response can be generated each time a read instruction is processed. Alternatively, after a program instruction and two read instructions have been processed, a read status instruction response can be generated to indicate the processing status of the last read instruction.Accordingly, in the storage device, the storage system and / or the method for controlling the storage device according to the present embodiment, a temperature variation of the storage device can be checked at all times without generating operating loads, thereby enabling more precise control of the storage device.

[0079] Next, with reference to the Fig. 4 and Fig. 7. A method S110c for sampling or checking a temperature and generating temperature information T_inf according to an exemplary embodiment of the inventive concepts comprising counting the number of operating cycles CLK in the storage device 220b (S711), determining whether a periodic interval has started based on the count result (S712), and sampling or checking, by the storage device 220b, a temperature and generating the temperature information T_inf when the start of an interval or period or duration has begun (reference is made to JA of S712) (S713). The temperature information control unit 224 can count the number of operating cycles (CLK) and periodically generate a first control signal XCON1.

[0080] The duration can be set differently depending on the required control of a temperature variation of the storage device 220b. For example, if a program / erase (P / E) cycle of the storage device 220b is less than or equal to a reference value, the influence of the temperature variation of the storage device 220b may be less than if the P / E cycle of the storage device 220b is greater than the reference value. Consequently, the duration / interval set when the P / E cycle of the storage device 220b is less than or equal to the reference value may be longer than the duration / interval set when the P / E cycle of the storage device 220b is greater than the reference value. Thus, depending on a storage device and a storage system configured to generate temperature information T_inf using the S110c method, as described in Fig. 7 shown, and a method for controlling the storage device, which is the method S110c for generating the temperature information T_inf, as shown in Fig. As shown in section 7, the device operates by monitoring the temperature variation of the storage device at an interval or time period, which corresponds to a status of the storage device, thereby enabling efficient and / or precise control of the storage device.

[0081] Furthermore, it will be acknowledged that the embodiments of the Fig. 5 to 7 can be used in combination with each other.

[0082] Fig. Figure 8A is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts, and Fig. Figure 8B is a diagram of a storage system 200c according to an exemplary embodiment of the inventive concepts. The method, which is described in Fig. As shown in 8A, the 200c storage system can be used. Fig. 8B. However, the inventive concepts are not limited to this, and the method of Fig. 8A can be implemented by a storage system according to another exemplary embodiment of the inventive concepts.

[0083] Referring to the Fig. 8A and Fig. 8B can, as the procedure for controlling the storage device as in Fig. Figure 1 shows that the method for controlling the storage device according to the present embodiment comprises generating a verified or sampled temperature (for example, a temperature sample value SVAL) of the storage device 220c as temperature information T_inf (S810), and outputting a response RSP1 containing the temperature information T_inf in response to a single received command CMD1 supplied to the storage device 220c (S820). Likewise, as in the method for controlling the storage device, the Fig. 1. The response RSP1 can be a response indicating whether the storage device is in a ready state, in which the storage device can receive an operation command and perform an operation. Furthermore, as described in Fig. 1. The CMD1 command can be supplied at any time and can be supplied regardless of whether the storage device is in a ready state.

[0084] The method for controlling the storage device, as described in Fig. As shown in Figure 8A, the operation can further include establishing at least two temperature ranges for the storage device 220c (S800) and determining which of the at least two temperature ranges contains a temperature value indicated by the checked temperature (i.e., the temperature sample SVAL) (S815). Similarly, the operation S810 for generating the sampled or checked temperature (for example, the temperature sample SVAL) of the storage device 220c as the temperature information T_inf can include sampling or checking (sample) a temperature of the storage device 220c (S810_1) and generating information indicating a temperature range that contains or contains the checked temperature (for example, the temperature sample SVAL) as the temperature information T_inf (S810_2).

[0085] A temperature information generator 222 can generate one or both of the temperature range information from the temperature sample SVAL as the temperature information T_inf in response to a second control signal XCON2, which is applied or generated by a temperature information control unit 224. For example, the temperature information control unit 224 can instruct the temperature information generator 222 and the temperature information output unit 223 to display the temperature range in the temperature information (T_inf) using the second control signal XCON2. However, if the temperature range information is received and stored by the temperature information generator 222, it cannot be stored until it is changed.Alternatively, although not shown, a storage unit configured to store the temperature and / or temperature information may also be provided in the storage device 220c.

[0086] The number of temperature ranges and the values ​​of the temperature ranges can be set in various ways. For example, any well-known command can be used to set characteristics of a storage device 220. For example, the temperature information control unit 224 can generate the second control signal XCON2 in response to a command to set a temperature range, which is applied by a storage controller 210. For example, if an error rate of the storage device 220c increases in a certain temperature range, the command to set the temperature range by the storage controller 210 can be applied to the storage device 220c to control (for example, to reduce) the increase in the error rate.For example, the command to set the temperature range can be applied to the storage device 220c in a first mode in which the storage controller 210 performs a set feature on the storage device 220c, which is different from a normal mode in which the storage device 220c performs general operations (for example, programming, reading, erasing and resetting operations).

[0087] Alternatively, the temperature information control unit 224 can generate the second control signal XON2 in response to information (for example, adjustment or trimming information (TR_inf)) set during mass production of the storage device 220c. The trimming information TR_inf can be set depending on suitable characteristics of the storage device 220c based on the manufacturing environment. For example, if the storage device 220c is significantly affected by temperature variation within a specific temperature range, the trimming information TR_inf can be generated by subdividing the corresponding temperature range. The trimming information TR_inf can also be generated during a calibration process to determine a digital temperature value to match an analog temperature value sampled by a temperature sensor of the storage device 220c.For example, the storage device can be tested during manufacturing. Through this empirical testing, the temperature ranges and trims (e.g., control characteristics or values ​​such as read voltages, etc.) for temperature ranges that reduce or minimize errors are empirically determined and programmed into the storage device.

[0088] Alternatively, the temperature information control unit 224 can set a temperature range itself and generate the second control signal XCON2. For example, the temperature information control unit 224 can set the temperature range based on status information STA from the storage device 220c. For example, if errors frequently occur in a specific temperature range during a programming operation of the storage device 220c, status information STA indicating the frequency of the errors may be generated. In this case, the temperature information control unit 224 can subdivide and set the corresponding temperature range in response to the status information STA.Accordingly, in the storage device, the storage system and / or the method for controlling the storage device according to the present embodiment, the control of the storage device can be improved or optimized depending on the circumstances of the storage device.

[0089] Fig. Figure 9 is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts. The method of Fig. 9 can be achieved through the 200c storage system of the Fig. 8B. However, the inventive concepts are not limited to this, and the method of Fig. 9 can be carried out by another storage system according to an exemplary embodiment of the inventive concepts. Referring to the Fig. 8 and Fig. 9 can, as the procedure for controlling the storage device, as in Fig. Figure 1 shows the method for controlling the storage device 220c, as shown in Fig. Figure 9 shows the generation of verified information (for example, a temperature sample value SVAL) of the storage device 220c as temperature information T_inf (S910) and the output of a response RSP1 in response to an instruction CMD1 which is supplied to the storage device 220c.

[0090] Similarly, the method for controlling the storage device can be described as in Fig. Figure 1 shows that the response RSP1 is a response which informs that the storage device 220c is in a ready state in which the storage device 220c is able to receive an operating instruction and perform an operation.

[0091] The method for controlling the storage device, as described in Fig. As shown in Figure 9, the operation can further include setting a first temperature range for the storage device 220c (S900) and determining whether the checked temperature (for example, the temperature sample SVAL) is contained within the first temperature range (S915). If the temperature sample SVAL is not contained within the first temperature range (refer to NO in S915), the operation S910 can generate the temperature sample SVAL as the temperature information T_inf (S910_2). In operation S910_2, the temperature information T_inf can be generated to indicate that the temperature sample SVAL is a value other than that contained within the first temperature range. Similarly, a response RSP1 containing the temperature information T_inf can be output (S920_1).However, if the temperature sample value SVAL is included in the first temperature range (refer to JA of S915), a response RSP1 cannot contain temperature information T_inf but instead only status information STA of the storage device 200c (see . Fig. 18) and are transmitted to the storage controller 210 (S920_2). The read status indicates that the temperature is within the first temperature range; and thus, the read status serves as the temperature information. Therefore, according to the storage device, the storage system, and / or the method for controlling the storage device according to the present embodiment, as long as a temperature of the storage device 220c is not within a specific temperature range (first temperature range), temperature information T_inf can be transmitted to the storage controller 210, and if controlling a temperature variation is unnecessary, the temperature information cannot be transmitted. Thus, efficient control of the storage device 220c can be carried out.

[0092] As described above, temperature ranges can be set in various numbers. Fig. Figure 10 is a diagram of temperature ranges according to an exemplary embodiment of the inventive concepts. Referring to Fig. In this system, multiple temperature ranges can be established, and indices can be assigned to each range. For example, index 1 can be assigned to a temperature range lower than temperature A, and index 2 can be assigned to a temperature equal to and higher than temperature A and lower than temperature B. The index information can be transmitted using a number of bits. For example, one bit can be used to indicate one of two temperature ranges, two bits can be used to indicate one of four temperature ranges, and so on.

[0093] Fig. Figure 11 is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts. The method of Fig. 11 can be accessed through the 200c storage system. Fig. 8B. However, the inventive concepts are not limited to this, and the method of Fig. 11 can be carried out by another storage system or device according to an exemplary embodiment of the inventive concepts. Referring to the Fig. 8B and Fig. 11 can, as the procedure for controlling the storage device as in Fig. Figure 1 shows the method for controlling the storage device according to the present embodiment, comprising generating verified information (for example, a temperature sample value SVAL) of the storage device 220c as temperature information T_inf (S1110) and outputting a response RSP1 containing the temperature information T_inf in response to a command CMD1 supplied to the storage device 220c (S1120). The method for controlling the storage device in Fig. As shown in Figure 1, the response RSP1 can be a response that indicates whether the storage device 220c is in a ready state in which the storage device 220c is able to receive an operating command and perform an operation.

[0094] The method for controlling the storage device, as described in Fig. As shown in Figure 11, the operation can further include setting at least two temperature ranges for the storage device 220c (S1100) and determining which of the at least two temperature ranges has a temperature value indicated by the checked temperature (i.e., the temperature sample value SVAL) (S1115). Likewise, the operation S1110 for generating the checked information (i.e., the temperature sample value SVAL) of the storage device 220c as the temperature information T_inf can include sampling or checking (scanning) a temperature of the storage device 220c (S1110_1) and generating an index indicating a temperature range which has the checked temperature (i.e., the temperature sample value SVAL) as the temperature information T_inf (S1110_2). In the example of the Fig. If a temperature sample value SVAL is contained within the temperature range equal to and higher than temperature A and lower than temperature B, an index 2 can be generated as the temperature information T_inf. The temperature information control unit 224 can generate a second control signal XCON2 to create an index as the temperature information T_inf.

[0095] Fig. Figure 12 is a flowchart illustrating a method for controlling a storage device according to an exemplary embodiment of the inventive concepts. The method of Fig. 12 can be processed by the storage system 200 of the Fig. 2. However, the inventive concepts are not limited to this, and the process of Fig. 12 can be implemented by another storage system according to an exemplary embodiment of the inventive concepts. Referring to the Fig. 2 and Fig. 12 can, as the procedure for controlling the storage device as in Fig. As shown in Figure 1, the method for controlling the storage device according to the present embodiment comprises generating sampled or verified information (i.e., a temperature sample value SVAL) of the storage device 220 as temperature information T_inf (S1210) and outputting a response RSP1 containing the temperature information T_inf in response to a command CMD1 supplied to the storage device 220. However, as described above, a temperature range or index corresponding to the temperature sample value SVAL can be generated as the temperature information T_inf. Furthermore, as shown in Figure 1, the method for controlling the storage device can be... Fig. As shown in Figure 1, the response RSP1 is a response indicating whether the memory device 220 is in a ready state, in which it is capable of receiving an operation instruction and performing an operation. This response and information are received by the memory controller 210 (S1210). In response, the memory controller 210 can modify or alter memory control characteristics. For example, the memory control characteristics can include one or more of the following: read voltages, incremental step-pulse programming voltages, erase voltages, program verification voltages, and a duration for applying voltages to the memory device.

[0096] The procedure for controlling the storage device as in Fig. As shown in Figure 12, the operation can also involve supplying an operation instruction, which has been set differently based on the temperature information T_inf, to the storage device 220 (S1230) and executing the operation instruction in the storage device 220 (S1240).

[0097] The Fig. Figures 13 to 16C are diagrams illustrating methods for executing an operating command that is set differently based on temperature information in a storage device according to exemplary embodiments of the inventive concepts. With reference to the Fig. 2, Fig. 12 and Fig. To begin, the memory controller 210 can receive temperature information T_inf from the storage device 220 and adjust memory control characteristic values ​​of an operating command differently.

[0098] For example, the operating instruction or operation instruction can be a read instruction. In this case, a read voltage indicated by the read instruction can be changed from a first voltage level to a second voltage level, and the read instruction can be sent to the memory device 220 (S1230). For example, if the memory device 220 is a triple-level cell (TLC) NAND flash memory device, as in Fig. As shown in Figure 13, each of the memory cells of the storage device 220 can be programmed to have a limit voltage, which is contained in one of eight distributions. For example, each of the memory cells of the storage device 220 can have one erase state E and one of seven programming states P1 to P7.

[0099] In this case, seven read voltages VR1 to VR7, which have different voltage levels, can be set to read the memory cells. However, the distributions of the limit voltages of the memory cells, which are as in Fig. The programmed read operations shown in Figure 13 can depend on a temperature variation of the storage device 220. According to exemplary embodiments of the inventive concepts, the storage controller 210 can increase the voltage level of each of the read voltages VR1 to VR7 by as much as VRa based on the temperature information T_inf contained in the response RSP1. The storage device 220 can perform a read operation in response to a read command to initiate the read operation at a read voltage that is changed based on the temperature information T_inf (S1240).

[0100] Although Fig. Figure 13 illustrates an example in which each of the read voltages VR1 to VR7 is increased by the same amount as VRa; however, the inventive concepts are not limited to this. At least one read voltage can be changed differently from the other read voltages. For example, in Fig. 14, although each of the first to sixth reading voltages VR1 to VR6 by as much as VRa as in Fig. 13 is increased, a voltage level of the seventh read voltage VR7 is increased to subdivide the seventh programming state P6 and the seventh programming state P7 by as much as VRb. For example, if the sixth and seventh program states P6 and P7 vary within a large range with a temperature variation, voltage levels of the read voltages VR1 to VR7, as in Fig. 14 shown, can be controlled. Although the Fig. 13 and Fig. 14 To illustrate an example in which the voltage levels of the read voltages VR1 to VR7 are increased with a temperature variation, the inventive concepts are not limited to this, and the voltage levels of the read voltages VR1 to VR7 can be decreased with a temperature variation.

[0101] The operating command can be a different type of command than the read command. For example, the operating command can be a delete command. In this case, as described in Fig. As shown in Figure 15, the erasure command is supplied to the storage device 220 such that an erasure state E is changed from a first voltage level to a second voltage level (S1230). The storage device 220 can change the erasure state E to an erasure state E' and perform an erasure operation in response to the erasure command (S1240).

[0102] In the exemplary embodiment of the inventive concepts, when the storage device 220 is set to the erase state E', which has a higher threshold voltage than the preset erase state E, memory cells can be erased in a soft erase state within a temperature range with a low error rate. In this case, the time and power required for programming operations in programming states P1 to P7 can be reduced. Alternatively, deterioration of the memory cells can be mitigated or prevented.

[0103] For example, the operating command can be a programming command. As in Fig. 16A The storage device 220 can perform a programming operation using an incremental step pulse program (ISPP) scheme to execute a program which has a plurality of steps (i.e. a plurality of loops) in response to the programming instruction. Fig. Figure 16A illustrates an example of an ISPP scheme in which a program loop has N steps (N is an integer equal to or greater than 2) and each step has two programming pulses.

[0104] For example, a first step may have a first programming pulse VP11 and a second programming pulse VP12, and a second step may have a first programming pulse VP21 and a second programming pulse VP22. In each of the steps, a programming operation can be performed on a programming pulse whose voltage level is increased by VPa to be higher than a programming pulse of the preceding step. For example, the voltage level of the first programming pulse VP21 of the second step may be set to be VPa higher than the voltage level of the first programming pulse VP1 of the first step. Although in Fig. Not shown in Figure 16A, each of the steps can still include a verification pulse for a verification operation. However, the verification operation can be omitted in an Nth step, which is a final step.

[0105] The memory controller 210 can configure a programming command differently to execute the programming operation described above based on temperature information T_inf contained in a response RSP1, and transmit the programming command to the storage device 220 (S1230). For example, as in Fig. As shown in Figure 16B, the number of steps in the ISPP scheme can be increased or decreased from N to M (where M is an integer equal to or greater than 2, M ≠ N). For example, if programming errors in storage device 220 increase with a temperature variation, the number of steps in the ISPP scheme can be increased to M. However, even if no programming errors occur in storage device 220, the number of steps in the ISPP scheme can be decreased to reduce or prevent power consumption and conserve system resources.

[0106] Alternatively, as in Fig. Figure 16C shows a range in which a programming pulse is increased between the respective steps of the ISPP scheme, and which can be adjusted differently according to a temperature variation. Referring to Fig. At 16C, the voltage level of the first programming pulse VP21 of the second step can be set to be VP1a higher than the voltage level of the first programming pulse VP1 of the first step, while the voltage level of the second programming pulse VP22 of the second step can be set to be VPa2 higher than the voltage level of the second programming pulse VP2 of the first step. Here, VPa2 differs from VPa1. Alternatively, differences in the voltage level between programming pulses of the first and second steps can be VPa1 and VPa2, while differences in the voltage level between programming pulses of the N-1st and Nth steps can be VPb1 and VPb2. The differences VPa1 and VPa2 can differ from the differences VPb1 and VPb2. For example, the magnitude of VPb1 and VPb2 can decrease as the temperature increases.

[0107] Additionally, in the storage device, the storage system, and / or the method for controlling the storage device according to the present embodiment, the storage device 220 can be reset in response to a reset command, which is set differently based on the temperature information T_inf of the storage device 220. For example, the reset command can have different set values ​​required to reset the storage device 220. These set values ​​can be set differently based on the device's temperature T_inf and applied to the storage device 220.

[0108] In the embodiments described above, the Fig. 12 to 16C, the change and the amount of the change in the storage control characteristic values ​​can be empirically determined, for example during the testing phase of manufacturing.

[0109] Fig. Figure 17 is a flowchart illustrating a method for outputting a response containing temperature information according to an exemplary embodiment of the inventive concepts. Referring to the Fig. 2 and Fig. 17. A procedure S120a for outputting a response which contains temperature information T_inf may include receiving a first instruction CMD1 as a read status instruction from the memory controller 210 (S1721), and including the temperature information T_inf in at least one reserved bit of a response RSP1 which corresponds to the read status instruction (S1722).

[0110] If the storage device 220 is the NAND flash memory device 220a of the Fig. 3, in particular a vertical NAND (VNAND) storage device in which memory cells are formed three-dimensionally, status information concerning the storage device 220 (for example, the response RSP1 for the read status command CMD1) can be the same as in Fig. 18. The RSP1 response can be output through eight data I / O pins DQ0 to DQ7. Status information indicating whether the storage device 220 is in a busy or ready state can be output as the RSP1 response via data I / O pins DQ5 and DQ6 of the eight data I / O pins DQ0 to DQ7. The data I / O pins DQ2 to DQ4 for the RSP1 response can be defined as reserved bits in response to all operation instructions. Each bit of the RSP1 response corresponding to the read status instruction CM1 can be defined differently in response to each operation instruction. For example, data I / O pin DQ0 can indicate a pass or failure in response to a block erase instruction, while data I / O pin DQ0 can be defined as an unused bit (i.e., a reserved bit) in response to a read instruction.

[0111] For example, eight temperature ranges can be set, and all three reserved bits can be used to include or enclose temperature information. Alternatively, three temperature ranges can be set, and two of the three reserved bits can be used. Alternatively, three temperature ranges can be set, and one of the three reserved bits can be used. In this case, for example, temperature ranges can be set to a range lower than temperature A, a range equal to and higher than temperature A and lower than temperature B, and a range equal to and higher than temperature B. In the range equal to and higher than temperature A and lower than temperature B, one of the reserved bits can be set to zero. In the remaining two ranges, one of the reserved bits can be set to one.When the memory controller 210, which has received the response RSP1, whose reserved bit has a value of one, requests confirmation as to whether the temperature range is a range lower than temperature A or a range equal to or greater than temperature B, the reserved bit can be set to a different value, and information can be provided about a range into which the temperature falls.

[0112] Temperature information T_inf can be included in the reserved bit of the response RSP1, and the response RSP1 can be issued by the memory device 220. However, as described above, the response RSP1 can also be output without the temperature information T_inf. In this case, the response RSP1 can only contain status information regarding the memory device 220, for example, only status information indicating that the memory device 220 is in a ready state in which it is capable of executing an additional operation instruction.

[0113] Fig. Figure 19 is a diagram of a response according to an exemplary embodiment of the inventive concepts. Referring to the Fig. 2 and Fig. 19. A programming instruction, a read instruction, and another read instruction can be applied sequentially by the memory controller 210 at times t1, t2, and t3, respectively. Next, if a read status instruction 70h is applied by the memory controller 210 to the storage device 220 at time t4, the storage device 220 can report a processing status of the last applied instruction (for example, the read instruction applied at time t3) as a response RSP1 to the read status instruction 70h. For example, the response RSP1 can set the data I / O pins DQ5 and DQ6 to one, indicating that the storage device 220 is in a ready state, in which the read instruction applied at time t3 has been processed and another operation instruction can be processed.

[0114] However, as described above, temperature information T_inf concerning the storage device 220 can be generated when a final programming instruction is executed. Therefore, the response RSP1 for the read status instruction 70h can be generated by including temperature information T_inf concerning the storage device 220h, which is obtained in a reserved bit during the execution of the programming instruction applied at time t1. Thus, according to the present embodiment, the response RSP1 to the read status instruction 70h can contain not only information concerning the current status of the storage device 220, but also information concerning its previous status.More precisely, the storage device 220 can be configured or programmed to generate temperature information which is linked to a recent command of a specific type (for example, a programming command in the example above).

[0115] According to the storage device, storage system, and / or method for controlling the storage device as described in the present embodiment, temperature information relating to the storage device can be transmitted to the storage controller using a sequence for a preset read status command instead of an additional sequence for sampling a temperature, thereby reducing the operating load of the storage device or storage system. Specifically, a predefined sequence or series of commands and handshakes between the storage device 220 and the storage controller 210 is not required. Instead, a single command can trigger the output of the temperature information.

[0116] If a processing sequence for an operation instruction that is preset in normal mode is used to sample a temperature of storage device 220, instead of an additional sequence, a system operating load can be reduced as described above.

[0117] Fig. Figure 20 is a flowchart illustrating a method for operating a storage device according to an exemplary embodiment of the inventive concepts, and Fig. Figure 21 is a flowchart illustrating a method for operating a storage system according to an exemplary embodiment of the inventive concepts. To begin, referring to the Fig. 2 and Fig. 20. A method for operating the storage device 220 includes sampling a temperature using a temperature sensor and generating temperature information T_inf (S2010). The temperature information T_inf can be provided as one or more reserved bit(s) of a response to an input read status instruction CMD1. The storage device 220 outputs the response with the reserved bit(s) (S2020). The storage device 220 executes an operation instruction which has memory control characteristics that are set based on the temperature information T_inf (S2030). The operation S2010 for generating the temperature information T_inf can be the same as in operation S110 of the Fig. 1 described, and the operation S2020 for enclosing the temperature information T_inf in the reserved bit and outputting the reserved bit containing the temperature information T_inf in response to the input read status command CMD1 can be the same as in operation S120 of the Fig. 1 described. Likewise, the operation S2030 for executing the operation command, which is set and supplied differently based on the temperature information T_inf, can be the same as described in the Fig. Described in 13 to 16°C.

[0118] Referring to the Fig. 2 and Fig. 21. A method for operating a storage system 200 may include applying a read status instruction CMD1 from the storage controller 210 to the storage device 220 (S2110), comprising, by the storage device 220, temperature information T_inf in a reserved bit of a response corresponding to the read status instruction CMD1 supplied by the storage controller 210, and outputting the reserved bit containing the temperature information T_inf (S2120), generating, by the storage controller 210, an operation instruction based on the temperature information T_inf (S2130), and executing the operation instruction, which has storage control characteristics set based on the temperature information T_inf (S2140). Additionally, the storage controller 210 may control temperature types described with reference to types 5 to 7, or temperature ranges described with reference to Fig. 8 are described. Since the procedures of Fig. 20 and Fig. Since the procedures for controlling the storage device are described in section 21 above with reference to the preceding embodiments, further detailed descriptions thereof are omitted.

[0119] Fig. Figure 22A is a flowchart illustrating a method for controlling a storage device according to exemplary embodiments of the inventive concepts. Referring to Fig. 22A can comprise the method for controlling the storage device according to the present embodiment, including supplying a mode signal for sampling a temperature to the storage device 220 (S2210), determining whether the mode signal indicates a first mode for performing a setting feature on the storage device 220 (S2220), requesting temperature information T_inf from the storage device 220 by the storage controller 210 in the first mode, and additionally transmitting the temperature information T_inf to the storage controller 210 by the storage device 220 when the storage controller 210 requests it if the mode signal indicates the first mode (refer to JA of S2220) (S2230), and connecting orInclude the temperature information T_inf in a reserved bit of a response corresponding to a read-state command sent from the memory controller 210 to the storage device 220, and output the reserved bit containing the temperature information T_inf when the mode signal does not indicate the first mode (refer to NO from S2220) (for example, when the mode signal indicates a normal mode for performing read and program operations) (S2240). When the temperature information T_inf is requested in the first mode, the storage device 220 can sample the temperature information T_inf, and the memory controller 210 can be in a wait state while sampling the temperature information T_inf. The temperature information T_inf in the first mode cannot be included in other information but can be transmitted in addition to the information sent to the memory controller 210.A multi-instruction sequence is required in the first mode to obtain the temperature information. In contrast, a single instruction can also produce temperature information when not in the first mode. Using a processing sequence for an operation instruction, which is preset in normal mode, to sample the temperature of storage device 220, instead of an additional sequence, can reduce the system overhead as described above. However, the temperature information T_inf can be sampled in an additional mode (for example, a first mode) if necessary.

[0120] Fig. Figure 22B is a flowchart illustrating a method for controlling a storage device according to another exemplary embodiment of the inventive concepts. Referring to Fig. 22B, the method for controlling the storage device according to the present embodiment can include supplying an operation instruction to a storage device (S2310), supplying a read status instruction to request information concerning a status of the storage device that is affected by the processing of the operation instruction in the storage device (S2320), and appending temperature information to the storage device in a reserved bit of a response corresponding to the read status instruction, and outputting the reserved bit containing the temperature information (S2330). The operation instruction can be a programming instruction, a read instruction, or an erase instruction. As in the example described above, Fig. 19. The read status command can be applied to the storage device to request confirmation that the read command applied at time t3 has been processed and that the storage device has entered a ready state. Accordingly, the storage device can contain the temperature information in the reserved bit of the response corresponding to the read status command and output the reserved bit.

[0121] The storage device described above can be a VNAND flash memory device, as described below. An example of a memory cell array or arrangement of the VNAND flash memory device is given below with reference to the Fig. 23 to 26 are described. The memory cell arrangement of the VNAND flash memory device can have a plurality of memory blocks, and any one memory block (for example, a first memory block BLK1) is in Fig. 23 illustrated.

[0122] Referring to Fig. 23. The first memory block BLK1 can comprise a substrate SUB, a plurality of cell strands CST, a dummy word line DWL, a normal word line NWL, a bit line BL, a ground selector line GSL, and a common source line CSL. In the following description, the cell strands CST, word lines WL, and bit lines BL contained in the first memory block BLK1 are provided in specific numbers for brevity. However, the inventive concepts are not limited thereto, and the cell strands CST, the word lines WL, and the bit lines BL contained in the first memory block BLK1 can be provided in different numbers. Additionally, the number of normal cells contained in the cell strand CST is also described below as an example.

[0123] Cell strand CST can be connected between the bit line BL and the common source line CSL. As described above, cell strand CST can extend in a vertical direction Z from the substrate SUB. Cell strand CST can include a strand selector transistor SST, a dummy cell DC, a plurality of normal cells NC, and a ground selector transistor GST, which can be connected in series between the bit line BL and the common source line CSL. For example, cell strand CST11 can include the strand selector transistor SST, the dummy cell DC, the normal cells NC1 to NCn, and the ground selector transistor GST, which can be connected in series between a bit line BL1 and the common source line CSL.

[0124] The string selector transistor SST can be connected to the string selector line SSL, which extends in a column direction Y, and can be controlled. The ground selector transistor GST can be connected to the ground selector line GSL, which extends in a row direction X and a column direction Y, and can be controlled. For example, the string selector transistor SST of cell string CST11 can be connected to and controlled by a string selector line SSL1, and a string selector transistor SST of cell string CST12 can be connected to and controlled by a string selector line SSL2. Similarly, ground selector transistors GST of cell strings CST11, CST12, CST21, and CST22 can all be connected to and controlled by the shared ground selector line GSL.

[0125] The dummy cell DC can be connected to and controlled by a dummy word line DWL, which can extend in the row direction X and the column direction Y. Each of the normal cells NC can be connected to and controlled by a normal word line NWL, which can extend in the row direction X and the column direction Y. For example, dummy cells DC of cell strands CST11, CST12, CST21, and CST22 can be connected to and controlled by the shared dummy word line DWL. The dummy cells DC can be used to improve the operating characteristics of each of the cell strands CST. For example, the dummy cells DC can be used to mitigate the effects of aging or...To reduce the deterioration of the strand selection transistor SST of each of the cell strands CST to the cell strands CSL, or to prevent deterioration of the cell strands CST due to a difference between voltages applied to the strand selection transistor SST and the normal cell NC during the operation of the normal cells NC of the cell strands CST.

[0126] Data can be written to normal cells NC1 to NCn. Normal cells NC1 to NCn of cell strands CST11, CST12, CST21, and CST22 can be connected and controlled together via the shared normal word line NWL.

[0127] The bit line BL can be connected to a plurality of cell strands CST, which are arranged in the row direction X. For example, cell strand CST11 and cell strand CST12 can be connected to bit line BL1, and cell strand CST21 and cell strand CST22 can be connected to bit line BL2. As described above, the memory cell arrangement can have a larger number of bit lines BL and a larger number of cell strands CST than in Fig. 2 is shown.

[0128] Although Fig. Figure 23 illustrates an example in which each cell strand CST contains only one dummy cell DC; the inventive concepts are not limited to this. Referring to Fig. Figure 24, which shows another example of the first memory block BLK1, illustrates layers stacked vertically Z from the substrate SUB, as a strand selector line SSL, a dummy word line DWL, a normal word line NWL, and a ground selector line GSL. Each of these can be connected to the strand selector transistor SST, the dummy cell DC, the normal cells NC, and the ground selector transistor GST of each cell strand CST. For brevity, the corresponding transistor or cell is not shown in every layer.

[0129] As in Fig. As shown in Figure 24, the dummy word line DWL can be implemented using two layers DWLa and DWLb, which are arranged adjacent to the strand selection line SSL. Furthermore, with reference to Fig. Figure 25, which shows another example of the first memory block BLK1, shows the dummy word line DWL being implemented by two layers DWLa and DWLb, which are arranged adjacent to the strand selector line SSL, and two layers DWLc and DWLd, which are arranged adjacent to the ground selector line GSL. However, the inventive concepts are not limited thereto, and the dummy word line DWL can have one layer which is arranged adjacent to the strand selector line SSL and one layer which is arranged adjacent to the ground selector line GSL.A layer, indicated by the dummy cell DC or the dummy word line DWL, may be provided to reduce or minimize an undesirable influence of a voltage applied to the string selection line SSL, the dummy word line DWL, the normal word line NWL and the ground selection line GSL on the cell strings CST during the operation of the storage device 220.

[0130] Fig. 26 is a cross-sectional view of the memory cell arrangement of the Fig. 24, which along a line AA' of Fig. 24 is recorded. Referring to Fig. 26a. A well WEL of a second conductivity type, which differs from a first conductivity type, can be formed on a substrate SUB of the first conductivity type. The first conductivity type can be a p-type and the second conductivity type can be an n-type. However, the inventive concepts are not limited thereto. An insulating structure IPT and a conductive structure CPT can be stacked alternately on a pair of wells WEL arranged adjacent to each other. The insulating structure IPT can be formed from silicon dioxide, and the conductive structure CPT can be formed from polysilicon (Poly-Si). The insulating structure IPT and the conductive structure CPT can be formed using a chemical vapor deposition (CVD) process.The gates of the string selection transistor SST described above, a dummy cell DC, normal cells NC and a ground selection transistor GST can be implemented through the conductive structures CPT.

[0131] A channel structure CST, configured to connect the substrate SUB, a contact plug CPL, and a drain can be formed between two stacked structures obtained by alternating stacking of the insulating structure IPT and the conductive structure CPT. The channel structure CST can include a column CSTa and a channel region CSTb. The column CSTa of the channel structure CST can be made of an insulating material.

[0132] Accordingly, the string selector transistor SST, the dummy cell DC, the normal cells NC, and the ground selector transistor GST, which is contained in the cell string CST, can all use the same channel. As shown in Fig. As shown in Figure 26, the channel structure CST can extend vertically in the Z direction to the substrate SUB. The channel structure CST can be a channel-last structure (for example, a bit-cost scalable (BiCS) structure), in which the channel structure CST is formed after the conductive structure CPT is formed, or a channel-first structure (for example, a terabit cell array transistor (TCAT) structure), in which the conductive structure CPT is formed after the channel structure CST is formed.

[0133] In the VNAND flash memory device, which has the structure described above, each memory cell can have a charge-trap flash (CTF) structure in which charges are stored in a three-dimensional cylindrical thin non-conducting layer. Here, the three-dimensional CTF cells can be particularly sensitive to temperature variations. In the memory device, the memory system, and the method for controlling the memory device according to the present embodiment, temperature variations in the memory device can be efficiently detected and optimally controlled.

[0134] Fig. Figure 27 is a diagram of a memory module 2700 according to an exemplary embodiment of the inventive concepts. Referring to Fig. The memory module 2700 can include memory chips 2721 to 2724 and a control chip 2710. The memory chips 2721 to 2724 can store data. The control chip 2710 can control the memory chips 2721 to 2724 in response to various signals transmitted by an external memory controller. For example, the control chip 2710 can activate one of the memory chips 2721 to 2724, corresponding to an externally transmitted chip selection signal, and perform error checking and correction operations on data read from each of the memory chips 2721 to 2724. For example, each of the memory chips 2721 to 2724 can control the storage device 220 of the Fig. 2. Accordingly, the memory module 2700, according to the present embodiment, can receive temperatures from the memory chips 2721 to 2724 and transmit the temperatures to the control chip 2710 using an optimized procedure for an operating status of the memory module 2700, without causing an operating load. The control chip 2710 can receive temperature information from the memory chips 2721 to 2724 and transmit the temperature information to the external memory controller.

[0135] Fig. Figure 28 is a diagram of a memory card 2800 according to an exemplary embodiment of the inventive concepts. The memory card 2800 can be a portable storage device which can be connected to and used with an electronic device such as a mobile device or a desktop computer. As shown in Fig. As shown in Figure 28, the memory card 2800 can include a memory controller 2810, a memory device 2820, and a port area 2830. The memory card 2800 can communicate with an external host (not shown) via the port area 2830, and the memory controller 2810 can control the memory device 2820. The memory controller 2810 can read a program from a read-only memory (ROM) (not shown) configured to store the program. According to the present embodiment, the memory controller 2810 can provide various pieces of information for controlling voltage levels and / or voltage rise times to the memory device 2820, and the memory device 2820 can control rise times of voltages intended for word lines based on the received information.

[0136] Fig. Figure 29 is a diagram of a solid-state device (SSD) 2900 according to an exemplary embodiment of the inventive concepts. Referring to Fig. According to the present embodiment, the SSD 2900 can comprise a NAND controller 2910 and a plurality of NAND chips 2920. The NAND controller 2910 can perform the control operation described above on a plurality of NAND chips 2920, which are connected to channels CH1, CH2, ... and CHi.

[0137] Fig. Figure 30 is a block diagram of a computer system or computation system 3000, which includes a non-volatile memory system according to an exemplary embodiment of the inventive concepts. The computation system 3000 according to the present embodiment can be a mobile device or a desktop computer and includes a host 3010, which has a central processing unit (CPU), a RAM 3020, a user interface 3030, and a device driver 3040, each of which can be electrically connected to a bus 3060. A non-volatile memory system 3050 can be connected to the device driver 3040. The host 3010 can control the entire computation system 3000 and perform operations corresponding to instructions supplied by a user via the user interface 3030.The RAM 3020 can function as a data store for the host 3010, and the host 3010 can write or read user data to and from the non-volatile memory system 3050 via the device driver 3040. Likewise, although... Fig. Figure 30 illustrates an example in which the device driver 3040 is provided for controlling operations and managing the non-volatile memory system 3050 outside the host 3010, and the device driver 3040 is provided in the host 3010. The computing system 3000 can control the non-volatile memory system 3050 using the control procedure described above.

[0138] Fig. Figure 31 is a diagram of an example of a mobile data terminal 3100, which includes a storage system according to an exemplary embodiment of the inventive concepts. A storage system according to an exemplary embodiment of the inventive concepts can be incorporated into the mobile data terminal 3100. Fig.31. The mobile data terminal 3100 need not be a smartphone, whose functions are not limited, but can be mainly modified and extended using application programs. The mobile data terminal 3100 can have an embedded antenna 3110 configured to exchange radio frequency (RF) signals with a wireless base station, and a display screen 3120 configured to display images captured by a camera 3130 or images received and decoded by the antenna 3110. The display screen 3120 can be a liquid crystal display (LCD) or an organic light-emitting diode (OLED) screen.The mobile data terminal 3100 may include an operator panel 3140, which has a control knob and a touch panel. Likewise, if the display screen 3120 is a touchscreen, the operator panel 3140 may also include a touch-sensitive panel of the display screen 3120. The mobile data terminal 3100 may include a speaker 3180 or other types of sound output units configured to produce voice and sound, and a microphone 3150 or other types of sound input or output units to which voice and sound are fed. The mobile data terminal 3100 may also include a camera 3130 (for example, a charge-coupled device (CCD) camera) configured to record video and still images.Similarly, the mobile data terminal 3100 can include a storage medium 3170 configured to store encoded or decoded data along with video or still images captured by the camera 3130, received via email, or obtained in other forms, and a slot 3160 configured to mount the storage medium 3170 in the mobile data terminal 3100. The mobile data terminal 3100 can control the storage medium 3170 using the control method described above.

Claims

[1] Method comprising the following: a sampling, by a storage device (220, 220a-c, 2820), a temperature of the storage device (220, 220a-c, 2820); and a generation, by the storage device (220, 220a-c, 2820), of a response to a command (CMD), wherein the response has the following: Status information in response to the fact that the sampled temperature is within a first temperature range, where the response does not contain any temperature information (T_inf); the status information and temperature information (T_inf) in response to the fact that the sampled temperature is outside the first temperature range, where the temperature information (T_inf) includes a value corresponding to the sampled temperature. [2] Method according to claim 1, wherein the status information further includes read status information indicating whether the read status of the storage device (220, 220a-c, 2820) is busy and ready. [3] Method according to claim 1, wherein: Receiving the command (CMD) includes receiving a read status request command at any given time. [4] Method according to claim 1, wherein: Receiving the received command (CMD) includes receiving a read status request command regardless of whether the storage device (220, 220a-c, 2820) is in a ready state. [5] Method according to claim 1, wherein the temperature information (T_inf) is one of a plurality of index values, and each of the plurality of index values ​​is assigned to a different temperature range. [6] Method according to claim 1, wherein the scanning is triggered by receiving at least one programming instruction, one read instruction and one delete instruction. [7] Method according to claim 6, further comprising: a storage of the sampled temperature; and wherein This includes generating the temperature information (T_inf) in response to the programming command. [8] Method according to claim 1, wherein the scanning is triggered by receiving the command (CMD). [9] Method according to claim 1, wherein the temperature information (T_inf) indicates a range of temperatures from a plurality of different ranges. [10] Method comprising the following: a sampling, by a storage device (220, 220a-c, 2820), a temperature of the storage device (220, 220a-c, 2820); and a generation, by the storage device (220, 220a-c, 2820), of a response to a read status command, wherein the response contains status information, wherein the status information indicates that the sampled temperature is within a first range if the status information does not contain temperature information (T_inf), and the status information indicates that the sampled temperature is within at least one range other than the first range if the status information contains temperature information (T_inf), wherein the temperature information (T_inf) indicates the at least one other range. [11] Method according to claim 10, further comprising: Receiving the read status command regardless of whether the storage device (220, 220a-c, 2820) is in a ready state. [12] Method according to claim 10, wherein the temperature information (T_inf) is one of a plurality of index values, and each of the plurality of index values ​​is assigned to a different temperature range. [13] Method according to claim 10, wherein the scanning is triggered by receiving the read status command. [14] Method according to claim 10, wherein the scanning is triggered by receiving at least one programming instruction, one read instruction and one delete instruction. [15] Method according to claim 14, further comprising: a storage of the sampled temperature, and wherein For a plurality of sampled temperatures, the temperature information (T_inf) displays the sampled temperature triggered by the programming command. [16] Method which features the following: a scanning, by a temperature sensor of a storage device (220, 220a-c, 2820), a temperature of the storage device (220, 220a-c, 2820); a sending, by a controller (210, 2810, 2910), of a single command (CMD) to a storage device (220, 220a-c, 2820) regardless of a ready status of the storage device (220, 220a-c, 2820); a receiving, by the controller (210, 2810, 2910), a response from the storage device (220, 220a-c, 2820) in response to the individual command (CMD), wherein the response includes the following: Status information in response to the sampled temperature being within a first temperature range, wherein the status information indicates whether the storage device (220, 220a-c, 2820) is in a ready state or in a busy state, wherein the response does not include temperature information (T_inf); the status information and temperature information (T_inf) in response to the fact that the sampled temperature is outside the first temperature range, wherein the temperature information (T_inf) includes a value corresponding to the sampled temperature; and a selective change, by the controller (210, 2810, 2910), of at least one memory control characteristic for the storage device (220, 220a-c, 2820) based on the temperature information (T_inf). [17] Method according to claim 16, wherein the individual command (CMD) is a temperature information request command, wherein the temperature information request command requests the temperature information (T_inf). [18] Method according to claim 16, wherein the single command (CMD) is a read status request command, wherein the read status request command requests status information about the storage device (220, 220a-c, 2820). [19] Method according to claim 16, wherein the memory control characteristic comprises read voltages, incremental step pulse programming voltages, erase voltages, program verification voltages and a time period for applying voltages to the memory device (220, 220a-c, 2820).

Images