Component and method for producing a component

Abstract

Component (100) comprising a semiconductor body (2), a carrier (1) and a stabilization layer (3) arranged in the vertical direction between the semiconductor body (2) and the carrier (1), wherein - the semiconductor body (2) has a first semiconductor layer (21) facing away from the carrier (1), a second semiconductor layer (22) facing the carrier (1) and an active layer (23) arranged between the first semiconductor layer (21) and the second semiconductor layer (22), - the carrier (1) has a first through-contact (41) and a second through-contact (42) laterally spaced from the first through-contact (41) by an intermediate region (40), wherein the first through-contact (41) is electrically conductively connected to the first semiconductor layer (21) and the second through-contact (42) is electrically conductively connected to the second semiconductor layer (22), and - the stabilisation layer (3) is formed coherently, has overlaps with the through contacts (41, 42) in plan view and laterally bridges the intermediate region (40), wherein the stabilisation layer (3) is electrically insulated from the through contacts (41, 42) and from the semiconductor body (2), and - the component (100) has an insulation structure (92, 93) which completely encloses the stabilization layer (3).

Description

A device and a method for manufacturing a device are provided.DE 10 2013 110 853 A1 describes a semiconductor chip having a semiconductor body on a carrier, wherein a first dielectric layer and a second dielectric layer are arranged between the semiconductor body and the carrier. The carrier has a plurality of through-contacts which are configured for the electrical contacting of the semiconductor body.EP 2 680 326 A2 describes a component having a semiconductor body on a carrier, wherein the carrier has a plurality of vias which are electrically separated from one another in regions by an insulation layer made of silicon oxide or made of silicon nitride.One object is to specify a component which is to be produced in a simplified manner and has a high mechanical stability. Furthermore, a cost-effective method for producing such a component is specified.These objects are achieved by a component according to one of the independent claims 1 and 16 and by a method according to a subordinate claim 13. Further embodiments and developments of the component and of the method for producing the component are the subject matter of the dependent claims.The component comprises a semiconductor body having an active layer. In particular, the active layer is a p-n junction region. The active layer can be formed as a layer or as a layer sequence of a plurality of layers. For example, during operation of the component, the active layer emits electromagnetic radiation, for example in the visible, ultraviolet or infrared spectral range. Alternatively, the active layer may absorb electromagnetic radiation during operation of the component and convert it into electrical signals or electrical energy. The component is in particular configured as an optoelectronic component.The semiconductor body comprises a first semiconductor layer of a first lead carrier type and a second semiconductor layer of a second lead carrier type, wherein the active layer is arranged between the first semiconductor layer and the second semiconductor layer. The semiconductor body preferably has exclusively semiconductor layers. The layers of the semiconductor body can be applied layer by layer to a growth substrate by means of an epitaxy method. The growth substrate can subsequently be removed or thinned from the semiconductor body, such that the component is free of a growth substrate, for example.The semiconductor body has a first main surface which is preferably formed as a radiation passage surface of the component. The radiation passage surface can be structured, whereby a radiation decoupling or radiation coupling-in efficiency is increased. In particular, the first main surface of the semiconductor body is formed by a surface of the first semiconductor layer. The semiconductor body has a second main surface facing away from the first main surface, which is formed, for example, by a surface of the second semiconductor layer. In particular, the first main surface and the second main surface delimit the semiconductor body in the vertical direction.A vertical direction is understood to mean a direction which is directed transversely, in particular perpendicularly, to a main extension surface of the active layer. For example, the vertical direction is perpendicular to the first and / or the second main surface of the semiconductor body. By contrast, a lateral direction is understood to mean a direction which runs along, in particular parallel to, the main extension surface of the active layer. The vertical direction and the lateral direction are preferably arranged perpendicular to each other.According to at least one embodiment of the component, the semiconductor body has at least one recess. The recess extends in particular from the second main surface through the second semiconductor layer and the active layer through into the first semiconductor layer. A recess is understood to mean an opening of the semiconductor body, which is in particular not formed continuously through the semiconductor body. The recess is surrounded in lateral directions, for example, over the entire circumference by the semiconductor body. The semiconductor body may have a plurality of such recesses. For the electrical contacting of the first semiconductor layer from the second main surface side, the recess can be filled with an electrically conductive material, for example to form a through-connection. The component can have a plurality of such vias.The component has a carrier on which the semiconductor body is arranged. The carrier includes a first through-contact and a second through-contact. The first through-contact is laterally spaced from the second through-contact by an intermediate region. The carrier can have a shaped body which is formed for example from an electrically insulating shaped body material. In particular, the molded body is formed continuously, preferably integrally. The first through-contact and / or the second through-contact can be embedded at least in regions in the molded body. In the vertical direction, the through contacts extend approximately through the molded body. The carrier has a front side and a rear side, wherein the front side and / or the rear side are formed in particular in regions by surfaces of the molded body. The front side and / or the rear side of the carrier can be formed in regions by surfaces of the through contacts. In particular, the through contacts can be electrically contacted both on the front side and on the rear side of the carrier. Preferably, the through contacts are freely accessible both on the front side and on the rear side of the carrier.The component has a stabilizing layer. The stabilizing layer is formed continuously. Preferably, the stabilizing layer is arranged between the semiconductor body and the carrier in the vertical direction. In plan view, the stabilizing layer can have overlaps with the vias. The intermediate region is bridged by the stabilizing layer along the lateral direction. It is also possible for the stabilizing layer to completely cover the intermediate region. The stabilizing layer can be formed from an electrically conductive material, for example from a metal. The component is preferably configured such that the stabilizing layer is electrically insulated from the vias and / or from the semiconductor body.In at least one embodiment of the component, the latter has a semiconductor body, a carrier and a stabilizing layer arranged between the semiconductor body and the carrier in the vertical direction. The semiconductor body has a first semiconductor layer facing away from the carrier, a second semiconductor layer facing towards the carrier and an active layer arranged between the first semiconductor layer and the second semiconductor layer. The carrier has a first through-contact and a second through-contact laterally spaced from the first through-contact by an intermediate region. The first through contact is electrically conductively connected, for example, to the first semiconductor layer. The second through contact is electrically conductively connected, for example, to the second semiconductor layer. The stabilizing layer is formed continuously. In a plan view of the carrier, the stabilizing layer has overlaps with the vias and bridges the intermediate region along the lateral direction. The stabilizing layer is electrically insulated both from the vias and from the semiconductor body.A lateral bridging of the intermediate region means that the first through contact and the second through contact are bridged by the stabilizing layer at locations of the intermediate region along at least one lateral direction. In plan view, the intermediate region can be partially or completely covered by the stabilizing layer. The lateral bridging or overlapping of the intermediate region by the stabilizing layer has a mechanically stabilizing effect on the component, since possible mechanical weak points are largely or completely prevented, in particular at points of the intermediate region. If the stabilizing layer is electrically insulated from the vias and from the semiconductor body, the stabilizing layer can be exposed in regions without the risk of a possible electrical short circuit on side surfaces of the component. Such locally exposing the stabilizing layer on the side surfaces of the component often originates from a singulation process in which, for example, a common stabilizing layer is separated into a plurality of stabilizing layers of a plurality of components. Since the respective stabilizing layer does not contribute to the electrical contacting of the component, the risk of a possible electrical short circuit, for example due to a high-running solder on the side surfaces of the component, can be reduced.According to at least one embodiment of the component, the stabilizing layer is a self-supporting layer of the component. In other words, the stabilizing layer can be designed as an independent layer which is mechanically stable with respect to its own weight even without mechanical support of further layers. For example, the stabilizing layer has a layer thickness in the vertical direction between 5 μm and 50 μm inclusive, for example between 5 μm and 30 μm inclusive, for example between 5 μm and 15 μm inclusive. The layer thickness of the stabilizing layer is preferably at least 10 μm.According to at least one embodiment of the component, the stabilizing layer has at least one opening through which the first through contact or the second through contact extends for the electrical contacting of the semiconductor body. For example, the stabilizing layer has a first opening, through which the first through contact extends for the electrical contacting of the semiconductor body. The stabilizing layer may have a second opening, through which the second through contact extends for the electrical contacting of the semiconductor body. The component can have an insulation structure which electrically isolates the stabilizing layer from the vias.According to at least one embodiment of the component, the stabilizing layer and the vias together cover at least 90%, preferably at least 95%, of a total area of the active layer. It is also possible that the stabilizing layer and the through contacts together completely cover the entire active layer and / or the entire semiconductor body. In a plan view of the carrier, the semiconductor body can be supported mechanically continuously by at least one metal layer, for example by the stabilizing layer and / or by the vias, as a result of which a particularly high mechanical stability of the entire component is achieved.According to at least one embodiment of the component, the carrier has a molded body made of an electrically insulating material. The through contacts are preferably embedded at least in regions in the molded body. In lateral directions, the through contacts can be surrounded over the full circumference by the molded body. In the vertical direction, the through contacts can extend through the molded body. The molded body can be formed in such a way that the semiconductor body is surrounded in regions by the molded body in the lateral directions. In other words, the molded body may extend along the vertical direction laterally of the semiconductor body approximately to such an extent that the molded body laterally surrounds the second semiconductor layer and / or the active layer and / or the first semiconductor layer, for example.The molded body is preferably designed as a molded body. For example, the molded body is formed by a casting method. In particular, the molded body material is a moldable plastic, for example a polymer such as resin, epoxy or silicone. The semiconductor body may be surrounded in regions by the molded body material of the molded body. A casting method is generally understood to mean a method with which a molding compound is preferably shaped under the action of pressure according to a predetermined mold and cured if necessary. In particular, the term "casting method" comprises casting (molding), foil assisted casting (film assisted molding), injection molding (injection molding), transfer molding (transfer molding) and compression molding (compression molding).According to at least one embodiment of the component, the latter has at least one through-connection. The via extends, for example, from the second main surface of the semiconductor body through the second semiconductor layer and the active layer into the first semiconductor layer. For the electrical contacting of the first semiconductor layer, the through-contact can be electrically conductively connected to one of the through-contacts of the carrier. In order to achieve a uniform current distribution in the first semiconductor layer, the component can have a plurality of such vias. The through-connection is electrically insulated from the second semiconductor layer and / or from the active layer by the insulation structure of the component, for example. In this case, the insulation structure of the component can extend into the semiconductor body in regions. In the lateral directions, the through-connection can be surrounded over its full circumference by the insulation structure.According to at least one embodiment of the component, the latter has a mirror layer. The mirror layer is preferably designed to be electrically conductive. In this case, the mirror layer can be electrically conductively connected to one of the vias or to a plurality of the vias of the same electrical polarity. In the vertical direction, the mirror layer is arranged in particular between the semiconductor body and the carrier. The mirror layer can be electrically conductively connected indirectly or directly to the plated-through hole or to the plated-through holes.The mirror layer is preferably formed in such a way that it is situated exclusively within the component. This means that the mirror layer covers approximately on all side surfaces of the component and is therefore inaccessible. In other words, all side faces of the component are preferably free of the mirror layer. In the lateral direction, the mirror layer may be completely covered by the insulation structure of the component, for example. Along the vertical direction, the mirror layer can extend laterally with respect to the second semiconductor layer to such an extent that it laterally covers or laterally surrounds the second semiconductor layer and / or the active layer at least in regions. Electromagnetic radiations which emerge laterally or backwards from the semiconductor body can thus be reflected back again in the direction of the active layer or in the direction of the radiation passage area of the component, as a result of which the efficiency of the component is increased. The mirror layer can be formed as a metal layer or as a metal layer stack.According to at least one embodiment of the component, the stabilizing layer is freely accessible on at least one side surface of the component. The stabilizing layer can be freely accessible on all side surfaces of the component. In particular, the stabilizing layer has singulating tracks on at least one side surface or on all side surfaces of the component. Alternatively, it is also possible for the stabilizing layer to be completely surrounded by the insulation structure of the component, for example.According to at least one embodiment of the component, the component is configured such that the side surfaces of the component are free of electrically conductive layers which are electrically conductively connected to the semiconductor body and / or to at least one of the vias or are particularly preferably electrically conductively connected neither to the semiconductor body nor to any via. Such a configuration of the component can prevent an electrically conductive connecting material running up on the side surfaces of the component from causing an electrical short circuit.In at least one embodiment of a method for producing one or a plurality of the components, which are described for example here, the carrier is formed stepwise on the semiconductor body. In other words, the carrier of the component is not produced separately from the semiconductor body of the component associated therewith, for example, but rather is formed directly on the associated semiconductor body, that is to say in the presence of the associated semiconductor body. In the production of a plurality of such components, the through contacts of different components can be formed in particular by a common method step. For example, the through contacts are applied to the semiconductor body by means of a coating method, preferably by means of an electroplating method. The stabilizing layer can also be applied to the semiconductor body by means of an electroplating method.According to at least one embodiment of a method for producing a plurality of components, a wafer composite is provided. The wafer composite can have a semiconductor body composite, a plurality of first through-contacts, a plurality of second through-contacts and at least one or a plurality of contiguous stabilizing layers. The wafer composite can have a plurality of separating trenches, by means of which the semiconductor composite can be separated into a plurality of semiconductor bodies. In this case, the semiconductor bodies can also have a common semiconductor layer, for example the first semiconductor layer, in the presence of the separating trenches. In this case, the separating trenches can be formed in a wafer composite in such a way that they extend through the second semiconductor layer and the active layer into the first semiconductor layer. The common semiconductor layer can subsequently be removed in regions during a roughening step, for example in order to form a structured radiation passage surface, in such a way that the semiconductor bodies are completely separated from one another. Alternatively, it is also possible for the separating trenches to be formed in such a way that they extend in the vertical direction through the entire semiconductor body composite, with the result that the semiconductor bodies are completely separated from one another already during the formation of the separating trenches.To form a molded body composite, for example, a molded body material is applied to the wafer composite in such a way that the separating trenches and intermediate regions between the through contacts are at least partially or completely filled. In a subsequent method step, the wafer composite and the molded body composite are singulated into a plurality of components approximately along the separating trenches in such a way that the components each have one of the semiconductor bodies, a stabilizing layer and a carrier, wherein the carrier has a first through-contact, a second through-contact and a molded body as part of the molded body composite.The method described above is particularly suitable for the production of one or a plurality of the components described here. Features described in connection with the component can therefore also be used for the method and vice versa.Further advantages, preferred embodiments and developments of the method and of the component result from the exemplary embodiments explained below in connection with FIGS. 1A to 3B.The following are shown: FIGS. 1A and 1B show a wafer composite and a component in schematic sectional views, FIGS. 2A and 2B show various exemplary embodiments of a component in schematic sectional views, FIG. 3A shows a method stage of an exemplary embodiment of a method for producing one or a plurality of components in schematic sectional view, and FIG. 3B shows a further exemplary embodiment of a component in schematic sectional view, which can be produced for example according to the exemplary embodiment shown in FIG. 3A for a method for producing one or a plurality of components.Identical, similar or identically acting elements are provided with the same reference numerals in the figures. The figures are schematic representations in each case and are therefore not necessarily true to scale. Rather, comparatively small elements and in particular layer thicknesses can be represented with exaggerated size for clarity.FIG. 1A illustrates a composite 200, in particular a wafer composite 200. The composite 200 comprises a semiconductor body composite 20. The semiconductor body assembly 20 is arranged on a substrate 10. The substrate 10 is in particular a growth substrate, for example a sapphire substrate, wherein the semiconductor body composite 20 can be deposited layer by layer on the growth substrate, for example by means of an epitaxy method. The semiconductor body composite 20 has a first main surface 201 facing the substrate 10 and a second main surface 202 facing away from the substrate 10. In particular, the first main surface 201 is formed by a surface of a first semiconductor layer 21, for example an n-conducting gallium nitride layer, and the second main surface 202 is formed by a second semiconductor layer 22, for example a p-conducting gallium nitride layer, of the semiconductor body composite 20. The semiconductor body assembly 20 comprises an active layer 23 arranged between the first semiconductor layer 21 and the second semiconductor layer 22. In particular, the active layer 23 is a p-n junction region. During operation of the component to be produced, the active layer is preferably configured for detecting or emitting electromagnetic radiations, for example in the visible, ultraviolet or infrared spectral range.A connection layer 84 is applied to the semiconductor body composite 20. The connection layer 84 is preferably formed from a material that is highly electrically conductive and at the same time highly reflective of radiation. For example, connection layer 84 is an electrically conductive mirror layer. For example, the terminal layer 84 is a silver layer. The connection layer 84 is applied to the second semiconductor layer 22, for example, by means of a coating method, in particular by means of evaporation. An electrically conductive protective layer 83 may be formed on the terminal layer 84. In particular, the protective layer 83 has a smaller layer thickness than the connection layer 84.The connection layer 84 and the protective layer 83 can be formed over a large surface area on the semiconductor body composite 20 and subsequently patterned, for example removed in regions. In particular, the connection layer 84 and / or the protective layer can be structured in such a way that they have common recesses. The semiconductor body composite 20 can be partially exposed in the recesses. The connection layer 84 and the protective layer 83 can be etched in this case. To form an etching mask, for example, lacquers, in particular photostructureable lacquers, can be used. Alternatively, it is also conceivable for the connection layer 84 and / or the protective layer 83 to be applied onto the semiconductor body composite 20 in a structured manner, for example using photostructureable materials.A current spreading layer 82 is applied to the patterned connection layer 84 and / or protective layer 83. In particular, the current spreading layer 82 is applied to the connection layer 82 and / or to the protective layer 83 using photostructureable lacquers. In this case, the current spreading layer 82 can be formed by means of a coating method, for example by means of vapor deposition. The current spreading layer 82 can be formed as a layer stack of a plurality of metal layers. In particular, the current spreading layer 82 may include metals such as platinum, gold and / or titanium. When the current spreading layer 82 is formed on the protective layer 83 of zinc oxide layer, the current spreading layer 82 may be free of titanium and / or free of platinum. However, the current spreading layer 82 may also be optional. In this case, the connection layer 84 is preferably a silver layer having a layer thickness of at least 140 nm or at least 200 nm, for example of approximately 300 nm. The protective layer 83 is preferably a zinc oxide layer having a smaller layer thickness than the connection layer 84.A passivation layer 90 is formed on the semiconductor body composite 20, for example by means of a coating method such as CVD (chemical vapor deposition). The passivation layer 90 can cover the semiconductor body composite 20, the connection layer 84, the protective layer 83 and / or the current spreading layer 82 in regions or preferably completely. By means of chemical, in particular plasma-enhanced, vapor deposition, the passivation layer 90 can be applied in a simplified manner to the structured layers, such as the connection layer 84, protective layer 83 and / or current spreading layer 82. The passivation layer 90 may include an SiO2layer and / or a silicon nitride layer.Recesses are formed in the semiconductor body composite 20, for example by means of an etching method. Preferably, an RIE (reactive-ion etching) process is used, for example with chlorine as etchant. In this case, recesses 25 and separating trenches 60 can be formed. The recess 25 or the plurality of recesses 25 extends here approximately from the second main surface 202 of the semiconductor body composite 20 through the second semiconductor layer 22 and the active layer 23 into the first semiconductor layer 21. Alternatively, it is also possible for the separating trenches 60 to be formed along the vertical direction through the entire semiconductor body composite 20. By forming the separating trenches 60, the semiconductor body composite 20 can be cut into a plurality of semiconductor bodies 2. During the formation of the recesses 25 and / or of the separating trenches 60, the passivation layer 90 is removed in regions. For the electrical insulation of the semiconductor body 2 or the semiconductor bodies 2, a first insulation layer 91 is applied to the passivation layer 90 and to the recesses 25 and to the separating trenches 60.The first insulating layer 91 can be removed in regions in the region of the recess 25 or the recesses 25. By the regional removal of the first insulation layer 91, for example, the first semiconductor layer 21 is exposed in regions. The first insulating layer 91 can be removed in some areas by means of an RIE process, preferably using fluorine as etchant and using lacquers. For the electrical contacting of the first semiconductor layer 21, the recess 25 or the plurality of recesses 25 is filled with an electrically conductive material, for example with a metal such as silver, whereby a through-connection 81 is formed. In particular, the through-via 81 is in direct electrical contact with the first semiconductor layer 21. For electrically insulating the through-via 81 from the active layer 23 and from the second semiconductor layer 22, the through-via 81 is surrounded fully and fully in lateral directions by the first insulation layer 91.A mirror layer 80 is formed on the semiconductor body composite 20. The mirror layer 80 is formed in particular after the formation of the through-connection 81. The mirror layer 80 is preferably designed to be electrically conductive and is electrically conductively connected to the plated-through hole 81, for example. The mirror layer 80 and the through-connection 81 can comprise the same material, for example silver. The mirror layer 80 can also be formed as a layer stack of a plurality of metals or of a plurality of metal layers. In particular, the mirror layer 80 comprises metals such as titanium, silver and / or platinum.The mirror layer 80 can be formed in such a way that it has an opening in the region of the connection layer 84 or the current spreading layer 82, for example directly above the connection layer 84 or the current spreading layer 82, the bottom surface of which opening is formed by a surface of the first insulation layer 91. The mirror layer 80 can also be formed in such a way that it extends in the vertical direction as far as the bottom surface of the separating trenches 60 and in the process covers, in particular completely covers, the side walls of the separating trenches 60. However, the separating trenches 60 may have a bottom surface which is free of the mirror layer 80 at least in regions. In the case of singulation of the composite 200, the mirror layer 80 may not have to be cut through.A second insulating layer 92 is formed on the mirror layer 80. The second insulating layer 92 may be formed by vapor deposition in a manner analogous to the formation of the first insulating layer. The first and the second insulation layer may be formed from an electrically insulating material such as silicon oxide and / or silicon nitride. In particular, the second insulation layer 92 is formed in such a way that, in plan view, it completely covers the semiconductor body composite 20 and / or the separating trenches 60. Mirror layer 80 is preferably completely surrounded laterally by first insulating layer 91 and by second insulating layer 92.A stabilizing layer 3 is formed on the semiconductor body composite 20. The stabilizing layer 3 can be applied to the second insulating layer 92 by means of an electroplating method. For example, a starting layer (seed layer) made of titanium and / or gold, for example, is applied to the second insulation layer 92 by means of sputtering. Using lacquers, the stabilizing layer 3 can be applied structured to the second insulating layer 92.After the stabilization layer 3 has been formed, it can have at least one first opening 31 and at least one second opening 32. In FIG. 1A, the second opening 32 of the stabilizing layer 3 is located in the region of the opening of the mirror layer 80. Also, the stabilizing layer 3 may include a plurality of such first openings 31 and a plurality of such second openings 32. The stabilizing layer 3 extends in the vertical direction into the separation trenches 60. In this case, the stabilizing layer 3 can partially or completely cover the bottom surfaces of the separating trenches 60. The stabilizing layer 3 of a component 100 to be produced is formed, in particular, continuously. The stabilizing layer 3 preferably covers the bottom surfaces of the separating trenches 60 only in regions, such that the stabilizing layer 3 is not cut through, for example, during the singulation of the semiconductor body composite 20 or of the composite 200 or of the wafer composite 200 into a plurality of components.The stabilizing layer 3 is preferably formed from a metal, for example from nickel or copper. In particular, the stabilizing layer 3 is formed such that it has a sufficient layer thickness, for example of at least 5 μm or at least 10 μm. In contrast to FIG. 1A, it is also possible for the stabilizing layer 3 and the separating trenches 60 to be free of overlap in plan view (compare FIG. 3A ).A third insulating layer 93 is deposited on the stabilizing layer 3 by vapor deposition, for example. The third insulating layer 93 may include a same material as the first insulating layer 91 and / or the second insulating layer 92. In particular, the third insulation layer 93 is applied over a large surface area to the semiconductor body composite 20, such that the third insulation layer 93 covers the semiconductor body composite 20 approximately completely in plan view. In the regions of the openings 31 and 32 of the stabilizing layer 3, the insulation layers 91, 92 and / or 93 for exposing electrically conductive layers are removed in regions, for example by means of an etching method. In the region of the first opening 31, the second insulating layer 92 and the third insulating layer 93 are removed in regions in order to partially expose the mirror layer 80. In the region of the second opening 32, the passivation layer 90, the first insulation layer 91, the second insulation layer 92 and the third insulation layer 93 are removed in regions in order to expose the current spreading layer 82. If the current spreading layer 82 is not present, the protective layer 83 or the connection layer 84 is exposed in regions in the region of the second opening 32.Through contacts 41 and 42 are formed. Preferably, the through contacts 41 and 42 are formed by means of an electroplating method. A first through contact 41 is formed in particular such that, in plan view, it completely covers the first opening 31 and extends through the first opening 31 for the electrical contacting of the mirror layer 80. A second through-contact 42 is formed in such a way that it completely covers the second opening 32 in plan view and extends through the second opening 32 for the electrical contacting of the current spreading layer 82. Via the mirror layer 80 and the through-via 81, the first through-contact 41 is electrically conductively connected to the first semiconductor layer 21. The second through contact is electrically conductively connected to the second semiconductor layer 22 via the current spreading layer 82, the protective layer 83 and the connection layer 84.The through contacts 41 and 42 are thus assigned to different electrical polarities of the component to be produced. In the lateral direction, the first through-contact 41 is laterally spaced from the second through-contact 42 by an intermediate region 40. The through contacts 41 and 42 are in particular formed in such a way that the intermediate region 40 located between them is at least bridged, in particular completely covered, by the stabilizing layer 3. The through contacts 41 and 42 can be formed from a metal, for example from nickel and / or copper. The vias 41 and 42 may each have a vertical layer thickness that is, for example, at least twice, about at least three times or at least five times as large as the layer thickness of the stabilizing layer 3.According to one method step, a molded body 5 or a molded body composite is formed on the semiconductor body composite 20. In this case, a molded body material can be applied to the semiconductor body composite 20 for example by means of a casting method, such that the separating trenches 60 and / or the intermediate regions 40 are filled in regions or completely by the molded body material. The through contacts 41 and 42 can be embedded in some areas or completely in the molded body 5 or in the molded body composite. To expose the through contacts 41 and 42, the molded body 5 or the molded body composite 5 can subsequently be removed in regions.In a subsequent method step, the composite 200 with the semiconductor body composite 200 and the molded body composite 5 is singulated approximately along the separating trenches 60 into a plurality of components 100 in such a way that the components 100 each have a semiconductor body 2, a stabilizing layer 3 and a carrier 1. The carrier 1 has, in particular, a first through-contact 41, a second through-contact 42 and a shaped body 5, wherein the shaped body 5 contains a part of the shaped body composite. In other words, the shaped body 5 is part of the shaped body composite and emerges during the separation of the composite 200 from the shaped body composite. Such a component 100 is schematically illustrated in FIG. 1B, for example.The component 100 is free of a growth substrate, in particular. Before the singulation, the growth substrate 10 can be removed from the semiconductor body composite 20 for example by means of a mechanical method such as grinding, a chemical method such as etching or by means of a laser lift-off method.The component 100 illustrated in FIG. 1B has a semiconductor body 2 on a carrier 1. The component 100 has a radiation passage surface 101. The radiation passage surface 101 may be formed by the first main surface 201. It is also possible for the radiation passage surface 101 to be formed by a surface of a protective layer or converter layer arranged on the semiconductor body 2. The component 100 has a rear side 102, which is formed, for example, at least in regions by a rear side 12 of the carrier 1. The component 100 can be electrically contacted in particular on the rear side 12 of the carrier 1 or on the rear side 102 of the component.The component 100 has a side surface 103 which is formed at least in regions by surfaces of the molded body 5. In particular, the side surface 103 can have characteristic singulating tracks. The carrier 1 has a front side 11. The front side 11 is formed in particular in regions by surfaces of the molded body 5 and in regions by surfaces of the through contacts 41 and 42. The through contacts 41 and 42 can thus be electrically contacted both on the front side 11 of the carrier 1 and on the rear side 12 of the carrier 1. In the vertical direction, the through contacts 41 and 42 thus extend through the molded body 5.In the vertical direction, the stabilizing layer 3, an insulation structure, and a wiring structure are arranged between the semiconductor body 2 and the carrier 1. The insulation structure contains approximately exclusively electrically insulating layers such as the passivation layer 90, the first insulation layer 91, the second insulation layer 92 and the third insulation layer 93. In this case, the wiring structure contains in particular the mirror layer 80, the plated-through hole 81, the current spreading layer 82, the protective layer 83, the connection layer 84 and, if appropriate, the starting layers. Both the carrier 1 and the wiring structure and the insulation structure are applied stepwise to the semiconductor body 2 before the singulation of the wafer composite 200. Thus, the carrier 1, the wiring structure and the insulation structure are not formed separately from the semiconductor body 2 but directly on the semiconductor body 2, i.e. in the presence of the semiconductor body 2.The exemplary embodiment of a component 100 illustrated in FIG. 2A corresponds substantially to the exemplary embodiment illustrated in FIG. 1B. In contrast to this, the radiation passage surface 101 is structured. Furthermore, the component 100 has contact layers 410 and 420 on the rear side 102. The first through contact 41 is covered approximately completely by a first contact layer 410. The second through contact 42 is completely covered by a second contact layer 420. The component 100 can be electrically contacted externally via the contact layers 410 and 420.The exemplary embodiment of a component 100 illustrated in FIG. 2B corresponds substantially to the exemplary embodiment illustrated in FIG. 2A. In FIG. 2A, the stabilizing layer 3 is freely accessible on at least one side surface 103 of the component. According to FIG. 2A, the stabilizing layer 3 can have singulating tracks on the side face 103. In contrast to this, the stabilizing layer 3 does not extend in the lateral direction according to FIG. 2B approximately as far as the side surface 103 of the component 100. The stabilizing layer 3 is in particular completely surrounded by the second insulating layer 92 and the third insulating layer 93. In FIG. 2B, a starting layer 30 is furthermore illustrated. The starting layer 30 is formed in a structured manner. The stabilizing layer 3 with the openings 31 and 32 can be applied to the structured starting layer 30 by means of an electroplating method. In FIG. 2B, the patterned starting layer 30 does not extend as far as the side surface 103 of the device 100.The exemplary embodiment shown in FIG. 3A for a method stage of a method for producing a component corresponds substantially to the exemplary embodiment shown in FIG. 1A. In contrast to this, the stabilizing layer 3 is formed in such a way that the stabilizing layer 3 and the separating trenches 60 are free of overlap in plan view. A component 100 produced according to this exemplary embodiment is illustrated, for example, in FIG. 3B. Otherwise, the exemplary embodiment shown in FIG. 3B for a component 100 corresponds substantially to the component shown in FIG. 2B.By arranging a continuous stabilizing layer between a carrier and a semiconductor body of a component, the component can be configured to be particularly mechanically stable. If the stabilizing layer is electrically insulated from the carrier and from the semiconductor body, a possible risk of short circuit is reduced or largely avoided, for example due to a connecting material which creeps up on side surfaces of the component.

Claims

Component (100) having a semiconductor body (2), a carrier (1) and a stabilizing layer (3) arranged between the semiconductor body (2) and the carrier (1) in the vertical direction, wherein - the semiconductor body (2) has a first semiconductor layer (21) facing away from the carrier (1), a second semiconductor layer (22) facing the carrier (1) and an active layer (23) arranged between the first semiconductor layer (21) and the second semiconductor layer (22), - the carrier (1) has a first through contact (41) and a second through contact (42) laterally spaced apart from the first through contact (41) by an intermediate region (40), wherein the first through contact (41) is electrically conductively connected to the first semiconductor layer (21) and the second through contact (42) is electrically conductively connected to the second semiconductor layer (22), and - the stabilizing layer (3) is formed continuously, In plan view, it has overlaps with the vias (41, 42) and laterally bridges the intermediate region (40), wherein the stabilization layer (3) is electrically insulated from the vias (41, 42) and from the semiconductor body (2), and - the component (100) has an insulation structure (92, 93) which completely surrounds the stabilization layer (3).Component (100) according to the preceding claim, in which the stabilizing layer (3) is a metal layer.Component (100) according to one of the preceding claims, in which the stabilizing layer (3) has a layer thickness of between 5 μm and 50 μm inclusive.Component (100) according to one of the preceding claims, in which the stabilizing layer (3) has a first opening (31) and a second opening (32), wherein - the first through contact (41) for electrically contacting the semiconductor body (2) extends through the first opening (31), and - the second through contact (42) for electrically contacting the semiconductor body (2) extends through the second opening (32).The device (100) according to any one of the preceding claims, wherein the stabilizing layer (3) and the vias (41, 42) together cover at least 90% of a total area of the active layer (23).Component (100) according to one of the preceding claims, in which the stabilizing layer (3) and the vias (41, 42) together completely cover the active layer (23).Component (100) according to one of the preceding claims, in which the carrier (1) has a shaped body (5) made of an electrically insulating material, wherein the through contacts (41, 42) are embedded in regions in the shaped body (5) and extend through the shaped body (5) in the vertical direction.Component (100) according to the preceding claim, in which the shaped body (5) of the carrier (1) surrounds the semiconductor body (2) in regions in lateral directions.Component (100) according to one of the preceding claims, having a through-connection (81) which extends through the second semiconductor layer (22) and the active layer (23) for the electrical contacting of the first semiconductor layer (21), wherein the through-connection (81) is electrically conductively connected to one of the through-contacts (41, 42).Component (100) according to one of the preceding claims, comprising a mirror layer (80) electrically conductively connected to one of the vias (41, 42), wherein the mirror layer (80) is arranged in the vertical direction between the carrier (1) and the semiconductor body (2) and is formed in such a way that it is covered on all side faces (103) of the component.The device (100) according to claim 1, wherein the stabilizing layer (3) is a self-supporting layer of the device (100) having a vertical layer thickness between 5 μm and 50 μm inclusive.The device according to claim 1, wherein the stabilizing layer (3) is formed of an electrically conductive material.Method for producing a component (100) having a semiconductor body (2), a carrier (1) and a stabilizing layer (3) arranged between the semiconductor body (2) and the carrier in the vertical direction, wherein - the semiconductor body (2) has a first semiconductor layer (21) facing away from the carrier (1), a second semiconductor layer (22) facing the carrier (1) and an active layer (23) arranged between the first semiconductor layer (21) and the second semiconductor layer (22), - the carrier (1) has a first through contact (41) and a second through contact (42) laterally spaced apart from the first through contact (41) by an intermediate region (40), wherein the first through contact (41) is electrically conductively connected to the first semiconductor layer (21) and the second through contact (42) is electrically conductively connected to the second semiconductor layer (22), the stabilizing layer (3) is formed continuously, has overlaps with the vias (41, 42) in plan view and laterally bridges the intermediate region (40), wherein the stabilizing layer (3) is electrically insulated from the vias (41, 42) and from the semiconductor body (2), - the carrier (1) is formed stepwise on the semiconductor body (2), and - the component (100) has an insulation structure (92, 93) which completely surrounds the stabilizing layer (3).Method according to the preceding claim, in which the through contacts (41, 42) and / or the stabilizing layer (3) are applied to the semiconductor body (2) by means of a galvanic coating method.Method according to one of the preceding claims 13 to 14 for producing a plurality of components (100), in which a wafer composite (200) is provided with a semiconductor body composite (20), a plurality of first through-contacts (41), a plurality of second through-contacts (42) and at least one coherent stabilizing layer (3), wherein - the wafer composite (200) has a plurality of separating trenches (60), by means of which the semiconductor composite (20) can be separated into a plurality of semiconductor bodies (2), - a shaped body material for forming a shaped body composite is applied to the wafer composite (200) in such a way that the separating trenches and intermediate regions (40) between the through-contacts (41, 42) are at least partially filled, and - the wafer composite and the shaped body composite are singulated along the separating trenches into a plurality of components (100) in such a way, the components (100) each having one of the semiconductor bodies (2), a stabilizing layer (3) and a carrier (1), wherein the carrier (1) has a first through contact (41), a second through contact (42) and a shaped body (5) as part of the singulated shaped body composite.Component (100) having a semiconductor body (2), a carrier (1) and a stabilizing layer (3) arranged between the semiconductor body (2) and the carrier (1) in the vertical direction, wherein - the semiconductor body (2) has a first semiconductor layer (21) facing away from the carrier (1), a second semiconductor layer (22) facing the carrier (1) and an active layer (23) arranged between the first semiconductor layer (21) and the second semiconductor layer (22), - the carrier (1) has a first through contact (41) and a second through contact (42) laterally spaced apart from the first through contact (41) by an intermediate region (40), wherein the first through contact (41) is electrically conductively connected to the first semiconductor layer (21) and the second through contact (42) is electrically conductively connected to the second semiconductor layer (42), - the stabilizing layer (3) is formed continuously, In plan view, the stabilizing layer (3) is electrically insulated from the vias (41, 42) and from the semiconductor body (2), and the stabilizing layer (3) is formed from an electrically conductive material.The device of claim 16, wherein the stabilizing layer (3) is a metal layer.The device according to claim 16 or 17, wherein the stabilizing layer (3) is a self-supporting layer of the device (100) having a vertical layer thickness between 5 μm and 50 μm inclusive.Component (100) according to one of Claims 16 to 18, in which the stabilizing layer (3) is freely accessible on at least one side face (103) of the component.

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