Battery system with active balancing circuit

Abstract

Battery system (1) comprising - a rechargeable battery (2) having two poles (3, 4) and a plurality of accumulator cells (Z 1 , Z 2 , ..., Z n ), and - an active balancing circuit (6) for monitoring and actively controlling the charge states of all battery cells (Z 1 , Z 2 , ..., Z n ) during the charging and discharging processes taking place during operation of the battery system (1), wherein in the active balancing circuit (6) for each accumulator cell (Z 1 , Z 2 , ..., Z n ) an intermediate circuit acting as a bidirectional DC-DC converter (S 1 , S 2 , ..., S n ), each intermediate circuit (S 1 , S 2 , ..., S n ) the two poles of the respective accumulator cell (Z 1 , Z 2 , ..., Z n) with the interposition of an inductance (L) and a first transistor (Q1), and wherein in each intermediate circuit (S 1 , S 2 , ..., S n ) between the inductance (L) and the first transistor (Q1) a branch is provided, which, with the interposition of a second transistor (Q2), is connected to an all intermediate circuits (S 1 , S 2 , ..., S n ) conductively connecting DC link (7), wherein the DC link (7) is coupled to a reference potential (GND) via a capacitor (C), and wherein the active balancing circuit (6) is suitable and, in a regular operating mode, is set up to keep the DC link (7) at a predeterminable potential which is either greater than the potential at the positive pole (3) of the battery (2) or less than the potential at the negative pole (4) of the battery (2).

Description

[0001] The present invention relates to a battery system comprising a rechargeable battery having two poles and a plurality of accumulator cells connected in series between the poles, and an active balancing circuit for monitoring and actively controlling the respective charge state of the accumulator cells.

[0002] Such a battery system is basically known from the state of the art.

[0003] In the case of rechargeable batteries with a plurality of accumulator cells connected in series, the problem already known from the prior art arises that the individual accumulator cells of the battery can have different charge states at a certain point in time, that the capacity (= maximum charge quantity) of different accumulator cells can be different - original or changing with the state of age, that the accumulator cells can have different self-discharges or be exposed to different environmental conditions, that when charging the battery the end-of-charge voltage of an accumulator cell can be exceeded with the result that it is damaged and / or that the individual accumulator cells age differently in other ways.

[0004] Therefore, various types of battery systems are already known from the state of the art in which - by monitoring the respective charge and health states of the accumulator cells - the charging and discharging processes of the various accumulator cells during operation of the battery system have been improved in order to increase the battery service life and to maintain sufficient battery capacity for as long as possible.

[0005] In so-called passive balancing, the most charged cells in a battery (in terms of their state of charge) are loaded with a resistor connected in parallel towards the end of the charging cycle, which allows the voltage across the cells in question to be limited to their end-of-charge voltage. The cells with the highest state of charge are then only slightly charged (or possibly even discharged slightly), while the other cells in the battery that have not yet reached their end-of-charge voltage continue to be supplied with the full charging current. With passive balancing, discharging of the battery is typically interrupted when the worst-charged cell in the battery (in terms of its state of charge) has reached its end-of-discharge voltage.Despite these measures, it remains clear that even with passive balancing, the battery's worst cells are exposed to the greatest "stress," resulting in a deterioration in their health through self-accelerating aging. Furthermore, the battery's usable capacity is determined by the capacity of the worst cell.

[0006] Better results for extending the service life of rechargeable batteries with a plurality of accumulator cells connected in series are achieved with the so-called active balancing, which is also used in the context of the present invention.

[0007] By means of a suitable active balancing circuit, energy or electrical charge is transferred from bad to good cells during a charging process and from good to bad cells during a discharging process, so that any inequalities in the charge level of the accumulator cells (in relation to their current capacity) can always be balanced out both during charging and discharging of the battery, whereby all cells are exposed to the same “stress”.

[0008] The advantage of active balancing is a significantly higher efficiency (compared to passive balancing), as energy is typically only converted to (waste) heat to a small extent and is not, for example, "wasted" in the resistors required in passive balancing. Another advantage of active balancing is that it achieves a higher overall battery capacity than passive balancing, as each battery cell is fully charged and discharged. The disadvantage, however, is the increased circuit complexity and the associated higher costs involved in active balancing, so that active balancing has so far primarily been used in high power ranges, such as traction batteries in the field of electromobility or battery storage power plants.However, active balancing proves to be fundamentally suitable for all types of rechargeable batteries typically used in the state of the art, which are made up of a plurality of accumulator cells.

[0009] For active balancing, there are already a large number of electronic circuits with a wide variety of switching topologies, which are often comparatively complex and expensive to manufacture.

[0010] Some active balancing circuits known from the prior art only allow charge or energy transfer between adjacent battery cells, which proves to be unsuitable or otherwise suboptimal, particularly for batteries with a large number of battery cells. Furthermore, various designs of active balancing circuits are known that require expensive transformers for inductive charge exchange between the cells, which the present invention aims to avoid.

[0011] A circuit for active balancing, designed as a bidirectional voltage converter, is, for example, Fig. 12 of the article "A Review of Passive and Active Battery Balancing based on MATLAB / Simulink" (Daowd et al., International Review of Electrical Engineering (IREE) - Nov. / Dec. 2011, Vol. 6, Issue 7, pp. 2974 - 2989). In this active balancing circuit, an intermediate circuit acting as a bidirectional DC-DC converter is provided for each battery cell or module of the rechargeable battery. Each intermediate circuit has an inductor, two transistors, and a capacitor, and all of the capacitors of the various intermediate circuits are connected in series between the battery terminals that are not directly connected to the two battery terminals. With this active balancing circuit, simultaneous charge transfer can occur between different battery cells / modules of the battery, which proves to be advantageous.The disadvantage, however, is that the entire energy supplied to or removed from the battery for charging or discharging must always be routed through the converters, since the battery is charged or discharged via the battery terminal shown on the left in the figure (which is not directly connected to both battery terminals). This increases losses and ultimately proves to be inefficient. Furthermore, this circuit is also comparatively expensive, since each inductor and each transistor or switch must be designed to be comparatively large.

[0012] KR 20100093464 A discloses a device for uniformly charging a battery cell and a control method for improving the charging efficiency of a battery stack. The overcharged power of the battery cell is fed back into a battery stack. In the device, a DC-DC converter is arranged at each battery cell and changes the charging voltage of a battery cell. A DC storage unit stores the output power, which is converted and amplified by a DC-DC converter. A recovery unit supplies the energy stored in the DC storage unit to a battery pack. A cell voltage measuring unit measures the charging voltage of the battery cell. A cell selection controller selects the overcharged or short-charged battery cell according to the measurement result.

[0013] In “Multiphase Interleaved Converter for Lithium Battery Active Balancing”, F. Mestrallet et al., IEEE Transactions on Power Electronics, Vol. 29, No. 6, pp. 2874-2881, June 2014, an “any cell(s) to any cells(s) active balancing converter” for managing a lithium battery block is presented.

[0014] Furthermore, active and dynamic approaches for power control in battery cells are described in US 2012 / 0049801 A1, US 2013 / 0099579 A1, US 2014 / 0265606 A1, and US 2015 / 0214757 A1. DE 10 2014 107 670 A1 discloses a method for charge transfer for a plurality of series-connected energy storage cells with intermediate energy storage in an intermediate energy storage unit.

[0015] Against the background of the prior art explained above, it is therefore the object of the present invention to provide a battery system of the type mentioned at the outset which is as simple as possible in design and can be produced cost-effectively, with an active balancing circuit which is as efficient as possible on the basis of a novel switching topology, as well as an advantageous method for operating such a battery system.

[0016] This object is achieved with a battery system according to claim 1 and a method for operating a battery system according to the invention according to claim 8. Further preferred embodiments of the present invention emerge from the dependent claims and from the present description.

[0017] The battery system according to the invention comprises a rechargeable battery having two poles and a plurality of accumulator cells connected in series between the poles, as well as an active balancing circuit for monitoring and actively regulating the charge states of all accumulator cells during the charging and discharging processes occurring during operation of the battery system. In the active balancing circuit, an intermediate circuit acting as a bidirectional DC-DC converter is provided for each accumulator cell. Each intermediate circuit connects the two poles of the respective accumulator cell via an inductor and a first transistor.In each intermediate circuit, a branch is provided between the inductor and the first transistor. This branch is connected, via a second transistor, to a DC link that conductively connects all intermediate circuits. The DC link is coupled to a reference potential via a capacitor. The active balancing circuit of the battery system according to the invention is suitable for, and configured in a regular operating mode, to maintain the DC link at a predeterminable potential, which is either greater than the potential at the positive pole of the battery or less than the potential at the negative pole of the battery.

[0018] In a battery system according to the invention, the specific functioning of which is explained in more detail below using an exemplary embodiment of the invention, during the charging and discharging processes occurring during operation of the battery system, electrical charge can be transferred from a first accumulator cell to the DC link and via the DC link to a second (any other) accumulator cell by appropriately controlling the transistors provided in the respective intermediate circuits. The inductors arranged in the intermediate circuits also serve as intermediate storage for the energy to be exchanged between different accumulator cells.Furthermore, the balancing of the charge states of all battery cells desired within the framework of active balancing can be achieved in the present invention in such a way that, during operation of the battery system, charge can be exchanged (via the DC link) between any number of battery cells – virtually simultaneously. Due to the possibility of simultaneous charge exchange between any number of battery cells, the duty cycle of the active balancing circuit and the average current through the switches and inductors can be kept comparatively low, ultimately allowing the use of comparatively small and inexpensive components.

[0019] Within the scope of the present invention, the reference potential to which the DC link is coupled via the capacitor can be expediently defined by the (electrical) potential at the positive or negative pole of the battery, whereby the reference potential can be earth (=zero potential) in an expedient (but not mandatory) embodiment of the invention. Thus, if, for example, the reference potential in the sense of earth corresponds to zero potential and, at the same time, the negative pole of the battery is also at the reference potential, the voltage drop across the capacitor corresponds exactly to the potential of the DC link, which must then be maintained at a value that is greater than the battery voltage present between the poles of the battery.

[0020] Whether a value above the potential at the positive pole of the battery or a value below the potential at the negative pole of the battery is chosen for the potential of the DC link ultimately depends on the order of the inductance and the first transistor inserted in the respective intermediate circuits in the connection of the opposite poles of the battery cells.

[0021] The battery system according to the invention can be manufactured comparatively inexpensively because the active balancing circuit requires only two transistors and one inductor per battery cell or intermediate circuit as electrical components—in addition to the other control electronics and a capacitor. Due to the absence of resistors (not solely used for current sensing) and / or other electrical components in the intermediate circuits, as well as the largely loss-free charge exchange via the DC link designed as a conductive connection, it also proves to be extremely efficient, i.e., it results in very low overall power loss.

[0022] Regarding the functioning of the battery system according to the invention, it should first be pointed out that the (electrical) potential of the DC link can be varied by suitable switching of the various intermediate circuit transistors by switching the transistors in such a way that the sum of all currents flowing from the intermediate circuits via the respective second transistors into the DC link and flowing from the DC link into the intermediate circuits is greater than or less than zero.

[0023] When commissioning the battery system according to the invention, the capacitor coupling the DC link to the reference potential can therefore advantageously be charged once to a predeterminable target voltage, which defines the voltage level of the DC link relative to the reference potential and thus the (absolute) potential of the DC link. During further regular operation of the battery system according to the invention, active balancing can then ensure, in particular, that the sum of the (signed) currents flowing from the intermediate circuits into the DC link and from the DC link into the other intermediate circuits always equals zero, so that the potential of the DC link preferably remains at least largely constant during regular operation of the battery system according to the invention.

[0024] Of course, within the scope of the present invention, during active balancing, the charge state and health parameters of the various accumulator cells are determined in a manner known per se from the prior art in order to determine the balancing requirement between the individual accumulator cells of the battery and then - by suitable control of the transistors - to ensure a suitable charge transfer between the various accumulator cells.

[0025] The SOH ("State of Health") is typically determined as a health metric within the framework of active balancing. This indicates (as a percentage) the capacity of the respective battery cell compared to its typical delivery state. The SOC ("State of Charge") is also typically determined as a state of charge metric. This indicates (also as a percentage) the current charge of the respective battery cell compared to its total possible charge. For example, 80% SOH for a 1000 mAh cell would mean that the cell only has a capacity of 800 mAh. An SOC of 50% would then mean that this cell currently holds 400 mAh. The SOC can be determined, for example, from the cell voltage and a known discharge or charge curve. However, this determination is comparatively inaccurate due to the very flat curve, especially in medium SOC states (20% to 80%).

[0026] Each cell type has a defined cut-off voltage at which the cell is fully charged. For example, this is 4.2 V for typical lithium-ion cells. The manufacturer also specifies a cut-off voltage for each cell type. This is typically 2.5 V to 2.9 V for lithium-ion cells.

[0027] The control unit of the active balancing circuit typically requires the following measured values ​​to determine SOH and SOC: Current (individual) cell voltage of each battery cell, total charge / discharge current into or out of the battery, differential current of each cell (into or out of the DC link) due to balancing, and the elapsed time in each case.

[0028] The charge transferred from / to each battery cell during a given charge / discharge process can then be calculated in a conventional manner from the total current, the individual differential currents, and the time. The control or computing unit can then derive the SOH and SOC for each battery cell from the transferred charge and the measured cell voltage. These health and state of charge parameters (which must be updated during further operation of the active balancing circuit) can then be used in subsequent charge and discharge cycles. Initially, it may be necessary to subject the battery to a complete charge and discharge cycle in order to determine the charge and health states of the individual battery cells required for the operation of the active balancing circuit.Of course, within the scope of the present invention, all suitable active balancing methods known from the prior art can be used, provided that they are compatible with the other features of the invention.

[0029] Furthermore, it should be noted that, within the scope of the present invention, a "battery cell" does not necessarily have to be a single galvanic (secondary) cell, but can also be, in a broader sense, a battery cell comprising a plurality of individual galvanic (secondary) cells (in particular connected in parallel). Such an (optional) parallel connection of individual cells within a battery cell can clearly provide an increased total capacity.

[0030] To understand the functioning of the battery system according to the invention, it should be noted that the anodes of the accumulator cells connected downstream of one another are at different voltage levels, whereby each intermediate circuit to the DC link also has a different potential difference, which must be taken into account during operation of the active balancing circuit provided according to the invention.

[0031] A first particularly preferred embodiment or further development of the present invention provides that the battery system has a central control unit and, for each intermediate circuit, at least one local gate control which is directly or indirectly connected to the central control unit for controlling the transistors provided in the respective intermediate circuit, wherein the central control unit is set up to specify different operating modes for each local gate control in time segments, and wherein each local gate control is set up to switch the at least one transistor to be controlled by it by evaluating the voltage applied to the respective transistor, the current flowing through the respective transistor and the operating mode currently specified by the central control unit.

[0032] This embodiment of the invention is particularly advantageous because it allows the switching of the transistors, which within the scope of the invention is preferably to be implemented at a particularly high frequency, to be carried out by the at least one local gate control by evaluating the local currents and voltages. The local gate controls can be clocked at a high frequency (e.g., with a first high frequency of greater than or equal to 0.5 MHz, greater than or equal to 0.9 MHz, and particularly preferably in a frequency range between 0.9 and 1.1 MHz), while the specification of the currently applicable operating mode, which is carried out by the central control unit in time segments, can be varied with a (significantly) lower second frequency (e.g., in the range between 10 Hz and 100 kHz, advantageously with a frequency in the range of approximately 100 Hz to 1 kHz).

[0033] In this respect, a preferred embodiment of the invention provides that the central control unit is configured to specify or update the operating modes to be specified for each gate control with a first low frequency (e.g. in the range between 100 Hz and 100 kHz), and that the local gate controls and the transistors are configured for high-frequency control and switching with a frequency that is higher (e.g. with a frequency that is higher by a factor of at least 10 or 100) (in particular greater than or equal to 0.5 MHz).

[0034] Since the operating mode must be specified by the central control unit based on the respective charge and health status parameters of all battery cells, it is advantageous that this operating mode specification only needs to be transmitted to the respective local gate controllers at a low frequency. Furthermore, such – comparatively slow – signals can also be transmitted more easily across the different voltage levels, for example, without relying on expensive optocouplers or level shifters.

[0035] A somewhat more detailed description of the interaction of the central control unit and the local gate controls can be found below in the description of a preferred embodiment of the present invention.

[0036] In the embodiment of the invention explained above, either a separate local gate control can be provided for each transistor to be switched (i.e., a total of two local gate controls per intermediate circuit), or only one gate control can be provided per intermediate circuit, which then controls both transistors of the respective intermediate circuit. By appropriately selecting or specifying the switching times of the two transistors of an intermediate circuit, the current flowing from the DC link into the accumulator cell assigned to the respective intermediate circuit (or flowing from the accumulator cell into the DC link) can be adjusted as desired.

[0037] Furthermore, it can advantageously be provided that the operating mode to be specified by the central control unit for each local gate control is specified by transmitting at least one operating parameter that specifies whether the battery cell assigned to the respective intermediate circuit should currently be charged, discharged, or neither charged nor discharged via the DC link. This therefore only specifies whether current should currently flow from the respective battery cell into the DC link or from the DC link into the battery cell (or neither).

[0038] This alone makes it possible to specify a particularly easy-to-implement circuit diagram for the individual transistors, with which the respective local gate control can switch the associated transistor at high frequency by evaluating the local voltages and currents that must be determined in a suitable manner. The current through the respective transistor can be determined, for example, via the voltage drop across a measuring resistor (assigned to the local gate control), in particular a shunt resistor, which can be connected in series upstream or downstream of the respective transistor.

[0039] In addition, it can be provided that the central control unit not only specifies the current direction currently required (i.e. for a specified period of time) for each battery cell, but also - as a further operating parameter - the amount of current currently required. For this purpose - as will become clearer from the following description of an exemplary embodiment of the invention - the switching times of the respective transistors must be suitably adapted. For this purpose, for example, a digital or analog reference value can be transmitted to the local gate control, whereby it is again sufficient if this reference value is also transmitted or updated at the comparatively low frequency of, for example, 1 kHz.

[0040] Within the scope of the present invention, it can advantageously be provided that each local gate control is implemented by a separate integrated circuit (IC). However, it is also fundamentally possible for all local gate controls to be implemented by a single IC.

[0041] Furthermore, it proves advantageous—particularly for cost reasons—that, according to a further preferred embodiment of the present invention, the inductors installed in the intermediate circuits can be designed as air-core coils or conductor track coils. This results in an active balancing circuit according to the invention being operable with coils with very low inductances of, for example, only 500 nH—particularly when driving the transistors at high frequencies in the order of approximately 1 MHz.

[0042] Finally, the present invention also relates to a method for operating a battery system according to the invention comprising the following steps: A) Specifying a potential that is either greater than the potential at the positive pole of the battery or smaller than the potential at the negative pole of the battery B) Charging the capacitor coupling the DC link to the reference potential to a target voltage at which the potential of the DC link corresponds to the potential specified in step (A) C) Operation of the active balancing circuit in a regular operating mode such that the potential of the DC link remains essentially unchanged.

[0043] For the advantages and particularly useful developments of the method according to the invention, reference may be made to the description of the battery system according to the invention already given and the following description of an embodiment of the present invention with reference to the drawing. Fig. 1 a circuit diagram of an embodiment of a battery system according to the invention, Fig. 2 a circuit diagram for the embodiment according to Fig. 1 with a total of five accumulator cells, in which the central control unit and the local gate controls for the various transistors in the various intermediate circuits are also shown, Fig. 3 the circuit diagram Fig. 1, supplemented by various definitions of the voltages and currents prevailing in the active balancing circuit, Fig. 4a is a schematic representation of the current flowing through the inductance of an intermediate circuit over time in a first operating mode, Fig. 4b is a schematic representation of the current flowing through the inductance of an intermediate circuit over time in a second operating mode, Fig. 5a / b Results of a numerical simulation of various current and voltage curves occurring during operation of a battery system according to the invention when charge is removed from a battery cell, and Fig. 6a / b Results of a numerical simulation of various current and voltage curves occurring during operation of a battery system according to the invention when charge is supplied to an accumulator cell.

[0044] Fig. 1 shows the circuit diagram of an embodiment of a battery system 1 according to the invention. The battery system 1 comprises a rechargeable battery 2, which in this case is formed by a plurality of accumulator cells Z connected in series. 1 , Z 2 , ..., Z n is formed. Between the positive pole (=anode) 3 and the negative pole (=cathode) 4 of the battery 1, which defines a reference potential (GND), there is a battery terminal 5 that is directly connected to both poles 3, 4 of the battery 2. The battery voltage U is present at the battery terminal 5, which serves both to connect a consumer to the battery 2 (in the sense of drawing charge from the battery 2) and to recharge the battery 2. B to.

[0045] Furthermore, a - in Fig. 1, an active balancing circuit 6 is provided, which is used during a charging or discharging process to monitor and actively regulate the charge states of the accumulator cells Z 1 , Z 2 , ..., Z n The active balancing circuit 6 has for each battery cell Z 1 , Z 2 , ..., Z n an intermediate circuit S 1 , S 2 , ..., S n which is the anode of the respective accumulator cell Z 1 , Z 2 , ..., Z n with the interposition of an inductance L and a first transistor Q1 with the cathode of the respective accumulator cell Z 1 , Z 2 , ..., Z n In each intermediate circuit S 1 , S 2 , ..., S nBetween the inductance L and the first transistor Q1, a branch is provided, which, with the interposition of a second transistor Q2, is connected to an all intermediate circuits S 1 , S 2 , ..., S nconductively interconnecting DC link 7. The DC link 7 is coupled to a reference potential via a capacitor C, wherein the reference potential in the given embodiment is predetermined by the potential of the negative pole (cathode) 4 of the battery 2 (grounded in the present example). It is also possible to couple the positive pole (anode) 3 of the battery 2 to the reference potential instead of the negative pole 4, the latter embodiment even having the advantage that the voltage to be held by the capacitor (= difference between the potential of the DC link and the potential at the positive pole 3 of the battery) is then significantly lower than in the illustrated embodiment, whereby the capacitor C can be dimensioned smaller, which is advantageous for cost reasons.

[0046] During operation of the battery system 1, the capacitor C is initially charged to a suitably specified target voltage U zwhich defines the voltage level of the DC link 7 relative to the reference potential. The target voltage U z is selected so that the potential of the DC link 7 is greater than that of the anode 3 of the battery 2. During further regular operation of the active balancing circuit 6, when charging or discharging the battery 2, by suitable switching of the in the various intermediate circuits S 1 , S 2 , ..., S n provided transistors Q1, Q2 charge between different accumulator cells Z 1 , Z 2 , ..., Z n be exchanged via the DC-Link 7, while at the same time ensuring that the potential of the DC-Link 7 remains (at least largely) constant.

[0047] In an alternative embodiment of the battery system according to the invention, in which in each intermediate circuit S 1 , S 2 , ..., S nIf the inductance L there had to swap places with the first transistor Q1, the DC link 7 could also be kept at a potential that is lower than the potential prevailing at the negative pole 4 of the battery 2. This would also allow the battery system according to the invention to be operated in an otherwise completely analog manner.

[0048] For the transistors Q1, Q2 in the various intermediate circuits S (each operating as a bidirectional DC-DC converter) 1 , S 2 , ..., S nIn the given embodiment, these are commercially available (field-effect) transistors with an integrated or external freewheeling diode or transistors with a freewheeling diode function, as the circuit symbol used indicates. High-frequency transistors, in particular GaN transistors, can preferably be used here, with which high switching frequencies greater than 0.5 MHz, e.g., in the range of 0.9 - 1.1 MHz or higher, can be realized.

[0049] A charge transfer from a first accumulator cell Z i to a second accumulator cell Z j can be achieved by appropriately switching the transistors Q1, Q2 in the respective intermediate circuits S i , S j average charge from the first (the first accumulator cell Z i assigned) intermediate circuit S i into the DC-Link 7 and from the DC-Link 7 into the second (the second accumulator cell Z jassigned) intermediate circuit S j Since all intermediate circuits S 1 , S 2 , ..., S n are connected to the common DC link 7 via the respective second transistor Q2 of the respective intermediate circuit, a simultaneous charge transfer between any number of accumulator cells can also be realized in the battery system 1 according to the invention. For this purpose, the capacitors S 1 , S 2 , ..., S n existing transistors Q1, Q2 are switched in such a way that - on average over time - current flows from a first (arbitrarily predeterminable) group of intermediate circuits into the DC link and from there to a second (predeterminable) group of intermediate circuits.

[0050] The selection of those accumulator cells that are to transfer additional charge to other accumulator cells or receive charge from other accumulator cells during a charging or discharging process of the battery (via the DC link) is carried out within the framework of active balancing by a (in Fig. 1 not shown) control unit in a manner known from the prior art by evaluating the current charge and health states (SOC and SOH) of all battery cells Z 1 , Z 2 , ..., Z n , as explained above.

[0051] Fig. 2 shows another embodiment of a (electrically identical to the circuit diagram from Fig. 1) circuit diagram for a battery system 1 according to the invention with a total of five accumulator cells Z 1 , Z 2 , Z 3 , Z 4 , Z 5and the intermediate circuits S assigned to them 1 , S 2 , ..., S 5 , in which, in addition to the Fig. 1 already shown components now also a central control unit 8 serving to control the active balancing circuit 6 as well as a plurality of local gate controls G1 and G2 for controlling the individual intermediate circuits S 1 , S 2 , ..., S 5 provided transistors Q1, Q2 are shown or provided.

[0052] The central control unit 8 is connected via two control lines (shown with dashed lines) to each local gate control G1, G2 at the connections “RUN” and “ACT”, whereby each local gate control G1, G2 controls exactly one transistor Q1, Q2 assigned to it and whereby each local gate control is assigned a measuring or shunt resistor R for determining the current through the respective transistor Q1, Q2.S Each local gate control G1, G2 has - in addition to the "RUN" and "ACT" terminals connected to the central control unit - further terminals "S", "D", and "G", which are connected to the source, drain, and gate of the transistor Q1 or Q2 to be controlled, respectively. Furthermore, each local gate control G1, G2 has a further terminal labeled "REF", which is connected to a resistor (in this case on the inlet or source side) beyond the measuring resistor R SThe voltage difference between terminals "S" and "REF" can be measured to determine the current flowing through the respective transistor Q1 or Q2. This voltage difference corresponds to the voltage drop across the measuring resistor. From this, the current flowing through the transistor can then be calculated using simple application of Ohm's law. The voltage across transistor Q1 or Q2 can be measured between terminals "D" and "S."

[0053] During operation of the battery system 1 according to the invention, the central control unit 8 now specifies an operating mode to be maintained at a first low frequency (preferably a frequency in the range of 10 Hz - 100 kHz, preferably approximately 100 Hz or 1 kHz) for each local gate control G1, G2. The high-frequency control of the transistors Q1, Q2 can then be performed by the respective local gate control G1, G2, taking into account the operating mode specification updated by the central control unit 8 at a low frequency based on the voltages and currents determined locally by the respective gate control.By generating the high-frequency switching signals by means of the local gate controls G1, G2, it is avoided that the switching signals required for this purpose (with a high frequency of preferably greater than or equal to 0.5 MHz) have to be generated by a central control unit and then transmitted to the different voltage levels.

[0054] The local gate controllers G1 and G2 can then be operated using a comparatively simple circuit diagram. To specify the operating mode, the central control unit simply transmits two binary control signals (with values ​​of "Low" or "High") as operating parameters to the "RUN" and "ACT" terminals of the respective gate controllers G1 and G2. This allows the three different operating modes (battery cell to be charged from the DC link; battery cell to deliver charge to the DC link; neither) to be represented for each intermediate circuit. For example, this can be achieved with the following operating mode specification: a) RUN=Low, ACT=(Low or High): The gate control G1 or G2 remains inactive (regardless of the signal applied to the ACT input), so that no active switching of the transistor Q1 or Q2 assigned to the gate control G1 or G2 occurs. If this is the case for both local gate controls G1, G2 of both transistors Q1, Q2 of an intermediate circuit S 1 , S 2 , ..., S n is specified, then the assigned accumulator cell Z 1 , Z 2 , ..., Z n is not supplied with charge from the DC-Link 7 and cannot supply any charge to the DC-Link 7. b1) RUN=High, ACT=Low: The gate control is active. The transistor is turned off when a threshold value (specified in the local gate control or, if necessary, by the central control unit) of, for example, 1 A for the signed current through the transistor is reached. b2) RUN=High, ACT=High: The gate control is active. The transistor to be controlled is switched off when a threshold value (specified in the local gate control or, if necessary, by the central control unit) of, for example, 4 A for the signed current through the transistor is reached.

[0055] With active gate control (i.e., in the aforementioned cases b1 and b2), the transistor is switched on whenever the state at the "RUN" input changes from low to high and ACT is simultaneously high, or when the (working) voltage between source and drain of the transistor assigned to the gate control becomes zero. The latter rule implements so-called zero-voltage switching during switch-on processes, which significantly reduces the losses inherent in the active balancing circuit.

[0056] It should also be noted that with active gate control, the "ACT" signal for the two gate controls G1 and G2 belonging to the same intermediate circuit (for the two transistors Q1 and Q2 provided in the respective intermediate circuit) must be controlled in opposite directions. Thus, if RUN=High and ACT=Low are specified for the first local gate control G1 at a certain time, then RUN=High and ACT=High must apply to the second local gate control at the same time (or vice versa).

[0057] In this circuit diagram, the circuit then oscillates independently in each active intermediate circuit (with the high frequency of preferably greater than or equal to 0.5 MHz, see above) between two extreme values ​​I max and I minback and forth. The central control unit only has to specify the current direction (via ACT) and the duty cycle resulting from the temporal progression of the "RUN" signal. These signals are low-frequency (e.g., with the low frequency in the range of 100 Hz - 100 kHz, preferably approx. 1 kHz) and can therefore be easily transmitted across different voltage levels. These relationships can be explained below using the Fig. 3, Fig. 4a and Fig. 4b will be explained in more detail.

[0058] Fig. 3 shows the circuit diagram again Fig. 1, where various reference symbols have been omitted for the sake of clarity and additional labels for various current and voltage values ​​have been added instead.

[0059] In general, U b (j) which (at a given time) in the j-th intermediate circuit S jgiven cell voltage between anode and cathode of the accumulator cell Z assigned to the j-th intermediate circuit j . I i (j) denotes the (signed) current through the inductance L of the j-th intermediate circuit S j , I q (j) the current through the first transistor Q1 of the j-th intermediate circuit S j and I z (j) the current through the second transistor Q2 of the j-th intermediate circuit S j , which - depending on the sign - corresponds to a current from the intermediate circuit S j into the DC-Link 7 or a current from the DC-Link 7 into the intermediate circuit S j corresponds. With U x (j) is the voltage between the anode of the j-th accumulator cell Z j and the cathode 4 of the battery 2 (preferably at the reference or earth potential), where for j=1 U x (1) =U B and for j=n U x(n) =U b (n) applies.

[0060] Due to the different voltage levels of the anodes of the different battery cells Z j the following relationship applies: IZ(j)Iq(j)=Ub(j)UZ−Ux(j)

[0061] The voltage supplied by an intermediate circuit S j Current I flowing into the DC link 7 z (j) is therefore smaller compared to I q (j) , the greater the difference (U z -U x (j) ) compared to U b (j) is.

[0062] For example, for a battery with a total of 14 accumulator cells U z = 75 V, U B = U x (1) the top battery cell is 56V and U b be equal to 4V. Thus, I z (1) approx. 21% of I q (1) for the top cell. Because: IZ(1)=475−56∗Iq(1)≈0.21∗Iq(1)

[0063] For the bottom cell Z 14 a battery 2 consisting of a total of 14 accumulator cells would be I z (14) only about 5.6% of I q (14) .

[0064] Since every current I (flowing from or to the DC-Link 7) z (j) always also through the lower accumulator cells Z i with i>j, the compensating current of the j-th accumulator cell Z j : Ibalance(j)=Iq(j)+∑i=1jIZ(i)

[0065] For the specification of the potential of the DC link 7, which is necessary for the operation of the battery system 1 according to the invention and which is determined by the voltage U z at the capacitor C (and the reference potential), the following aspects apply: The voltage difference between the anode of a battery cell Z j and the DC-Link 7 compared with the current cell voltage U b (j)determines the ratio of the current I z (j) into (or out of) the DC link to current I q (j) through the first transistor Q1. The higher the potential of the DC link 7, the greater the current I q (j) through the first transistor Q1 of an intermediate circuit S j compared with the current I z (j) from the intermediate circuit S j into the DC link. The current I z (j) into the DC link affects all subsequent battery cells, ie all cells that are shown in the diagrams according to Fig. 1 and Fig. 3 further down the series. This must therefore generally be compensated for by a suitable correction in the (low-frequency) operating mode setting for the local gate drives in the intermediate circuits further down, which slightly increases the overall losses of the circuit.

[0066] Investigations on batteries with 14 series-connected accumulator cells Z i have shown that with typical capacity distributions (SOH distributions) in the cells there is a DC link potential U z of approximately 10 V above the battery voltage U B This is already sufficient to limit the additional losses resulting from this correction to approximately 10% compared to the other losses in the active balancing circuit 6. This is because a low DC link potential primarily affects the uppermost battery cells. A higher differential voltage is automatically established in the lower battery cells.

[0067] It should also be noted that the dielectric strength of commercially available and, in principle, suitable transistors is typically 60V, 80V, 100V, or higher. A dielectric strength of 80V is therefore the lowest possible dielectric strength for a battery with 14 series-connected accumulator cells, since the battery voltage U B = U x (1) For lithium-ion batteries (with a maximum battery cell voltage of approximately 4.2 V each), a value of 14*4.2V = 58.8V can already be reached. Given the above considerations regarding total losses, a DC link potential of approximately 75 V can be selected in the example mentioned, meaning that transistors with a dielectric strength of (only) 80V can be used for a battery system according to the invention.

[0068] The Fig. 4a and Fig. 4b now show the temporal profiles of the current I flowing through the inductance L in any intermediate circuit in a battery system according to the invention in different operating modes of the local gate control. i , which essentially varies in a sawtooth-like manner between two different values ​​I min and I max around a mean value I mittel fluctuates.

[0069] In this case, Fig. 4a shows the operating mode in which charge is transferred from a battery cell to the DC link 7 during active balancing, which is shown by the fact that the average current I (over time) mittel through the inductance L is positive.

[0070] In this operating mode, the first local gate control G1 of an intermediate circuit, which switches the first transistor Q1 of the respective intermediate circuit, is connected to its inputs RUN and ACT (see Fig. 2) is controlled by the central control unit 8 with the control signals RUN=High and ACT=High as operating parameters, while the second local gate control G2, which controls the second transistor Q2, is controlled with the control signals RUN=High and ACT=Low. As a result, both the first local gate control G1, which switches the first transistor Q1, and the second gate control G2, which switches the second transistor Q2, are active.

[0071] The first transistor Q1 is at time t 0 switched on (i.e. conducting in the sense of a closed switch). The current I i by the inductance L, which in the time interval [t 0 ,t 1 ] with t 1 = t 0 + T 1 the current I q through the first transistor Q1, initially falls from an initially negative value I minin magnitude and in a linear manner to zero, and then - after reversing direction at the zero crossing - continues to increase in a linear manner in a positive direction. When a predetermined threshold value of e.g. I max = 4 A or I max = 4.5 A for the current I flowing through the first transistor Q1 q The first transistor turns off. The second transistor Q2 turns on immediately as soon as the drain-source voltage on the second transistor Q2 drops below zero. Since this turn-on process occurs at zero voltage, it is largely lossless, in the sense of zero-voltage switching.

[0072] The current flowing through the inductance L and in Fig. Current I shown in 4a i in the time interval [t 1 ,t 2 ] with t 2 = t 1 + T 2when the second transistor Q2 is switched on, the current I i in this time interval the signed current I z from the intermediate circuit into the DC link. After a reversal of direction at the zero crossing, the current I i in turn linearly following in negative direction until the current I i at time t 2 the threshold value I which causes the second transistor Q2 to switch off min The first transistor Q1 then turns on again when the operating voltage between its drain and source crosses zero, and the entire cycle begins again.

[0073] Fig. 4b represents the opposite operating mode, in which additional charge is transferred from the DC-Link 7 into a battery cell during active balancing, which is reflected in Fig. 4b shows that the average current I mittel due to the inductance L is negative.

[0074] In this operating mode, the first local gate control G1, which switches the first transistor Q1, is connected to its inputs RUN and ACT (see Fig. 2) is controlled by the central control unit 8 with the control signals RUN=High and ACT=Low (which are only to be updated at low frequency) as operating parameters, while the second local gate control G2, which controls the second transistor Q2, is controlled with the complementary control signals RUN=High and ACT=High.

[0075] As a result, both the first local gate control G2 switching the first transistor Q1 and the second gate control switching the second transistor Q2 are active, whereby the second transistor Q2 is now initially switched on (ie conductive in the sense of a closed switch), while the first transistor Q1 is initially switched off and is therefore only conductive in the forward direction of the freewheeling diode.

[0076] The following formulas apply to the various voltages, currents and time intervals in each intermediate circuit: T1=(Imax−Imin)LUb T2=(Imax−Imin)LUz−Ux T=T1+T2 Imean=Imax+Imin2 Iz=ImeanT2T Iq=ImeanT1T T1T=Uz−Ux(Uz−Ux)+Ub T2T=Ub(Uz−Ux)+Ub Iq=ImeanUz−Ux(Uz−Ux)+Ub Iz=ImeanUb(Uz−Ux)+Ub IzIq=UbUz−Ux

[0077] U corresponds to x the voltage between the anode of the respective accumulator cell and the cathode 4 of the battery 2; Ub corresponds to the respective cell voltage between anode and cathode of the accumulator cell assigned to the respective intermediate circuit.

[0078] The Fig. 5a, Fig. 5b and Fig. 6a, Fig. 6b finally shows electrical simulations of various current and voltage curves in an intermediate circuit of the active balancing circuit of a battery system according to the invention.

[0079] The Fig. 5a and Fig. 5b again show (comparable to the illustration in Fig. 4a) the application case in which, according to the operating mode specification by the central control unit of a battery system according to the invention, charge is transferred from the accumulator cell assigned to the intermediate circuit in question to the DC link. This again results in a substantially sawtooth-shaped and, on average, positive current I iby the inductance of the intermediate circuit under consideration, whereby the turn-on times T (resulting from the high-frequency gate control) 1 and T 2 of the respective transistors in the calculation example according to Fig. 5a and Fig. 5b are clearly in a different relationship than in the - rather schematic - representation from Fig. 4a. Furthermore, the Fig. 5a and 5b the voltage curves U Q1 and U Q2 the drain-source voltage prevailing at the transistors Q1 and Q2 of the intermediate circuit under consideration as well as the respective course of the associated control voltages U (generated by the local gate control) G1 , U G2 , with which the respective local gate control G1 or G2 acts on the gate of the transistor Q1 or Q2 assigned to it.

[0080] The Fig. 6a and Fig. 6b then again concern the alternative application case, in which additional charge is transferred from the DC link into the battery cell.

[0081] It is clearly visible that the respective control voltages U G1 , U G2 only be switched on when the respective drain-source voltage U Q1 or U Q2 in the sense of zero-voltage switching to below zero and that the respective transistors are switched off when the respective current I i through the inductance exceeds a certain threshold.

[0082] Since the battery system according to the invention is characterized in particular by very low power loss, a few additional measures for further loss minimization that can be implemented within the scope of the present invention are mentioned in conclusion. The losses in FETs or transistors can be divided into turn-on losses, conduction losses, turn-off losses, and control losses.

[0083] Conductive losses and control losses cannot be avoided in principle, but they can be reduced by selecting appropriate components. Turn-on losses depend on the voltage across the transistor at the time of switching. The voltage can be reduced or even reduced to zero by allowing a small amount of reverse flow through the inductance.

[0084] If the battery cell in question is to be discharged into the DC link, the currents normally flow into the Fig. 3 directions. When Q2 is conducting, the current I i and thus also I z linear with the speed [U z -U x ] / L. The second transistor Q2 of the intermediate circuit under consideration can now advantageously only be switched off when the current I i has become negative due to the inductance, so when a small current (e.g. 25% of I max) flows back into the battery cell. Despite Q2 being switched off, the current must continue to flow in the inductance. This is fed by all the parasitic capacitors that are active at the node. This reduces their voltage. If the negative current was large enough, the voltage is reduced to zero. At this moment, the first transistor Q1 in the intermediate circuit is preferentially switched on. Since there is no voltage across Q1 when it is switched on, there are no switch-on losses. When the second transistor Q2 is switched on, there are (practically) no switch-on losses because when Q1 is switched off, the current charges the parasitic capacitances until the (drain-source) voltage across Q2 changes polarity. At this moment, the voltage across the second transistor Q2 is zero and it can be switched on without any losses.

[0085] If the battery cell in question is to be charged from the DC link, the currents normally flow against the Fig. 3 directions. When the first transistor Q1 is switched on and thus conducts, the current I i and thus I q linear with the speed [U b ] / L. In this case, I i in magnitude from, for example, -4 A towards 0 A. The first transistor Q1 of the intermediate circuit under consideration can now advantageously only be switched off when the current I i has become positive, i.e. when a small current (e.g. 25% of I max) flows back out of the battery cell. Despite Q1 being switched off, the current must continue to flow in the inductance. It then fills all the parasitic capacitors that are active at the node, thereby increasing their voltage. If the positive current was large enough, the voltage can be increased up to Uz. At this moment, the second transistor Q2 can advantageously be switched on. Since there is no voltage across Q2 when it is switched on, no relevant switch-on losses occur. In contrast, when the first transistor Q1 is switched on, there are (practically) no switch-on losses because when Q2 is switched off, the current discharges the parasitic capacitances until the (drain-source) voltage across Q1 changes polarity. At this moment, however, the voltage across Q1 is zero and Q1 can be switched on voltage-free, i.e. without losses.

Claims

[1] Battery system (1) comprising - a rechargeable battery (2) having two poles (3, 4) and a plurality of accumulator cells (Z1, Z2, ..., Z n ), and - an active balancing circuit (6) for monitoring and actively controlling the charge states of all battery cells (Z1, Z2, ..., Z n ) during the charging and discharging processes taking place during operation of the battery system (1), wherein in the active balancing circuit (6) for each accumulator cell (Z1, Z2, ..., Z n ) an intermediate circuit acting as a bidirectional DC-DC converter (S1, S2, ..., S n ), wherein each intermediate circuit (S1, S2, ..., S n ) the two poles of the respective accumulator cell (Z1, Z2, ..., Z n ) with the interposition of an inductance (L) and a first transistor (Q1), and wherein in each intermediate circuit (S1, S2, ..., S n) between the inductance (L) and the first transistor (Q1) a branch is provided, which, with the interposition of a second transistor (Q2), is connected to a circuit for all intermediate circuits (S1, S2, ..., S n ) conductively connecting DC link (7), wherein the DC link (7) is coupled to a reference potential (GND) via a capacitor (C), and wherein the active balancing circuit (6) is suitable and, in a regular operating mode, is set up to keep the DC link (7) at a predeterminable potential which is either greater than the potential at the positive pole (3) of the battery (2) or less than the potential at the negative pole (4) of the battery (2). [2] Battery system (1) according to claim 1, characterized by , that the battery system has a central control unit (8) and for each intermediate circuit (S1, S2, ..., S n) has at least one local gate control (G1, G2) directly or indirectly connected to the central control unit (8) for controlling the transistors (Q1, Q2) provided in the respective intermediate circuit, wherein the central control unit (8) is designed to predetermine different operating modes for each local gate control (G1, G2) in time segments, and wherein each local gate drive (G1, G2) is designed to control the at least one transistor (Q1, Q2) to be controlled by it by evaluating the voltage (U Q1 , U Q2 ), the current flowing through the respective transistor (Q1, Q2) (I q , I z ) and the operating mode specified by the central control unit (8) to be switched on or off. [3] Battery system (1) according to claim 2, characterized bythat to measure the current (I q , I z ) a measuring resistor (R s ) is provided. [4] Battery system (1) according to claim 2 or 3, characterized by that the operating mode to be specified by the central control unit (8) for each local gate control (G1, G2) is specified by transmitting at least one operating parameter (RUN, ACT) which specifies whether the respective intermediate circuit (S1, S2, ..., S n ) assigned accumulator cell (Z1, Z2, ..., Z n ) should be charged, discharged or neither charged nor discharged via the DC link (7). [5] Battery system (1) according to one of claims 2 to 4, characterized byin that the central control unit (8) is configured to specify or update the operating modes to be specified for each gate drive (G1, G2) with a first frequency in the range between 100 Hz and 100 kHz, and in that the local gate drives (G1, G2) and the transistors (Q1, Q2) are configured for high-frequency control and switching with a frequency that is at least 10 times higher than the first frequency, in particular a frequency of greater than or equal to 0.5 MHz. [6] Battery system according to one of claims 2 to 5, characterized by that each local gate control (G1, G2) is realized by a separate integrated circuit. [7] Battery system according to one of the preceding claims, characterized by that the voltages in the intermediate circuits (Z1, Z2, ..., Z n ) installed inductances (L) are designed as air coils or conductor track coils. [8] A method for operating a battery system according to any one of the preceding claims, comprising the following steps: A) Specification of a potential which is either greater than the potential at the positive pole (3) of the battery (2) or smaller than the potential at the negative pole (4) of the battery (2) B) Charging the capacitor coupling the DC link with the reference potential to a target voltage (U z ), in which the potential of the DC link (7) corresponds to the potential specified in step (A) C) Operation of the active balancing circuit in a regular operating mode such that the potential of the DC link (7) remains substantially unchanged.

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