POWER TRANSITOR DEVICE

Abstract

Power device (230, 330), comprising: a first transistor circuit (220, 320) configured to operate in response to a first control signal; a control circuit (240, 340) configured to generate a second control signal in response to the first control signal; and a second transistor circuit (260, 360) configured to operate in response to the second control signal, wherein the second transistor circuit has an active region larger than an active region of the first transistor circuit; and wherein the power device is characterized in that the control circuit includes a control transistor (310) which has a control terminal which receives the first control signal, and which has a first end terminal which is coupled to the control terminal, and which has a second end terminal which is coupled to a control terminal of the second transistor circuit.

Description

AREA OF REVELATION

[0001] The present disclosure relates to a power transistor device and a hot-swap circuit including the power transistor device and to a method for controlling the power transistor device. BACKGROUND

[0002] A high-availability system, such as a server, a network switch, and a redundant array of independent disk (RAID) storage system, continues to operate while one or more of its modules are replaced. Such a module may include a hot-swap circuit that controls inrush current flowing into a load, ensuring safe insertion of the module into a power-carrying backplane of the system.

[0003] The hot-swap circuit can include a controller (e.g., a hot-swap controller) and a power transistor (e.g., a power MOSFET) operating in linear mode to control the inrush current. If the power MOSFET operates in linear mode below a zero-temperature coefficient (ZTC) point, the presence of one or more hot regions within the power MOSFET can lead to an increased amount of current flowing through these hot regions, further raising their temperatures. Such positive feedback can result in thermal instability below the ZTC point and ultimately lead to the failure of the power MOSFET.

[0004] To suppress positive feedback, a conventional power MOSFET increases its channel length and threshold voltage to reduce its transconductance and the current level at its zero-temperature point (ZTC). This improves the power handling capabilities indicated by curves within the safe operating area (SOA) of the conventional power MOSFET. However, the reduced transconductance also increases the on-resistance of the conventional power MOSFET. Consequently, the power consumption of a device containing the conventional power MOSFET, and of any load, can be relatively high when the conventional power MOSFET is supplying power to the load.

[0005] An example of a transistor device for a hot-swap circuit is disclosed in document US 2014 / 0332881A1. The disclosed transistor device includes a control circuit that operates a first and a second transistor circuit depending on a change in a drain-source voltage. SUMMARY

[0006] The invention is defined by claims 1, 6 and 9. The further claims define specific embodiments of the invention.

[0007] Embodiments of the present application relate to a power transistor device and a hot-swap circuit including the power transistor device, and to a method for controlling the power transistor device, wherein the power transistor device includes a first transistor with a first active region, a control circuit, and a second transistor with a second active region that is larger than the first active region of the first transistor. In one embodiment, the first transistor is a first MOSFET, the control circuit includes a control MOSFET, and the second transistor is a second MOSFET, and the first transistor, the control circuit, and the second transistor are integrated on a single chip.

[0008] In one embodiment, a power device includes a first transistor circuit configured to operate in response to a first control signal, a control circuit configured to generate a second control signal in response to the first control signal, and a second transistor circuit configured to operate in response to the second control signal. The second transistor circuit has an active region that is larger than the active region of the first transistor circuit.

[0009] In one embodiment of the foregoing device, the first transistor circuit, the control circuit and the second transistor circuit are integrated in a single chip.

[0010] In one embodiment of the foregoing device, the control circuit includes a control transistor with a control terminal that receives the first control signal, a first end terminal that is coupled to the control terminal, and a second end terminal that is coupled to a control terminal of the second transistor circuit.

[0011] In one embodiment of the foregoing device, the first transistor circuit is switched on when the value of the first control signal is equal to or greater than a first given value, and the second transistor circuit is switched on when the value of the first control signal is equal to or greater than a second given value. The second given value is greater than the first given value.

[0012] In one embodiment of the foregoing device, the first transistor circuit includes a first MOSFET, the second transistor circuit includes a second MOSFET, and the control circuit includes a control MOSFET, which is a MOSFET configured as a diode. The second MOSFET has an active region that is at least 10 times larger than the active region of the first MOSFET.

[0013] In one embodiment of the foregoing device, the first MOSFET has a gate that receives the first control signal and is turned on when a value of the first control signal is equal to or greater than a first given value. The second MOSFET has a gate that receives the second control signal and is turned on when a value of the first control signal is equal to or greater than a second given value, wherein the second given value is greater than the first given value.

[0014] In one embodiment of the foregoing device, a gate-source voltage of the first MOSFET is greater than a voltage at a zero temperature coefficient (ZTC) point when the first control signal is equal to the second given value.

[0015] In one embodiment, a hot-swap circuit includes a power device and a hot-swap controller configured to generate a first control signal and control an inrush current flowing through the power transistor device. The power device has a first active region when the first control signal is equal to or greater than a first given value, and a second active region when the first control signal is equal to or greater than a second given value, where the second given value is greater than the first given value.

[0016] In one embodiment of the foregoing hot-swap circuit, the power device includes a first transistor circuit configured to operate in response to the first control signal, a control circuit configured to generate a second control signal in response to the first control signal, and a second transistor circuit configured to operate in response to the second control signal.

[0017] In one embodiment of the above hot-swap circuit, the first transistor circuit, the control circuit and the second transistor circuit are integrated into a single chip. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 illustrates a section of a high availability system according to an embodiment of the present disclosure. Fig. Figure 2 illustrates a power transistor device according to an embodiment of the present disclosure. Fig. Figure 3 illustrates a device for use as the power transistor device in Fig. 2 suitable power MOSFET devices according to an embodiment of the present disclosure. Fig. 4 illustrates a company that is in Fig. 3 Power MOSFET device shown according to an embodiment of the present disclosure. Fig. Figure 5 is a flowchart illustrating a procedure performed by a power transistor device according to one embodiment. DETAILED DESCRIPTION

[0018] Embodiments of the present application relate to a power transistor device (or power device), a hot-swap circuit including the power transistor device, and a method for controlling the power transistor device, wherein the power transistor device comprises a first transistor circuit with a first active region, a control circuit, and a second transistor circuit with a second active region that is larger than the first active region of the first transistor circuit. The first transistor circuit with a relatively small active region reduces the occurrence of thermal instability that can result from positive feedback when the power device operates below a zero-temperature coefficient (ZTC) point. The second transistor circuit with a relatively large active region reduces the power consumption by the power device.In one embodiment, the second active area is at least 10 times larger than the first active area. In another embodiment, the second active area is at least 25 times larger than the first active area. In yet another embodiment, the second active area is at least 50, at least 75, at least 100, at least 150, or at least 200 times larger than the first active area.

[0019] In one embodiment, when a first control signal has a value within a first range, the first transistor circuit is turned on and the second transistor circuit is turned off. If the power transistor device operates below a zero-temperature coefficient (ZTC) point within the first range, the occurrence of thermal instability below the ZTC point, which can result from positive feedback, can be substantially prevented, since the first transistor circuit has a relatively small active range. This improves the power handling capabilities as specified in a safe operating area (SOA) of the power transistor device.

[0020] In one embodiment, if the first control signal has a value in a second range, the first transistor circuit remains switched on, and the control circuit generates a second control signal that switches on the second transistor circuit. Since the second transistor circuit has a relatively large active range, the on-resistance value of the power transistor device is relatively small when both the first and second transistor circuits are switched on, thus reducing the power consumption compared to a conventional power transistor device.

[0021] In one embodiment, the control circuit is implemented on a single chip along with the first and second transistor circuits, simplifying the circuit structure. As a result, the manufacturing costs of the power transistor device, including the control circuit, can be reduced, and the yield of the power transistor device can be increased.

[0022] A detailed description of embodiments is provided below, along with the accompanying figures. The scope of this disclosure is limited only by the claims and includes numerous alternatives, modifications, and equivalents. Although steps of various processes are presented in a specific order, embodiments are not necessarily restricted to being carried out in the listed sequence. In some embodiments, certain operations may be performed simultaneously, in a different order than described, or not at all.

[0023] Numerous specific details are set forth in the following description. These details are provided by specific examples to promote a thorough understanding of the scope of this disclosure, and embodiments according to the claims may be practiced without some of these specific details. Accordingly, the specific embodiments of this disclosure are illustrative and are not intended to be exclusive or limiting. For the sake of clarity, technical material known in the technical fields related to this disclosure has not been described in detail so as not to obscure the disclosure unnecessarily.

[0024] Fig. Figure 1 illustrates a section of a high-availability system 100, comprising a -48 V backplane and a plurality of removable modules 150, according to an embodiment of the present disclosure. For illustrative simplification, only one removable module 150 is shown. In one embodiment, the high-availability system 100 can be a server, a network switch, a redundant array of independent disk (RAID) storage device, or other electronic devices.

[0025] In one embodiment, the removable module 150 includes a hot-swap controller 110 and a power transistor device 130. The removable module 150 can be a printed circuit board (PCB) or a plug-in module.

[0026] When the removable module 150 is first inserted into the backplane, its uncharged capacitors, including a bypass capacitor 115, require a relatively large inrush current to charge a load 170. The hot-swap controller 110 and the power transistor device 130 of the removable module 150 control an amount of this inrush current to ensure safe insertion of the removable module 150 into the backplane, so that the high-availability system 100 does not experience a significant voltage drop across the backplane and damage to components of the inserted removable module 150.

[0027] Although the high-availability system 100 is illustrated with the -48 V backplane, embodiments of the present disclosure are not limited thereto. For example, the high-availability system 100 may include a +12 V backplane (not shown).

[0028] Although the removable module 150 includes the hot-swap controller 110 and the power transistor device 130, embodiments of the present disclosure are not limited thereto. In another embodiment (not shown), the hot-swap controller 110 and the power transistor device 130 can be arranged between a plurality of power supplies (not shown) and a power converter (not shown). If one of the plurality of power supplies is coupled to the power converter, the hot-swap controller 110 and the power transistor device 130 can control an amount of inrush current flowing from the coupled power supply (not shown) to the power converter (not shown) during a given time interval, thereby substantially preventing damage to one or more components of the power converter (not shown).

[0029] Fig. Figure 2 illustrates a power transistor device 230 according to an embodiment of the present disclosure. The power transistor device 230 includes a first transistor circuit 220, a control circuit 240, and a second transistor circuit 260.

[0030] The first transistor circuit 220 receives a first control signal (e.g. a first control voltage) V CON1 and operates in response to the first control signal V CON1 For example, the first transistor circuit 220 is switched on when the first control signal has a value in a first range (e.g., a range in Fig. 4 first area shown) and in a second area (e.g. a in Fig. 4 shown second area).

[0031] The control circuit 240 receives the first control voltage V CON1 and generates a second control signal (e.g., a second control voltage) V CON2 in response to the first control voltage VCON1 In one embodiment, this is generated when the first control voltage V CON1 If the level is equal to or greater than a given level, the control circuit 240 sets the second control voltage V. CON2 , which is large enough to switch on the second transistor circuit 260.

[0032] The second transistor circuit 260 receives the second control signal V CON2 and operates in response to the second control signal V CON2 For example, the second transistor circuit 260 is activated in response to the second control signal V. CON2 switched on when the first control signal V CON1 a value in a second area (e.g., the one in Fig. 4 shown second area).

[0033] The second transistor circuit 260 has an active region that is larger than the active region of the first transistor circuit 220. In one embodiment, the first and second transistor circuits 220 and 260 each have a single transistor, and the latter is provided with a larger transistor, so that it would have a larger active region than that of the first transistor circuit 220. In another embodiment, the second transistor circuit 260 is provided with a larger active region by being provided with a plurality of transistors. For example, the second transistor circuit 260 can be provided with 10, 15, 25, 50, 75, 100, 125, 150, 175, 200 or more transistors compared to the first transistor circuit 220, so that the second transistor circuit 260 would have a significantly larger active region than the first transistor circuit 220.Each of these transistors of the second transistor circuit 260 can have essentially the same configuration to simplify design and manufacture.

[0034] Fig. Figure 3 illustrates a power transistor device (or a power device) 330 according to an embodiment of the present disclosure. The power device 330 is, in this implementation, a power MOSFET device. Fig. Figure 3 includes the power MOSFET device 330, a first transistor circuit 320, a control circuit 340, and a second transistor circuit 360. The first transistor circuit 320 includes a first MOSFET 322, and the second transistor circuit 360 includes a second MOSFET 362. In a Fig. In the 3 illustrated embodiment, the first and second transistor circuits 320 and 360 are each implemented using a single transistor or MOSFET.

[0035] The first MOSFET 322 of the first transistor circuit 320 is an n-channel MOSFET, but embodiments of the present disclosure are not limited to this. The first MOSFET 322 has a gate that receives a first control signal (e.g., a first control voltage) V CON1 It receives a grounded source and a drain connected to a drain of the second MOSFET 362 of the second transistor circuit 360. In the Fig. In the embodiment shown in 3, the n-channel MOSFET 322 has the gate that supplies the first control voltage V. CON1 receives, and the ground-connected source, and thus a gate-source voltage applied to the n-channel MOSFET 322 is equal to the first control voltage V CON1 However, embodiments of the present disclosure are not limited thereto. For example, depending on the implementation, the source of the n-channel MOSFET 322 can be connected to a negative electrical potential (e.g., in Fig. 1 shown -48 V) or connected to a positive electrical potential.

[0036] The control circuit 340 includes a control transistor (e.g., a control MOSFET) 310 and a resistor (or pull-down resistor) 370. The control MOSFET 310 is a transistor configured as a diode with one gate connected to a drain, and the gate of the control MOSFET 310 is also connected to the gate of the first MOSFET 322. The control MOSFET 310 further has a source that is connected at a control node CN to a first end of the pull-down resistor 370. A second end of the pull-down resistor 370 is connected to ground.

[0037] The second MOSFET 362 of the second transistor circuit 360 is an n-channel MOSFET, however, embodiments of the present disclosure are not limited to this. In the second MOSFET 362, one gate is connected to the control node CN, one source is connected to ground, and the drain is connected to the drain of the first MOSFET 322.

[0038] In one embodiment, the first MOSFET 322, the control circuit 340, and the second MOSFET 362 are integrated on a single chip. The control MOSFET can be any type of trench MOSFET, lateral MOSFET, or complementary MOSFET. For example, the first MOSFET 322 and the second MOSFET 362 are implemented as a trench MOSFET formed on a single substrate, and the control MOSFET 310 is implemented as a lateral MOSFET located on the substrate between the first and second MOSFETs 322 and 362. The power MOSFET device 330 according to one embodiment of the present disclosure includes the control circuit 340, which is integrated on the same chip as the first and second MOSFETs 322 and 362. In contrast, a conventional power MOSFET device may include a control circuit implemented on a separate chip.The integration of the first and second MOSFETs 322 and 362 and the control circuit 340 into a single chip simplifies the manufacture of the power MOSFET device 330, thereby reducing manufacturing costs while increasing yield.

[0039] Fig. Figure 4 illustrates the operation of the power MOSFET device 330 in Fig. 3 according to one embodiment of the present disclosure. Fig. 4 closes a waveform of a drain current I D depending on a gate-source voltage V applied to the gate of the first MOSFET 322 and the gate of the control MOSFET 310 GS according to one embodiment. Since the source of the first MOSFET 322 is connected to ground, the gate-source voltage V is GS from Fig. 4 equals the first control voltage V CON1 from Fig. 3, however, embodiments of the present disclosure are not limited thereto.

[0040] If the gate-source voltage V GS smaller than a first threshold voltage V TH1 When the first MOSFET 322 is switched off, the first MOSFET 322, the control MOSFET 310, and the second MOSFET 362 are switched off. If in the Fig. In the embodiment shown in section 4, the first threshold voltage V TH1 The first MOSFET 322's voltage is essentially equal to 3 V, in response to the gate-source voltage V. GS lower than the first threshold voltage V TH1 is essentially prevented from generating a first drain current I D1 through the first MOSFET 322.

[0041] If the gate-source voltage V GS equal to or greater than the first threshold voltage V TH1 When the first MOSFET 322 is switched on, the first MOSFET 322 is switched on and a first drain current I D1 flows through the first MOSFET 322. In one embodiment, a threshold voltage V is present. THCONof the control MOSFET 310 essentially equal to the first threshold voltage V TH1 of the first MOSFET 322, and thus the control MOSFET 310 is also switched on when the gate-source voltage V GS equal to or greater than the first threshold voltage V TH1 of the first MOSFET 322. However, embodiments of the present disclosure are not limited to this, and the threshold voltage V THCON The control MOSFET 310 can, in other embodiments, deviate from the first threshold voltage V. TH1 of the first MOSFET 322.

[0042] If the gate-source voltage V GS equal to or greater than the threshold voltage V THCON When the control MOSFET 310 is switched on, the control MOSFET 310 is switched on and a drain current I flows through the control MOSFET 310. CON can be represented by the following equation: ICON=K(VGS−VTHCON)2

[0043] In equation 1, K is a given constant, which is expressed by µ * C. OX * W / (2 * L) can be represented, where µ is an effective charge carrier mobility, C OX where W is a gate oxide capacitance per unit area, W is a channel width, and L is a channel length.

[0044] As a result, a second control signal V can be used. CON2 (e.g. a control voltage V) CON2 ) at the control node CN can be represented by the following equation: VCON2=ICON*RPDR=K(VGS−VTHCON)2+RPDR

[0045] In equation 2, R PDR a resistance value of the pull-down resistor 370.

[0046] In one embodiment, the resistance value R PDR the pull-down resistor 370 is determined such that the second control voltage V CON2 a second threshold voltage V TH2 of the second MOSFET 362 is reached when the gate-source voltage V GS equal to a sum of the threshold voltage VTHCON of the control MOSFET 310 and the second threshold voltage V TH2 of the second MOSFET 362. In such an embodiment, the resistance value R can be PDR The pull-down resistor 370 can be represented by the following equation: RPDR=1 / (K*VTH2)

[0047] If the gate-source voltage V GS equal to or greater than the sum of the threshold voltage V THCON of the control MOSFET 310 and the second threshold voltage V TH2 of the second MOSFET 362, is the second control voltage V CON2 at the control node CN equal to or greater than the second threshold voltage V TH2 of the second MOSFET 362. As a result, the second MOSFET 362 is switched on and a second drain current I D2 flows through the second MOSFET 360.

[0048] Referring back to Fig. 4 will be when the gate-source voltage V GSin a first area from the first threshold voltage V TH1 (e.g. 3 V in Fig. 4) of the first MOSFET 322 up to the sum (e.g. 7 V in Fig. 4) the threshold voltage V THCON (e.g. 4 V in Fig. 4) of the control MOSFET 310 and a second threshold voltage V TH2 (e.g. 3 V in Fig. 4) of the second MOSFET 362, the first MOSFET 320 is switched on and the second MOSFET 362 is switched off. As a result, the drain current I D in Fig. 4 equal to the first drain current I D1 In the first region of the gate-source voltage V GS The power MOSFET device 330 operates in a linear mode and controls a certain amount of the inrush current flowing through it. For example, a zero-temperature coefficient (ZTC) point of the power MOSFET device 330 operating in linear mode lies within the first range.

[0049] If the gate-source voltage V GS in a second area that is equal to or greater than the sum (e.g. 7 V in Fig. 4) the threshold voltage V THCON of the control MOSFET 310 and the second threshold voltage V TH2 When the second MOSFET 360 is switched on, both the first MOSFET 322 and the second MOSFET 360 are turned on. As a result, the drain current I D in Fig. 4 equals the sum of the first drain current I D1 , which flows through the first MOSFET 322, and the second drain current I D2 , which flows through the second MOSFET 362.

[0050] The second MOSFET 362 has an active region that is larger than the active region of the first MOSFET 322. For example, in the Fig. In the embodiment shown in Figure 4, the active region of the second MOSFET 362 is approximately 100 times larger than the active region of the first MOSFET 322. Consequently, a saturated amount of the drain current I isD In the second area, where the first MOSFET 322 and the second MOSFET 362 are switched on, 1 kA is present, which is about 100 times more than a saturated amount (i.e., 10 A in Fig. 4) of the drain current I D in the first area where the first MOSFET 322 is switched on and the second MOSFET 362 is switched off.

[0051] In one embodiment, the first transistor circuit 320 has a single MOSFET, i.e., the first MOSFET 322, and the second transistor circuit 360 has a plurality of MOSFETs, each having substantially the same configuration as the first MOSFET 322. For example, the number is in the range of 10 to 200. As a result, the active region of the second transistor circuit 360 is larger by the given number of times than the active region of the first transistor circuit 320, while the first threshold voltage V TH1of the first MOSFET 322 essentially equal to the second threshold voltage V TH2 is. For example, a difference between the first threshold voltage V TH1 of the first MOSFET 322 and the second threshold voltage V TH2 equal to or less than 0.1%, 0.3%, 0.5%, 1%, 3%, 5% and 10% of any of the first threshold voltages of the first MOSFET 322, the second threshold voltage V TH2 and an average of the first and second threshold voltages V TH1 and V TH2 .

[0052] As described above, if the gate-source voltage V GS in the first range of the first threshold voltage V TH1 of the first MOSFET 322 up to the sum of the threshold voltage V THCON of the control MOSFET 310 and the second threshold voltage V TH2 of the second MOSFET 362 lies the drain current I D in Fig. 4 equal to the first drain current I D1, which flows through the first MOSFET 322. For example, the sum of the threshold voltage V THCON of the control MOSFET 310 and the second threshold voltage V TH2 The threshold voltage V of the second MOSFET 362 is greater than the ZTC point of the power MOSFET device 330. THCON The voltage of the control MOSFET 310 is sufficiently high to cover the sum of the threshold voltage V. THCON of the control MOSFET 310 and the second threshold voltage V TH2 to make the ZTC point of the second MOSFET 362 larger than that of the power MOSFET device 330. As a result, the power MOSFET device 330 operates in a linear mode to control a certain amount of inrush current when the gate-source voltage VG is increased. GS lies in at least a lower part of the first region. Furthermore, the threshold voltage V THCONThe current level of the control MOSFET 310 is sufficiently low to avoid applying an excessive drain-source voltage to it. If the power MOSFET device 330, including the first MOSFET 322 (or the first transistor circuit 320), operates below the ZTC point, the relatively small active area of ​​the first transistor circuit 320 can reduce the current level at the ZTC point, potentially preventing one or more local hot spots from triggering positive feedback. Consequently, the occurrence of thermal instability below the ZTC point resulting from positive feedback can be largely prevented, thus improving the power handling capabilities of the power MOSFET device 330, as specified in its SOA.Furthermore, according to an embodiment of the present disclosure, the control circuit 340 can be implemented in a single chip with the first and second MOSFETs 322 and 362 (or a first and second transistor circuit 320 and 360) to improve the power handling capabilities of the power MOSFET device 330, which would simplify the manufacturing process, thereby reducing manufacturing costs and increasing the yield compared to a conventional power MOSFET device including a controller.

[0053] If the gate-source voltage V GS in the second area equal to or greater than the sum of the threshold voltage V THCON of the control MOSFET 310 and the second threshold voltage V TH2 of the second MOSFET 362, is the drain current I D equal to the sum of the first drain current I D1 , which flows through the first MOSFET 322, and the second drain current ID2 , which flows through the second MOSFET 362. When the power MOSFET 330 is in the second region of the gate-source voltage V GS working, is a quantity of the drain current I D The power MOSFET device 330, including the first and second MOSFETs 322 and 362, has a relatively large on-resistance. Since the on-resistance of the power MOSFET device 330, according to one embodiment of the present disclosure, is smaller than that of a conventional power MOSFET, which has a relatively long channel length and a relatively high threshold voltage for improved SOA performance, the power MOSFET device 330, according to one embodiment of the present disclosure, can reduce power consumption compared to a device including the conventional power MOSFET.

[0054] Fig. Figure 5 illustrates a power device (e.g., the power MOSFET device 330 in Fig. 3) Method 500 carried out according to one embodiment. In one embodiment, the power device includes a first transistor circuit, a control circuit and a second transistor, as shown in Fig. 3 illustrated.

[0055] In the S520, a first transistor (e.g., the first MOSFET 322) of the first transistor circuit (e.g., the first transistor circuit 320) is switched on when a value of a first control signal (e.g., the first control signal V) is reached. CON1 in Fig. 3) is equal to or greater than a first given value. In one embodiment, the first given value is a threshold voltage of the first transistor, wherein the first transistor has a first active region.

[0056] In the S540, the control transistor is switched on in response to the first control signal to generate a current flowing through the control transistor. In one embodiment, the control transistor is switched on when a value of the first control signal is equal to or greater than a threshold value of the control transistor.

[0057] In the S560, the value of a second control signal is increased using a resistor through which current flows. In one embodiment, a voltage level across the resistor rises when the amount of current flowing through the control transistor increases in response to an increased value of the first control signal.

[0058] In the S580, a second transistor (e.g., the second MOSFET 362) of the second transistor circuit (e.g., the second transistor circuit 360) is switched on when the value of the first control signal is equal to or greater than a second given value, thereby making the value of the second control signal equal to or greater than a threshold value of the second transistor. The second transistor has a second active region that is at least 10 times larger than the first active region of the first transistor.

Claims

[1] Power device (230, 330), comprising: a first transistor circuit (220, 320) configured to operate in response to a first control signal; a control circuit (240, 340) configured to generate a second control signal in response to the first control signal; and a second transistor circuit (260, 360) configured to operate in response to the second control signal, wherein the second transistor circuit has an active region larger than an active region of the first transistor circuit; and wherein the power device characterized by is that the control circuit includes a control transistor (310) which has a control terminal which receives the first control signal, and which has a first end terminal which is coupled to the control terminal, and which has a second end terminal which is coupled to a control terminal of the second transistor circuit. [2] Power device according to claim 1, wherein the first transistor circuit, the control circuit and the second transistor circuit are integrated in a single chip. [3] Power device according to claim 1, wherein the first transistor circuit is switched on when a value of the first control signal is equal to or greater than a first given value, and wherein the second transistor circuit is switched on when the value of the first control signal is equal to or greater than a second given value, wherein the second given value is greater than the first given value. [4] Power device according to claim 1, wherein the first transistor circuit includes a first MOSFET, the second transistor circuit includes a second MOSFET and the control circuit includes a control MOSFET which is a MOSFET switched as a diode, and wherein the second MOSFET has an active area which is at least 10 times larger than an active area of ​​the first MOSFET. [5] Power device according to claim 4, wherein the first MOSFET has a gate which receives the first control signal and is switched on when a value of the first control signal is equal to or greater than a first given value, wherein the second MOSFET has a gate which receives the second control signal and is switched on when a value of the first control signal is equal to or greater than a second given value, wherein the second given value is greater than the first given value, and where a gate-source voltage of the first MOSFET is greater than a voltage at a zero temperature coefficient (ZTC) point when the first control signal is equal to the second given value. [6] Hot-swap circuit, including: a power device (130, 230, 330); and a hot-swap controller (110) configured to generate an initial control signal and to control an inrush current flowing through the power device, wherein the power device has a first active area when the first control signal is equal to or greater than a first given value, and has a second active area when the first control signal is equal to or greater than a second given value, wherein the second given value is greater than the first given value, and wherein the hot-swap circuit characterized byis that the power device has a control circuit with a control transistor (310) which has a control terminal which receives the first control signal, and which has a first end terminal which is coupled to the control terminal, and which has a second end terminal which is coupled to a control terminal of a second transistor circuit. [7] Hot-swap circuit according to claim 6, wherein the power device includes the following: a first transistor circuit configured to operate in response to the first control signal; a control circuit configured to generate a second control signal in response to the first control signal; and a second transistor circuit configured to operate in response to the second control signal. [8] Hot-swap circuit according to claim 7, wherein the first transistor circuit, the control circuit and the second transistor circuit are integrated in a single chip. [9] Method for controlling a power device, the method comprising: Switching on (S520) a first transistor circuit of the power device when a value of a first control signal is equal to or greater than a first given value, wherein the first transistor circuit has a first active region; and Switching on (S580) a second transistor circuit of the power device when the value of the first control signal is equal to or greater than a second given value, wherein the second given value is greater than the first given value, and wherein the second transistor circuit has a second active region that is greater than the first active region of the first transistor circuit; and wherein the procedure characterized by is that the power device includes a control circuit with a control transistor (310) which has a control terminal which receives the first control signal, and which has a first end terminal which is coupled to the control terminal, and which has a second end terminal which is coupled to a control terminal of the second transistor circuit.

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