ELECTRONIC MODULE WITH IMPROVED HEAT DISSIPATION AND ITS MANUFACTURE

Abstract

An electronic module (10) comprising: - a semiconductor package (1) comprising a die pad (1.1), a semiconductor die (1.2) and an encapsulant (1.3), wherein the encapsulant (1.3) has a first main surface and a second main surface opposite the first main surface, wherein the die pad (1.1) has a first main surface and a second main surface opposite the first main surface, and the semiconductor die (1.2) is arranged on the second main surface of the die pad (1.1); - an insulation layer (2) arranged on at least a portion of the first main surface of the encapsulating means (1.3) and on the first main surface of the die pad (1.1), wherein the insulation layer (2) is electrically insulating and thermally conductive; and - a heat sink (3) formed from a film and arranged on and in the insulation layer (2) and connected thereto to the encapsulating means (21.5, 31.5) and the die pad (21.1, 31.1), so that an outer surface of the heat sink (23, 33) is arranged slightly above an outer surface of the insulation layer (22, 32).

Description

TECHNICAL AREA

[0001] The present disclosure relates to an electronic module, an electronic device and a method for manufacturing an electronic module. BACKGROUND

[0002] During operation, an electronic module comprising a semiconductor die may generate heat, which may need to be dissipated via one or more specific thermal paths. A heat path may be directed toward a top side of the electronic module, wherein heat dissipation means, such as a heat sink, may be arranged on the top side of the electronic module. It may be desirable to reduce thermal resistance between the semiconductor die and the heat dissipation means in order to improve the heat dissipation capability of the electronic module. DE 10 2012 112 682 A1 shows an electronic module having a semiconductor chip connected to a carrier via an insulation layer stack. A heat sink may be connected to a side of the carrier opposite the insulation layer stack. DE 10 2014 100 282 A1 shows a semiconductor chip arranged on a carrier. An encapsulation material may have a heat resistance of 0.1 to 10 K / W.A heat sink can be attached to the chip arrangement. US 5 703 399 A shows a semiconductor power module with a carrier, a semiconductor chip attached to the carrier and a heat sink attached to an opposite side of the carrier. A gap between the carrier and the heat sink is filled with electrically insulating and thermally conductive material. JP H10-261 744 A likewise shows a chip arranged on a carrier and a heat sink arranged on the opposite side of the carrier. An electrically insulating and thermally conductive layer lies between the carrier and the heat sink. DE 199 04 279 A1 teaches the application of thermal paste to reduce a heat transfer resistance between two bodies. US 2014 / 0 027 891 A1 shows an electronic module in which in . Fig. 15, a heat sink is arranged on and in an insulation layer, wherein an outer surface of the heat sink is arranged slightly above an outer surface of the insulation layer. SUMMARY

[0003] A first aspect of the present disclosure relates to an electronic module according to claim 1, comprising a semiconductor package comprising a die pad, a semiconductor die and an encapsulant, wherein the encapsulant comprises a first main surface and a second main surface opposite the first main surface, wherein the die pad comprises a first main surface and a second main surface opposite the first main surface, and wherein the semiconductor die is arranged on the second main surface of the die pad, wherein an insulation layer is arranged on at least a portion of the first main surface of the encapsulant and on the first main surface of the die pad, wherein the insulation layer is electrically insulating and thermally conductive, and a heat sink or heat sink is arranged on or in the insulation layer such that a main surface of the heat sink is exposed to the outside.

[0004] A second aspect of the present disclosure relates to a method according to claim 16 for manufacturing an electronic module, the method comprising providing a semiconductor package comprising a die pad, a semiconductor die and an encapsulant, the encapsulant comprising a first main surface and a second main surface opposite the first main surface, the die pad comprising a first main surface and a second main surface opposite the first main surface, and the semiconductor die being arranged on the second main surface of the die pad, applying an insulating layer and a heat sink to the first main surface of the encapsulant and to the first main surface of the die pad, such that the heat sink is arranged on or in the insulating layer, the insulating layer being electrically insulating and thermally conductive.

[0005] A third aspect of the present disclosure relates to an electronic device according to claim 15, comprising a semiconductor package comprising a die pad, a semiconductor die and an encapsulant, wherein the encapsulant comprises a first main surface and a second main surface opposite the first main surface, the die pad comprises a first main surface and a second main surface opposite the first main surface, and wherein the semiconductor die is arranged on the second main surface of the die pad, an insulation layer arranged on the first main surface of the encapsulant and on the first main surface of the die pad, wherein the insulation layer is electrically insulating and thermally conductive, a first heat sink arranged on or in the insulation layer, and a second heat sink arranged on the insulation layer and the first heat sink. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and, together with the description, serve to explain principles of embodiments. Other embodiments and many of the intended advantages of embodiments will be readily appreciated as they become better understood from the following detailed description.

[0007] The elements in the drawings do not necessarily have to be scaled relative to each other. Like reference symbols indicate like or similar parts. Fig. 1 includes Fig. 1A and Fig. 1B and shows a schematic cross-sectional side view of an example of an electronic module according to the first aspect. Fig. 2 shows a schematic cross-sectional side view of another example of an electronic module comprising three semiconductor dies mounted on a printed circuit board, with an external heat sink applied to the insulation layer and the heat sink. Fig. Figure 3 shows a schematic cross-sectional side view of another example of an electronic module similar to the example of Fig. 2, with the three semiconductor dies arranged in one and the same plane. Fig. 4 includes Fig. 4A and Fig. 4B and shows a schematic cross-sectional side view (A) and a top view (B) of another example of an electronic module comprising three parallel external lines. Fig. 5 shows a schematic cross-sectional side view of another example of an electronic module in which the heat sink comprises a cooling channel with inlet and outlet openings for a cooling medium. Fig. 6 includes Fig. 6A and Fig. 6B and shows schematic cross-sectional side view illustrations of further examples of electronic modules in which the heat sink comprises a base body and a layer applied to the base body. Fig. 7 shows a flowchart of an example of a method for manufacturing an electronic module according to the second aspect. Fig. 8 includes Fig. 8A to 8F and shows cross-sectional side view illustrations of an electronic module at various stages of manufacture according to another example of a method of manufacturing an electronic module. DESCRIPTION OF THE EMBODIMENTS

[0008] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the disclosure may be applied. In this context, directional terminology such as "top," "bottom," "front," "rear," "leading," "trailing," etc., will refer to the orientation of the described figure(s). Since components of embodiments may be positioned in a variety of orientations, the directional terminology is for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure.The following detailed description is therefore not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.

[0009] It is to be understood that the features of the various exemplary embodiments described herein may be combined with one another unless expressly stated otherwise.

[0010] As used in this description, the terms "glued," "attached," "connected," "coupled," and / or "electrically connected / electrically coupled" do not imply that the elements or layers must be directly contacted with one another; intermediate elements or layers may be provided between the "glued," "attached," "connected," "coupled," and / or "electrically connected / electrically coupled" elements. However, according to the disclosure, the aforementioned terms may optionally also have the specific meaning that the elements or layers are brought into direct contact with one another, i.e., that no intermediate elements or layers are provided between the "glued," "attached," "connected," "coupled," and / or "electrically connected / electrically coupled" elements.

[0011] Furthermore, the word "over" with reference to a part, element, or material layer formed or disposed "over" a surface may be used herein to mean that the part, element, or material layer is "indirectly" located on the implied surface (e.g., placed, formed, deposited, etc.), with one or more additional parts, elements, or layers disposed between the implied surface and the part, element, or material layer. However, the word "over" used with reference to a part, element, or material layer formed or disposed "over" a surface may optionally also have the specific meaning that the part, element, or material layer is "directly on," e.g., in direct contact with the implied surface (e.g., placed, formed, deposited, etc.).

[0012] Devices or semiconductor packages containing semiconductor dies are described below. The semiconductor dies can be of different types, can be manufactured using different technologies, and can include, for example, integrated electrical, electro-optical, or electromechanical circuits and / or passive components. The devices can be power devices, and the packages can be power packages. The semiconductor dies can be embodied, for example, as logic integrated circuits, analog integrated circuits, mixed-signal integrated circuits, power integrated circuits, memory circuits, or integrated passive elements. They can include control circuits, microprocessors, or microelectromechanical components.Furthermore, they can be configured as power semiconductor dies, such as power MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (insulated-gate bipolar transistors), JFETs (junction-gate field-effect transistors), power bipolar transistors, or power dies. In particular, semiconductor dies with a vertical structure can be involved, i.e., the semiconductor dies can be manufactured such that electrical currents can flow in a direction perpendicular to the main surfaces of the semiconductor dies. A semiconductor die with a vertical structure can, in particular, have contact elements on its two main surfaces, i.e., on its top and bottom surfaces. In particular, power semiconductor dies can have a vertical structure. For example, the source and gate electrodes of a power MOSFET can be located on one main surface, while the drain electrode of the power MOSFET is arranged on the other main surface.Furthermore, the electronic modules described below can include integrated circuits for controlling the integrated circuits of other semiconductor dies, for example, the integrated circuits of power semiconductor dies. The semiconductor dies can be manufactured on the basis of a specific semiconductor material, for example, Si, SiC, SiGe, GaAs, GaN, AlGaAs, but also on the basis of any other semiconductor material and can also contain inorganic and / or organic materials that are not semiconductors, such as insulators, plastics, or metals.

[0013] The various examples of an electronic module described below may include external contact elements. The external contact elements may represent the external terminals of the semiconductor package. They may be accessible from outside the package and thus enable electrical contact with the semiconductor dies from outside the package. Furthermore, the external contact elements may be thermally conductive and serve as a heat sink to dissipate at least part of the heat generated by the semiconductor die. The external contact elements may be part of a leadframe, in particular a Cu leadframe.

[0014] The semiconductor package of the electronic module contains an encapsulant. The encapsulant can be a dielectric material and can be made from a suitable thermosetting, thermoplastic, or thermosetting material or laminate (prepreg) and manufactured by molding. The encapsulant can contain fillers. After deposition, the encapsulant can be partially cured and, upon exposure to energy (e.g., heat, UV light, etc.), fully cured to form an encapsulant. Various techniques can be used to apply the encapsulant, including transfer, compression, injection molding, powder coating, liquid molding, dispensing, lamination, or glob top coating. DETAILED DESCRIPTION

[0015] Fig. 1 includes the Fig. 1A and Fig. 1B and shows an electronic module according to the first aspect in a schematic side view (A) and in a plan view (B). The electronic module 10 of Fig. 1 comprises a semiconductor housing or package 1 comprising a die pad 1.1, a semiconductor die 1.2 and an encapsulant 1.3, wherein the encapsulant 1.3 comprises a first main surface and a second main surface opposite the first main surface, the die pad 1.1 comprises a first main surface and a second main surface opposite the first main surface, and the semiconductor die 1.2 is arranged on the second main surface of the die pad 1.1, an insulation layer 2 which is arranged on the first main surface of the encapsulant 1.3 and on the first main surface of the die pad 1.1, the insulation layer 2 being electrically insulating and thermally conductive, and a heat sink 3 which is arranged on or in the insulation layer 2 such that a main surface of the heat sink 3 is exposed to the outside.

[0016] The electronic module 10 of Fig. 1 may also include external lines, which are not shown for clarity. The external lines can have various shapes, which will be shown later in further examples.

[0017] According to an example of the electronic module of the first aspect, the insulation layer 2 comprises one or more of a resin matrix material, a thermosetting material, an epoxy, a silicone, a thermal barrier material, a thermoplastic, a thermal adhesive, a thermoplastic, or a thermal barrier material (TIM). All such host materials may additionally be filled with a filler configured to improve the thermal conductivity of the host material. The filler material may comprise particles of one or more of SiO2, Al2O3, AlN, Si3N4, BN, or diamond. The insulation layer may have a thermal conductivity of >1 W / mK, in particular >2 W / mK, in particular >3 W / mK.

[0018] According to an example of the electronic module of the first aspect, the heat sink 3 is formed from only one homogeneous material, in particular a metal such as Cu or Al, or a thermal interface material (TIM). The heat sink 3 can also be formed from a conductive adhesive, an indium solder, a copper paste, a phase-change material, soft Al, pure Al, a CNC material, a magnetic iron material, an Sn / Ag layer, or a porous layer of a suitable material. Ceramic can also be used as the heat sink 3 in situations where the aspect of insulation is very important, so that double insulation in the form of the insulation layer 2 and the heat sink 3 appears desirable. The heat sink 3 can further comprise pin fins or other cooling structures on its outer surface.

[0019] Furthermore, it is also possible for the heat sink 3, instead of being made of a homogeneous material, to be formed from a composite of two or more materials. In particular, the heat sink 3 can comprise a base body and an additional layer on the base body. Either the base body or the additional layer can be made of one or more of the materials proposed above for the heat sink. A concrete example of this will be shown and explained later. In the case of ceramics, different ceramic layers can also be used, or a ceramic layer together with a layer of another material.

[0020] According to an example of the electronic module of the first aspect, the heat sink 3 comprises one or more metals such as Cu or Al, a ceramic, or a thermal interface material. Furthermore, the heat sink 3 can be formed into a plate and have a square or rectangular shape. The plate can have a thickness in the range of 100 µm to 5 mm. The heat sink 3 can also consist of a foil, in which case the thickness can be in the range of 5 µm to 100 µm.

[0021] According to one example of the electronic module of the first aspect, at least a part of the first main surface of the die pad 1.1 is coplanar with the first main surface of the encapsulant 1.3. According to another example thereof, an entire first main surface of the die pad 1.1 is coplanar with the first main surface of the encapsulant 1.3. It is also possible for the first main surface of the encapsulant 1.3 to contain grooves or other specific surface features that are not coplanar with the first main surface of the die pad 1.1.

[0022] According to an example of the electronic module of the first aspect, the heat sink 3 is embedded in the insulation layer 2 such that an outer surface of the heat sink 3 lies slightly above an outer surface of the insulation layer 2.

[0023] According to an example of the electronic module of the first aspect, the insulation layer 2 comprises a thermal conductivity of > 1 W / mK, more precisely > 2 W / mK, more precisely > 3 W / mK.

[0024] According to an example of the electronic module of the first aspect, die pad 1.1 is part of a leadframe. One or more further die pads and one or more further semiconductor modules can be provided, wherein each of the further semiconductor modules is arranged on one of the one or more further die pads.

[0025] Fig. Figure 2 shows a schematic cross-sectional side view of another example of an electronic module. The electronic module 20 of Fig. 2 comprises a semiconductor housing or package 21 comprising a leadframe 21.1, a first semiconductor die 21.2, a second semiconductor die 21.3, and a third semiconductor die 21.4. The first to third semiconductor dies 21.2 to 21.4 are arranged on different sections of the leadframe 21.1. The first semiconductor die 21.2 can be, for example, a semiconductor transistor die such as an IGBT die. The second semiconductor die 21.3 can be, for example, a semiconductor diode die connected in parallel to the first semiconductor die 21.2. And the third semiconductor die 21.4 can be, for example, a control die.

[0026] The semiconductor package 21 further comprises an encapsulant 21.5, wherein the encapsulant 21.5 comprises a first upper main surface and a second lower main surface opposite the first main surface. The first and second semiconductor dies 21.2 and 21.3 are arranged on first portions of the leadframe 21.1 that are exposed to the outside of the package and that are at least partially coplanar with the first upper main surface of the encapsulant 21.5. The third semiconductor die 21.4 is arranged on another portion of the leadframe that is not exposed to the outside and is completely embedded in the encapsulant 21.5.

[0027] The semiconductor package 21 further comprises an insulation layer 22 arranged on the first main side of the encapsulant 21.5 and on the first main side of the die pad 21.1, wherein the insulation layer 22 is electrically insulating and thermally conductive, and a heat sink 23 arranged on or in the insulation layer 22. The insulation layer 22 and the heat sink 23 can have the same properties and features as the insulation layer 22 and the heat sink 23 in the example of Fig. 1. In the example of Fig. 2, the heat sink 23 may consist of a foil.

[0028] The electronics module 20 can be configured as a dual-inline (DIP) module, typically consisting of a rectangular housing and two parallel rows of electrical connection pins arranged on opposite sides. On the customer side, the electronics module 20 can be through-plated on a printed circuit board (PCB) 24, and an external heat sink 25 can be arranged on the insulation layer 22 and the heat sink 23.

[0029] Fig. 3 shows a schematic cross-sectional side view of another example of an electronic module. The electronic module 30 of Fig. 3 is the electronic module 20 of Fig. 2, so that the various components of the electronic module 30 will not be described again. The electronic module 30 comprises a semiconductor housing 31, which comprises a leadframe 31.1, a first semiconductor die 31.2, a second semiconductor die 31.3, and a third semiconductor die 31.4. The first to third semiconductor dies 31.2 to 31.4 are arranged on different sections of the leadframe 31.1 and can be functionally equivalent to the first of the third semiconductor dies 21.2 to 21.4, as shown in FIG. Fig. 2 be similar.

[0030] Although in the Fig. 2 and Fig. 3 examples have been shown and described in which the present disclosure is used in certain types of semiconductor packages, it should be emphasized that the present disclosure can be applied to virtually all types of semiconductor packages, including all types of TO packages (Transistor outline), BGA packages (Ball Grid Array), Leadless packages, SMD packages (Surface Mount Device), etc. It should also be mentioned that the structure, as shown for example in Fig. 1, can also be constructed on two sides, ie an insulation layer with embedded heat sink can be applied on the other side of the semiconductor housing.

[0031] The semiconductor housing 31 further comprises an encapsulant 31.5, wherein the encapsulant 31.5 comprises a first upper main surface and a second lower main surface opposite the first main surface. In contrast to the semiconductor module 20 of Fig. 2, the first to third semiconductor dies 31.2 to 31.4 are arranged on portions of the leadframe 31.1, all of which are exposed to the outside of the housing 31 and which are at least partially coplanar with the first upper main surface of the encapsulant 31.5.

[0032] The semiconductor package 31 further comprises an insulation layer 32, which is arranged on the first main side of the encapsulant 31.5 and on the first main side of the die pad 31.2, wherein the insulation layer 32 is electrically insulating and thermally conductive and a heat sink 33 is arranged on or in the insulation layer 2. As a further difference to the electronic module 20 of Fig. 2, the insulation layer 32 and the heat sink 33 are designed to be significantly thicker. On the customer side, the electronic module 30 can be plated through on a printed circuit board (PCB) 34, and an external heat sink 35 can be arranged on the insulation layer 32 and the heat sink 33. In the example of Fig. 3, the heat sink 33 may consist of a plate, in particular a Cu plate.

[0033] Fig. 4 includes Fig. 4A and Fig. 4B and shows a top view (A) and a cross-sectional side view (B) of another example of an electronic module, which is an example of a transistor outline package (TO). The electronic module 40 of Fig. 4 comprises a semiconductor package 41 with a die pad 41.1 with a semiconductor die (not shown) arranged thereon. The semiconductor package 41 further comprises three parallel external leads 41.2, 41.3, and 41.4. The external leads 41.2 to 41.4 and the die pad 41.1 can be part of a leadframe. The semiconductor package 41 further comprises an encapsulant 41.5, the shape and properties of which can be the same as or similar to the encapsulants of the previously described examples.

[0034] The electronic module 40 further includes an insulation layer 42 and a heat sink 43 embedded in the insulation layer 42. Both the insulation layer 42 and the heat sink 43 may have shapes and properties similar to or identical to the insulation layers and heat sinks of the previously described examples.

[0035] Fig. 5 shows a schematic cross-sectional side view of another example of an electronic module. The electronic module 50 comprises a semiconductor housing 51 with a die pad 51.1 supporting a semiconductor die (not shown). The semiconductor housing 51 further comprises an encapsulant 51.3, wherein the die pad 51.1 is embedded in the encapsulant 51.3. The semiconductor housing 51, the die pad 51.1, and the encapsulant 51.3 may have the same shapes and properties as the semiconductor housings, die pads, and encapsulants illustrated and described in the previous examples.

[0036] The electronics module 50 further comprises an insulation layer 52 and a heat sink 53 embedded in the insulation layer 52. The heat sink 53 comprises a cooling channel 53.1 with inlet and outlet openings for a coolant flowing through the cooling channel 53.1. The cooling medium can be liquid or gaseous and can be, for example, air or water. There can be more than one channel between the inlet and outlet openings, and more than one inlet opening and more than one outlet opening at the ends of the one or more channels. The heat sink 53 can be configured such that an external heat sink can additionally be arranged on top of the heat sink 53. Such an external heat sink would have to be configured to include suitable through-holes that serve as passages for the cooling medium to and from the inlet and outlet openings.

[0037] Fig. 6 includes Fig. 6A and Fig. 6B and shows two different examples of electronic modules in which the heat sink comprises a base body and an additional layer on the base body.

[0038] Fig. 6A shows that an electronic module 60_1 comprises a semiconductor package 61 comprising a die pad 61.1 supporting a semiconductor die (not shown). The semiconductor package 61 further comprises an encapsulant 61.3, wherein the die pad 61.1 is embedded in the encapsulant 61.3. The semiconductor package 61, the die pad 61.1, and the encapsulant 61.3 may have the same shapes and properties as the semiconductor packages, die pads, and encapsulants illustrated and described in the previous examples.

[0039] The electronic module 60_1 further comprises an insulating layer 62 and a heat sink 63 embedded in the insulating layer 62. The heat sink 63 comprises a base body 63.1 and an additional layer 63.2 applied to a top side of the base body 63.1. The material of the base body 63.1 can be one of the above-mentioned materials proposed for the previously described heat sink. The material of the additional layer 63.2 can be, for example, any type of thermal interface material (TIM). In particular, the material of the additional layer 63.2 can be selected to improve heat transfer to an external heat sink applied there. The electronic module 60_1 could be manufactured such that the additional layer 63.2 is applied to the base body 63.1 before forming the insulating layer 62.

[0040] Fig. 6B shows an electronic module 60_2, which corresponds to the electronic module 60_1 of Fig. 6A, so the same reference numerals have been used for the components. The only difference is that only the base body 63.1 is embedded in the insulation layer 62, but the additional layer 63.2 lies above the insulation layer 62. The electronic module 60_2 could be manufactured such that the additional layer 63.2 is applied to the base body 63.1 after the insulation layer 62 has been formed.

[0041] Fig. 7 shows a flowchart of an example of a method for manufacturing an electronic module according to the second aspect.

[0042] According to Fig. 7, the method 70 comprises providing a semiconductor package comprising a die pad, a semiconductor die and an encapsulant, wherein the encapsulant comprises a first main surface and a second main surface opposite the first main surface, the die pad comprises a first main surface and a second main surface opposite the first main surface, and wherein the semiconductor die is arranged on the second main surface of the die pad (71), wherein an insulation layer and a heat sink are applied to the first main surface of the encapsulant and to the first main surface of the die pad, such that the heat sink is arranged on or in the insulation layer, wherein the insulation layer is electrically insulating and heat-conducting (72).

[0043] According to an example of method 70 of Fig. 7, the application of the insulation layer and the heat sink comprises molding, in particular compression molding. More specifically, the insulation layer material can be applied in liquid form to an upper surface of the encapsulant and the die pad, and the heat sink can then be applied to the dispensed liquid insulation layer material. The assembly can then be inserted into a compression molding system, and an upper mold of the compression molding system can be pressed downward against the liquid insulation and heat sink material. After the upper mold reaches a final position, the liquid material can be cured and hardened. After the insulation layer has cured, the assembly can be removed from the molding device. The entire process is described in more detail below.

[0044] Fig. 8 includes the Fig. 8A to 8F and shows cross-sectional side view illustrations of an electronic module at various stages of manufacture according to another example of a method of manufacturing an electronic module.

[0045] Fig. 8A shows a semiconductor package 81 comprising a die pad 81.1, a semiconductor die 81.2 disposed on the die pad 81.1, and an encapsulant in which the die pad 81.1 and the semiconductor die 81.2 are embedded. It should be noted that not only one semiconductor package, but a plurality of semiconductor packages may be provided and processed.

[0046] Fig. Figure 8B shows the dispensing of a liquid material 82.1 through a dispenser 82.2. The liquid material serves to produce the insulation layer and can, in principle, be selected from one of the materials suggested above. In the case of compression molding, for example, an epoxy resin can be used, which can be cured and hardened after molding. The epoxy resin can contain fillers, in particular microparticles, to increase the thermal conductivity of the insulation layer to be produced. Suitable particle materials have already been suggested above.

[0047] Fig. Figure 8C shows the semiconductor package 81 with the metered liquid material 82.1 and a heat sink 83 applied to the metered liquid material. The heat sink 83 can be a piece of copper, for example, but any other materials for the heat sink suggested above can also be used.

[0048] Fig. 8D shows the assembly placed in a compression molding system. The compression molding system comprises an upper mold 84 and a lower mold (not shown). The assembly is placed on the lower mold. The upper mold 84 includes a recessed section that corresponds to the shape and contour of the insulation layer and heat sink to be manufactured. A vacuum of, for example, 1 mbar can be applied. The upper mold 84 is moved downwards (see arrows) until the potting material has reached a final pressure. In the final position, the recessed part of the upper mold 84 is completely filled with the liquid material and the heat sink in relation to the volume of the cavity, the volume of the mold, and the volume of the heat sink.

[0049] Fig. 8E shows the situation after the upper mold 84 has reached a final position. Heat is then applied to the insulation layer 82 so that the insulation layer 82 can be cured.

[0050] Fig. shows the final product after curing of the insulation layer 82 and removal of the product from the molding device. The electronic module, as shown in Fig. 8, corresponds to the electronic module as shown in Fig. 1 shown. EXAMPLE

[0051] In the following, electronic modules and methods for manufacturing electronic modules are described as examples.

[0052] Example 1 is an electronic module comprising a semiconductor package comprising a die pad, a semiconductor die, and an encapsulant, wherein the encapsulant comprises a first main surface and a second main surface opposite the first main surface, the die pad comprises a first main surface and a second main surface opposite the first main surface, and the semiconductor die is deposited on the second main surface of the die pad, an insulating layer disposed on at least a portion of the first main surface of the encapsulant and on the first main surface of the die pad, the insulating layer being electrically insulating and thermally conductive, and a heat sink disposed on or in the insulating layer, wherein a main surface of the heat sink is exposed to the outside.

[0053] Example 2 is an electronic module according to Example 1, wherein the insulation layer comprises one or more of a resin matrix material, a thermosetting material, an epoxy, a silicone, a thermal interface material, a thermoplastic, a thermal adhesive, or a thermal interface material (TIM).

[0054] Example 3 is an electronic module according to Examples 1 or 2, wherein the insulation layer comprises a resin matrix material or a substrate material filled with a filler material configured to improve a thermal conductivity of the substrate material.

[0055] Example 4 is an electronic module according to Example 3, wherein the filler material comprises particles of one or more of SiO, AlO, AlN or BN.

[0056] Example 5 is an electronic module according to any of the preceding examples, wherein the heat sink comprises one or more of a metal, a ceramic, or a sheet of material made of a thermal interface material.

[0057] Example 6 is an electronic module according to one of the preceding examples, wherein the heat sink is plate-shaped.

[0058] Example 7 is an electronic module according to Example 6, wherein a thickness of the plate-shaped heat sink is in a range from 100 µm to 5 mm.

[0059] Example 8 is an electronic module according to any one of Examples 1 to 5, wherein the heat sink is formed from a film.

[0060] Example 9 is an electronic module according to Example 8, wherein a thickness of the film is in a range from 5 µm to 100 µm.

[0061] Example 10 is an electronic module according to any one of the preceding examples, wherein the heat sink is formed from only one homogeneous material.

[0062] Example 11 is an electronic module according to any one of Examples 1 to 7, wherein the heat sink is formed from a composite of two or more materials.

[0063] Example 12 is an electronic module according to Example 11, wherein the heat sink comprises a base body and a layer arranged on the base body.

[0064] Example 13 is an electronic module according to any one of the preceding examples, wherein the die pad is part of a leadframe.

[0065] Example 14 is an electronic module according to any one of the preceding examples, comprising one or more further die pads and one or more further semiconductor dies, each disposed on one of the one or more further die pads.

[0066] Example 15 is an example of an electronic module comprising a semiconductor package having a die pad, a semiconductor die, and an encapsulant, wherein the encapsulant comprises a first main surface and a second main surface opposite the first main surface, wherein the die pad comprises a first main surface and a second main surface opposite the first main surface, and wherein the semiconductor die is arranged on the second main surface of the die pad, an insulation layer arranged on the first main surface of the encapsulant and on the first main surface of the die pad, wherein the insulation layer is electrically insulating and thermally conductive, a first heat sink arranged on or in the insulation layer, and a second heat sink arranged on the insulation layer and the first heat sink.

[0067] Example 16 is an example of a method of manufacturing an electronic module, the method comprising providing a semiconductor package comprising a die pad, a semiconductor die, and an encapsulant, the encapsulant comprising a first main surface and a second main surface opposite the first main surface, the die pad comprising a first main surface and a second main surface opposite the first main surface, and the semiconductor die being arranged on the second main surface of the die pad, applying an insulating layer and a heat sink to the first main surface of the encapsulant and to the first main surface of the die pad such that the heat sink is arranged on or in the insulating layer, the insulating layer being electrically insulating and thermally conductive.

[0068] Example 17 is a method according to Example 16, wherein applying the insulation layer and the heat sink comprises molding.

[0069] Example 18 is a method according to Example 17, further comprising applying the insulating layer and the heat sink such that the heat sink is embedded in the insulating layer such that an outer surface of the heat sink is disposed slightly above an outer surface of the insulating layer.

[0070] Example 19 is a method according to any one of Examples 16 to 18, in which two or more electronic modules are manufactured in parallel.

[0071] Moreover, while a particular feature or aspect of an embodiment of the invention may have been disclosed with respect to only one of several implementations, that feature or aspect may be combined with one or more other features or aspects of the other implementations as may be desired and advantageous for a particular or particular application. Furthermore, when the terms "including," "having," "with," or other variations thereof are used either in the detailed description or in the claims, these terms are intended to be inclusive in a manner similar to the term "comprising." Furthermore, it is to be understood that embodiments of the invention may be implemented in discrete circuits, partially integrated circuits, or fully integrated circuits or programming means. Also, the term "exemplary" is meant only as an example and not as the best or optimal.It should also be noted that for convenience and understanding, the features and / or elements illustrated herein are depicted with specific dimensions relative to one another and that actual dimensions may vary substantially from those illustrated herein.

Claims

[1] An electronic module (10) comprising: - a semiconductor package (1) comprising a die pad (1.1), a semiconductor die (1.2) and an encapsulant (1.3), wherein the encapsulant (1.3) has a first main surface and a second main surface opposite the first main surface, wherein the die pad (1.1) has a first main surface and a second main surface opposite the first main surface, and the semiconductor die (1.2) is arranged on the second main surface of the die pad (1.1); - an insulation layer (2) arranged on at least a portion of the first main surface of the encapsulating means (1.3) and on the first main surface of the die pad (1.1), wherein the insulation layer (2) is electrically insulating and thermally conductive; and - a heat sink (3) formed from a film and arranged on and in the insulation layer (2) and connected thereto to the encapsulating means (21.5, 31.5) and the die pad (21.1, 31.1), so that an outer surface of the heat sink (23, 33) is arranged slightly above an outer surface of the insulation layer (22, 32). [2] The electronic module (10) according to claim 1, wherein the insulation layer (2) comprises one or more of a resin matrix material, a thermosetting material, an epoxy, a silicone, a thermal interface material, a thermoplastic, a thermal adhesive, or a thermal interface material (TIM). [3] The electronic module (10) according to claim 1 or 2, wherein the insulation layer (2) comprises a resin matrix material or a substrate material filled with a filler material configured to improve a thermal conductivity of the substrate material. [4] The electronic module (10) according to claim 3, wherein the filler material comprises particles of one or more of SiO, AlO, AlN or BN. [5] The electronic module (10) according to any one of the preceding claims, wherein a thickness of the film is in a range of 5 µm to 100 µm. [6] The electronic module (10) according to one of the preceding claims, wherein the heat sink (3) is formed from only one homogeneous material. [7] The electronic module (10) according to one of the preceding claims, wherein the die pad (1.1) is part of a leadframe. [8] The electronic module (10) according to any one of the preceding claims, comprising one or more further die pads and one or more further semiconductor dies, each arranged on one of the one or more further die pads. [9] An electronic device (20; 30) comprising: - a semiconductor housing (21, 31) comprising a die pad (21.1; 31.1), a semiconductor die (21.2; 31.2) and an encapsulant (21.5; 31.5), wherein the encapsulant (21.5; 31.5) has a first main surface and a second main surface opposite the first main surface, wherein the die pad (21.1; 31.1) has a first main surface and a second main surface opposite the first main surface, and wherein the semiconductor die (21.2) is arranged on the second main surface of the die pad (21.1); - an insulation layer (22; 32) arranged on the first main surface of the encapsulant (21.5; 31.5) and on the first main surface of the die pad (21.1; 31.1), wherein the insulation layer (22; 32) is electrically insulating and thermally conductive; - a first heat sink (23; 33) formed from a foil and arranged on and in the insulation layer (22, 32) and firmly connected to the encapsulating means (21.5, 31.5) and the die pad (21.1, 31.1) by a press-molding process as a block, so that an outer surface of the heat sink (23, 33) is arranged slightly above an outer surface of the insulation layer (22, 32); and - a second heat sink (25; 35) arranged on the insulation layer (22; 32) and the first heat sink (23, 33). [10] A method of manufacturing an electronic module, the method comprising: - Providing a semiconductor housing (21, 31) comprising a die pad (21.1, 31.1), a semiconductor die (21.2, 31.2) and an encapsulant (21.5, 31.5), wherein the encapsulant (21.5, 31.5) has a first main surface and a second main surface opposite the first main surface, wherein the die pad (21.1, 31.1) has a first main surface and a second main surface opposite the first main surface, and wherein the semiconductor die (21.2, 31.2) is arranged on the second main surface of the die pad; - applying an insulating layer (22, 32) in liquid form, the insulating layer being electrically insulating and thermally conductive, to the first main surface of the encapsulant and to the first main surface of the die pad, and applying a heat sink (23, 33) formed from a film to the dispensed liquid material, subsequently introducing the semiconductor housing (21, 31) with the applied liquid insulating layer and the heat sink (23, 33) into a press-molding system, - carrying out a compression molding process such that, after the compression molding process, the heat sink (23, 33) is arranged on and in the insulation layer and the insulation layer (22, 32) with the embedded heat sink (23, 33) are firmly connected as a block to the encapsulant (21.5, 31.5) and the die pad (21.1, 31.1), such that an outer surface of the heat sink (23, 33) is arranged slightly above an outer surface of the insulation layer (22, 32). [11] The method of claim 10, wherein two or more electronic modules are manufactured in parallel.

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