Control device for controlling a power semiconductor switch

The control device for power semiconductor switches addresses the inefficiencies of prior designs by integrating a single output terminal with parallel semiconductor components to dynamically control switching durations, enhancing space efficiency and reducing voltage spikes and losses.

DE102019118420B4Active Publication Date: 2026-06-03SEMIKRON DANFOSS ELEKTRONIK GMBH & CO KG

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
SEMIKRON DANFOSS ELEKTRONIK GMBH & CO KG
Filing Date
2019-07-08
Publication Date
2026-06-03

AI Technical Summary

Technical Problem

Existing control devices for power semiconductor switches lack the ability to control the timing of the shutdown process and require a large footprint due to multiple output control connections and resistors, leading to inefficient space utilization.

Method used

A control device with a monolithically integrated driver and control circuit that uses a single output control terminal, incorporating semiconductor switches and resistors or current sources in parallel to dynamically adjust the control voltage based on operating states, allowing precise control over the switching duration.

Benefits of technology

Enables space-saving design with adjustable switching durations, reducing voltage spikes and switching losses by adapting to varying operating conditions.

✦ Generated by Eureka AI based on patent content.

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Abstract

Control device for controlling a power semiconductor switch (T), comprising a control circuit (2) which includes a monolithically integrated driver circuit (TR) and a monolithically integrated control circuit (ST) which controls the driver circuit (TR), with an output control terminal (AS) electrically connected to the driver circuit (TR) for controlling the power semiconductor switch (T), wherein the output control terminal (AS) is provided via a current path (SP) for electrically conductive connection to a control terminal (G) of the power semiconductor switch (T), wherein the control device (1) has precisely this one output control terminal (AS) for controlling this power semiconductor switch (T), wherein the driver circuit (TR) is configured to generate a control voltage (Ua) at the output control terminal (AS) for switching the power semiconductor switch (T) on and off.wherein the control voltage (Ua) has a second voltage value (Uv2) for switching on the power semiconductor switch (T) and a first voltage value (Uv1) that is low with respect to the second voltage value (Uv2) for switching off the power semiconductor switch (T), with a switching signal input terminal (SE) electrically connected to the control circuit (ST) for receiving a switch-on command (EB) to switch on this power semiconductor switch (T) and for receiving a switch-off command (AB) to switch off this power semiconductor switch (T), and with at least one operating state input terminal (BS) electrically connected to the control circuit (SE) for receiving at least one operating state signal (Uce, Udc, I, TS), wherein the control circuit (ST), when the output control terminal (AS) is electrically connected to the control terminal (G) of the power semiconductor switch (T) via the current path (SP), is configured toUpon receiving a switch-off command (AB), the driver circuit (TR) is controlled such that it reduces the drive voltage (Ua) from the second voltage value (Uv2) to the first voltage value (Uv1), wherein the control circuit (ST) controls the driver circuit (TR) such that the time period (T1,T2) until the drive voltage (Ua) is reduced to the first voltage value (Uv1), on which at least one operating state signal (Uce,Udc,I,TS) depends, wherein the driver circuit (TR) for reducing the drive voltage (Ua) from the second voltage value (Uv2) to the first voltage value (Uv1) comprises a first voltage source (Q1), a first and second semiconductor switch (T1,T2) and a switch-off resistor (Ra).wherein the first voltage source (Q1) is electrically connected to a first load terminal of the first semiconductor switch (T1) and a second load terminal of the first semiconductor switch (T1) is electrically connected to the output control terminal (AS) via the turn-off resistor (Ra), wherein the second semiconductor switch (T2) is electrically connected in parallel to the turn-off resistor (Ra), wherein the control circuit (ST) is configured to turn the second semiconductor switch (T2) on or off depending on the at least one operating state signal (Uce, Udc, I, TS) when the power semiconductor switch (T) is turned off.
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