PITCH FILTER FOR IMPROVING BLOCK TOLERANCE IN TIME-CONTINUOUS RESIDUAL GENERATING ANALOGUE-DIGITAL CONVERTERS

DE102019133946B4Active Publication Date: 2025-02-06ANALOG DEVICES INT UNLTD CO
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Patent Information

Application Number
DE102019133946
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2018-12-13
Filing Date
2019-12-11
Publication Date
2025-02-06
Estimated Expiration
2039-12-11

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Abstract

Residual value generation system for use in a continuous-time stage of an analog-to-digital converter (ADC), wherein the system comprises: a forward path; a feedforward path comprising a quantizer; and one or more stub line filters at an input to the forward path and the quantizer.
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Description

TECHNICAL FIELD OF DISCLOSUREThe present disclosure relates generally to analog-to-digital converters, and more particularly to analog-to-digital converters that use continuous-time residue generation.BACKGROUNDReal analog signals such as temperature, pressure, sound or light are routinely converted to a digital representation that can be easily processed in modern digital signal processing systems. The circuits that perform this conversion of an analog input signal to a digital output signal are referred to as analog-to-digital converters (ADCs). ADCs can convert analog electrical signals representing real phenomena such as temperature, pressure, sound, or light into digital signals for data processing purposes.ADCs are found in many locations, for example, in broadband communication systems, audio systems, receiver systems, etc., and are used in a wide range of applications including communication, power, healthcare, metrology and control technology, engine and power control, industrial automation, and aerospace / defense. For example, an antenna may generate an analog signal based on the electromagnetic waves that transmit information / signals in the air. The analog signal generated by the antenna may then be provided as an input to an ADC to generate a digital output signal for further processing. In another example, in precision measurement systems, the electronics may be equipped with one or more sensors to make measurements, and these sensors may generate an analog signal. The analog signal may then be provided as an input to an ADC to generate a digital output signal for further processing.The execution of an ADC is not a trivial task, as each application may have different requirements of speed, power, energy, cost, and size. As applications requiring ADCs grow, the need for accurate and reliable conversion performance also grows.U.S. Pat. No. 8,896,475 B2 describes a time-continuous pipelined analog-to-digital converter with oversampling.The claimed subject matter is defined in the independent claims. Advantageous further developments are described in the dependent claims.BRIEF DESCRIPTION OF THE DRAWINGSIn order to provide a more complete understanding of the present disclosure and its features and advantages, reference is made to the following description taken in conjunction with the accompanying drawings, wherein like reference numerals represent like parts in which: FIG. 1A is an illustrative system diagram of a conventional continuous-time residue generation system; FIG. 1B is an illustration of a non-return-to-zero digital-to-analog converter (DAC) pulse; FIG. 1C is an illustration of an example DAC output spectrum with a Sinc filter and an ideal low pass filter magnitude response; FIG. 2 is an illustrative system diagram of a residue generation system having one or more stub filters in accordance with some embodiments of the present disclosure; FIG. 3 is an illustrative system diagram of a residue generation system having a single stub filter and a switch, in accordance with some embodiments of the present disclosure; FIG. 4 is an illustrative system diagram of a residue generation system having two stub filters, in accordance with some embodiments of the present disclosure; FIGS. 5-7 illustrate frequency response curves of one or more stub filters according to various embodiments of the present disclosure; and FIG. 8 is a flow diagram illustrating a method for generating a residual signal according to some embodiments of the present disclosure.DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THE DISCLOSUREOverviewContinuous-time (CT="continuous time") residue generation systems are becoming more and more popular in high-performance and high-speed ADCs, due in part to their inherent anti-aliasing and potential to achieve high sampling rates. However, the anti-aliasing performance in such systems depends on the amplitude levels of the out-of-band blockers used being low (where the term "blocker" as used in the art refers to any signal that is outside the bandwidth in which the desired signals are located). Large blockers can result in residual signals (or simply "residues") that exceed the full duty cycle of the ADC, overload the ADC, and degrade its performance. Therefore, the blocker tolerance, quantified e.g. in terms of the largest blocker amplitude that an ADC can support without negative consequences, of such ADCs is limited to low values.Embodiments of the present disclosure provide mechanisms for using stub filters to improve blocker tolerance of ADCs employing CT residue generation systems. The mechanisms described herein may be applicable to both CT and hybrid (i.e., partial CT, partial discrete time (DT) ADCs, and may be implemented in ADCs of various types of architectures, such as pipelined ADCs, multi-stage noise shaping ADCs (MASH ADCs), voltage regulator oscillator ADCs (VCO ADCs), and other ADCs that utilize generation and processing of residual signals. Some of the mechanisms described herein may be particularly attractive for high-power and high-speed converter applications. One aspect of the present disclosure provides a residue generation system for use in a CT stage of an ADC, the system comprising at least one stub filter configured to generate a modified analog input based on an analog input to the filter (or residue generation system), and a quantizer configured to generate a digital input to a feedforward DAC based on the modified analog input generated by the filter. The feedforward DAC is configured to generate a feedforward path analog output based on the digital input generated by the quantizer, and the system may be further configured to generate a residual signal based on the feedforward path analog output. The provision of one or more stub filters which filter the analog input prior to its quantization advantageously enables blockers to be attenuated before being sampled and aliased by the quantizer. Moreover, at least some of the residue generation systems described herein may be implemented with relatively little design and power dissipation.The systems, methods, and apparatuses of this disclosure each have several innovative aspects, none of which alone bear responsibility for all the desirable properties disclosed herein. Details of one or more implementations of the subject matter described in the present disclosure are set forth in the following description and the accompanying drawings.As one of ordinary skill in the art will recognize, at least some aspects of the present disclosure, particularly at least some aspects of residue generation including the application of one or more stub filters prior to quantization as described herein, may be performed in various ways, e.g., as a method, a system, a computer program product, or a computer readable storage medium. Accordingly, aspects of the present disclosure may take the form of a full hardware embodiment, a full software embodiment (including firmware, resident software, microcode, etc.), or an embodiment that combines software and hardware aspects, all of which may be generally referred to herein as a "circuit," "module," or "system.". At least some functions described in this disclosure may be implemented as an algorithm executed by one or more hardware processing units, e.g., one or more microprocessors, of one or more computers. In various embodiments, different steps and portions of the steps of each of the methods described herein may be performed by different processing units. Moreover, aspects of the present disclosure may take the form of a computer program product embodied in one or more, preferably non-transitory, computer readable media having, e.g., stored, computer readable program code embodied thereon. In various embodiments, such a computer program may be downloaded (updated) to, or stored at the time of manufacture of, the existing devices and systems (e.g., the existing ADCs and / or their controllers, etc.), for example.The following detailed description presents various descriptions of specific embodiments. However, the innovations described herein may be embodied in a variety of ways, e.g., as defined and covered by the claims or by selected examples. In the following description, reference is made to the drawings, in which like reference numerals may refer to identical or functionally similar elements. It should be understood that the elements illustrated in the drawings are not necessarily drawn to scale. Moreover, it is contemplated that certain embodiments may include more elements than illustrated in a drawing and / or a subset of the elements illustrated in a drawing. Further, some embodiments may include any suitable combination of features from two or more drawings.The description may use the terms "in one embodiment" or "in embodiments", each of which may refer to one or more of the same or different embodiments. Unless otherwise specified, the use of ordinal numbers "first", "second", and "third", etc. to describe a common item merely means that reference is made to different instances of similar items, and is not intended to mean that the items so described must be in a particular order, either temporal, spatial, ranking, or otherwise. Various aspects of the illustrative embodiments are described using terms generally used by those skilled in the art to convey the substance of their work to others skilled in the art. The terms "substantially," "approximately," "about," etc. may be used generally to be within + / - 20% of a target value based on the context of a particular value as described herein or as known in the art.Other features and advantages of the disclosure will be apparent from the following description and claims.Fundamentals of ADCs and Challenges to Residual SignalsADCs are electronic devices that convert a continuous physical quantity carried by an analog signal to a digital number representing the amplitude of the quantity (or to a digital signal carrying this digital number). The conversion involves quantizing the analog input signal, i.e., a process of mapping the input values from a continuous set of analog values to output values in a countable smaller set of digital values so that it would introduce a small amount of error. Typically, the quantization is performed by periodically sampling the analog input signal. The result is a sequence of digital values (i.e., a digital signal) representing the conversion of a CT and continuous amplitude analog input signal to a DT and a discrete amplitude digital signal. An ADC can be defined by the following application requirements: its bandwidth (the frequency range of the analog signals that it can properly convert to a digital signal) and its resolution (the number of discrete levels into which the maximum analog signal can be divided and represented in the digital signal). An ADC also has various specifications for quantifying ADC dynamic performance, including signal-to-noise ratio (SNR), signal-to-noise-distortion ratio (SINAD), effective number of bits (ENOB), total harmonic distortion (THD), total harmonic distortion plus noise (THD+N), and interference free dynamic range (SFDR). ADCs have many different designs that can be selected depending on application requirements and performance specifications.As described above, ADCs based on CT residue generation systems are becoming more and more popular in various applications. An example of a conventional CT residue generation system 100 is shown in FIG. 1A. As shown in FIG. 1A, a CT analog input, x(t), 102 is sent to two different paths. A first path, which may be described as a "feedforward" path, includes a cascade of a quantizer 104 and a feedforward DAC 106. A second path, which may be described as a "forward" path, has a CT analog transfer function, H(s), 108. The CT analog input x(t) 102 is applied to the CT analog transfer function H(s) 108 in the forward path and to a cascade of the N-bit ADC implementing the quantizer 104 and an N-bit DAC implementing the feedforward DAC 106 clocked at a sampling rate of f ck in the feedforward path. A subtractor 110 then subtracts the output 112 of the transfer function H(s) 108 from the output x q( t), 114 of the DAC 106 to generate a residual signal, x c( t), 116. This residual signal may then be processed, e.g., filtered and amplified by an amplifier, AMP 1, 118 and the processed residual signal 120 may be provided to subsequent stages in an ADC (not shown in FIG. 1A ).Often, e.g., in CT pipelined ADCs, the transfer function H(s) 108 is the transfer function of a CT analog delay. Feedforward DAC 106 is typically a non-return-to-zero (NRZ) DAC, and may be in either voltage or current mode, but is typically the latter. In such a case, the DAC 106 outputs an NRZ current pulse, exemplarily shown in FIG. 1B as a DAC pulse 122, which has a duration of one clock period, T ck, and an amplitude proportional to the least significant bit current (LSB), I LSB( the current I LSB is also indicated in FIG. 1A, above the DAC 106).An example spectrum at the output of DAC 106 is shown as spectrum 130 of FIG. 1C. Such a spectrum can be obtained, for example, by applying a single tone input at the frequency f in= 0,125 Hz (f ck= 1 Hz) to the system of Figure 1A at a quantizer resolution of 4 bits. As shown in FIG. 1C, the output spectrum 130 includes a signal component 132, the wideband quantization error 134, and images / aliases 136 at nf ck ± f in( where n is an integer) generated by the sampling operation in the quantizer 104. The NRZ pulse shape 122, as shown in FIG. 1B, of the DAC 106 provides a sinc filter transfer function that shapes the spectrum around sinc(fT ck) 138, shown in FIG. 1C with a thin dashed line. This slightly attenuates the images 136 and the high-frequency components of the quantization error 134. The sinc transfer function has zeros at integer multiples of f ck, and therefore more attenuates the DAC images 136 that are closer to the zeros than they are not. If the images are not attenuated sufficiently, the amplitude of the residual x c( t) 116 at the output of the subtractor 110 in FIG. 1A threatens to overload the subsequent ADC stages. For example, in an exemplary CT pipelined ADC with a first order low pass residue amplifier AMP 1118 with a low frequency gain (also referred to as "DC gain") of 8, the DAC images 136 must be attenuated by at least 17 dB from the signal component 132 to keep the amplitude of the processed output residue signal 120 within reasonable limits. For the case of the NRZ DAC pulse (with the Sinc filter), this requirement limits the maximum input frequency and thus the ADC input bandwidth to f ck / 8. Conversely, the ADC must be oversampled at a given input bandwidth, f BW, with an oversampling ratio (OSR) of at least 2. The oversampled type of digital output results in a significant performance penalty for the digital processing blocks in the back end.As the foregoing illustrate, improvements in residual signal generation would be desirable.Improved Residue Generation SystemsEmbodiments of the present disclosure provide systems and methods for generating residual signals of a CT residue generation stage of an ADC based on the use of at least one stub filter that can filter the analog input before being processed in the feedforward path such that the blockers can be attenuated before being sampled and quantized in the feedforward path, thereby increasing blocker tolerance, which is particularly important for blockers having a frequency around f ck and multiples of f ck. The residual signals generated using such a filter can simplify the design of the subsequent blocks of an ADC that process the residual signals and reduce the power dissipation of the digital processing blocks in the back end along with that of the CT residual generation system itself.FIG. 2 is an illustrative system diagram of a residue generation system having at least one stub filter, in accordance with some embodiments of the present disclosure. The system 200 may be used as a residue generator in a CT stage of any suitable multi-stage ADC, such as CT as well as hybrid ADCs implemented in various types of architectures such as pipelined ADCs, MASH ADCs, VCO ADCs, and other ADCs that utilize residue signals.As shown in FIG. 2, a CT analog input, x(t), 202, is ultimately sent to two different paths - a forward path indicated by solid arrows in FIG. 2 and a feedforward path indicated by dotted arrows in FIG. 2. In the following FIGURES, the feedforward path is indicated by solid arrows, as FIG. 2 illustrates, for all FIGURES present, which path is a forward path and which path is a feedforward path. As further shown in FIG. 2, system 200 is similar to system 100 shown in FIG. 1 in that it may include a quantizer 204 (labeled "A / D" in FIG. 2 to indicate that analog-to-digital conversion is occurring), a feedforward DAC 206 (labeled "D / A" in FIG. 2 to indicate that digital-to-analog conversion is occurring), a forward path transfer function (TF) 208 (which may be, e.g., a delay), a subtractor 210, and an amplifier 218. In various embodiments of the present disclosure, unless otherwise described, these elements may be analogous to quantizer 104, feedforward DAC 106, forward path transfer function 108, subtractor 110, and amplifier 118, respectively, as described with reference to FIG. 1. Similarly, FIG. 2 also shows an output 212 of the forward path transfer function 208, an output x q( t) 214 of the DAC 206, a residual signal x r( t) 216, and an amplified residual signal 220, respectively analogous to the output 112 of the forward path transfer function 108, the output x q( t) 114 of the DAC 106, the residual signal x r( t) 116, and the amplified residual signal 120 described with reference to FIG. 1. Unless otherwise indicated, descriptions of elements of FIG. 1 analogous to the corresponding elements of FIG. 2 are assumed applicable to FIG. 2 and therefore not repeated herein in their entirety for brevity. Not specifically labeled in FIG. 1, but labeled in FIG. 2, is a digital output 228 provided from the quantizer 204 to the DAC 206.In contrast to FIG. 1, the system 200 shown in FIG. 2 additionally includes one or more stub filters (SFs) 222 provided at an input 224 to the forward path and the feedforward path (namely, at an input to the forward path and the quantizer 204). While shown in FIG. 2 before the input node 224, in some embodiments, it may be assumed that the one or more stub filters 222 are implemented partially in the feedforward path and partially in the forward path. FIG. 2 further illustrates that the one or more stub filters 222 may modify the analog input 202 to generate a modified analog input 226, which is then provided to the feedforward path (e.g., quantizer 204) and also to the forward path (e.g., to be subjected to TF 208). Thus, as described in more detail below, the output 226 used in the feedforward path is a filtered analog output, wherein the one or more stub filters 222 are configured to generate based on the analog input 202, the filtered output being used by the quantizer 204 to generate the digital input 228 provided to the feedforward DAC 206 (e.g., an N-bit f ck- rate output data), wherein both the quantizer 204 and the DAC 206 are clocked with the clock signal f ck as schematically illustrated in FIG. 2. In turn, feedforward DAC 206 generates feedforward path analog output 214 based on digital input 228 generated by quantizer 204, and subtractor 210 generates residual signal 216 based on feedforward path analog output 214.A given stub filter 222, also sometimes referred to as a "stub" or "resonant stub", is a portion of a transmission line or waveguide (i.e., a portion or stub of an electrically conductive material) that is connected only at one end--e.g., end 301 shown in FIG. 3. The other free end of the stub-e.g. end 303 shown in Figure 3-may remain open or short circuited. In various embodiments, each of the stub filters 222 may be employed with any type of transmission line architectures such as, but not limited to, coaxial cable, strip line, or parallel line. Embodiments of the present disclosure are based on the finding that to improve the blocker tolerance of a CT residue generation system, particularly for inputs 202 having components around frequency f ck and multiples thereof, the analog input 202, which may include blockers, may be modified to the attenuated blockers before the analog input is quantized in a process that samples and aliases the input. Embodiments of the present disclosure are further based on the recognition that such elements, with proper design of stubs 222, may function as frequency selective filters and be configured to attenuate the content of input signal 202 at different multiples of f ck (i.e., the one or more stub filters 222 may be configured to have notches at different multiples of f ck ), thereby advantageously attenuating or substantially eliminating at least some of the undesirable blockers altogether. To this end, there are several ways in which the one or more stub filters 222 may be implemented, some of which are illustrated herein with reference to various example implementations of the system 200, as shown in FIGS. 3 and 4. In these FIGURES, elements having the same reference numerals as those shown in FIG. 2 are intended to illustrate analogous elements to those shown in FIG. 2, so that the descriptions provided for these elements with reference to FIG. 2 need not be repeated for each of FIGS. 3 and 4.In some embodiments, the one or more stub filters 222 may include a single stub filter 222. An example of such a filter is shown in FIG. 3 as stub filter 322. FIG. 3 illustrates a residue generation system 300 that is an example of the residue generation system 200. As shown in FIG. 3, the stub filter 322 may have a first end 301 and a second end 303. The first end 301 may be coupled to the input 224 to the forward path and the feedforward path. The second end 303 may remain open.FIG. 3 further illustrates that residue generation system 300 may include optional switch 305 coupled between first end 301 of stub filter 322 and input node 224, in some embodiments. The switch 305 may include any suitable one or more state switching means in which, depending on the state of the switch 305, the stub filter 322 may be either electrically connected to the input 224 and thus be capable of modifying the analog input 202 to produce the modified analog input 226 to be provided to the forward and feedforward paths, or disconnected from the input 224 and thus not be capable of making this modification at the analog input 202. FIG. 3 uses a dashed line to schematically illustrate a "closed" position of the switch 305, which indicates that in some embodiments, such a "closed switch position" may represent the state in which the switch 305 connects the stub filter 322 to the input 224. FIG. 3 further shows a dotted line schematically illustrating an "open" position of the switch 305, indicating that, in some embodiments, such an "open switch position" may represent the state in which the switch 305 disconnects the stub filter 322 from the input 224.Assuming that stub filter 322 is connected to input 224, a delay introduced by stub filter 322 affects which frequencies of analog input signal 202 are attenuated. For example, in some embodiments, the stub filter 322 may be implemented with a delay of T ck / 4 where T ck is again a clock period of the clock driving the quantizer 204 and the feedforward DAC 206. In other words, stub filter 322 may introduce a group delay of T ck / 4 into the feedforward path of residue generation system 300. Such a stub filter would have notches at odd multiples of the f ck( i.e., such a single stub filter 322 would have notches at f ck, 3 f ck, 5 f ck, etc.). This would advantageously attenuate blockers within the input signal 202 at these odd multiples of the f ck resulting in the modified analog input signal 226. In other embodiments, stub filter 322 may be implemented with a delay of T ck / 2 (in other words, stub filter 322 may introduce a group delay of T ck / 2 into the feedforward path of residue generation system 300) which would result in stub filter 322 having notches at some even multiples of the f ck (i.e., such a single stub filter 322 having notches at 2f ck, 6 f ck, 10 f ck, etc.). This would advantageously attenuate blockers within the input signal 202 at these even multiples of the f ck resulting in the modified analog input signal 226. In some embodiments, the delay introduced by a particular stub filter depends on and can therefore be controlled by the length of the conductive portion of the stub.In embodiments where it may be desirable to attenuate both blockers at odd frequencies and blockers at at least some even frequencies, two stub filters may be used. Such an embodiment is illustrated in FIG. 4 and shows a residue generation system 400 (which is an example of residue generation system 200) having two stub filters 222 shown as first stub filter 422- 1 and a second stub filter 422- 2. Although not specifically identified in FIG. 4, each of the stub filters 422 has an end coupled to the input 224 and an end that remains open as discussed above. If one of the stub filters 422 is designed for a 0.25T ck delay while the other is designed for a 0.5T ck delay, then a combination of such filters would allow the generation of the modified input signal 226 by attenuating signal components at frequencies f ck, 2 f ck, 3 f ck, 5 f ck, 6 f ck, 7 f ck, 9 f ck, 10 f ck, etc. FIG. 5 illustrates a curve 500 showing a frequency response of the stub filter 222 as a single stub (dashed line) and a frequency response of the stub filter 222 as two stubs (solid line). In FIG. 5, the horizontal axis illustrates the frequencies, while the vertical axis illustrates the attenuation. As seen in FIG. 5, the frequency response of a single stub (i.e., the dashed line shown in FIG. 5 ) has alias rejections / indentations at f ck( point 502 shown in FIG. 5 ), 3 f ck( point 502 shown in FIG. 5 ), 5 f ck( point 508 shown in FIG. 5 ), and so on (other frequencies not shown in FIG. 5 ), i.e., at odd multiples of f ck. Although this is helpful in improving the blocker tolerance of the system, the second most important alias band 2f is still missing ck. The use of two stub filters helps with, as can also be seen in FIG. 5, the frequency response of a two stub filter 222 (i.e., the solid line shown in FIG. 5) having alias rejections / notches at f ck( point 502 shown in FIG. 5), 2f ck( point 504 shown in FIG. 5), 3f ck( point 506 shown in FIG. 5), 5f ck( point 508 shown in FIG. 5), and so forth.Although not specifically shown in FIG. 4, additional stub filters may be added in further embodiments to attenuate signal components at still other frequencies, e.g., at 4 f ck, 8 f ck, etc.Additionally, in some embodiments, multiple stub filters may be implemented with the same delay. For example, in some embodiments, multiple stub filters may be implemented with a delay of 0.25T ck each. Such embodiments may provide the advantage of increasing attenuation at the notches of these stub filters compared to a smaller number of filters. This is depicted in FIG. 6, which illustrates a curve 600 in which a frequency response of a single stub filter is shown with a line 602, and a combined frequency response of a pair of two stub filters with equal delay (e.g., both stub filters formed with notches at f ck ) is shown with a line 604. Curve 600 illustrates that the maximum attenuation provided by the notch of the single stub filter shown on line 602 with a point 606 may be increased when using a pair of stub filters, the maximum attenuation of the latter being shown in FIG. 6 with a point 608 on line 604. Similar to FIG. 5, in FIG. 6, the horizontal axis illustrates the frequencies, while the vertical axis illustrates the attenuation.Thus, in general, in various embodiments of the present disclosure, any number of one or more stub filters 222, each connectable to the input 224, may be used to attenuate signal portions at different multiples of f ck. In the embodiments, when multiple stub filters 222 are used, a resulting effect in the modified analog signal 226 is a linear combination of the effects of each individual filter. For example, implementing two filters 222 with a first filter with notches at odd multiples of the f ck( i.e., at f ck, 3 f ck, 5 f ck, etc.) and with a second filter with notches at 2f ck, 6 f ck, 10 f ck, etc., would result in the combined filtering applied to the input signal 202 attenuating such signal components at the combination of the notches of these two filters, as explained above for the example of FIG. 4.Moreover, although not specifically shown in the figures, in the embodiments, when multiple stub filters 222 are implemented, a switching mechanism similar to that described with reference to FIG. 3 may be used to selectively switch different ones of the stub filters 222 on and off (i.e., different ones of the multiple stub filters 222 may be connected to or disconnected from the input 224 as desired for a particular implementation). Such a switching mechanism may advantageously allow the notches of the resulting filtering applied to the signal 202 to be programmable.Additionally, in various embodiments, the impedance of each of the one or more stubs 222 may be selected to achieve the desired notch width in the frequency spectrum. FIG. 7 illustrates that the width of a notch of a stub filter having an impedance, e.g., 25 ohms (line 702 shown in FIG. 7 ) may be greater than the width of a notch of a stub filter having a greater impedance, e.g., 50 ohms (line 704 shown in FIG. 7 ). Similar to FIG. 5, in FIG. 7, the horizontal axis illustrates the frequencies, while the vertical axis illustrates the attenuation. In some embodiments, the characteristic impedance of a transmission line-based stub filter may be controlled by the control (i.e., by careful selection) of certain design parameters, such as the physical dimension(s) of the conductive material used to implement the stub, the spacing of the conductive materials, the type of non-conductive material used between the conductive materials, etc.Example Method for Generating a Residual SignalFIG. 8 is a flow diagram illustrating a method 800 for generating a residual signal using one or more stub filters as described herein, in accordance with some embodiments of the present disclosure. The method may be used for all residue generating ADCs implementing at least one CT residue generation stage implementing a filter prior to quantization as described herein. The method set forth is described for a particular re-generating element / system. The disclosure contemplates that the same method may be applied to other residue generation systems that may be present within the ADC, e.g., residue generation systems at other stages of conversion to reduce adverse effects of high amplitude blockers as described herein.As shown in FIG. 8, the method 800 may begin with step 802, where one or more stub filters are applied to an analog input to generate a modified analog input ("input" to the remainder of the residue generation system; or, viewed differently, to generate a filtered analog output, as it is an "output" from the one or more stub filters). The one or more stub filters used in step 802 may be any of the stub filters 222 described herein configured to generate the modified analog input 226 based on the analog input 202.In step 804, a digital input may be generated based on the modified analog input generated in step 802. Step 804 may be realized with any of the quantizers 204 described herein, where the quantizer 204 would generate a digital input 228 for the feedforward DAC 206 by quantizing the modified analog input 226 of the one or more stub filters 222.In step 806, a feedforward path analog output may be generated based on the digital input generated in step 804. Step 806 may be implemented with any of the DACs 206 described herein, where the DAC 206 would generate the feedforward path analog output 214 based on the digital input 228 generated by the quantizer 204.In step 808, a residual signal may be generated based on the feedforward path analog output generated in step 806. The residual signal generated in step 808 may be either the residual signal 216 described herein, which is generated by the subtractor 210 based on both the feedforward path analog output 214 and the forward path analog output 212, or the amplified version of such residual signal, i.e., the residual signal 220 generated by the amplifier 218.Exemplary Residue Generation DeviceIn some embodiments, a residue generation device may include a first stage including at least one residue generation circuit or system configured to generate a residue signal and a second stage configured to process the residue signal received from the first stage. The residual signal of the first stage can be introduced into the second stage for further processing there. For example, the residual signal may be digitized by the second stage.The residue generating circuit of the first stage may comprise means for digitizing an analog input to generate a digital output. Examples of such means include the quantizers described herein, wherein an analog input provided to the quantizers is a filtered analog output of any of the stub filters described herein (i.e., a modified analog input). The first stage may further comprise means for amplifying and / or filtering the residual signal before it is provided to the second stage. Examples of such means include the interstage amplifiers described herein, e.g., the amplifiers shown in Figures 2-4.The apparatus may be a CT or hybrid ADC implementing at least one residue generation stage / system as described with reference to any of FIGS. 2-4.Selected ExamplesThe following paragraphs provide various selected examples of the embodiments disclosed herein.Example 1 provides a residue generation system for use in a continuous time (CT) stage of an analog-to-digital converter (ADC), the system comprising a forward path, a feedforward path comprising a quantizer, and one or more stub filters provided at an input to the forward path and the quantizer.Example 2 provides the residue generation system of example 1, wherein the one or more stub filters are configured to generate a modified analog input by modifying an analog input to the residue generation system.Example 3 provides the residue generation system of example 1 or 2, further comprising a feedforward DAC (included in the feedforward path) and a subtractor.Example 4 provides the residue generation system of example 3, wherein the quantizer is configured to digitize the modified analog input to generate a digital output, the feedforward DAC is configured to generate a feedforward path analog output based on the digital output of the quantizer, the forward path is configured to apply a forward path transfer function to the modified analog input to generate a forward path analog output, and the subtractor is configured to generate a residue signal based on the forward path analog output and the feedforward path analog output.Example 5 provides the residue generation system according to any of the preceding examples, wherein each of the one or more stub filters is a part of a transmission line connected only at one end.Example 6 provides the residue generation system of example 5, wherein for each of the one or more stub filters, an unconnected end (i.e., the free end) is an open end.Example 7 provides the residue generation system according to any of the preceding examples, further comprising switching means configured to switch between a first state and a second state. When the switching means is in the first state, the one or more stub filters are electrically connected to the input to the forward path and the quantizer (i.e., they are capable of modifying the analog input to the residue generation system to generate the modified analog input for the quantizer and the forward path). When the switching means is in the second state, the one or more stub filters are electrically isolated from the input to the forward path and the quantizer (i.e., they are unable to modify the analog input to the residue generation system, such that the analog input is provided to the forward path and the quantizer without being modified by the one or more stub filters).Example 8 provides the residue generation system according to any of the preceding examples, wherein the one or more stub filters comprise a plurality of stub filters, and the system further comprises switching means configured to selectively connect and disconnect (electrical connections) each of the plurality of stub filters to the input to the forward path and the quantizer. When a given stub filter is connected to the input to the forward path and the quantizer, it is able to modify the analog input to the residue generation system so as to provide a modified analog input to the quantizer and the forward path. If a given stub is separated from the forward path and the quantizer, it cannot make this modification.Example 9 provides the residue generation system of any of Examples 1-8, wherein the one or more stub filters comprise a single stub filter.Example 10 provides the residue generation system of example 9, wherein the single stub filter is configured to have a propagation delay of substantially 0.25 / f ck( or substantially T ck / 4) wherein f ck is a clock rate in the feedforward path (i.e., a clock rate or sampling rate / frequency of the clock driving the quantizer and feedforward DAC), and wherein T ck=1 / f ck.Example 11 provides the residue generation system of Examples 9 or 10, wherein the single stub filter is configured to modify the analog input of the residue generation system by attenuating the signals within the analog input at odd multiples of f ck (i.e., the single stub filter may have notches at f ck, 3 f ck, 5 f ck etc.).Example 12 provides the residue generation system of example 9, wherein the single stub filter is configured to have a propagation delay of substantially 0.5 / f ck( or substantially T ck / 2) wherein f ck is a clock rate in the feedforward path (i.e., a clock rate or sampling rate / frequency of the clock driving the quantizer and feedforward DAC), and wherein T ck=1 / f ck.Example 13 provides the residue generation system of Examples 9 or 12, wherein the single stub filter is configured to modify the analog input to the residue generation system by attenuating signals at one or more (some, not all) even multiples of the fs within the analog input (i.e., the single stub filter may have notches at 2 f ck, 6 f ck, 10 f ck etc.).Example 14 provides the residue generation system of any of Examples 1-8, wherein the one or more stub filters comprise at least a first stub filter and a second stub filter.Example 15 provides the residue generation system of example 14, wherein the first stub filter is configured to modify the analog input to the residue generation system by attenuating, in the analog input, signals at odd multiples of a clock rate in the feedforward path, f ck, (i.e., the first stub filter may have notches at f ck, 3 f ck, 5 f ck etc.), and the second stub filter is configured to modify the analog input to the residue generation system by attenuating, within the analog input, signals at one or more (some, not all) even multiples of the clock rate in the feedforward path (i.e., the second stub filter may have notches at 2f ck, 6 f ck, 10 f ck etc.).Example 16 provides the residue generation system of Examples 14 or 15, wherein a length of the first stub filter is different than a length of the second stub filter.Example 17 provides the residue generation system of any of Examples 14-16, wherein an impedance of the first stub filter is different than an impedance of the second stub filter. Given that all other parameters of stub filters are the same, different stub filters with different impedances result in different stub filters with different widths of their notches (i.e., by changing the characteristic impedance of a stub filter, the steepness of its notches can be controlled).Example 18 provides a residue generation system for use in a CT stage of an ADC, the system comprising one or more stub filters for generating a modified analog input based on an analog input; a quantizer for generating a digital input to a feedforward DAC based on the modified analog input; the feedforward DAC for generating a feedforward path analog output based on the digital input generated by the quantizer; and a subtractor for generating a residue signal based on the feedforward path analog output.Example 19 provides the residue generation system of example 18, further comprising a forward path used to generate a forward path analog output based on the modified analog input, wherein the subtractor is to generate the residue signal based on the feedforward path analog output and the forward path analog output.Example 20 provides an ADC having a first stage and a second stage. The first stage comprises a residue generation system having a forward path, a feedforward path, one or more stub filters provided at an input to the forward path and the feedforward path, and means for generating a residue signal based on an output from the forward path and an output from the feedforward path. The second stage is configured to process the residual signal received from the first stage.Example 21 provides the ADC of Example 20, wherein the first stage is a CT stage.Example 22 provides the ADC of Example 21, wherein the second stage is a DT stage.Example 23 provides the ADC of any of Examples 20-22, wherein the residue generation system is a residue generation system of any of Examples 1-19.Example 24 provides a method for generating a residual signal in a residual generation ADC, the method comprising: applying one or more stub filters to generate a modified analog input based on an analog input, the one or more stub filters configured to attenuate signals outside a bandwidth of interest; generating a digital input based on the modified analog input; generating a feedforward path analog output based on the digital input; and generating the residual signal based on the feedforward path analog output.Other implementation hints, variations and applicationsResidue generation systems for use in continuous time and hybrid ADCs are disclosed. An example residue generation system may include at least one stub filter configured to generate a modified analog input based on an analog input and a quantizer configured to generate a digital input to a feedforward DAC based on the modified analog input generated by the filter. The feedforward DAC may be configured to generate a feedforward path analog output based on the digital input generated by the quantizer, and the system may be further configured to generate a residual signal based on the feedforward path analog output. Advantageously, providing one or more stub filters that filter the analog input before it is quantized by the quantizer may allow blockers to be attenuated prior to sampling and aliasing by the quantizer.In an exemplary embodiment, any number of the electrical circuits of the FIGs may be implemented on a board of an associated electronic device. The board may be a general circuit board that may house various components of the internal electronic system of the electronic device and further provide connections for other peripheral devices. More specifically, the board may provide the electrical connections through which the other components of the system may electrically communicate. Any suitable processors (including digital signal processors, microprocessors, supporting chipsets, etc.), computer readable non-volatile memory elements, etc., may be appropriately coupled to the board depending on particular configuration requirements, processing requirements, computer designs, etc. Other components such as external memory, additional sensors, controllers for audio / video display, and peripheral devices may be plugged into the board or integrated into the board itself as circuit cards or via cables. In various embodiments, the functionalities described herein may be implemented in the form of emulation as software or firmware running within one or more configurable (e.g., programmable) elements arranged in a structure that supports these functions. The software or firmware providing the emulation may be provided on a non-transitory computer readable storage medium having instructions that enable a processor to perform these functionalities.In another exemplary embodiment, the electrical circuits of the FIG. may be implemented as stand-alone modules (e.g., a device with associated components and circuits configured to perform a particular application or function) or as plug-in modules in application specific hardware of electronic devices. It should be appreciated that certain embodiments of the present disclosure may be readily incorporated into a system on chip package (SOC) either partially or fully. An SOC represents an integrated circuit (IC) that integrates components of a computer or other electronic system into a single chip. It may have digital, analog, mixed signal and often also high frequency functions, all of which may be provided on a single chip substrate. Other embodiments may include a multi-chip module (MCM) having multiple separate ICs located in a single electronic package and configured to closely interact with each other through the electronic package. In various other embodiments, the digital filters may be implemented in one or more silicon cores in application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), and other semiconductor chips.It is also needless to say that all specifications, dimensions and relationships listed herein (e.g., the number of filters (including the number of filter taps), delay elements, converters, processors, logic operations, etc.) have been offered for purposes of example and teaching only. This information may be varied considerably without departing from the spirit of the present disclosure or the scope of the appended claims. The specifications apply only to a non-limiting example and are accordingly also to be interpreted as such. In the foregoing description, example embodiments have been described with respect to particular arrangements of components. Various modifications and changes may be made to such embodiments without departing from the scope of the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.The described architecture for generating residual signals to be provided to the subsequent stages of an ADC is particularly suitable for high speed, CT and high precision applications using residual generating ADCs. Applications that may benefit greatly from the architecture include instrumentation, testing, spectrum analyzers, military purposes, radar, wired or wireless communication, cellular phones (especially because the standards continue to urge for faster communication), and base stations.It should be noted that in the numerous examples listed herein, the interaction may be described in terms of two, three, four, or more electrical components. However, this has been done for clarity and example purposes only. It should be appreciated that the system may be consolidated in any suitable manner. Along with similar design alternatives, all illustrated components, modules, and elements of the figures may be combined in various possible configurations, all of which are clearly within the broad scope of the present disclosure. In certain cases, it may be easier to describe one or more of the functionalities of a particular set of flows by reference to only a limited number of electrical elements. It should be appreciated that the electrical circuits of the figures, which show various embodiments of residue generation using a filter prior to quantization and its teachings, are easily scalable and can accommodate a large number of components as well as more complicated / refined arrangements and configurations. Accordingly, the examples provided should not limit the scope or affect the broad teaching of electrical circuits as may be applied to numerous other architectures.It should be noted that references in the present disclosure to various features (e.g., elements, structures, modules, components, steps, operations, characteristics, etc.) included in "one embodiment," "an embodiment," "another embodiment," "some embodiments," "various embodiments," "other embodiments," "alternative embodiments," and the like are intended to mean that any such features are included in one or more embodiments of the present disclosure, but may or may not necessarily be combined in the same embodiments.It is also important to note that the functions related to residue generation, e.g., those summarized in the process shown in FIG. 8, only illustrate some of the possible functions that may be performed by or within the residue generation system(s) described with reference to FIGS. 2-4. Some of these operations may be deleted or removed where appropriate, or these operations may be modified or changed significantly without departing from the scope of the present disclosure. Moreover, the timing of these operations can be changed considerably. The foregoing operations have been offered for purposes of example and discussion. Considerable flexibility is provided by the embodiments described herein in that any suitable arrangements, chronology, configurations, and timing mechanisms may be provided without departing from the teachings of the present disclosure.Numerous other changes, substitutions, variations, alterations, and modifications may be made to one skilled in the art, and it is intended that the present disclosure include all such changes, substitutions, variations, alterations, and modifications as fall within the scope of the appended claims. It should be appreciated that all optional features of the apparatus described above may also be implemented with respect to the method or process described herein, and the specifics in the examples may be used throughout one or more embodiments.

Claims

A residue generation system for use in a continuous-time stage of an analog-to-digital converter (ADC), the system comprising: a forward path; a feedforward path comprising a quantizer; and one or more stub filters at an input to the forward path and the quantizer.The residue generation system of claim 1, wherein the one or more stub filters are configured to generate a modified analog input by modifying an analog input to the residue generation system.The residue generation system of any preceding claim, further comprising a feedforward digital-to-analog converter (DAC) and a subtractor.The residue generation system of claim 3, wherein: the quantizer is configured to digitize the modified analog input to generate a digital output; the feedforward DAC is configured to generate a feedforward path analog output based on the digital output of the quantizer; the forward path is configured to apply a forward path transfer function to the modified analog input to generate a forward path analog output; and the subtractor is configured to generate a residue signal based on the forward path analog output and the feedforward path analog output.The residue generation system according to any one of the preceding claims, wherein each of the one or more stub filters is a transmission line connected only to one end.The residue generation system of claim 5, wherein in each of the one or more stub filters, an unconnected end is an open end.The residue generation system of any preceding claim, further comprising: switching means configured to switch between a first state and a second state, wherein: when the switching means is in the first state, the one or more stub filters are connected to the input to the forward path and the quantizer, and when the switching means is in the second state, the one or more stub filters are separated from the input to the forward path and the quantizer.A residue generation system according to any preceding claim, wherein the one or more stub filters comprise a plurality of stub filters and the system further comprises switching means adapted to selectively connect and disconnect each of the plurality of stub filters to the input to the forward path and the quantizer.The residue generation system of any preceding claim, wherein the one or more stub filters comprise a single stub filter.The residue generation system of claim 9, wherein the single stub filter is configured to have a propagation delay of 0.25 / f ck where f ck is a clock rate in the feedforward path.The residue generation system of claim 9 or 10, wherein the single stub filter is configured to attenuate signals at odd multiples of the f ck.The residue generation system of claim 9 or claim 11 when dependent on claim 9, wherein the single stub filter is configured to have a propagation delay of 0.5 / f ck where f ck is a clock rate in the feedforward path.The residue generation system of any preceding claim, wherein the one or more stub filters comprise at least a first stub filter and a second stub filter.The residue generation system of claim 13, wherein: the first stub filter is configured to attenuate signals at odd multiples of a clock rate in the feedforward path, f ck, and the second stub filter is configured to attenuate signals at one or more even multiples of the clock rate in the feedforward path.The residue generation system of claim 13 or 14, wherein a length of the first stub filter is different from a length of the second stub filter.The residue generation system according to any one of claims 13 to 15, wherein an impedance of the first stub filter is different from an impedance of the second stub filter.A residue generation system for use in a continuous-time stage of an analog-to-digital converter (ADC), the system comprising: one or more stub filters for generating a modified analog input based on an analog input; a quantizer for generating a digital input to a feedforward digital-to-analog converter (DAC) based on the modified analog input; the feedforward DAC for generating a feedforward path analog output based on the digital input generated by the quantizer; and a subtractor for generating a residue signal based on the feedforward path analog output.The residue generation system of claim 17, further comprising: a forward path used to generate a forward path analog output based on the modified analog input, wherein the subtractor is to generate the residue signal based on the feedforward path analog output and the forward path analog output.A method of generating a residual signal in a residual generating analog-to-digital converter, the method comprising: applying one or more stub filters to generate a modified analog input based on an analog input, the one or more stub filters configured to attenuate signals outside a bandwidth of interest; generating a digital input based on the modified analog input; generating a feedforward path analog output based on the digital input; and generating the residual signal based on the feedforward path analog output.

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