Sallen-Key architecture based on source follower

Abstract

A voltage source-based voltage-controlled filter for providing a flat passband gain response, comprising: a voltage source (302) configured to provide an input voltage; a first resistor (304) and a second resistor (306) connected in series, the first resistor (304) being connected to the voltage source and a first side of the second resistor (306); a gain stage (322), wherein an input side of the gain stage (322) is connected to a second side of the second resistor (306), wherein an output side of the gain stage (322) is connected back to a point between the first and second resistors (304, 306) and creates a feedback path, wherein the gain stage (322) is configured to introduce a gain into a feedback path voltage, and wherein the gain increases the feedback of the feedback path; a third resistor (324), wherein a first side of the third resistor is connected to the output side of the gain stage (322) and a second side of the third resistor (324) is connected to ground; and an output connected to the gain stage (322) and configured to provide an output voltage.

Description

AREA OF REVELATION

[0001] The present invention relates to the field of circuit architectures and, in particular, to Sallen-Key architectures. BACKGROUND

[0002] The Sallen-Key architecture is also known as the voltage control / voltage source (VCVS) architecture. It is one of the most widely used filter topologies in circuit designs. The Sallen-Key architecture is a filter architecture designed to provide a flat gain response in the passband. Source-follower Sallen-Key filters are used extensively in baseband and radio frequency (RF) architectures. A typical example is the use of a biquad source-follower Sallen-Key filter in a transmit baseband path for DAC (digital-to-analog conversion) image rejection. A source-follower Sallen-Key architecture provides lower distortion, wider bandwidth, and lower power compared to an op-amp-based buffer.

[0003] A source-follower, also known as a common-drain amplifier, is a circuit configuration used in circuit designs to create a voltage buffer or transform impedances. Generally, a source-follower circuit creates a high input impedance, a low output impedance, and a voltage buffer. A Sallen-Key architecture is a second-order active filter, and its external filter characteristics include a finite input impedance and a small output impedance. Sallen-Key filters can be designed as low-pass, band-pass, or high-pass filters. Higher filtering orders can be achieved by cascading two or more Sallen-Key circuits.

[0004] Further prior art is shown in US 8 368 461 B2, US 7 741 140 B2 and US 6 608 516 B1. SUMMARY OF REVELATION

[0005] Systems and methods for enhancing source-follower-based Sallen-Key architectures are disclosed. In particular, the present disclosure describes systems and methods for preventing the non-ideal conditions associated with source-follower-based Sallen-Key biquad filters when used in either baseband signal or radio frequency paths. The systems and methods disclosed herein represent power-efficient, cost-effective solutions that can be implemented in a reduced circuit footprint.

[0006] According to one aspect, a voltage controlled filter according to claim 1 is provided.

[0007] According to some implementations, the gain stage comprises a transistor. In some examples, the transistor is a p-channel metal-oxide-semiconductor transistor. In some implementations, the gain stage further comprises a second transistor. In some examples, the second transistor is a p-channel metal-oxide-semiconductor transistor. In other examples, the second transistor is an n-channel metal-oxide-semiconductor transistor. According to some implementations, the voltage-source-based voltage-controlled filter further comprises a third resistor connected to the transistor drain. In other implementations, the voltage-source-based voltage-controlled filter further comprises a third transistor connected to the transistor drain.

[0008] According to some implementations, the voltage-source-based voltage-controlled filter further comprises a buffer configured to buffer the feedback path voltage. In various examples, the buffer is either a source follower or a transistor. In some examples, the buffer is either a PMOS transistor or an NMOS transistor. In various examples, the buffer is an amplifier. In some examples, the buffer is either a unity-gain amplifier or an operational amplifier. According to some implementations, the gain stage operates as a buffer in the feedback path.

[0009] According to some implementations, the voltage-source-based voltage-controlled filter further comprises a first capacitor connected to the input of the gain stage and a second capacitor after the output of the gain stage. In various implementations, the first capacitor has a first capacitance and the second capacitor has a second capacitance, and a ratio of the first capacitance to the second capacitance is about one or less than one. According to some implementations, the first capacitor and the second resistor comprise a first-order filter, and an output of the first-order filter is input to the gain stage.

[0010] According to some implementations, the output is an output line from an input of the gain stage, where the output line provides the output voltage.

[0011] According to various implementations, the gain of the gain stage is about 1.5 or less than about 1.5. According to various examples, the gain of the voltage-source-based voltage-controlled filter is about 1 or less than 1.

[0012] According to another aspect, a method for providing a flat gain response in a voltage controlled voltage source filter is provided.

[0013] According to some implementations, the method further comprises providing a first resistor, the first resistor being connected to the voltage source and the second resistor.

[0014] According to some implementations, the second resistor and the first capacitor comprise a first-order filter, and the gain stage and the second capacitor are connected between the first-order filter and a connection point between the first and second resistors.

[0015] According to some implementations, providing the buffer comprises buffering a gain stage output at a source follower.

[0016] According to another aspect, a voltage source based voltage controlled filter for providing a flat passband gain response is provided according to claim 15.

[0017] According to some examples, the means for introducing the gain changes a power consumption of the filter to between about 5 mW and about 6 mW.

[0018] According to some implementations, the means for introducing gain comprises a gain stage, and the gain stage is further connected to a second capacitor. In some implementations, the means for introducing gain comprises a transistor. In some examples, the transistor is a p-channel metal-oxide-semiconductor transistor. In some examples, the means for introducing gain introduces a gain of about 1.5 or less than 1.5. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] To provide a more complete understanding of the present disclosure and the features and advantages thereof, reference is made to the following description taken in conjunction with the accompanying drawings, wherein like reference numerals represent like parts; Fig. 1 is a diagram illustrating a biquadratic Sallen-Key filter according to some embodiments of the disclosure; Fig. 2 is a diagram illustrating another biquadratic Sallen-Key filter according to some embodiments of the disclosure; Fig. 3A-3B are diagrams illustrating Sallen-Key filters with a gain stage according to some embodiments of the disclosure; Fig. 4 is a diagram illustrating a gain stage of a Sallen-Key filter according to some embodiments of the disclosure; Fig. 5 is a diagram illustrating a transmitter with a Sallen-Key filter according to some embodiments of the disclosure; and Fig. 6 is a flowchart illustrating a method for filtering a signal according to some embodiments of the disclosure. DETAILED DESCRIPTION

[0020] Systems and methods for preventing the non-ideal conditions associated with a typical source-follower-based Sallen-Key filter when used in either the baseband or radio frequency (RF) path are provided. Sallen-Key filters are used in numerous types of circuits. According to some examples, Sallen-Key filters are used in transmitters and transceivers. The source-follower-based Sallen-Key filter designs provided herein are power-efficient and cost-effective. In addition, the source-follower-based Sallen-Key filter designs provided herein are smaller than current source-follower-based Sallen-Key filter designs, reducing the area of ​​the Sallen-Key filter. In various implementations, the source-follower-based Sallen-Key filter design is a biquadratic filter (or biquad filter).

[0021] Sallen-Key filters can be designed in several ways. A common Sallen-Key architecture uses an operational amplifier. Another Sallen-Key architecture uses a common-drain amplifier, also known as a source-follower. The common-drain amplifier is used as a voltage buffer. Generally, the gate terminal of the common-drain amplifier is the input, the source is the output, and the drain is common to both the input and output. In some examples, a common-drain amplifier or source-follower amplifier is used to transform an impedance.

[0022] A biquadratic filter is a type of linear filter that implements a transfer function that is the ratio of two quadratic functions. Two types of biquadratic filters include a single-amplifier biquad filter and a two-integrator loop filter. The single-amplifier biquad topology uses feedback to produce complex poles and, in some cases, complex zeros. The feedback in the single-amplifier biquad filter is used to move the real poles of an RC circuit to produce desired or convenient filter characteristics. The two-integrator loop topology is derived from rearranging a biquadratic transfer function to reveal a state-variable filter structure. Depending on the output state used, any type of second-order filter can be implemented using a two-integrator loop topology.

[0023] Source-follower-based Sallen-Key biquad filters are used extensively in both baseband and radio-frequency architectures. A typical example is the use of the biquad Sallen-Key filter in the transmit baseband path for digital-to-analog conversion (DAC) image rejection. According to various implementations, a source-follower-based architecture achieves lower distortion and a wider bandwidth compared to an op-amp-based architecture. Furthermore, a source-follower-based architecture consumes significantly less power than an op-amp-based architecture.

[0024] Fig. 1 shows a Sallen-Key-based biquadratic filter 100 according to some embodiments of the disclosure. The filter 100 has an AC voltage source V in102, a first resistor 104, a second resistor 106, a first capacitor 108, a second capacitor 118, a source follower 110, a third resistor R out 112 and an output voltage V out 120 on. R out represents the impedance that looks into the source follower 110. The source follower 110 acts as a voltage buffer and is also referred to here as a buffer. Fig. The Sallen-Key filter shown in Figure 1 has a finite R out 112 on. R out 112 causes the filter 100 to deviate. In particular, if the filter 100 has a high bandwidth, R out 112 drastically affect the filter 100.

[0025] In some implementations, the Sallen-Key filter 100 attempts to mimic a second-order Butterworth filter. The Butterworth filter is a type of signal processing filter designed to have a frequency response that is as flat as possible in the passband. In various examples, a Butterworth filter is a maximally flat amplitude filter. According to some implementations, the Sallen-Key filter 100 mimics a second-order Butterworth filter, and the Sallen-Key filter 100 has a 2-to-1 ratio of the second capacitance C2 on the second capacitor 118 to the first capacitance C1 on the first capacitor 108.

[0026] According to various implementations, systems and methods are provided for achieving a 1-to-1 ratio of the second capacitance C2 on the second capacitor 118 to the first capacitance C1 on the first capacitor 108 and such that they have the same transfer function, which reduces the amount of area occupied by the second capacitor 118. In particular, R out 112 is determined by the output impedance of the buffer. The simplest buffer is a source follower 110.

[0027] R out 112 of Fig. 1 denotes the output impedance of the source follower 110. A problem with the filter 100 of Fig. 1 is that the output of filter 100 is taken from source follower 110. The output of source follower 110 has conjugate zeros, which greatly degrades the stopband filter rejection, as shown in equation (1): Vout=Vin1+sC2Rout+s2C1C2RRout{s2C1C2(R2+2RRout)+s(2RC1+C2Rout)+1}

[0028] In other implementations, filter 100 may instead take the output from the input of the buffer, source follower 110. The input of source follower 110 exhibits less degradation. In particular, the degradation at the input exhibits a single zero of the left half-plane, as shown in equation (2): Vout=Vin(1+sC2Rout){s2C1C2(R2+2RRout)+s(2RC1+C2Rout)+1}

[0029] As can be seen from equation (1) and equation (2), a quality factor Q is also given by R out112 of the source follower 110. Degradation of the quality factor Q is harmful when the goal is a near-ideal biquadratic transfer function in the passband, because degradation of Q also reduces the attenuation in the stopband. The parasitic null further reduces the stopband attenuation, increasing the difficulty of meeting both in-band and out-of-band emission requirements of the transmit (TX) chain for a single-band or multi-band implementation. This problem is generally worse when low resistance values ​​are used. This type of situation arises, for example, when the Sallen-Key filter is used for high frequency (RF) frequencies. This type of situation also arises, for example, in noisy environments, such as when noise is a concern to meet a desired signal-to-noise ratio (SNR) with a low signal swing through the filter.In some cases, a low signal swing can be used to reduce the distortion of a subsequent upconversion mixer in the TX baseband chain.

[0030] To solve the problem of resistance value R out from the source follower 110, conventional systems and methods focus on reducing R out by increasing the steepness (g m ) of the source follower 110 using feedback. Some techniques to increase the transconductance (g m ) using feedback, involve the use of a super source follower and / or a reverse source follower. Increasing the transconductance (g m) reduces the impedance. Such a feedback-induced super source follower or reverse source follower scheme is only viable if the common-mode voltage at the source follower's gate is high enough, and / or we have a sufficiently high voltage supply. However, in many examples, the common-mode voltage at the source follower's gate is not high and / or the voltage supply is too low. In one example, the filter 100 follows a current-steering DAC (current-steering digital-to-analog converter) that has a low common-mode output voltage to ensure linearity. In another example, the filter 100 is powered from a low voltage supply (< 1 V). Furthermore, active devices add thermal noise.In general, a noise of 1 / f is not problematic because the capacitance C2 of the second capacitor 118 is generally open at low frequencies and consequently the noise does not propagate to the output of the filter 100.

[0031] In some techniques, to overcome the problem of a high resistance value R out from the source follower 110, the current increases, thereby increasing the size of the filter 100 so that the transconductance (g m ) of the source follower 110 decreases. However, the increased current increases the power requirements of the circuit and, in addition, the size of the source follower 110 is increased, which increases the area of ​​the circuit.

[0032] Fig. Figure 2 shows a Sallen-Key-based biquadratic filter 200 using a transistor 210 instead of a source follower 110 according to some embodiments of the disclosure. In particular, the filter 200 includes an AC voltage source V in202, a first resistor 204, a second resistor 206, a first capacitor 208, a second capacitor 218, and a transistor 210. According to various implementations, the transistor 210 is a field-effect transistor. In one example, the transistor 210 is a metal-oxide-semiconductor field-effect transistor (MOSFET). According to various implementations, the Sallen-Key-based filter 200 functions similarly to the Sallen-Key-based filter 100 of Fig. 1.

[0033] According to various implementations, any R outfrom the third resistor 112, the amount of feedback, and therefore the feedback is not as effective at creating a pair of conjugate poles and yielding a second-order Butterworth filter. In general, decreasing the feedback decreases the Q of the filter. Increasing the capacitance C2 of the second capacitor 118 increases the feedback and increases Q. However, increasing the capacitance C2 of the second capacitor 118 also moves the parasitic zero to a lower frequency. Consequently, the solution of increasing the capacitance C2 of the second capacitor 118 increases the area of ​​the capacitor and thereby increases the area of ​​the filter.

[0034] Fig. 3A shows a Sallen-Key-based filter 300 according to some embodiments of the disclosure. The filter 300 in Fig. 3A has an AC voltage source V in302, a first resistor 304, a second resistor 306, a first capacitor 308, a second capacitor 318, a source follower 310, a third resistor R out 312, an output voltage V out 320, an amplification stage 322 and a fourth resistor R load 324. The gain stage 322 has a slope g m The gain stage 322 and the fourth resistor R load 324 introduce a gain A into the feedback path. In particular, the gain stage 322 is arranged between the second resistor 306 (and the first capacitor 308) and the source follower 310. The gain stage 322 amplifies the feedback. According to various examples, the gain stage 322 is a small, low-power gain stage with a gain of less than about 1.5.

[0035] With reference to Fig. 3A, adding the additional gain stage 322 increases the feedback and therefore acts to counteract the effect of the resistance value R out of the third resistor 312. Furthermore, the ratio of the second capacitance C2 of the second capacitor 318 to the first capacitance C1 of the first capacitor 308 can be reduced, i.e., a lower C2 / C1 ratio (compared to a 2-to-1 ratio), to achieve a quality factor Q of 0.707 by selecting a suitable gain A. In some implementations, by selecting a suitable gain A (= g m *R load ) the C2 / C1 ratio can be reduced to one. In some implementations, by selecting a suitable gain A (= g m *R load) the C2 / C1 ratio can be reduced to less than one. According to various features, lowering the C2 / C1 ratio, as described, results in large savings in area (i.e., lowering the C2 / C1 ratio reduces the area of ​​the circuit). Furthermore, according to some implementations, lowering the C2 / C1 ratio, as described above, also helps to move the parasitic zero to a high frequency. In some implementations, the area savings can be large for narrowband filters with a strict SNR value. In particular, to achieve a high SNR value, the resistors have lower R values ​​and therefore a higher R out / R ratio and higher capacitor values. To achieve low distortion when driving nonlinear capacitors, the resistors also have lower R values ​​and therefore a higher R out / R ratio and higher capacitor values. Other solutions to achieve a higher signal-to-noise ratio involve larger capacitors, which consume additional area on the circuit. Equation (3) shows the transfer function V out , with arbitrary m = C2 / C1 and α = R out / R ratio and where a gain A (of the g m -level) is integrated: Vout=Vin1+s(mC1 / gm){s2R2C12(2mα+m)+sRC1(2+m+mα−mA)+1}

[0036] Equation (3) returns to equation (2) with the following substitutions: mC1 = C2, A = 1 and α = R out / R. Equation (3) gives a general transfer function with arbitrary ratios and arbitrary A.

[0037] According to various features, from equation (3), a gain A of 1.5 is sufficient to compensate for a low m-ratio of about 1 and a high a-ratio of about 0.5. Using the Fig. 3A, there are therefore area savings and also power savings, since the source follower 310 is low-power without using feedback and without burning power to achieve R out of the source follower 310. Since the magnitude gain used is minimal (e.g., 1.4-1.5), the gain stage 322 can be implemented as a low-power block. The distortion from the gain stage 322 within the filter bandwidth is minimal and is reduced in the second capacitor 318 because the band C2 is generally open. The distortion requirements are met by implementing a moderate g m / I ratio is easily satisfied, and since the power utilization of gain stage 322 is small, minimal power is consumed. In various examples, the amount of power consumed by filter 300 is about 3 mW, about 4 mW, about 5 mW, or about 6 mW. For comparison, other Sallen-Key filters use more than 10 mW to achieve similar performance.

[0038] According to some implementations, filter 300 is configured with a different type of buffer instead of source follower 310. In one example, filter 300 is designed with a transistor instead of source follower 310. The transistor acts as a buffer. The transistor can be one of a PMOS transistor and an NMOS transistor. The type of transistor used in filter 300 may depend on the voltage levels of filter 300. In other examples, filter 300 is configured with an amplifier instead of source follower 310. The amplifier can be one of a unity gain amplifier and an operational amplifier. The amplifier acts as a buffer.

[0039] Fig. 3B is an alternative Sallen-Key-based filter 350 according to some embodiments of the disclosure. The filter 350 in Fig. 3B is similar to the filter 300 from Fig. 3A, but does not have a source follower 310. The filter 350 has an AC voltage source V in 302, a first resistor 304, a second resistor 306, a first capacitor 308, a second capacitor 318, an output voltage V out 320, an amplification stage 322 with a slope g m and a fourth resistor R load 324. The amplification stage 322 with the fourth resistor R load 324 introduces a gain A into the feedback path. Specifically, gain stage 322 is located between second resistor 306 (and first capacitor 308) and second capacitor 318 on the other side of gain stage 322.

[0040] In the filter 350 of Fig. 3B, the gain stage 322 operates as a buffer as well as a gain stage. According to various implementations, as long as the resistance value R loadof the fourth resistor 324 is relatively small, the gain stage 322 can operate as a buffer. In one example, the resistance value R load of the fourth resistor 324 a value similar to the resistance value R out of the third resistance 312 of Fig. 3A. In an example without the source follower 310, the gain stage 322 burns Fig. 3B more power than the 322 amplification stage of Fig. 3A to achieve the same gain with a low resistance value R load 324. According to various features, since the filter 350 of Fig. 3B has no voltage buffer (source follower 310), the resistance value R load of the fourth resistor 324 is exposed to the second capacitor 318, which can lead to a low-frequency zero. The resistance value R load of the fourth resistor 324 is reduced to prevent the low frequency null. To reduce the resistance value R loadof the fourth resistor 324, the slope g m of the gain stage 322, which increases the power consumption of the filter 350 for the same gain as the filter 300.

[0041] According to various implementations, the resistance value R of the first 304 and the second 306 resistors is small. In various examples, the resistance value of the first 304 and the second 306 resistors is less than about 25 ohms, about 25 ohms, about 28 ohms, about 29 ohms, about 30 ohms, or about 32 ohms. Small resistance values ​​reduce the thermal noise floor. It should be noted that if a source follower 310 is not used and the gain stage 322 has a higher transconductance value g m and the fourth resistor 324 has a low resistance value R load more power is consumed in the gain stage 322. In one example, the gain is about 1.5, the resistance value R loadof the fourth resistor 324 is about 50 ohms and the slope g m of the gain stage 322 is 1.5 / 50. According to an example, if the gain stage 322 has a high value g m consumes more current at the gain stage 322. If the source follower 310 is included, the resistance value R load of the fourth resistor 324 will be higher and less power will be consumed by the filter.

[0042] Fig. 4 is a diagram illustrating a gain stage in a Sallen-Key filter 400 according to some embodiments of the disclosure. In particular, Fig. 4 illustrates a first 450a and a second 450b integrated Sallen-Key filter that share a gain stage architecture with a first 422a and a second 422b transistor. According to one implementation, the first 422a and the second 422b transistors of the gain stage architecture are p-channel metal-oxide-semiconductor (PMOS) differential transistors.

[0043] According to other implementations, the first 422a and second 422b transistors of the gain stage architecture are p-channel metal-oxide-semiconductor (PMOS) transistors. According to various features, PMOS transistors have a common mode voltage output V outp and V outmwhich is close to zero. In general, PMOS transistors can handle a lower common-mode voltage. According to some implementations, buffers 410a and 410b of the first 450a and second 450b integrated Sallen-Key filters are implemented using PMOS source followers.

[0044] In some examples, the first 422a and second 422b transistors have a load R load a resistor 424a, 424b. In some examples, one or more of the resistors 424a, 424b are replaced by transistors. In some examples, one or both of the resistors 424a, 424b are replaced by PMOS or NMOS transistors. In other examples, the first 422a and second 422b transistors comprise a PMOS / NMOS load. In some examples, the first 422a and second 422b transistors of the gain stage architecture are a p-channel / n-channel metal-oxide-semiconductor differential transistor (PMOS / NMOS) pair.

[0045] In various implementations, the gain stage of the Sallen-Key filter can be implemented as one of a multi-stage or single-stage block.

[0046] An expression for ω 3dB , the corner frequency of the filter, from the above equation (3) is shown below in equation (4): ω3dB=1RC12mα+m ω 3dB can be controlled via PVT (process, voltage, temperature) by changing the capacitances C1 and C2 of the first 408a, 408b and second 418a, 418b capacitors and keeping m constant at a constant value. In some examples, ω 3dB a corner frequency of 3 dB of the filter. Similarly, an expression of Q can be obtained using equation (5): Q=2mα+m2+m+mα−mA Q can be kept constant over PVT by keeping A constant. A is obtained by g m the amplification stage to R loadis inversely proportional. In one example, the gain stage is controlled using constant g circuits m implemented. R can also out / R using a topology with constant g m for the source follower. According to various implementations, the use of a differential gain stage mitigates many common-mode problems, including second harmonic distortion (HD2).

[0047] According to some implementations, the source followers 410a and 410b are Fig. 4 is eliminated. Consequently, the buffer stage is eliminated from the Sallen-Key filter 400. Consequently, the buffer is converted into a gain stage. However, according to some examples, eliminating the buffer stage R loadin the feedback path and creates a low-frequency null in conjunction with C2. Consequently, including even a low-power buffer prevents the feedback path from dropping out of R load and also prevents the generation of a low-frequency null in conjunction with C2. In various examples, a low-power buffer 410a, 410b is included in the circuit along with a relatively high R out at the resistors 412a, 412b.

[0048] According to a different implementation, the buffer 410a, 410b can be implemented as a PMOS source follower and NMOS source follower or operational amplifier (opamp) based buffer.

[0049] According to further implementations, the output of the Sallen-Key filter can be taken at the input of the differential pair, or the output of the Sallen-Key filter can be taken at the input / output of buffer 410a, 410b, and equation (3), modified to have a conjugate zero in the numerator, is the transfer function. Alternatively, the output of the Sallen-Key filter can be taken at the input of the differential pair, or the output of the Sallen-Key filter can be taken at the input / output of buffer 410a, 410b, and equation (1) is the transfer function.

[0050] According to various implementations, the gain A can be derived as a function of m and a. For an ideal Butterworth, Q = 1 / √2. Equating this value with equation (5) leads to equation (6): A2−2βA+γ=0 where β=1+α+2m and γ=1+α2+2α+2m+4m2

[0051] In one example, m = 1 (which implies a reduction in area by 1 / 3), α = 0.5 and A = 1.5. Using these values, only a small amount of gain is required from the g m -level required. Furthermore: β2−γ>0

[0052] Equation (7) indicates that it is possible to obtain values ​​of A for arbitrary low values ​​of m and arbitrary high values ​​of α, which can only be explained by the distortion and the m -Level at higher gains the power consumed should be limited.

[0053] Fig. 5 is a diagram illustrating a transmitter 500 with a Sallen-Key filter according to some embodiments of the disclosure. The transmitter 500 includes a digital-to-analog converter (DAC) 502, a Sallen-Key filter 504, a modulator 506, an amplifier 508, an antenna 510, and a carrier signal 512. According to various implementations, an input signal is input to the preamplifier, where it is amplified and input to the filter 504. The Sallen-Key filter 504 is the Sallen-Key filter 300 described with reference to Fig. 3. Filter 504 filters the signal and then outputs it to a modulator 506. Modulator 506 combines the signal from filter 504 with a carrier signal 512. The output from modulator 506 is input to an amplifier 508, and the amplified signal from amplifier 508 is transmitted via antenna 510.

[0054] Fig.6 is a flowchart illustrating a method 600 for filtering a voltage signal with a Sallen-Key filter, according to some embodiments of the invention. In step 602, an input voltage is provided at a voltage source. The input voltage passes through a first resistor. In step 604, first-order filtering is performed on a second resistor and first capacitor, and the filtered voltage is output. In step 606, second-order filtering is performed on a gain stage and a second capacitor. The gain stage and the second capacitor are provided between the output from the first-order filtering and a junction point between the first and second resistors. The gain stage and the second capacitor are configured to provide second-order filtering with an appropriate quality factor.In step 608, a buffer is provided between the second capacitor and the gain stage. The buffer isolates and reduces the effect of the second capacitor's loading on the gain stage. In step 610, a filtered output voltage is output from the input of the gain stage. Modifications and implementations

[0055] In the discussions of the above embodiments, the capacitors, clocks, DFFs, dividers, inductors, resistors, amplifiers, switches, the digital core, transistors, and / or other components can be easily replaced, interchanged, or otherwise modified to meet specific circuitry needs. Furthermore, it should be noted that the use of complementary electronic devices, hardware, software, etc., provides an equally viable option for implementing the teachings of the present disclosure.

[0056] In an example embodiment, any number of electrical circuits in the FIGURES may be implemented on a circuit board of an associated electronic device. The circuit board may be a general-purpose printed circuit board that may hold various components of the internal electronic system of the electronic device and may further provide interconnection elements for other peripherals. In particular, the circuit board may provide the electrical connections through which the other components of the system may communicate electrically. Any suitable processors (including digital signal processors, microprocessors, support chipsets, etc.), computer-readable non-volatile memory elements, etc., may be suitably coupled to the circuit board based on particular configuration needs, processing requirements, computer designs, etc. Other components, such asExternal memory, additional sensors, audio / video display controllers, and peripheral devices may be attached to the board as plug-in cards via cables or integrated into the board itself. In various embodiments, the functionalities described herein may be implemented in emulation form as software or firmware running within one or more configurable (e.g., programmable) elements arranged in a structure that supports these functions. The software or firmware providing the emulation may be provided on a non-transitory computer-readable storage medium with instructions to enable a processor to execute these functionalities.

[0057] In another example embodiment, the electrical circuits of the FIGURES may be implemented as stand-alone modules (e.g., a device with associated components and circuitry configured to perform a particular application or function) or as plug-in modules into application-specific hardware of electronic devices. It should be noted that specific embodiments of the present disclosure may easily be included, either in part or in whole, in a system-on-a-chip (SOC) assembly. An SOC represents an integrated circuit (IC) that integrates components of a computer or other electronic system into a single chip. It may include digital, analog, mixed-signal, and often radio frequency functions: all of which may be provided on a single-chip substrate.Other embodiments may include a multi-chip module (MCM) with multiple separate ICs arranged within a single electronic assembly and configured to closely interact with each other through the electronic assembly. In various other embodiments, the clocking and filtering functionalities may be implemented in one or more silicon cores in application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and other semiconductor chips.

[0058] It is also important to note that all of the specifications, dimensions, and relationships outlined herein (e.g., the number of processors, logic operations, etc.) have been offered for example and teaching purposes only. Such information may be changed considerably without departing from the spirit of the present disclosure or the scope of the appended claims. The specifications are provided as a non-limiting example only and should be construed as such. In the foregoing description, example embodiments have been described with reference to specific processor and / or component arrangements. Various modifications and changes may be made to such embodiments without departing from the scope of the appended claims. The description and drawings are therefore to be considered in an illustrative rather than a limiting sense.

[0059] It should be noted that the activities discussed above with reference to the FIGURES are applicable to any integrated circuits that include signal processing, particularly those using sampled analog, some of which may be associated with real-time data processing. Certain embodiments may relate to multi-DSP signal processing, floating-point processing, signal / control processing, fixed-function processing, microcontroller applications, etc.

[0060] In certain contexts, the features discussed here may be applicable to medical systems, scientific instrumentation, wireless and wired communications, radar, industrial process control, audio and video equipment, power sensing, instrumentation (which may be very precise), and other digital processing-based systems.

[0061] Furthermore, certain embodiments discussed above may be provided in digital signal processing technologies for medical imaging, patient monitoring, medical instrumentation, and home healthcare. This could include lung monitors, accelerometers, heart rate monitors, pacemakers, etc. Other applications may include automotive technologies for safety systems (e.g., stability control systems, driver assistance systems, braking systems, infotainment, and interior applications of any kind). Furthermore, powertrain systems (e.g., in hybrid and electric vehicles) may utilize high-precision data conversion products in battery monitoring, control systems, reporting controls, maintenance activities, etc.

[0062] In still other example scenarios, the teachings of the present disclosure may be applicable in industrial markets that include process control systems that help drive productivity, energy efficiency, and reliability. In consumer applications, the teachings of the signal processing circuits discussed above may be used for image processing, autofocus, and image stabilization (e.g., for digital still cameras, camcorders, etc.). Other consumer applications may include audio and video processors for home theater systems, DVD recorders, and high-definition televisions. Still other consumer applications may include advanced touchscreen controllers (e.g., for any type of portable media device). Therefore, such technologies could easily be part of smartphones, tablets, security systems, PCs, gaming technologies, virtual reality, simulation training, etc.

[0063] It should be noted that with the numerous examples provided herein, an interaction may be described in terms of two, three, four, or more electrical components. However, this has been done only for clarity and example purposes. It should be recognized that the system may be assembled in any suitable manner. Along similar design alternatives, any of the illustrated components, modules, and elements of the FIGURES may be combined in various possible configurations, all of which are clearly within the broad scope of this patent specification. In certain cases, it may be easier to describe one or more of the functionalities of a given set of processes by reference only to a limited number of electrical elements.It should be recognized that the electrical circuits of the FIGURES and their teachings are readily scalable and can accommodate a large number of components as well as more complicated / sophisticated arrangements and configurations. Consequently, the examples provided should not limit the scope or preclude the broad teachings of the electrical circuits from potentially being applied to a myriad of other architectures.

[0064] It should be noted that in this specification, references to various features (e.g., elements, structures, modules, components, steps, operations, characteristics, etc.) included in "a single embodiment," an "example embodiment," "an embodiment," "another embodiment," "some embodiments," "various embodiments," "other embodiments," an "alternative embodiment," and the like are intended to mean that any such features are included in one or more embodiments of the present disclosure, but may or may not necessarily be combined in the same embodiments.

[0065] It is also important to note that the functions related to clocking in sampled analog systems represent only some of the possible clocking functions that may be performed by or in systems illustrated in the FIGURES. Some of these operations may be deleted or removed, as appropriate, or these operations may be significantly modified or changed without departing from the scope of the present disclosure. Furthermore, the timing of these operations may be significantly changed. The foregoing operations have been offered for purposes of example and discussion. Substantial flexibility is provided by embodiments described herein in that any suitable arrangements, chronologies, configurations, and timing mechanisms may be provided without departing from the teachings of the present disclosure.

[0066] Numerous other changes, substitutions, alterations, changes, and modifications may be apparent to one skilled in the art, and it is intended that the present disclosure encompass all such changes, substitutions, alterations, changes, and modifications as fall within the scope of the appended claims. To assist the United States Patent and Trademark Office (USPTO), and in addition, any readers of any patent issued on this application, in interpreting the claims appended hereto, the applicant wishes to note that the applicant: (a) does not intend any of the appended claims to rely on paragraph six (6) of 35 USCSection 112 as it exists on the filing date hereof, unless the words "means of" or "step of" are specifically used in the specific claims; and (b) no statement in the specification is intended to limit this disclosure in any manner not otherwise reflected in the appended claims. OTHER NOTES, EXAMPLES AND IMPLEMENTATIONS

[0067] It should be noted that any optional features of the device described above may also be implemented with respect to the method or process described herein, and features in the examples may be used anywhere in one or more embodiments.

[0068] In a first example, a system is provided (which may include any suitable circuitry, dividers, capacitors, resistors, inductors, ADCs, DFFs, logic gates, software, hardware, interconnects, etc.) that may be part of any type of computer, which may further include a circuit board coupled to a plurality of electronic components. The system may include means for clocking data from the digital core to a first data output of a macro using a first clock, the first clock being a macro clock; means for clocking the data from the first data output of the macro into the physical interface using a second clock, the second clock being a physical interface clock;means for clocking a first reset signal from the digital core to a reset output of the macro using the macro clock, the first reset signal output being used as the second reset signal; means for sampling the second reset signal using a third clock providing a clock rate greater than the rate of the second clock to generate a sampled reset signal; and means for resetting the second clock to a predetermined state in the physical interface in response to a transition of the sampled reset signal.

[0069] The "means for" in these cases (above) may include (but is not limited to) the use of any suitable component discussed herein, along with any suitable software, circuitry, network node, computer code, logic, algorithms, hardware, controller, interface, interconnection, bus, communication path, etc. In a second example, the system includes a memory further including machine-readable instructions that, when executed, cause the system to perform any of the activities discussed above.

[0070] Aspects of the disclosure relate to systems and methods for enhancing source-follower-based Sallen-Key architectures, particularly to systems and methods for preventing the non-ideal conditions associated with source-follower-based Sallen-Key biquad filters when used in either baseband signal or radio frequency paths. The systems and methods disclosed herein represent power-efficient, cost-effective solutions that can be implemented in a reduced circuit footprint.

Claims

[1] A voltage-source-based voltage-controlled filter for providing a flat passband gain response, comprising: a voltage source (302) configured to provide an input voltage; a first resistor (304) and a second resistor (306) connected in series, the first resistor (304) being connected to the voltage source and a first side of the second resistor (306); a gain stage (322), wherein an input side of the gain stage (322) is connected to a second side of the second resistor (306), wherein an output side of the gain stage (322) is connected back to a point between the first and second resistors (304, 306) and creates a feedback path, wherein the gain stage (322) is configured to introduce a gain into a feedback path voltage, and wherein the gain increases the feedback of the feedback path; a third resistor (324), wherein a first side of the third resistor is connected to the output side of the gain stage (322) and a second side of the third resistor (324) is connected to ground; and an output connected to the gain stage (322) and configured to provide an output voltage. [2] The filter of claim 1, wherein the gain stage (322) comprises a transistor. [3] The filter of claim 2, wherein the transistor is a p-channel metal oxide semiconductor transistor. [4] The filter of claim 2 or 3, further comprising a second transistor, wherein the second transistor is one of a p-channel metal oxide semiconductor transistor and an n-channel metal oxide semiconductor transistor. [5] A filter according to any one of claims 2 to 4, wherein the first side of the third resistor (322) is connected to the transistor drain. [6] The filter of any one of claims 1 to 5, further comprising a buffer configured to buffer the feedback path voltage, the buffer being one of a source follower and a transistor. [7] Filter according to one of claims 1 to 6, wherein the gain stage (322) operates as a buffer in the feedback path. [8] Filter according to one of claims 1 to 7, further comprising a first capacitor (308) connected to the input of the amplification stage (322) and a second capacitor (318) after the output of the amplification stage, wherein the first capacitor (308) has a first capacitance, wherein the second capacitor (318) has a second capacitance, and wherein a ratio of the first capacitance to the second capacitance is about one or less than one. [9] A filter according to any one of claims 1 to 8, wherein the output is an output line from an input of the gain stage (322), the output line providing the output voltage. [10] A filter according to any one of claims 1 to 9, wherein the gain of the amplification stage (322) is about 1.5 or less than 1.

5. [11] A method for providing a flat gain response in a voltage-controlled voltage source filter, comprising: Providing (602) an input voltage at a voltage source; Filtering (604) the input voltage at a second resistor and a first capacitor and outputting a filtered signal; Providing (606) a second order filtering of the filtered signal at an amplification stage and a second capacitor, wherein an output side of the amplification stage is connected to a third resistor, and wherein the amplification stage increases the gain of the filtered signal; Providing (608) a buffer between the amplification stage and the second capacitor; and Outputting (610) a filtered output voltage at an input side of the gain stage. [12] The method of claim 11, further comprising providing a first resistor, the first resistor being connected to the voltage source and the second resistor. [13] The method of claim 12, wherein the second resistor and the first capacitor comprise a first order filter, and wherein the gain stage and the second capacitor are connected between the first order filter and a connection point between the first and second resistors. [14] The method of any one of claims 11 to 13, wherein providing the buffer comprises buffering a gain stage output with a source follower. [15] A voltage-source-based voltage-controlled filter for providing a flat passband gain response, comprising: a voltage source (302) configured to provide an input voltage; a first resistor (304) connected to the voltage source (302); a first-order filter having a second resistor (306) and a first capacitor (308), the second resistor (306) being connected to the first resistor (304), and the first-order filter outputting a filtered signal; means for introducing gain into the filtered signal; a third resistor (324), a first side of the third resistor (324) being connected to an output side of the means for introducing a gain and a second side of the third resistor (324) being connected to ground; and an output line from an input side of the means for introducing the gain, the output line being adapted to provide a filtered output voltage. [16] The filter of claim 15, wherein a power consumption of the filter is between about 5 mW and about 6 mW. [17] A filter according to claim 15 or 16, wherein the means for introducing the gain comprises a gain stage (322) and the gain stage (322) is further connected to a second capacitor (318). [18] A filter according to any one of claims 15 to 17, wherein the means for introducing the gain comprises a transistor. [19] The filter of claim 18, wherein the transistor is a p-channel metal oxide semiconductor transistor. [20] A filter according to any one of claims 15 to 19, wherein the means for introducing the gain introduces a gain of about 1.5 or less than 1.5.

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