semiconductor device

Abstract

Semiconductor device comprising: an insulating substrate (3) having a circuit structure (6, 7, 8); a semiconductor chip (10) mounted on the insulating substrate (3) and connected to the circuit structure (6, 7, 8); and an overcurrent interruption mechanism (15) constructed with a material the same as a material of the circuit structure (6, 7, 8), which is connected in series with the circuit structure (6, 7, 8), wherein, when an overcurrent flows, the overcurrent interruption mechanism (15) melts and is severed, wherein the overcurrent interruption mechanism (15) comprises a first conductor part (22), a second conductor part (23) and a narrowed part (24) connected between the first conductor part (22) and the second conductor part (23), wherein the first and second conductor parts (22, 23) form parallel plates which are upright with respect to an upper surface of the insulating substrate (3), a lower side of the parallel plates being connected to the circuit structure (6, 7, 8) and the narrowed part (24) being located on an upper side of the parallel plates, and wherein an insulator (26) is inserted between the first and second conductor parts (22, 23) forming the parallel plates.

Description

Background of the inventionArea

[0001] The present disclosure relates to a semiconductor device. background

[0002] It has been proposed to provide a protection mechanism for protecting a semiconductor chip or the like from melting and being cut off when an overcurrent flows, for example, in a semiconductor device to be used for controlling a large current (see, for example, JP 2007 - 123 644A).

[0003] DE 10 2020 200 196 A1 describes a semiconductor device comprising a second bonding material provided on an upper surface of an insulating substrate, a third bonding material provided on an upper surface of a semiconductor element, a through-hole extending from a first circuit pattern via a core material to the second circuit pattern, a conductive film provided on an inner wall of the through-hole, and a thermally insulating material provided within the through-hole and surrounded by the conductive film in plan view.

[0004] JP 2008-235502 A describes a resin-sealed semiconductor device comprising a semiconductor element, a connecting agent that electrically connects the semiconductor element to an external terminal, and a sealing resin formed to enclose the semiconductor element and the connecting agent therein, and provided with an opening. A portion of the connecting agent is exposed from the resin sealing resin in the opening.

[0005] DE 10 2020 208 911 A1 describes a power conversion device comprising: a circuit board; a semiconductor element mounted on the circuit board; a snubber capacitor; a snubber circuit line connecting the snubber capacitor in parallel to the semiconductor element; and the protection portion formed at a part of the snubber circuit line.

[0006] JP 2007 - 123 644 A describes a power semiconductor device comprising a semiconductor device for performing power conversion from direct current to alternating current or from alternating current to direct current, a smoothing capacitor for smoothing a direct current power source output, and a control circuit for controlling the power conversion of the semiconductor device. Summary

[0007] In the related art, a material of the protection mechanism is nickel or aluminum, which is different from the material of a circuit structure made of copper. Thus, there is a possibility that the different materials deform differently during a temperature cycle during circuit driving. This causes a problem of reliability deterioration due to wear of a solder connection part of the protection mechanism and the circuit structure.

[0008] The present disclosure has been made to solve the above-described problem, and an object of the present disclosure is to provide a semiconductor device capable of ensuring reliability.

[0009] This problem is solved by the features of the independent claim. The subclaims contain advantageous embodiments of the invention.

[0010] A semiconductor device according to the present disclosure includes: an insulating substrate having a circuit pattern; a semiconductor chip mounted on the insulating substrate and connected to the circuit pattern; and an overcurrent interruption mechanism constructed with a same material as a material of the circuit pattern, which is connected in series to the circuit pattern, wherein when an overcurrent flows, the overcurrent interruption mechanism melts and is cut off.

[0011] In the present disclosure, the overcurrent interruption mechanism is constructed with the same material as the material of the circuit structure. Thus, both components deform similarly in a temperature cycle during device driving, and connected parts of the overcurrent interruption mechanism and the circuit structure do not wear out, thus ensuring reliability.

[0012] Other and further objects, features and advantages of the invention will become more fully apparent from the following description. Brief description of the drawings Fig. 1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment. Fig. 2 is a perspective view illustrating the overcurrent interruption mechanism according to the first embodiment. Fig. 3 is a perspective view illustrating a manufacturing process of the overcurrent interruption mechanism according to the first embodiment. Fig. 4 is a perspective view illustrating an overcurrent interruption mechanism according to a second embodiment. Fig. 5 is a cross-sectional view illustrating the overcurrent interruption mechanism according to the second embodiment. Fig. 6 is a perspective view illustrating an overcurrent interruption mechanism according to a third embodiment of the present invention. Fig. 7 is a cross-sectional view illustrating the overcurrent interruption mechanism according to the third embodiment of the claim. Fig. 8 is a perspective view illustrating an overcurrent interruption mechanism according to a fourth embodiment of the present invention. Fig. 9 is a cross-sectional view illustrating the overcurrent interruption mechanism according to the fourth embodiment of the claim. Fig. 10 is a perspective view illustrating a modified example of the overcurrent interruption mechanism according to the fourth embodiment. Fig. 11 is a cross-sectional view illustrating the modified example of the overcurrent interruption mechanism according to the fourth embodiment. Fig. 12 is a perspective view illustrating an overcurrent interruption mechanism according to a fifth embodiment of the present invention. Fig. 13 is a cross-sectional view illustrating the overcurrent interruption mechanism according to the fifth embodiment of the claim. Description of embodiments

[0013] A semiconductor device according to embodiments of the present disclosure will be described with reference to the drawings. The same components are denoted by the same reference numerals, and repeated descriptions thereof may be omitted. First embodiment

[0014] Fig. 1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment. A package 2 is bonded to a metal base plate 1. An insulating substrate 3 is provided on the base plate 1 inside the package 2. The insulating substrate 3 includes an insulating plate 4 formed of ceramics or the like, a metal pattern 5 on a lower surface of the insulating plate 4, and circuit patterns 6, 7, and 8 on an upper surface of the insulating plate 4. The metal pattern 5 is bonded to the base plate 1 with solder 9. The circuit patterns 6, 7, and 8 are formed of copper such as C1020 and C1921.

[0015] A semiconductor chip 10 is mounted on the insulating substrate 3. A lower electrode of the semiconductor chip 10 is connected to the circuit pattern 6 with a solder 11. An upper electrode of the semiconductor chip 10 is connected to an electrode 12 of the package 2 by a wire 13.

[0016] One end of the circuit structure 6 is connected to one end of the circuit structure 7 with a wire 14. One end of an overcurrent interruption mechanism 15 is connected to the other end of the circuit structure 7 with a solder 16, and the other end of the overcurrent interruption mechanism 15 is connected to one end of the circuit structure 8 with a solder 17. In this way, the overcurrent interruption mechanism 15 is connected in series to the circuit structures 6, 7, and 8. The overcurrent interruption mechanism 15 is constructed of the same material as the material of the circuit structures 6, 7, and 8.

[0017] The other end of the circuit structure 8 is connected to an electrode 18 of the housing 2 by a wire 19. A sealing material 20 fills the interior of the housing 2 and encloses the insulating substrate 3, the semiconductor chip 10, and the like. An upper part of the housing 2 is covered with a lid 21.

[0018] Fig. 2 is a perspective view illustrating the overcurrent interruption mechanism according to the first embodiment. The overcurrent interruption mechanism 15 includes a first conductor portion 22, a second conductor portion 23, and a narrowed portion 24 connected between the first conductor portion 22 and the second conductor portion 23. The first conductor portion 22 is connected to the circuit pattern 7 with a solder 16. The second conductor portion 23 is connected to the circuit pattern 8 with a solder 17.

[0019] When an overcurrent flows, the constricted portion 24 of the overcurrent interrupting mechanism 15 melts and is severed. This prevents the overcurrent from further flowing to the circuit structures 6, 7, and 8 and can minimize the impact of a semiconductor device failure on an environment. For example, the overcurrent interrupting mechanism 15 interrupts an overcurrent equal to or higher than 50 kA in an object whose rated current value, which is a current value during normal operation, is equivalent to 200 A.

[0020] Cross-sectional areas S of the first and second conductor portions 22 and 23 are larger than a cross-sectional area S' of the constricted portion 24 (S>S'). Lengths L of the first and second conductor portions 22 and 23 are longer than a length L' of the constricted portion 24 (L>L'). This can prevent a temperature rise of the constricted portion 24 during normal operation, such as in motor control. Furthermore, the overcurrent interruption mechanism 15 can be inserted without raising an electrode temperature. Furthermore, by shortening the length L' of the constricted portion 24, it is possible to prevent deterioration of a circuit inductance and prevent a temperature rise of the constricted portion 24 during normal operation.

[0021] Furthermore, thicknesses of the first and second conductor portions 22 and 23 are preferably equal to or greater than 0.5 mm. This can realize the overcurrent interruption mechanism 15 without affecting an excitation capability during normal operation.

[0022] Fig. 3 is a perspective view illustrating a manufacturing process of the overcurrent interruption mechanism according to the first embodiment. The narrowed part 24 and the first and second conductor parts 22 and 23 of the overcurrent interruption mechanism 15 are formed by performing machining on a conductor 25. Thus, the overcurrent interruption mechanism 15 is constituted by one conductor, and thus the overcurrent interruption mechanism 15 does not have a part where different types are connected. As a result, there is no wear on a connected part within the overcurrent interruption mechanism 15, so long-term reliability is improved.

[0023] As described above, in the present embodiment, the overcurrent interrupting mechanism 15 is constructed with the same material as the material of the circuit patterns 6, 7, and 8. Thus, both components deform in a similar manner in a temperature cycle in device driving, and connected parts of the overcurrent interrupting mechanism 15 and the circuit patterns 7 and 8 do not wear out, so that reliability can be ensured.

[0024] Furthermore, the overcurrent interruption mechanism 15 is connected to the circuit patterns 7 and 8. Thus, heat due to self-heating of the overcurrent interruption mechanism 15 on the base plate 1 side is dissipated through the circuit patterns 7 and 8. This can prevent a temperature rise during normal operation. Second embodiment

[0025] Fig. 4 is a perspective view illustrating an overcurrent interruption mechanism according to a second embodiment. Fig. 5 is a cross-sectional view illustrating the overcurrent interrupting mechanism according to the second embodiment. The first and second conductor parts 22 and 23 of the overcurrent interrupting mechanism 15 form parallel plates that stand upright with respect to an upper surface of the insulating substrate 3. This can ensure a distance from the insulating substrate 3 to the constricted part 24. Thus, when an overcurrent flows and the constricted part 24 breaks, an influence can be easily given to an outside of the device, so that it is possible to prevent breakage of the insulating substrate 3. Furthermore, insulation of the semiconductor device can be ensured, so that it is possible to prevent current from leaking into an inside of a device to which the semiconductor device is to be mounted.Furthermore, the overcurrent interruption mechanism 15 has a parallel plate shape, so it is possible to prevent an increase in inductance of the overcurrent interruption mechanism 15. Other configurations and effects are similar to those of the first embodiment. Claimed third embodiment

[0026] Fig. 6 is a perspective view illustrating an overcurrent interruption mechanism according to a third embodiment of the present invention. Fig. 7 is a cross-sectional view illustrating the overcurrent interrupting mechanism according to the third embodiment of the present invention. In the second embodiment, in a case where the first and second conductor parts 22 and 23 constituting the parallel plates contact each other, a current does not flow through the narrowed part 24, and an interrupting function is impaired. Thus, in the present embodiment of the present invention, an insulator 26 is interposed between the first and second conductor parts 22 and 23 constituting the parallel plates. This can prevent an interrupting function from being impaired as a result of the first and second conductor parts 22 and 23 constituting the parallel plates contacting each other. Other configurations and effects are similar to those of the second embodiment. Claimed fourth embodiment

[0027] Fig. 8 is a perspective view illustrating an overcurrent interruption mechanism according to a fourth embodiment of the present invention. Fig. 9 is a cross-sectional view illustrating the overcurrent interruption mechanism according to the fourth embodiment of the present invention. A housing 27 is provided around the overcurrent interruption mechanism 15. The constricted portion 24 is disposed in a cavity in the housing 27. At least one surface of the constricted portion 24 is exposed by a solid sealing material 20, such as an epoxy resin. This can provide a stable interruption mechanism.

[0028] However, if the constricted portion 24 is exposed to an outermost peripheral part of the device, there is a concern that peripheral parts may be damaged upon power interruption. Thus, in the present embodiment, the constricted portion 24 exposed by the sealing material 20 is covered with the lid 21. This can safely interrupt current without damaging peripheral parts upon power interruption.

[0029] Note that the constricted portion 24 may be exposed from the sealing material 20 by covering the constricted portion 24 with a mask that can be removed from a mold after a resin is cured, instead of providing a housing 27. Alternatively, a height of the sealing material 20 may be designed to be equal to or lower than the constricted portion 24.

[0030] Fig. 10 is a perspective view illustrating a modified example of the overcurrent interruption mechanism according to the fourth embodiment. Fig. 11 is a cross-sectional view illustrating the modified example of the overcurrent interrupting mechanism according to the fourth embodiment. The first and second conductor portions 22 and 23 do not form parallel plates, but have a structure similar to that of the first embodiment. In this case, too, the above-described effect can be obtained by exposing the constricted portion 24 from the sealing material 20 and covering it with the lid 21. Fifth embodiment according to the claim

[0031] Fig. 12 is a perspective view illustrating an overcurrent interruption mechanism according to a fifth embodiment of the present invention. Fig.13 is a cross-sectional view illustrating the overcurrent interruption mechanism according to the fifth embodiment of the present invention. The constricted portion 24 exposed from the sealing material 20 is covered with an insulating material 28 formed of a material different from the sealing material 20. The insulating material 28 can prevent peripheral parts from being damaged upon current interruption. In this case, the lid 21 need not be provided at the upper part of the device.

[0032] Using a material that has an effect of suppressing discharge upon interruption, such as the insulating material 28, can improve the interruption effect. Furthermore, using a material that has low viscosity and high fluidity, such as the insulating material 28, can improve the ease of assembly of the semiconductor device. The insulating material 28 is, for example, silicon gel and may be a low-viscosity epoxy material.

[0033] The semiconductor chip 10 is not limited to a chip formed of silicon, but may instead be formed of a wide-bandgap semiconductor having a bandgap wider than that of silicon. The wide-bandgap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor has high withstand voltage and high allowable current density and can thus be downsized. The use of such a downsized semiconductor chip enables downsizing and high integration of the semiconductor device in which the semiconductor chip is incorporated.Furthermore, since the semiconductor chip has high heat resistance, a radiating fin of a heat sink can be reduced in size, and a water-cooled part can be cooled with air, further reducing the size of the semiconductor device. Furthermore, since the semiconductor chip has low energy loss and high efficiency, a highly efficient semiconductor device can be realized.

Claims

[1] A semiconductor device comprising: an insulating substrate (3) having a circuit structure (6, 7, 8); a semiconductor chip (10) mounted on the insulating substrate (3) and connected to the circuit structure (6, 7, 8); and an overcurrent interruption mechanism (15) constructed with a material identical to that of the circuit structure (6, 7, 8) and connected in series with the circuit structure (6, 7, 8), wherein, when an overcurrent flows, the overcurrent interruption mechanism (15) melts and is severed, wherein the overcurrent interruption mechanism (15) comprises a first conductor part (22), a second conductor part (23) and a narrowed part (24) connected between the first conductor part (22) and the second conductor part (23), wherein the first and second conductor parts (22, 23) form parallel plates which are upright with respect to an upper surface of the insulating substrate (3), wherein a lower side of the parallel plates is connected to the circuit structure (6, 7, 8) and the narrowed part (24) is located on an upper side of the parallel plates, and wherein an insulator (26) is inserted between the first and second conductor parts (22, 23) forming the parallel plates. [2] A semiconductor device according to claim 1, wherein cross-sectional areas of the first and second conductor parts (22, 23) are larger than a cross-sectional area of the narrowed part (24). [3] A semiconductor device according to claim 1 or 2, wherein lengths of the first and second conductor parts (22, 23) are longer than a length of the narrowed part (24). [4] A semiconductor device according to any one of claims 1 to 3, wherein thicknesses of the first and second conductor parts (22, 23) are equal to or greater than 0.5 mm. [5] A semiconductor device according to any one of claims 1 to 4, wherein the overcurrent interruption mechanism (15) is constructed of a conductor. [6] A semiconductor device according to any one of claims 1 to 5, further comprising: a sealing material (20) enclosing the insulating substrate (3) and the semiconductor chip (10); and a lid (21), wherein at least one surface of the constricted part (24) is exposed by the sealing material (20) and covered with the lid (21). [7] A semiconductor device according to any one of claims 1 to 5, further comprising a sealing material (20) enclosing the insulating substrate (3) and the semiconductor chip (10), wherein at least one surface of the constricted part (24) is exposed from the sealing material (20) and covered with an insulating material (28) formed of a material different from the sealing material (20). [8] A semiconductor device according to any one of claims 1 to 7, wherein the semiconductor chip (10) is formed of a wide band gap semiconductor.

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