Semiconductor device with an electrical component integrated into a printed circuit board

The semiconductor device improves thermal conductivity and mechanical stability by using dual insulated internal conductor patterns with thermal conductivity paths, addressing non-uniform deformation issues in existing devices.

DE102022105835B4Active Publication Date: 2025-11-27DENSO CORP +2
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Patent Information

Application Number
DE102022105835
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-03-30
Filing Date
2022-03-14
Publication Date
2025-11-27
Estimated Expiration
2042-03-14

AI Technical Summary

Technical Problem

Existing semiconductor devices face issues with non-uniform thermal deformation due to varying mechanical properties of substrate layers, leading to warping or waviness, as insulating layers hinder effective heat conduction between internal and surface conductor patterns.

Method used

The semiconductor device incorporates dual internal conductor patterns insulated from each other but within the same circuit layer, connected via thermal conductivity paths, allowing efficient heat transfer while maintaining mechanical integrity.

Benefits of technology

This configuration enhances thermal conductivity and mechanical stability of the substrate, preventing non-uniform deformation and ensuring effective heat dissipation.

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Abstract

Semiconductor device (10, 110, 210) comprising: a substrate main body (12) having a first surface (12a) and a second surface (12); an electrical component (21, 22, 31, 32) which is arranged in the substrate main body (12); a surface conductor pattern (70) arranged in a first circuit layer (L6) which is arranged on the second surface (12b); a first internal conductor pattern (68) and a second internal conductor pattern (69) arranged in a second circuit layer (L5) located between the electrical component (21, 22, 31, 32) and the second surface (12b), and which are insulated from each other; at least one first heat conductor passage (77) extending from the electrical component (21, 22, 31, 32) to the first internal conductor pattern (68); and at least one second heat conductor passage (78a, 78b) extending from the surface conductor pattern (70) to the second internal conductor pattern (69), wherein the first internal conductor pattern (68) is isolated from the surface conductor pattern (70) which extends over most of the second surface (12b) of the first circuit layer (L6).
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Description

[0001] The present invention relates to a semiconductor device comprising an electrical component embedded in a printed circuit board.

[0002] JP 2020-9 879 A discloses a semiconductor device. This semiconductor device comprises a substrate body (as the core base material) and an electrical component arranged within the substrate body. A surface conductor pattern is arranged on the lower surface of the substrate body, and an internal conductor pattern is arranged between the electrical component and a second surface. The electrical component and the first internal conductor pattern are connected via several heat-conducting passages. According to this configuration, heat from the electrical component is transferred via the heat-conducting passages to the internal conductor pattern, further transferred from the internal conductor pattern to the surface conductor pattern, and radiated or dissipated to the outside of the substrate body.

[0003] US 2014 / 0 211 437 A1, DE 10 2011 006 489 A1, US 2020 / 0 161 206 A1 and US 2019 / 0 096 791 A1 each disclose a semiconductor device comprising: a substrate body having a first surface and a second surface; an electrical component arranged in the substrate body; a surface conductor pattern arranged in a first circuit layer located on the second surface; a first internal conductor pattern and a second internal conductor pattern arranged in a second circuit layer located between the electrical component and the second surface, and insulated from each other; at least one first thermal conductivity passage extending from the electrical component to the first internal conductor pattern; and at least one second thermal conductivity passage extending from the surface conductor pattern to the second internal conductor pattern.

[0004] In the semiconductor device described above, JP 2020-9 879 A, ​​an insulating layer made of the substrate body material is positioned between the internal conductor pattern and the surface conductor pattern. This configuration provides electrical insulation between the internal and surface conductor patterns. However, it presents the problem that the insulating layer could suppress heat conduction from the internal to the surface conductor pattern. While several heat conduction pathways are present in the layer located on one side of the internal conductor pattern, no such pathways are found in the insulating layer located on the other side. Consequently, the mechanical properties of the two layers adjacent to the internal conductor pattern differ significantly.If the temperature of the substrate body increases, the problem can arise that non-uniform thermal deformation of the substrate body occurs, such as warping or waviness of the substrate body.

[0005] In this respect, it is an object of the present invention to provide a technique capable of improving the thermal conductivity and mechanical properties of the substrate body while maintaining the insulating properties of the electrical component in the semiconductor device, which includes an electrical component embedded in the printed circuit board. This object is achieved by a semiconductor device having the features of independent claim 1. The dependent claims are directed to advantageous embodiments of the invention.

[0006] The semiconductor device of the present invention comprises: a substrate body having a first surface and a second surface; an electrical component arranged in the substrate body; a surface conductor pattern arranged in a circuit layer located on the second surface; a first internal conductor pattern and a second internal conductor pattern arranged in a circuit layer located between the electrical component and the second surface and insulated from each other; at least one first thermal conductivity passage extending from the electrical component to the first internal conductor pattern, and at least one second thermal conductivity passage extending from the surface conductor pattern to the second internal conductor pattern.

[0007] In the configuration described above, the circuit layer located between the electrical component and the second surface is equipped with a first internal conductor pattern and a second internal conductor pattern, which are insulated from each other. The first internal conductor pattern is connected to the electrical component via at least one first thermal conductivity path. The second internal conductor pattern is connected to the surface conductor pattern on the second surface via at least one second thermal conductivity path. As a result, heat generated in the electrical component is transferred via the first thermal conductivity path to the first internal conductor pattern and then to the second internal conductor pattern. The heat from the second internal conductor pattern is then transferred via the second thermal conductivity path to the surface conductor pattern and radiated or dissipated from the surface conductor pattern to the outside of the substrate body.Although the first and second internal conductor patterns are insulated from each other, they are located in the same circuit layer, resulting in relatively high heat transfer between them. Since the first and second thermal conductivity paths are located in the two layers adjacent to the circuit layer, the mechanical properties of the two layers do not differ significantly. As described above, it is possible to improve the thermal conductivity and mechanical properties of the main substrate while maintaining the insulating properties of the electrical component.

[0008] According to one embodiment of the present invention, the at least one second heat conductor passage can comprise an internal heat conductor passage 78a, which is arranged in a region where the electrical component and the second surface face each other, and an external heat conductor passage 78b, which is arranged on an outside of the facing region. According to such a configuration, the second heat conductor passage can effectively be arranged in a region where the heat generated in the electrical component flows through and is distributed across the substrate body.

[0009] According to one embodiment of the present invention, the semiconductor device can include a third internal conductor pattern 66, which is arranged in a circuit layer L4 located in the same depth region as the electrical component and electrically insulated from the electrical component, and which includes at least one third passage 79 extending from the second conductor pattern to the third internal conductor pattern. According to such a configuration, the heat generated by the electrical component can be conducted from multiple directions relative to the electrical component to the second surface of the substrate body.

[0010] According to one embodiment of the present invention, the main substrate body can comprise a first layer 13, consisting of a first material, and a second layer 15, consisting of a second material having a higher thermal conductivity than the first material. In this case, the second layer can be arranged between the electrical component and the second surface. According to such a configuration, the heat generated by the electrical component can be distributed by the second layer over a wide area of ​​the main substrate body.

[0011] In the embodiment described above, the second layer can be exposed on the second surface. According to such a configuration, the heat distributed within the main substrate body by the second layer can be radiated or dissipated from the second surface of the main substrate body to the outside of the main substrate body.

[0012] In the embodiment described above, the second material can comprise at least one selected material from the group consisting of paper, woven glass fiber fabric, nonwoven glass fiber fabric, woven glass fabric, and glass fiber, and at least one selected material from the group consisting of phenolic resin, epoxy resin, polyimide resin, and Teflon (registered trademark). According to such a configuration, the thermal conductivity of the second layer can be effectively improved while maintaining the original properties required for the main substrate components.

[0013] According to one embodiment of the present invention, the semiconductor device can also include an electrical surface component arranged on the first surface that controls the operation of the electrical component. According to the configuration of the present invention, most of the heat generated by the electrical component can be directed to the second surface of the substrate body, and a temperature rise on the first surface of the substrate body can be prevented. By arranging the electrical surface component on the first surface, it is possible to prevent a temperature rise of the electrical surface component.

[0014] According to one embodiment, the material forming the first heat conductor duct can be the same as, or identical to, the material forming the first internal conductor pattern. According to such a configuration, for example, in the semiconductor device manufacturing process, the first heat conductor duct and the first internal conductor pattern can be formed simultaneously or continuously.

[0015] According to one embodiment, the material forming the second heat conductor path can be the same as, or identical to, the material forming the surface conductor pattern. In such a configuration, for example, the second heat conductor path and the surface conductor pattern can be formed simultaneously or continuously during the manufacturing process of the semiconductor device.

[0016] According to one embodiment of the present invention, the electrical component can include a power semiconductor device 21, 22 and a heat sink plate 31, 32 to which the power semiconductor element is connected. Since a relatively large current flows in a power semiconductor element, the amount of heat generated is also relatively large. The configurations described here can be used suitablely for semiconductor devices containing such power semiconductor devices.

[0017] The above and further problems, features and advantages of the present invention will become clear with reference to the following detailed description and the accompanying drawings. These show: Fig. 1 a top view showing a semiconductor device according to the first embodiment; Fig. 2 a circuit diagram showing a circuit structure of the semiconductor device of the first embodiment; Fig. 3 a cross-sectional view along line III-III of the Fig. 1, where, for better illustration, a slanted dash of the substrate main body has been omitted and some of the overlapping configurations have been shown by deliberately changing their positions; Fig. 4 a cross-sectional view showing the configuration of the semiconductor device according to the second embodiment; and Fig. 5 a cross-sectional view showing the configuration of the semiconductor device according to the third embodiment. Design 1

[0018] The semiconductor device 10 of the first embodiment is described with reference to the drawings. The semiconductor device 10 of this embodiment is used, for example, in a power control unit of an electric vehicle and can form part of a power conversion circuit for converting power between a power source and a traction motor or drive motor. The electric vehicle of the present invention, in a broad sense, means a vehicle that has an electric motor for driving wheels and can be, for example, an electric vehicle that is charged by an external electrical power source, a hybrid vehicle that has an internal combustion engine in addition to the electric motor, a fuel cell vehicle that has a fuel cell as a power source, and the like.However, the use of the semiconductor device 10 according to the present invention is not limited to an electric vehicle, but can also be used for a variety of other electrical devices.

[0019] As it is in the Fig. As shown in Figures 1 to 3, the semiconductor device 10 comprises a substrate body 12, two semiconductor elements 21 and 22, and two heat sink plates 31 and 32. The substrate body 12 has a card-like or plate-like shape. It has an upper surface 12a and a lower surface 12b. The lower surface 12b is located on a side opposite the upper surface 12a. The substrate body 12 consists of an insulator, for example, epoxy resin or another resin material. The substrate body 12 contains an upper layer 14, an intermediate layer 16, and a lower layer 18 in that order from the upper surface 12a to the lower surface 12b. The upper layer 14 is a layer that contains the upper surface 12a of the substrate body 12. The lower layer 18 is a layer containing the lower surface 12b of the substrate main body 12.The intermediate layer 16 is a layer that is arranged between the upper layer 14 and the lower layer 18.

[0020] The X and Y directions in the drawings are directions parallel to the upper surface 12a and the lower surface 12b of the substrate 12 and are perpendicular to each other. The Z direction is a direction perpendicular to the upper surface 12a and the lower surface 12b of the main substrate body 12 and is perpendicular to both the X and Y directions. That is, the aforementioned upper layer 14, the intermediate layer 16, and the lower layer 18 are stacked along the Z direction.

[0021] The semiconductor elements 21 and 22 and the heat sink plates 31 and 32 are electrical components, each forming part of the electrical circuit in the semiconductor device 10. The two semiconductor elements 21 and 22 are arranged in the intermediate layer 16 of the substrate body 12 together with the two heat sink plates 31 and 32. Each semiconductor element 21 and 22 uses a power semiconductor element, in particular a switching element. This switching element is, for example, an IGBT (insulated-gate bipolar transistor) or a MOSFET (metal-oxide-semiconductor field-effect transistor).

[0022] The semiconductor elements 21 and 22 each have electrodes 21a, 22a of the upper surface and electrodes 21b, 22b of the lower surface and each conduct a current or block the electric current between the corresponding electrodes 21a, 22a of the upper surface and the corresponding electrodes 21b, 22b of the lower surface.

[0023] According to one example, the two semiconductor elements 21, 22 comprise a first semiconductor element 21 and a second semiconductor element 22. The first semiconductor element 21 and the second semiconductor element 22 are electrically connected in series within the substrate body 12. As described above, the two semiconductor elements 21 and 22 are switching elements such as IGBTs or MOSFETs. The semiconductor device 10 of this embodiment can, for example, form part of an inverter circuit or a DC-DC converter circuit. The number of semiconductor elements 21 and 22 is not limited to two. Furthermore, in addition to the semiconductor elements 21 and 22 and the heat sink plates 31 and 32, the semiconductor device 10 can contain at least one other electrical component.

[0024] The two heat sink plates 31 and 32 each have a plate-like shape and are arranged parallel to the main substrate body 12. Each heat sink plate 31, 32 consists of a conductor such as copper or another metal. As an example, the two heat sink plates 31 and 32 are arranged or aligned along the X-direction. The two heat sink plates 31 and 32 comprise a first heat sink plate 31 and a second heat sink plate 32. The first semiconductor element 21 is arranged on the first heat sink plate 31, and the electrode 21b of the lower surface of the first semiconductor element 21 is electrically connected to the first heat sink plate 31. The first semiconductor element 21 and the first heat sink plate 31 are integrally connected and can be considered a single electrical component.Similarly, the second semiconductor element 22 is arranged on the second heat sink plate 32, and the electrode 22b of the lower surface of the second semiconductor element 22 is electrically connected to the second heat sink plate 32. The second semiconductor element 22 and the second heat sink plate 32 are also integrally connected and can be considered a single electrical component.

[0025] The semiconductor device 10 includes several terminals 40, 42, and 44. These terminals 40, 42, and 44 are external connection points for connecting to an external circuit. The terminals 40, 42, and 44 consist of a conductor such as copper or another metal. For example, the terminals 40, 42, and 44 include a P-terminal 40, an N-terminal 42, and an O-terminal 44. The terminals 40, 42, and 44 are located on the lower surface 12b of the substrate body 12. Alternatively, some or all of the terminals 40, 42, and 44 may be located on the upper surface 12a of the substrate body 12.

[0026] The P-terminal 40 is electrically connected to the first heat sink plate 31 within the substrate body 12 and is electrically connected to the electrode 21b of the lower surface of the first semiconductor element 21 via the first heat sink plate 31. The N-terminal 42 is electrically connected to the electrode 22a of the upper surface of the second semiconductor element 22 within the substrate body 12. The O-terminal 44 is electrically connected to the electrode 21a of the upper surface of the first semiconductor element 21 and to the second heat sink plate 32 within the substrate body 12. That is, the O-terminal 44 is electrically connected to both the electrode 21a of the upper surface of the first semiconductor element 21 and the electrode 22b of the lower surface of the second semiconductor element 22. Consequently, when the first semiconductor element 21 is switched on, the P-terminal 40 and the O-terminal 44 are electrically connected to each other.On the other hand, when the second semiconductor element 22 is switched on, the N terminal 42 and the O terminal 44 are electrically connected to each other.

[0027] The substrate body 12 has several circuit layers L1-L6 to form a multilayer substrate structure. The circuit layers L1-L6 comprise a first circuit layer L1, a second circuit layer L2, a third circuit layer L3, a fourth circuit layer L4, a fifth circuit layer L5, and a sixth circuit layer L6. The first circuit layer L1 is located on the upper surface 12a of the substrate body 12. The second circuit layer L2 is located in the upper layer 14 of the substrate body 12. The third circuit layer L3 is located at the boundary between the upper layer 14 and the intermediate layer 16 of the substrate body 12. The fourth circuit layer L4 is located at the boundary between the intermediate layer 16 and the lower layer 18 of the substrate body 12. The fifth circuit layer L5 is located in the lower layer 18 of the substrate body 12.The sixth circuit layer L6 is arranged on the lower surface 12b of the substrate main body 12.

[0028] The first circuit layer L1 has a first conductor pattern 61. The first conductor pattern 61 consists of a conductor such as copper or another metal. The first conductor pattern 61 forms a control circuit 50 that controls the two semiconductor elements 21 and 22. Therefore, several electrical surface components 52 are mounted on the first conductor pattern 61. The electrical surface components 52 include, for example, a gate control circuit that controls the switching of the semiconductor elements 21 and 22.

[0029] The first conductor pattern 61 is a general term for one or more conductor patterns required to form the control circuit 50. That is, the first conductor pattern 61 can be a single conductor pattern or a combination of several conductor patterns. The same applies to the second conductor pattern 62 through the tenth conductor pattern 70, which are described below. The second conductor pattern 62 through the tenth conductor pattern 70 are each a general term for one or more conductor patterns that have a common function and can each be a single conductor pattern or a combination of several conductor patterns.

[0030] The second circuit layer L2 has several conductor patterns 62, 63, 64. Each conductor pattern 62, 63, 64 consists of a conductor such as copper or another metal. The conductor patterns 62, 63, 64 contain a second conductor pattern 62, a third conductor pattern 63, and a fourth conductor pattern 64. Here, the conductor patterns 62, 63, 64 are indeed arranged on or in the same plane, but in Fig. For illustrative purposes, the second ladder pattern 62 is intentionally shown offset in relation to the third ladder pattern 63 and the fourth ladder pattern 64.

[0031] The second conductor pattern 62 extends over most of the second conductor layer L2 and faces the semiconductor elements 21 and 22. As a result, heat generated in the semiconductor elements 21 and 22 is distributed by the second conductor pattern 62 over a wide area of ​​the substrate body 12. The second conductor pattern 62 also acts as a shielding layer, providing protection against electromagnetic noise radiated by the semiconductor elements 21 and 22. Although the second conductor pattern 62 is not particularly confined, it can be connected to ground potential to enhance its function as a shielding layer.

[0032] The third conductor pattern 63 is connected to the O-terminal 44 via a first passage 71. Furthermore, the third conductor pattern 63 is connected to the electrode 21a of the upper surface of the first semiconductor element 21 and to the heat sink plate 32 via two second passages 72. The first passage 71 and the second passage 72 each consist of a conductor such as copper or another metal. As a result, the two semiconductor elements 21 and 22 are electrically connected in series via the second conductor pattern 62 and electrically connected to the O-terminal 44 via the second conductor pattern 62.

[0033] The fourth conductor pattern 64 is connected to the electrode 22a of the upper surface of the second semiconductor element 22 via a third junction 73. Furthermore, the fourth conductor pattern 64 is connected to the N-terminal 42 via a fourth junction 74. The third junction 73 and the fourth junction 74 each consist of a conductor such as copper or another metal. As a result, the electrode 22a of the upper surface of the second semiconductor element 22 is electrically connected to the N-terminal 42 via the fourth conductor pattern 64.

[0034] The semiconductor elements 21 and 22 and the heat sink plates 31 and 32 are arranged in the third circuit layer L3 and the fourth circuit layer L4. The heat sink plates 31 and 32 have a thickness equal to the distance between the third circuit layer L3 and the fourth circuit layer L4. The semiconductor elements 21 and 22, which are arranged on the heat sink plates 31 and 32, are located in the third circuit layer L3. Furthermore, the third circuit layer L3 and the fourth circuit layer L4 are configured with a fifth conductor pattern 65 and a sixth conductor pattern 66. The use of the fifth conductor pattern 65 and the sixth conductor pattern 66 is not particularly restricted. For example, the fifth conductor pattern 65 and the sixth conductor pattern 66 can be connected to ground potential.

[0035] The fifth circuit layer L5 has several conductor patterns 67, 68, 69. Each conductor pattern 67, 68, 69 consists of a conductor such as copper or another metal. The conductor patterns 67, 68, 69 contain a seventh conductor pattern 67, an eighth conductor pattern 68, and a ninth conductor pattern 69. Here, the conductor patterns 67, 68, 69 are indeed arranged on or in the same plane, but in Fig. For illustrative purposes, the seventh ladder pattern 67 is intentionally shown offset in relation to the eighth ladder pattern 68 and the ninth ladder pattern 69.

[0036] The seventh conductor pattern 67 is connected to the first heat sink plate 31 via a fifth passage 75. Furthermore, the seventh conductor pattern 67 is connected to the P-terminal 40 via a sixth passage 76. The fifth passage 75 and the sixth passage 76 each consist of a conductor such as copper or another metal. As a result, the electrode 21b of the lower surface of the first semiconductor element 21 is electrically connected to the P-terminal 40 via the first heat sink plate 31 and the seventh conductor pattern 67.

[0037] The eighth conductor pattern 68 is located in an area facing the first heat sink plate 31 and the second heat sink plate 32. The eighth conductor pattern 68 is connected to the first heat sink plate 31 and the second heat sink plate 32 via several seventh passes 77. Each seventh pass 77 consists of a conductor such as copper or another metal. As a result, the eighth conductor pattern 68 is electrically and thermally connected to the first heat sink plate 31 and the seventh conductor pattern 67 via the seventh passes 77. While the material forming the seventh passes 77 is not particularly restricted, it can be the same as the material forming the eighth conductor pattern 68 and can be, for example, copper or aluminum.

[0038] The ninth conductor pattern 69 is arranged adjacent to the eighth conductor pattern 68, so that the heat from the eighth conductor pattern 68 is efficiently transferred to the ninth conductor pattern 69. Here, the eighth conductor pattern 68 and the ninth conductor pattern 69 are separated from each other by the material forming the substrate main body 12, and the eighth conductor pattern 68 and the ninth conductor pattern 69 are electrically insulated from each other. Part of the ninth conductor pattern 69 is arranged in a region facing the first heat sink plate 31 and / or the second heat sink plate 32, and another part of the ninth conductor pattern 69 is arranged outside the facing region.

[0039] Several eighth passes 78a and 78b are connected to the ninth conductor pattern 69. The eighth passes 78a and 78b extend from the ninth conductor pattern 69 to the sixth circuit layer L6, which is located on the lower surface 12b of the substrate body 12. Each eighth pass 78a, 78b consists of a conductor such as copper or another metal. As a result, the ninth conductor pattern 69 is electrically and thermally connected to the sixth circuit layer L6 via the eighth passes 78a and 78b.

[0040] The eighth passages 78a, 78b contain at least one internal passage 78a and at least one external passage 78b. The internal passage 78a is located in an opposing region where the first heat sink plate 31 or the second heat sink plate 32 faces the lower surface 12b of the substrate main body 12. Conversely, the external passage 78b is located outside the opposing region. The region in which the eighth passages 78a and 78b are located corresponds to the region through which the heat from the first heat sink plate 31 and / or the second heat sink plate 32 flows as it is distributed within the substrate main body 12.

[0041] The sixth circuit layer L6 has a tenth conductor pattern 70. The tenth conductor pattern 70 extends over most of the sixth circuit layer L6 and is oriented towards the ninth conductor pattern 69 of the fifth circuit layer L5. The tenth conductor pattern 70 consists of a conductor such as copper or another metal. Several eighth connections 78a and 78b are connected to the tenth conductor pattern 70. As a result, the tenth conductor pattern 70 is electrically and thermally connected to the ninth conductor pattern 69 of the fifth circuit layer L5 via several eighth connections 78a, 78b. Although the material forming the tenth conductor pattern 70 is not particularly restricted, it can be the same as, or even the same as, the material forming the eighth connections 78a, 78b, and can be, for example, copper or aluminum.

[0042] As described above, the tenth conductor pattern 70 in the semiconductor device 10 of this embodiment is arranged in the circuit layer L6, which is located on the lower surface 12b of the substrate main body 12. The eighth conductor pattern 68 and the ninth conductor pattern 69, which are insulated from each other, are arranged in the circuit layer L5, which is located between the heat sink plates 31 and 32 and the lower surface 12b of the substrate main body 12. The heat sink plates 31 and 32 and the eighth conductor pattern 68 are connected to each other via at least one seventh passage 77. The ninth conductor pattern 69 and the tenth conductor pattern 70 are connected to each other via at least one eighth passage 78a and 78b.

[0043] According to the configuration above, the heat generated in the semiconductor elements 21 and 22 and the heat sink plates 31 and 32 is transferred via the seventh junction 77 to the eighth conductor pattern 68 and further transferred to the ninth conductor pattern 69 adjacent to the eighth conductor pattern 68. The heat from the ninth conductor pattern 69 is then transferred via the eighth junctions 78a and 78b to the tenth conductor pattern 70 and radiated from the tenth conductor pattern 70 to the outside of the substrate body 12. Although the eighth conductor pattern 68 and the ninth conductor pattern 69 are insulated from each other, they are located in the same fifth circuit layer L5, so the heat transfer between them is relatively high.Since the seventh throughput 77 and the eighth throughputs 78a and 78b are located in the two upper and lower layers adjacent to the fifth circuit layer L5, the mechanical properties do not differ significantly between the two layers. As described above, it is possible to improve the thermal conductivity and mechanical properties of the substrate body 12 while maintaining the insulating properties of the semiconductor elements 21 and 22 and the heat sink plates 31 and 32.

[0044] The semiconductor device 10 according to the first embodiment is an embodiment of the technology described in the present description, and the scope of the present technology is not particularly limited. The substrate body 12 of this embodiment is an example of the substrate of the present technology. The upper surface 12a and the lower surface 12b of the substrate body 12 of this embodiment are examples of the first and second surfaces of the substrate body of the present technology. The combination of the first semiconductor element 21 and the first heat sink plate 31 and the combination of the second semiconductor element 22 and the second heat sink plate 32 of this embodiment are examples of electrical components of the present invention. The tenth conductor pattern 70 of this embodiment is an example of the surface conductor pattern of the present invention.The eighth conductor pattern 68 of this embodiment is an example of the first internal conductor pattern of the present technology. The ninth conductor pattern 69 of this embodiment is an example of the second internal conductor pattern of the present invention. The ninth passage 79 of this embodiment is an example of the heat conductor passage of the present invention. The seventh passage 77 of this embodiment is an example of the first heat conductor passage of the present invention. The eighth passages 78a and 78b of this embodiment are examples of the second heat conductor passages of the present invention. Of the eighth passages 78a and 78b of the present embodiment, the internal passage 78a is an example of the internal heat conductor passage of the present invention, and the external passage 78b is an example of the external heat conductor passage of the present invention.The seventh passage 77 of this embodiment is an example of the first heat conductor passage of the present invention. The electrical surface component 52 of this embodiment is an example of the electrical surface component of the present technology. Design 2

[0045] The semiconductor device 110 of the second embodiment is referred to below with reference to Fig. 4 described. The semiconductor device 110 of the present embodiment differs from the semiconductor device 10 of the first embodiment in that several ninth passes 79 have been added. The following mainly describes the differences from the first embodiment, and the same reference numerals for the same configurations as in the first embodiment are used and are not repeated.

[0046] The ninth passes 79 extend from the fourth circuit layer L4 to the fifth circuit layer L5 and connect the sixth conductor pattern 66 of the fourth circuit layer L4 and the ninth conductor pattern 69 of the fifth circuit layer L5. Each ninth pass 79 consists of a conductor such as copper or another metal. As a result, the sixth conductor pattern 66 is electrically and thermally connected to the ninth conductor pattern 69 via the ninth passes 79.

[0047] The sixth conductor pattern 66, located in the fourth circuit layer L4, is situated at the same depth as the heat sink plates 31 and 32. Therefore, the sixth conductor pattern 66 receives heat distributed by the heat sink plates 31 and 32 in a direction parallel to the substrate body 12 (i.e., in the X and / or Y directions). The heat from the sixth conductor pattern 66 is transferred to the ninth conductor pattern 69 via the ninth pass 79 and further transferred to the tenth conductor pattern 70 via the external pass 78b of the eighth passes 78a and 78. As a result, the heat from the semiconductor elements 21 and 22 and the heat sink plates 31 and 32 is radiated from the tenth conductor pattern 70 to the outside of the substrate body 12. The sixth conductor pattern 66 is electrically isolated from the semiconductor elements 21 and 22 and the heat sink plates 31 and 32.

[0048] The semiconductor device 110 according to the present embodiment is an embodiment of the technology disclosed in the present description, and the scope of the present technology is not particularly limited. The sixth conductor pattern 66 of this embodiment is an example of the third internal conductor pattern of the present technology. The ninth pass 79 of this embodiment is an example of the third pass of the present invention. embodiment 3

[0049] The semiconductor device 210 of the third embodiment is referred to below with reference to Fig.5 described. The semiconductor device 210 of the present embodiment differs from the semiconductor device 110 of the second embodiment in that the substrate body 12 has two layers 13 and 15 made of different materials. The following mainly describes the differences from the second embodiment, using the same reference numerals for the same components as in the first and second embodiments, and their descriptions are not repeated.

[0050] The main substrate body 12 of this embodiment comprises a first layer 13 made of a first material and a second layer 15 made of a second material. The first layer 13 includes the aforementioned upper layer 14 and the intermediate layer 16, as well as a portion of the lower layer 18. The second layer 15 is the remaining portion of the lower layer 18 and, in particular, is a section that fills the space between the fifth circuit layer L5 and the sixth circuit layer L6. That is, the second layer 15 is arranged at the bottommost layer, which comprises the lower surface 12b of the main substrate body 12. The second material forming the second layer 15 has a higher thermal conductivity than the first material forming the first layer 13.By arranging the second layer 15, which has excellent thermal conductivity, between the heat sink plates 31 and 32 and the lower surface 12b of the substrate main body 12, a temperature rise of the semiconductor elements 21 and 22 and the heat sink plates 31 and 32 is further suppressed.

[0051] The first and second materials are not particularly restricted. For example, the second material could be a composite material containing a fiber, so the second material could contain at least one selected material from the following group: paper, woven glass fiber fabric, nonwoven glass fiber fabric, woven glass fiber fabric, and glass fiber, and at least one material selected from the following group: phenolic resins, epoxy resins, polyimide resins, and Teflon (registered trademark). The first material could, for example, be a resin material, and it could contain a fiber material, similar to the second material. As long as the thermal conductivity of the second material is higher than that of the first material, the combination of the first and second materials is not particularly restricted.

Claims

[1] Semiconductor device (10, 110, 210) comprising: a substrate main body (12) having a first surface (12a) and a second surface (12); an electrical component (21, 22, 31, 32) which is arranged in the substrate main body (12); a surface conductor pattern (70) arranged in a first circuit layer (L6) which is arranged on the second surface (12b); a first internal conductor pattern (68) and a second internal conductor pattern (69) arranged in a second circuit layer (L5) located between the electrical component (21, 22, 31, 32) and the second surface (12b), and which are insulated from each other; at least one first heat conductor passage (77) extending from the electrical component (21, 22, 31, 32) to the first internal conductor pattern (68); and at least one second heat conductor passage (78a, 78b) extending from the surface conductor pattern (70) to the second internal conductor pattern (69), wherein the first internal conductor pattern (68) is isolated from the surface conductor pattern (70) which extends over most of the second surface (12b) of the first circuit layer (L6). [2] Semiconductor device (10, 110, 210) according to claim 1, wherein the at least one second heat conductor passage (78, 78b) contains: an internal heat conductor passage (78a) which is arranged in an opposing area in which the electrical component (21, 22, 31, 32) is opposite the second surface (12b), and an external heat conductor passage (78b) which is located outside the opposing area. [3] Semiconductor device (110, 210) according to claim 1 or 2, further comprising: a third internal conductor pattern (66) arranged in a third circuit layer (L4) located at the same depth as the electrical component (21, 22, 31, 32) and electrically insulated from the electrical component (21, 22, 31, 32); and at least one third pass (79) extending from the second internal ladder pattern (69) to the third internal ladder pattern (66). [4] Semiconductor device (210) according to any one of claims 1 to 3, wherein the substrate body (12) contains a first layer (13) of a first material and a second layer (15) of a second material which has a higher thermal conductivity than the first material; and the second layer (15) is arranged between the electrical component (21, 22, 31, 32) and the second surface (12b). [5] Semiconductor device (210) according to claim 4, wherein the second layer (15) is exposed on the second surface (12b). [6] Semiconductor device (210) according to claim 4 or 5, wherein the second material comprises: at least one selected material from the group which includes: paper, fiberglass fabric, fiberglass nonwoven fabric, glass fabric and fiberglass, and at least one selected material from the group which contains: phenolic resin, epoxy resin, polyimide resin and Teflon. [7] Semiconductor device (10, 110, 210) according to any one of claims 1 to 6, further comprising: an electrical surface component (52) which is arranged on the first surface (12a) and controls the operation of the electrical component (21, 22, 31, 32). [8] Semiconductor device (10, 110, 210) according to any one of claims 1 to 7, wherein the first heat conductor passage (77) consists of a material that is the same as a material of the first internal conductor pattern (68). [9] Semiconductor device (10, 110, 210) according to any one of claims 1 to 8, wherein the second heat conductor passage (78a, 78b) consists of a material that is the same as a material of the surface conductor pattern (70). [10] Semiconductor device (10, 110, 210) according to any one of claims 1 to 9, wherein the electrical component (21, 22, 31, 32) includes a power semiconductor element (21, 22) and a heat sink plate (31, 32) to which the power semiconductor element (21, 22) is connected.

Citation Information

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