Step-down converter and circuit arrangement herewith

The buck converter with phase-shifted switches and diodes addresses the linear relationship issue, enabling efficient operation with reduced losses and disturbances at high potential differences.

DE102023103243B4Active Publication Date: 2026-01-08SEMIKRON DANFOSS ELEKTRONIK GMBH & CO KG
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
DE102023103243
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-03-04
Filing Date
2023-02-10
Publication Date
2026-01-08
Estimated Expiration
2043-02-10

AI Technical Summary

Technical Problem

Existing buck converters exhibit a linear relationship between input and output potential differences and duty cycle, leading to high losses and disturbances, particularly at high potential differences.

Method used

A buck converter design comprising two partial converters with phase-shifted switches and diodes, connected in parallel with input capacitors and center-tapped coils, reducing switching losses and output disturbances.

Benefits of technology

The design allows for efficient operation with a higher duty cycle at low output voltages, minimizing switching losses and output ripple.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

Buck converter (1) with a first and a second input terminal (10, 12), wherein the first input terminal (10) is provided for being connected to a first DC input potential, and the second input terminal (12) is provided for being connected to a second DC input potential that is lower than the first, and with a first and second output terminal (14, 16), wherein the first output terminal (14) is provided for having a first DC output potential and the second output terminal (16) is provided for having a second DC output potential that is lower than the first, comprising a first, upper and a second, lower partial buck converter (2, 3), wherein the first partial buck converter (2) has a first input capacitor (20),the first capacitor terminal of which is connected to the first input terminal (10) and the second capacitor terminal of which is connected to the second output terminal (16), wherein a first series circuit consisting of a first switch (22) and a first diode (24) is connected in parallel to this first input capacitor (20), and a first coil input of a first coil (26) is connected to the center tap between the first switch (22) and the first diode (24), the first coil output of which is connected to the first output terminal (14), and wherein the second partial buck converter (3) has a second input capacitor (30) whose first capacitor terminal is connected to the first output terminal (14) and whose second capacitor terminal is connected to the second input terminal (12), wherein a second series circuit consisting of a second diode (32) and a second switch (34) is connected in parallel to this second input capacitor (30),and a second coil input of a second coil (36) is connected at the center tap between the second diode (32) and the second switch (34), the second coil output of which is connected to the second output terminal (16).
Need to check novelty before this filing date? Find Prior Art

Description

[0001] The invention describes a step-down converter with a first and a second input terminal, wherein the first input terminal is provided for being connected to a first DC input potential, and the second input terminal is provided for being connected to a second DC input potential that is lower than the first, and with a first and second output terminal, wherein the first output terminal is provided for having a first DC output potential and the second output terminal is provided for having a second DC output potential that is lower than the first.

[0002] Standard, textbook-style buck converters with a switch and a series-connected coil in the connection between the first input terminal and the first output terminal, as well as with a diode connected between the midpoint between the switch and the coil and the second input terminal, which is also connected to the second output terminal, have the disadvantage that they exhibit a linear dependence of the relationship between the respective potential difference of the input terminals and the output terminals and the duty cycle with which the switch is turned on and off, cf. Fig. 5.

[0003] A "double quadratic buck converter" is known in which the voltage across the switches is lower than the input voltage and half the voltage across the switches of conventional quadratic buck converters. This means that in this double quadratic buck converter, the load voltage across the switches is reduced to half the value compared to a conventional quadratic buck converter. The topological symmetry simplifies the theoretical analysis of the converter; see Muhammed, Lismy K; Paul, Jubin Eldho: A Double Quadratic Buck Converter. In: International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering, Vol. 4, 2016, No. 9, pp. 128-135.

[0004] Furthermore, a cascaded buck converter is known in which the output current is divided by changing the position of the second-stage inductor, thereby reducing the overall volume of the magnetic components and their conduction losses. Additionally, the arrangement of the inductors doubles the frequency of the output current ripple; see Nejad, Mohammad Lotfi [et al.]: An Improved Cascade Buck Converter for High Stepdown DC-DC Applications. In: IEEE Journal of Emerging and Selected Topics in Industrial Electronics, July 2022, pp. 1-10.

[0005] With knowledge of the prior art, the invention is based on the objective of presenting a buck converter, a circuit arrangement thereof, and also a method for operating the buck converter, which does not exhibit the aforementioned linear relationship and which, in particular, can be operated with an advantageous duty cycle for a high potential difference between the input terminals compared to the potential difference at the output terminals, wherein the buck converter exhibits low losses and preferably also generates lower disturbances at the output.

[0006] This problem is solved according to the invention by a buck converter with a first and a second input terminal, wherein the first input terminal is provided for being connected to a first DC input potential and the second input terminal is provided for being connected to a second DC input potential that is lower than the first, and with a first and second output terminal, wherein the first output terminal is provided for a first to have a DC output potential and the second output terminal is intended to have a second, lower DC output potential than the first, consisting of a first upper and a second lower partial buck converter, wherein the first partial buck converter has a first input capacitor, the first capacitor terminal of which is connected to the first input terminal and the second capacitor terminal of which is connected to the second output terminal, wherein a first series circuit of a first switch and a first diode is connected in parallel to this first input capacitor, and a first coil input of a first coil, the first coil output of which is connected to the first output terminal, is connected to the center tap between the first switch and the first diode, and wherein the second partial buck converter has a second input capacitor, the first capacitor terminal of which is connected to the first output terminal and the second capacitor terminal of which is connected to the second input terminal, wherein a second series circuit consisting of a second diode and a second switch is connected in parallel to this second input capacitor, and a second coil input of a second coil is connected to the center tap between the second diode and the second switch, the second coil output of which is connected to the second output terminal.

[0007] It can be advantageous if the first switch is designed as a semiconductor switch, in particular as an IGBT with an antiparallel diode or as a MOSFET. Likewise, the second switch can be designed as a semiconductor switch, in particular as an IGBT with an antiparallel diode or as a MOSFET. It is particularly preferred that both switches are designed identically.

[0008] It is also advantageous if the first switch is configured as a series connection of at least two first semiconductor sub-switches and the first diode as a series connection of the same number of first sub-diodes. It is further advantageous if a first intermediate capacitor is connected between the respective center taps between adjacent first semiconductor sub-switches and adjacent first sub-diodes.

[0009] It is also advantageous if the second switch is configured as a series connection of at least two second semiconductor sub-switches and the second diode as a series connection of the same number of second sub-diodes. It is further advantageous if a second intermediate capacitor is connected between the respective center taps between adjacent semiconductor sub-switches and adjacent sub-diodes.

[0010] Likewise, it is generally advantageous if the respective semiconductor sub-switches and, in particular, the respective sub-diodes are of the same design.

[0011] Furthermore, it is generally advantageous to have an output capacitor connected between the first and second output terminals.

[0012] The above-mentioned problem is further solved according to the invention by a circuit arrangement with a buck converter according to one of the preceding claims, with a DC voltage source and with a load, wherein the DC voltage source is connected to the first and a second input terminal and wherein the load is connected to the first and second output terminal.

[0013] It can be advantageous if the consumer is designed as an electrolysis device, particularly for the production of gaseous hydrogen.

[0014] It can also be advantageous if the DC voltage source is designed as a photovoltaic system.

[0015] Furthermore, it can be advantageous if the DC voltage source is designed as a rectifier circuit.

[0016] The aforementioned problem is ultimately also solved by a method for operating a step-down converter described above, wherein the first switch is operated shifted by half a phase length relative to the second switch.

[0017] It can be particularly advantageous if the output voltage between the output terminals is a maximum of 40%, preferably a maximum of 25%, and especially preferably a maximum of 15% of the input voltage between the input terminals.

[0018] Of course, unless explicitly or per se excluded or contrary to the idea of ​​the invention, the features mentioned in the singular may also be present multiple times in the circuit arrangement according to the invention or in the step-down converter here.

[0019] It is understood that the various embodiments of the invention, regardless of whether they are disclosed herein in the description of the step-down converter, the circuit arrangement, or the method, can be implemented individually or in any combination to achieve improvements. In particular, the features mentioned and explained above and below can be used not only in the combinations specified, but also in other combinations or individually, without departing from the scope of the present invention.

[0020] Further explanations of the invention, advantageous details and features, will become apparent from the following description of the invention contained in the Fig. 1, Fig. 2, Fig. 3, Fig. 4 to Fig. 5 schematically illustrated embodiments of the invention or of respective parts thereof. Fig. Figure 1 shows a first embodiment of a step-down converter according to the invention. Fig. Figure 2 shows a first embodiment of a circuit arrangement according to the invention. Fig. Figure 3 shows a second embodiment of a step-down converter according to the invention. Fig. Figure 4 shows a second embodiment of a circuit arrangement according to the invention. Fig. Figure 5 shows the comparison of the dependence between the ratio of the input to the output potential difference on the duty cycle of the control of the switch of a buck converter according to the prior art with a buck converter according to the invention.

[0021] Fig. Figure 1 shows a first embodiment of a buck converter 1 according to the invention, comprising a first and a second input terminal 10, 12, wherein the first input terminal 10 is intended to be connected to a first DC input potential during operation, and the second input terminal 12 is intended to be connected to a second DC input potential that is lower than the first. The buck converter 1 further comprises a first and a second output terminal 14, 16, wherein, during operation, the first output terminal 14 is intended to have a first DC output potential, and the second output terminal 16 is intended to have a second DC output potential that is lower than the first.By design, the output potential difference between the first and second DC output potentials, i.e., the output voltage, is lower than the input voltage, i.e., the input potential difference between the first and second DC input potentials.

[0022] The buck converter 1 consists of a first, upper, and a second, lower partial buck converter 2,3. The first partial buck converter 2 has a first input capacitor 20, the first terminal of which is connected to the first input terminal 10 and the second terminal of which is connected to the second output terminal 16. A first series circuit consisting of a first switch 22 and a first diode 24 is connected in parallel to this first input capacitor 20. The first switch 22 can be configured as a bipolar transistor, in particular a power IGBT, with an antiparallel diode, as shown. Alternatively, the first switch 22 can also be configured as a field-effect transistor, in particular a power MOSET, preferably with a high bandgap, as shown.

[0023] A first coil input of a first coil 26 is connected to the center tap between the first switch 22 and the first diode 24, the first coil output of which is connected to the first output terminal 14.

[0024] The second partial buck converter 3 has a second input capacitor 30, the first terminal of which is connected to the first output terminal 14 and the second terminal of which is connected to the second input terminal 12. A second series circuit consisting of a second diode 32 and a second switch 34 is connected in parallel to this second input capacitor 30. This second switch is preferably identical to the first switch 22. A second coil input of a second coil 36 is connected to the center tap between the second diode 32 and the second switch 34, and the second coil output of this coil is connected to the second output terminal 16.

[0025] Between the first and second output terminals 14,16, two output capacitors 28,38 are connected in series, with the first output capacitor 28 being assigned to the first partial buck converter 2 and the second output capacitor 38 being assigned to the second partial buck converter 3.

[0026] Fig. Figure 2 shows a first embodiment of a circuit arrangement 6 according to the invention in a first preferred application. Here, a DC voltage source 60, here a photovoltaic system, exemplified as a solar field, directly or indirectly feeds a step-down converter 1 according to the invention. For this purpose, the higher potential of the photovoltaic system is connected to the first input terminal 10 and the lower potential of the photovoltaic system to the second input terminal 12 of the step-down converter 1 according to the invention.

[0027] The output terminals 14, 16 of the step-down converter 1 are connected, either directly or indirectly, to the terminals of an electrolysis device 64, observing the correct polarity. This electrolysis device 64 serves here to produce gaseous hydrogen.

[0028] Fig. Figure 3 shows a second embodiment of a step-down converter 1 according to the invention. Essentially, in comparison to the first embodiment according to... Fig. 1. The first switch 22 is replaced by a series connection of two semiconductor subswitches 220, 222. The two first semiconductor subswitches 220, 222 are preferably of the same type. However, it can also be advantageous to design one of the first semiconductor subswitches 220, 222 as a bipolar transistor with an antiparallel diode as described above, and the other semiconductor subswitch as a MOSFET. Regardless of the configuration, it is preferred that the two first semiconductor subswitches 220, 222 are operated asynchronously. For example, both first semiconductor subswitches 220, 222 can be operated with a phase shift, in particular with a phase shift of less than 90°.

[0029] The first diode 24 is further replaced by a series connection of two first sub-diodes 240, 242, which are identical in design. Furthermore, a first intermediate capacitor 210 is connected between the center tap of the two first semiconductor sub-switches 220, 222 and the center tap of the two first sub-diodes 240, 242.

[0030] The second switch 34 and the second diode 32 of the second partial buck converter 3 are implemented analogously to those of the first partial buck converter 2 by means of two second semiconductor subswitches 340, 342 and two second subdiodes 320, 322. A second intermediate capacitor 310 is also connected analogously. The control of the respective second semiconductor subswitches 340, 342 is also analogous.

[0031] Fig. Figure 4 shows a second embodiment of a circuit arrangement 6 according to the invention in a second preferred application. Here, a wind turbine 620 or a wind farm, more precisely its generator, feeds a rectifier device 62, which is connected directly or indirectly and with correct polarity to the input terminals 10, 12 of a step-down converter 1 according to the invention.

[0032] The output terminals 14, 16 of the step-down converter 1 are connected, in accordance with polarity, either directly or indirectly to the terminals of an electrolysis device 64. This electrolysis device 64 serves here to produce gaseous hydrogen.

[0033] Fig.Figure 5 shows the comparison of the dependence between the ratio of the input to the output potential difference, i.e., the ratio of input voltage Vi to output voltage Vo during operation, on the duty cycle T of the control of the switch of a buck converter according to the prior art with a buck converter according to the invention.

[0034] Plotted on the x-axis is the duty cycle T, i.e., the ratio of the time the corresponding switch is on to the time it is off. Plotted on the y-axis is the resulting ratio Vo / Vi between the average output voltage Vo at the output terminals and the input voltage Vi at the input terminals.

[0035] The dashed, straight line G1 represents the conditions for a step-down converter described at the beginning, according to the state of the art.

[0036] The second, curved line G2 represents the conditions for a first switch 22 of a step-down converter 1 according to the invention. Furthermore, the second switch 34 is connected with the same duty cycle and is phase-shifted by 180° to the first switch 22.

[0037] The step-down converter 1 according to the invention has the decisive advantage over the prior art mentioned above that, particularly at small ratios of Vo / Vi, especially below 25%, i.e., below 0.25, meaning at lower output voltages Vo compared to the input voltage Vi, it can be operated with a higher duty cycle, thereby reducing switching losses. By switching both the first and second switches 24, 34, as well as the semiconductor subswitches 220, 222, 340, 342, where present, in a phase-shifted manner, the output voltage Vo exhibits a more uniform waveform with less ripple.

Claims

[1] Buck converter (1) with a first and a second input terminal (10, 12), wherein the first input terminal (10) is provided for being connected to a first DC input potential, and the second input terminal (12) is provided for being connected to a second DC input potential that is lower than the first, and with a first and second output terminal (14, 16), wherein the first output terminal (14) is provided for having a first DC output potential and the second output terminal (16) is provided for having a second DC output potential that is lower than the first, comprising a first, upper and a second, lower partial buck converter (2, 3), wherein the first partial buck converter (2) has a first input capacitor (20),the first capacitor terminal of which is connected to the first input terminal (10) and the second capacitor terminal of which is connected to the second output terminal (16), wherein a first series circuit consisting of a first switch (22) and a first diode (24) is connected in parallel to this first input capacitor (20), and a first coil input of a first coil (26) is connected to the center tap between the first switch (22) and the first diode (24), the first coil output of which is connected to the first output terminal (14), and wherein the second partial buck converter (3) has a second input capacitor (30) whose first capacitor terminal is connected to the first output terminal (14) and whose second capacitor terminal is connected to the second input terminal (12), wherein a second series circuit consisting of a second diode (32) and a second switch (34) is connected in parallel to this second input capacitor (30),and a second coil input of a second coil (36) is connected at the center tap between the second diode (32) and the second switch (34), the second coil output of which is connected to the second output terminal (16). [2] Buck converter according to claim 1, wherein the first switch (22) is designed as a semiconductor switch, in particular as an IGBT (224) with an antiparallel connected diode (226) or as a MOSFET (228). [3] Buck converter according to claim 1 or 2, wherein the second switch (34) is designed as a semiconductor switch, in particular as an IGBT with an antiparallel diode or as a MOSFET. [4] Buck converter according to claim 1, wherein the first switch (22) is configured as a series connection of at least two first semiconductor sub-switches (220,222) and the first diode (24) is configured as a series connection with as many first sub-diodes (240,242). [5] Buck converter according to claim 4, wherein a first intermediate capacitor (210) is connected between the respective center taps between adjacent first semiconductor subswitches (220,222) and adjacent first subdiodes (240,242). [6] Buck converter according to claim 1, 4 or 5, wherein the second switch (34) is configured as a series connection of at least two second semiconductor sub-switches (340, 342) and the second diode (32) is configured as a series connection of as many second sub-diodes (320, 322). [7] Buck converter according to claim 6, wherein a second intermediate capacitor (310) is connected between the respective center taps between adjacent semiconductor subswitches (340,342) and adjacent subdiodes (320,322). [8] Buck converter according to one of the preceding claims, wherein an output capacitor (28,38) is connected between the first and second output terminals (14,16). [9] Circuit arrangement (6) with a step-down converter (1) according to one of the preceding claims, with a DC voltage source (60, 62) and with a load (64), wherein the DC voltage source (60, 62) is connected to the first and second input terminals (10, 12) and wherein the load (64) is connected to the first and second output terminals (14, 16). [10] Circuit arrangement according to claim 9, wherein the consumer (64) is designed as an electrolysis device, in particular for the production of gaseous hydrogen. [11] Circuit arrangement according to claim 9 or 10, wherein the DC voltage source (60) is designed as a photovoltaic system. [12] Circuit arrangement according to claim 9 or 10, wherein the DC voltage source (62) is designed as a rectifier circuit. [13] Method for operating a step-down converter according to one of claims 4 to 7, wherein adjacent semiconductor subswitches are controlled with a phase shift relative to each other. [14] Method for operating a step-down converter according to one of claims 1 to 8 or 13, wherein the first switch (22) is operated shifted by half a phase length relative to the second switch (34). [15] Method according to claim 14, wherein an output voltage (Vo) between the output terminals (14,16) is a maximum of 25% of an input voltage (Vi) between the input terminals (10,12).