DETECTION OF LEAKAGE CURRENTS IN INTELLIGENT SEMICONDUCTOR SWITCHES

Abstract

A process that includes: Activating a semiconductor switch (T1) which has a supply node (VS) at which a supply voltage (V S ), with an output node (OUT) to which an electrical load (Z LOAD ) is connected to provide an output voltage (V OUT ) to the electrical load (Z LOAD ) and Perform a leakage current test, which includes: Deactivating the semiconductor switch (T1) to switch the electrical load (Z LOAD ) from the supply node (VS); Check whether a time (t 11 -t 10 ), which passes until the output voltage (V OUT ) a first voltage level (V TH =V S -V X ) is less than a threshold value (T K ); and reactivating the semiconductor switch (T1).

Description

TECHNICAL FIELD

[0001] This description concerns the field of intelligent semiconductor switches. BACKGROUND

[0002] For the state of the art, please refer to publications US 2010 / 0 156 426 A1 and DE 10 2019 121 794 A1. The first concerns a concept for measuring leakage currents in batteries. The second concerns an intelligent semiconductor switch that provides various diagnostic and monitoring functions.

[0003] Various types of semiconductor switches are known. For example, metal-oxide-semiconductor (MOS) field-effect transistors (MOSFETs) are used in a variety of applications, such as replacing mechanical switches or fuses. One or more MOSFETs can be integrated into a semiconductor chip along with associated driver circuitry, control logic, (current and temperature) sensor circuits, and other circuits. In this case, they are often referred to as intelligent semiconductor switches or smart switches.

[0004] Smart semiconductor switches can be used in a wide variety of applications. Such semiconductor switches can be used as electronic fuses (so-called e-fuses) not only in the automotive sector. The switches are switched on most of the time, even when the connected load is inactive. In this case, the load current flowing through the semiconductor switch can be very small (e.g., in the µA range), whereas with an active load, the load current can amount to several amperes.

[0005] Intelligent semiconductor switches can have a significant intrinsic power consumption. Therefore, for some applications, intelligent semiconductor switches are designed to operate in a low-power idle mode. In this idle mode, most of the internal circuits (e.g., sensor and diagnostic functions, charge pumps, etc.) of the semiconductor switch are inactive, while the switch remains switched on. The intelligent semiconductor switch normally switches to idle mode when the load current falls below a defined threshold (and other conditions are met, if applicable). In idle mode, the monitoring and diagnostic functions normally available to the intelligent semiconductor switch are only available to a limited extent, which is why monitoring the connected load is not possible without restrictions. For example,It's possible that an unacceptably high leakage current in a load connected to the semiconductor switch may not be detected. This could result, for example, in the battery of a parked car discharging too quickly.

[0006] The inventors have set themselves the task of improving existing concepts for intelligent semiconductor switches with regard to the problem outlined above. SUMMARY

[0007] The above-mentioned object is achieved by the method according to claim 1 and by the circuits according to claims 9, 10 and 15. Various embodiments and further developments are the subject of the dependent patent claims.

[0008] One embodiment relates to a method for an intelligent semiconductor switch. The method comprises activating a semiconductor switch that connects a supply node, at which a supply voltage is provided, to an output node, to which an electrical load is connected. As a result, an output voltage is applied to the electrical load. The method further comprises performing a leakage current test. For this purpose, the semiconductor switch is deactivated (switched off) to disconnect the electrical load from the supply node. Furthermore, it is checked whether the time that elapses until the output voltage falls below a first voltage level is less than a (time) threshold. Finally, the semiconductor switch is reactivated (switched on).

[0009] Another embodiment relates to an intelligent semiconductor switch comprising: at least one transistor connected between a supply node and an output node, and a control circuit configured to switch the transistor on and off. To perform a leakage current test, the control circuit is configured to switch the transistor off, check whether the time elapsed until an output voltage applied to the output node falls below a first voltage level is less than a threshold value, and switch the transistor back on.

[0010] According to a further embodiment, the intelligent semiconductor switch comprises at least one transistor connected between a supply node (VS) and an output node, as well as a control circuit configured to switch the transistor on and off. To perform a leakage current test, the control circuit is configured to switch the transistor off, generate a diagnostic signal comprising a pulse with a pulse length corresponding to the time elapsed until an output voltage output at the output node falls below a first voltage level, and switch the transistor back on.

[0011] A further embodiment relates to a circuit having at least one transistor connected between a supply node and an output node, and having a control circuit configured to switch the transistor on and off. The circuit further comprises a controller coupled to the control circuit, which—for performing a leakage current test—is configured to switch the transistor off with the aid of the control circuit, to check whether a time elapsed until an output voltage output at the output node falls below a first voltage level is less than a threshold value, and to switch the transistor back on. BRIEF DESCRIPTION OF THE ILLUSTRATIONS

[0012] Below, exemplary embodiments are explained in more detail using illustrations. The illustrations are not necessarily to scale, and the exemplary embodiments are not limited to the aspects shown. Rather, emphasis is placed on illustrating the principles underlying the exemplary embodiments. Regarding the illustrations: Fig. Figure 1 is a simplified circuit diagram of an intelligent semiconductor switch with a connected load and a controller that controls the intelligent semiconductor switch. Fig. 2 is an intelligent semiconductor switch with a function for detecting a leakage current in the load. Fig. 3 illustrates a leakage current detection function according to an embodiment using timing diagrams. Fig. 4 concerns an alternative to Fig. 3. Fig. 5 shows a modification / extension of the embodiment from Fig. 3. Fig. 6 shows a modification / extension of the embodiment from Fig. 5. Fig. 7 illustrates, using timing diagrams, a function for leakage current detection according to the embodiment of Fig. 6. Fig. Figure 8 is a flowchart illustrating the leakage current detection test. DETAILED DESCRIPTION

[0013] Fig. 1 shows the use of an intelligent semiconductor switch 10 to control a load Z LOAD, wherein the intelligent semiconductor switch is controlled by an external controller 20 (e.g., a microcontroller). It should first be noted that "intelligent semiconductor switch" is merely a common name, and in this context, the word "intelligent" does not imply any specific technical features, except that the semiconductor switch has a control circuit 11 whose function goes beyond simply switching a transistor T1 on and off.

[0014] According to Fig. 1, the intelligent semiconductor switch 10 comprises (among other things) a supply node VS and an output node OUT, which are coupled by means of the transistor T1, such that the nodes VS and OUT are electrically connected when the transistor T1 is switched on and are isolated from each other when the transistor T1 is switched off. During operation, the supply node VS is supplied with a supply voltage V Swhile an electrical load is connected to the output terminal OUT, which is Fig. 1 by the impedance Z L When transistor T1 is switched on, a load current i LOAD from a voltage supply via the node VS, the load current path of the transistor T1 and the node OUT to the load Z L . In the example shown, the load Z L connected between the OUT node and ground. The intelligent semiconductor switch is therefore a high-side switch. In other embodiments, the semiconductor switch 10 can be designed as a low-side switch, in which case the supply terminal is generally connected to ground.

[0015] In the Fig. In the example shown in Figure 1, transistor T1 is a MOS (metal oxide semiconductor) field-effect transistor (MOSFET). In other embodiments, other transistor types may also be used (e.g., bipolar transistors, insulated gate bipolar transistors, etc.). The control electrode of transistor T1 (in the case of a MOSFET, this is the gate electrode) is controlled, for example, by a so-called gate driver circuit 12. This is typically designed to generate a corresponding gate voltage V in response to a logic signal ON. G which is fed to the gate electrode of transistor T1. Various variants of gate driver circuits (gate drivers for short) for high-side and low-side switches are known per se and will therefore not be discussed further here.

[0016] The logic level of the logic signal ON determines whether the transistor T1 should be switched on or off. In the example shown, this logic signal ON is generated by the control circuit 11 contained in the intelligent semiconductor switch. The control circuit 11 may include a supply circuit and is therefore connected to the nodes VS (supply voltage Vs) and GND (supply node at ground potential). Various sensor signals or measured information (e.g., concerning the level of the load current or the temperature) can be supplied to the control circuit 11. Various sensors and measuring circuits for measuring load current and temperature are known per se and are therefore described in Fig. 1 not shown.

[0017] An intelligent semiconductor switch is normally designed to communicate with other circuits, such as a controller 20 (e.g., a programmable microcontroller). For this purpose, the control circuit 11 may have a communication interface. For example, the communication interface may enable serial data transmission. In practice, SPI (Serial Peripheral Interface) is often used today. Fig. In the example shown in Figure 1, the intelligent semiconductor switch 10 has an input node IN for receiving an input signal, which is also a logic signal. An input signal with a high level (IN=1), for example, indicates that the control circuit 11 should turn on the transistor T1. Similarly, an input signal with a low level (IN=0) indicates that the control circuit 11 should turn off the transistor T1. Typically, the level of the logic signal ON corresponds to the input signal at the input node IN, unless the control circuit detects a shutdown condition such as excessive temperature, excessive current, or undervoltage (supply voltage V S is too small) or the like. The shutdown conditions may vary depending on the implementation and application and may also be partially configurable (e.g., by the controller 20).

[0018] In the Fig. In the example shown in Figure 1, the intelligent semiconductor switch 10 has a diagnostic input DEN and a diagnostic output IS. A logic signal can be supplied to the diagnostic input DEN, which can activate and deactivate a diagnostic mode of the control circuit 11, wherein the control circuit 11 outputs a diagnostic signal i in the diagnostic mode at the output IS. S which in this example is a current signal. In the example shown, a resistor R is connected between the diagnostic output IS and ground. S switched on. The diagnostic current i output at the output IS S generated across the resistor R S a corresponding voltage V D (V D =i S R S ), which can be fed, for example, to an analog input of the microcontroller 20. The microcontroller can generate a logic signal for the diagnostic input DEN and evaluate the output diagnostic signal i SMonitor the operation of the semiconductor switch and the load connected to it. The diagnostic signal can, for example, represent the load current level or indicate an error.

[0019] Fig. Figure 2 is a circuit diagram of an intelligent semiconductor switch with a leakage current detection function i LEAK in the load Z LOAD or parallel to the load. In Fig. 2 the leakage is measured by a parallel to the load Z LOAD switched resistor R LEAK symbolized, so that - even with inactive load - part of the load current i LOAD by as leakage current i LEAK by the resistance i LEAK It is understood that the resistance R LEAKrepresents only one possible cause of leakage. In practice, undesirable leakage currents can be caused by a variety of effects. For example, a leakage current can be caused by insufficient insulation in a cable or connector. Fig. 2 shown capacitor C L represents the capacitance at the output OUT. This can be formed by a discrete capacitive component, which is also included in the load Z LOAD The capacity of cables and connectors between output OUT and load Z LOAD can also be used for capacity C L contribute.

[0020] Leakage currents can have undesirable effects. In automotive applications, there is a risk that the car battery will discharge too quickly, resulting in the vehicle no longer being able to start after being parked for an extended period. For this reason, it is desirable to detect leakage currents as simply as possible and thus easily identify potential faults in a load or a load supply line. As already mentioned at the beginning, the standard current measurement function of the intelligent semiconductor switch is not available in idle mode, so leakage currents cannot be easily detected using current measurement.

[0021] The circuit from Fig. 2 is essentially the same as the circuit from Fig. 1, where Fig. 2 an additional comparator 13 is provided, which determines the condition V DS <V X For example, the logic signal S OL at a high level (SOL =1) when this condition is met. Where Vx is a predefined or configurable threshold. The timing diagrams below explain how the comparator 13 can be used together with the control circuit 11 to detect unwanted leakage currents while the intelligent semiconductor switch 10 is operating in idle mode.

[0022] The first (top) diagram in Fig. Figure 3 shows an example of the signal applied to the input IN, which changes from a low level to a high level at time t0, thus indicating the switching on of the transistor T1. In response to the level change in the input signal at time t0, the control circuit 11 also sets the logic signal ON from a low level to a high level (ON=1) to switch on the transistor T1. The delay time between corresponding edges of the input signal and the logic signal ON is negligibly small. The logic signal IN is shown in the fifth diagram of the Fig. 3. After switching on the transistor T1, the intelligent semiconductor switch operates in normal mode, meaning all diagnostic functions are available.

[0023] When transistor T1 is switched on, the output voltage V OUT , which is output at the output node OUT, to a value close to the supply voltage V S V appliesOUT = V S -V DS = V S -R ON · i LOAD , where R ON the (relatively small) on-resistance of transistor T1. The output voltage V OUT is in the second diagram the Fig. 3. The load current i LOAD is exemplified in the third diagram of the Fig. 3. The load current i LOAD depends on the characteristics of the load. Between times t0 and t1, the load requires a significant load current i LOAD At time t1 the load current falls below i LOAD a threshold value required to switch to idle mode, and the intelligent semiconductor switch switches from normal mode to idle mode. For what reasons the load current i LOAD It is irrelevant whether the load drops. This can be caused, for example, by a user manually deactivating the load.

[0024] At time t 10The controller triggers a leakage current detection (leakage current test) by detecting a high-level logic signal at the DEN input while transistor T1 is switched on and the intelligent semiconductor switch is operating in idle mode. The logic signal at the DEN input is shown in the fourth diagram of the Fig. 3. To perform the leakage current test, the transistor T1 is temporarily switched off, for example by the control circuit 11 sending the signal ON at time t 10 (or immediately thereafter) to a low level. Due to the high level at the DEN input, a diagnostic current is is output at the diagnostic output IS (i S =i S,OL ), which indicates that the condition V DS <V X is fulfilled (corresponds to V S -V OUT < V X or V OUT > V S -V X ).

[0025] After the transistor T1 has been switched off, the capacitance C Lat the output OUT the output voltage V OUT . However, when transistor T1 is switched off, the output voltage V OUT (ie the drain-source voltage V DS becomes larger), since the capacity C L is discharged. The current i LOAD , which is responsible for discharging the capacitor, is composed of the current flowing through the load (which can be very small when the load is inactive) and the leakage current i LEAK The greater the current, the faster the capacitance C L unloaded.

[0026] In the example shown, at time t 11 the voltage V OUT the threshold value V S -V X . The above-mentioned condition V OUT > V S -V X is therefore no longer fulfilled and the control circuit 11 reduces the diagnostic current from i S =i S,OL to is=0. This allows the microcontroller to determine the time span between the times t10 and t 11 The control circuit 11 receives this information directly from the comparator 13, which determines the condition V OUT > V S -V X monitored. The time period t 11 -t 10 depends on the current through the load Z LOAD and the leakage current i LEAK If the load is inactive, so that the current through the load is zero or negligible, the leakage current i LEAK essentially the time period t 11 -t 10 .

[0027] Shortly after time t 11 the leakage current test is finished and control circuit 11 switches the transistor T1 at time t 12 The intelligent semiconductor switch is still in idle mode at this time. In the example shown, the load Z LOADactivated again sometime later - at time t2 - (for whatever reason), the load current flowing through the load increases to the nominal value, which causes the intelligent semiconductor switch to leave idle mode and return to normal mode.

[0028] The comparator 13 enables the control circuit 11 to detect whether the time period t 11 -t 10 is smaller than a threshold value T K or not (t 11 -t 10 < T K ). If the condition t 11 -t 10 < T K fulfilled, then most likely the leakage current i LEAK too large. In the example shown, the diagnostic current is contains a pulse of length t 11 -t 10 , which also allows the controller 20 to determine the condition t 11 -t 10 < T K to check.

[0029] The threshold T Kcan be configured so that the specific application and depending on the capacity C L and the maximum permissible leakage current, a suitable threshold can be set. The output of the diagnostic current is is only an example and not absolutely necessary. As mentioned, the control circuit 11 can determine the condition t 11 -t 10 < T K using comparator 13. Forwarding the information (e.g., an error message) to an external unit such as controller 20 is also possible in other ways, such as using the aforementioned SPI interface. The specific implementation will depend on the specific application.

[0030] The already mentioned variant that the leakage test (leakage current test) is not carried out and controlled by the intelligent semiconductor switch 10, but by the controller 20, is in Fig. 4. The second, third, fourth and fifth diagrams in Fig. 4 are the same as the corresponding diagrams from Fig. 3. The only difference is that the temporary switching off of the transistor T1 is not triggered independently by the control circuit 11, but by the external controller 20, which actively switches off the semiconductor switch by means of the input signal at the input node IN (at time t 10 and after completion of the test (at time t 12 ) actively switches on again. In this case, the logic signal ON follows the input signal at the IN input. As mentioned above, instead of a logic signal, a corresponding command can also be transmitted via a serial communication interface such as SPI. The evaluation of the condition t 11 -t 10 < T K In this case, the controller 20 determines the pulse width in the current signal is (or in the corresponding voltage signal V D) and compare it with the threshold value T K This function of the controller 20 can be implemented, for example, by means of a processor and suitable software.

[0031] As mentioned, the capacitance CL is a design parameter that may depend on the application. Assume the value Vx (for the evaluation of the condition V OUT > V S -Vx) is 1.8V, the maximum permissible current (load current including leakage current) is 75 mA and the threshold value T K is 10ms, then the capacity C L approximately 420 µF (75mA· 10ms / 1.8V = 416.67 µF). If you want to reduce the capacitance and keep the other parameters the same, you will need an additional current source. In the example from Fig. 5 is this with Q P designated.

[0032] The circuit in Fig. 5 is a modification / extension of the circuit from Fig. 3. The only difference between Fig. 3 and Fig. 5 consists in the current source Q P , which is controlled by an electronic switch SW P can be activated and deactivated. The current source can also be formed by a simple resistor (pull-up resistor). The control signal S P to activate and deactivate the switch SW P (and thus the current source Q P ) can be generated, for example, by the controller 20. If, for example, the current source is designed to supply 37mA during the leakage current test (i P =37mA), the capacity C L Instead of 75mA (as in the previous example), only 38mA is discharged. This allows the capacity C L from 420 µF to around 210 µF (38mA · 10ms / 1.8V = 211.1 µF).

[0033] For a given capacity C L (e.g. 420 µF), given threshold T K (e.g. 10 ms) and given Vx (e.g. 1.8V) the maximum current C L· V X / T K(75.6mA in the current example). The current source current i P the current source Q P (Bias current) is superimposed on the leakage current i LEAK and thus changes - ceteris paribus - the maximum current. It is understood that the switchable current source Q P can also be arranged within the intelligent semiconductor switch 10. In one embodiment in which this is the case, the control circuit 11 can be configured to activate the current source (or a pull-up resistor) during the leakage current test and then deactivate it again.

[0034] Fig. 6 shows a modification / extension of the embodiment from Fig. 5. The circuit from Fig. 6 is essentially the same as the circuit from Fig. 5, where Fig. 6, the diagnostic output IS and the comparator 13 for the leakage current test are not required (and can therefore be omitted or not implemented). Instead, the controller 20 is designed to measure the output voltage V OUT to measure, for example by using a scaled version V OUT ' the output voltage V OUT an analog input (labeled A / D in the figures) of the controller 20. The scaling is realized in the illustrated circuit by means of a voltage divider formed by the resistors R1 and R2. These are connected in series between the output node OUT and ground. The center tap of the series circuit of R1 and R2 is connected to the analog input of the controller 20. Furthermore, Fig. 6 instead of the inputs IN and DEN a digital communication interface (specifically an SPI interface) is implemented.

[0035] The controller 20 can, for example, use an analog-to-digital converter to generate the scaled output voltage V OUT ' evaluate to the time interval t 11 -t 10 and compare this with a threshold value T K This function is explained using the timing diagrams in Fig. 7. The basic procedure is the same as in the example from Fig. 4. The first timing diagram of the Fig. 7 is the same as in Fig. 4 and shows the input signal at input node IN, with which the controller 20 can temporarily turn off transistor T1 to perform a leakage current test. The second diagram shows the current i P , which is supplied by the current source Q P In the current example, the controller activates the current source Q P before starting the leakage current test. At time t 10the transistor T1 is switched off and the leakage current test begins; the capacitor C L is discharged with the effective discharge current i LOAD -i P amounts.

[0036] The third diagram shows the voltage V OUT ' at the center tap of the voltage divider, which is fed to the controller 20. This can generate a corresponding digital signal V OUT ' [n] (n is a time index and denotes the individual samples) and compare it with a threshold value V TH compare (V TH =V S -V X ). In the example shown, this threshold value V TH at time t 11 The controller 20 can easily determine whether the threshold value V TH before or after time t 10 +T K is reached (T K is the time threshold discussed above) without the time period t 11 -t 10to be determined quantitatively (this applies to all examples). The fourth diagram shows the load current curve and is the same as in the previous examples.

[0037] It is understood that the embodiments described here can be modified in various ways without changing the basic function of the leakage current detection described here. For example, in the last example ( Fig. 6 and Fig. 7) The diagnostic input DEN is not necessarily required. The input node IN is not necessary if a digital communication interface such as an SPI is provided in the intelligent semiconductor switch. The current source Q P can be located within the intelligent semiconductor switch or externally. Instead of a single current source Q PMultiple current sources and / or pull-up resistors can also be used inside and / or outside the smart semiconductor switch. In this context, a pull-up resistor is understood as one possible implementation of a current source.

[0038] The intelligent semiconductor switch can be integrated into a single semiconductor chip arranged in a chip package. Alternatively, the components of the intelligent semiconductor switch can be integrated into two or more chips arranged in a single chip package. The input nodes IN and DEN, the output node OUT, the supply node VS, the diagnostic output IS, and the ground terminal GND can be implemented as regular chip pins, solder balls, and the like.

[0039] As mentioned, the controller 20 can be a microcontroller that includes a processor along with peripherals such as analog-to-digital converters, memory, etc. The memory contains processor instructions that can be executed by the processor. In this way, the function of the controller 20 can be determined essentially by software. However, this is not necessarily the case. Combined software and hardware solutions with one-time programmable (OTP) logic are also possible.

[0040] The examples described here are summarized below. It should be understood that this is not a complete list of essential features, but merely an exemplary summary.

[0041] A first example concerns a method for an intelligent semiconductor switch, which is described in Fig. 8 is shown as a flow chart. Accordingly, the method comprises activating (switching on) a semiconductor switch (see Fig. 8, step S1), which connects a supply node to which a supply voltage is provided, to an output node to which an electrical load is connected, in order to apply an output voltage to the electrical load (cf. Fig. 2, Fig. 5 or 6, by switching on transistor T1, the nodes VS and OUT are electrically connected). With the semiconductor switch switched on, a test is performed to detect any leakage current (leakage current test). This test involves the (temporary) deactivation of the semiconductor switch (see Fig. 8 Step S2) to disconnect the electrical load from the supply node. This means that the output voltage is only buffered by the capacitor at the output node, and the capacitor is discharged (see Fig. 3, Fig. 4 or Fig. 7). The test also includes checking whether a time (see time period t 11 -t 10 in Fig. 3, Fig. 4 and Fig. 7), which elapses until the output voltage falls below a first voltage level, is less than a threshold value (see Fig. 8 Step S3). The semiconductor switch is then reactivated (see Fig. 8, step S4).

[0042] The time (e.g. t 11 -t 10 ), which elapses until the output voltage falls below the first voltage level (V OUT ≤V TH ), does not have to be measured explicitly. A person skilled in the art is familiar with various ways of comparing time intervals (e.g., represented by pulse lengths in logic signals). In one example, the time t 11 -t 10 explicitly measured and compared with the threshold value (e.g. digitally in the controller 20, cf. Fig. 6). The threshold value can be determined from the output capacity (cf. e.g. C L in Fig. 2) and / or a maximum permissible leakage current i LEAK,max depends.

[0043] In one embodiment, the semiconductor switch is activated and deactivated by means of a control circuit, wherein the control circuit (cf. Fig. 2, Fig. 5 or Fig. 6) can operate in normal mode and idle mode. "Idle mode" is simply a name for an operating mode with low power consumption, in which many components and functions of the intelligent semiconductor switch are inactive and unavailable. Idle mode usually requires that the load current is less than a current threshold. Performing the leakage current test is particularly useful in idle mode when the load consumes no or only a very small quiescent current. The leakage current test can be triggered at any time by a diagnostic command (e.g. received via the SPI interface or a level change at the DEN input, see Fig. 2, Fig. 5 or Fig. 6).

[0044] In some embodiments, a current pulse or a voltage pulse can be output at a diagnostic output, wherein the pulse length corresponds to the time that elapses until the output voltage falls below the first voltage level (see, for example, Fig. 3, diagnostic current is at output IS).

[0045] Further examples relate to an intelligent semiconductor switch having at least one transistor connected between a supply node and an output node and connected to a control circuit (cf. Fig. 2, Fig. 5, or 6). This control circuit is designed to switch the transistor on and off. The control circuit is designed to perform a leakage current test in response to a diagnostic command. In this case, the transistor is temporarily switched off, and a pulse with a pulse length is output as a diagnostic signal (see, for example, Fig. 2, signal is), which corresponds to the time that elapses until the output voltage provided at the output node falls below a first voltage level. The transistor is then switched on again. A current source may be coupled to the output node and configured to output (i.e., feed) a bias current at the output node. The bias current is superimposed on the load current flowing through the transistor, with the maximum allowable leakage current i LEAK,max may depend on the bias current. The current source can be located inside or outside the intelligent semiconductor switch.

[0046] The test whether the pulse length of the diagnostic signal is smaller than a threshold value can be carried out by an external controller (see Fig.5, Controller 20). Alternatively, this test can also be performed by the internal control circuit of the intelligent semiconductor switch. In this case, output of the diagnostic signal is not necessary.

Claims

[1] A method comprising: Activating a semiconductor switch (T1) which has a supply node (VS) at which a supply voltage (V S ), with an output node (OUT) to which an electrical load (Z LOAD ) is connected to provide an output voltage (V OUT ) to the electrical load (Z LOAD ) and Perform a leakage current test, which includes: Deactivating the semiconductor switch (T1) to switch the electrical load (Z LOAD ) from the supply node (VS); Check whether a time (t 11 -t 10 ), which passes until the output voltage (V OUT ) a first voltage level (V TH =V S -V X ) is less than a threshold value (T K ); and reactivating the semiconductor switch (T1). [2] The method according to claim 2, wherein checking whether the time (t 11 -t 10 ) is smaller than the threshold value (T K ), which includes: Measuring time (t 11 -t 10 ), which passes until the output voltage (V OUT ) the first voltage level (V TH =V S -V X ) and Compare the measured time (t 11 -t 10 ) with the threshold value (T K ). [3] The method according to claim 1 or 2, wherein the threshold value (T K ) of that of a capacitance (C L ) and / or depends on a maximum permissible leakage current. [4] The method according to any one of claims 1 to 3, wherein the semiconductor switch (T1) is activated and deactivated by means of a control circuit (11) which can operate in a normal mode and in an idle mode, wherein the idle mode requires that a load current (i L ) flowing through the semiconductor switch (T1) to the output node (OUT) is less than a current threshold. [5] The method according to claim 4, wherein the leakage current test is performed while the control circuit (11) is operating in idle mode. [6] The method according to any one of claims 1 to 5, wherein leakage current testing is started in response to receipt of a diagnostic command. [7] The method according to claim 6, where the diagnostic command is received via a digital communication interface or where the diagnostic command is a level change in a logic signal received at a diagnostic input (DEN). [8] The method according to any one of claims 6 or 7, further comprising: Outputting a current pulse (i S ) or a voltage pulse at a diagnostic output (IS), where the pulse length corresponds to the time (t 11 -t 10 ) that passes until the output voltage (V OUT ) the first voltage level (V TH =V S -V X ) falls below. [9] An intelligent semiconductor switch having: at least one transistor (T1) connected between a supply node (VS) and an output node (OUT); a control circuit (11) designed to switch the transistor (T1) on and off, wherein for carrying out a leakage current test, the control circuit is designed to to switch off the transistor (T1), to check whether a time (t 11 -t 10), which elapses until an output voltage (V OUT ) a first voltage level (V TH =V S -Vx) is less than a threshold value (T K ); and to switch the transistor (T1) back on. [10] An intelligent semiconductor switch having: at least one transistor (T1) connected between a supply node (VS) and an output node (OUT); a control circuit (11) designed to switch the transistor (T1) on and off, wherein for carrying out a leakage current test, the control circuit (11) is designed to to switch off the transistor (T1), to generate a diagnostic signal (is) comprising a pulse with a pulse length that corresponds to that time (t 11 -t 10 ) that elapses until an output voltage (V OUT) a first voltage level (V TH =V S -V DS,OL ) and to switch the transistor (T1) back on. [11] The intelligent semiconductor switch according to claim 10, further comprising: a circuit node (DEN) for receiving a logic signal by the control circuit (11), wherein the diagnostic command is signaled by the logic signal assuming a predefined level. [12] The intelligent semiconductor switch according to claim 10 or 11, further comprising: a digital communication interface designed to receive the diagnostic command. [13] The intelligent semiconductor switch according to any one of claims 10 to 12, further comprising: a current source (Q P ) coupled to the output node (OUT) and configured to supply a bias current (i P) at the output node (OUT), which corresponds to the load current (i LOAD ) superimposed. [14] The intelligent semiconductor switch according to claim 13, wherein a maximum allowable leakage current depends on the bias current. [15] A circuit having the following: at least one transistor (T1) connected between a supply node (VS) and an output node (OUT); a control circuit (11) designed to switch the transistor (T1) on and off, a controller (20) coupled to the control circuit (11) which is designed to carry out a leakage current test, to switch off the transistor (T1) using the control circuit (11), to check whether a time (t 11 -t 10 ), which elapses until an output voltage (V OUT ) a first voltage level (V TH=V S -V X ) is less than a threshold value (T K ), and to switch the transistor (T1) back on. [16] The circuit according to claim 15, wherein the controller (20) is configured to signal an excessive leakage current if the test shows that the time (t 11 -t 10 ) is shorter than the threshold value (T K ). [17] The circuit according to claim 15 or 16, wherein the controller (20) is adapted to generate a first logic signal (IN) for the control circuit (11) which causes the control circuit to switch the transistor (T1) on and off. [18] The circuit according to one of claims 15 to 17, wherein the controller (20) is designed to generate a second logic signal (DEN) for the control circuit (11), which causes it to generate a diagnostic signal (i S) which is dependent on the load current (i LOAD ) depends. [19] The circuit according to any one of claims 10 to 18, wherein the control circuit (11) can operate in a normal mode and in an idle mode, and wherein in the idle mode the load current (i LOAD ) is less than a current threshold. [20] The circuit of claim 19, wherein the leakage current test is performed during idle mode and in response to a diagnostic command.

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