TESTING SYSTEM FOR CHECKING A MULTIPLE OF CONNECTIONS IN A CABLE TRAY

Abstract

The disclosure relates to a test system (100) for checking a plurality of connections of a cable harness for faultlessness, wherein the test system (100) comprises: a plurality of test adapters (110) for testing respective connections of the cable harness; a plurality of control boards (120), wherein each control board is electrically connectable to one or more test adapters (110) of the plurality of test adapters; and a plurality of segment controllers (130) that are connectable to a test computer (140) via a bus system (150), wherein each segment controller (130) is electrically connectable to one or more control boards (120) of the plurality of control boards;wherein each test adapter (110) of the plurality of test adapters comprises a microcontroller (111) which is configured to perform a test query regarding the respective connection and to forward information about it to the test computer (140) via the corresponding control board (120) and segment control (130).

Description

Technical field

[0001] The present invention relates to a test system for checking a plurality of connections or pins of a cable harness, preferably in the automotive sector, for fault-free operation. The invention relates in particular to a novel hardware bus structure for such a test system. State of the art

[0002] In the automotive industry, cable harness manufacturing involves combining cables according to design specifications on a special workbench or a nail board (forming board) and clamping them together. This harness, which has limited flexibility, is then installed in the vehicle. Despite increasing automation, cable harnesses in the automotive industry are still largely manufactured manually. This is primarily due to the numerous movements involved, such as threading cables or strands into tubing or threading heat-shrink tubing onto them, wrapping with fabric tape, especially at branch points, cutting, stripping, and crimping contacts onto the wires, connecting tubing, and securing strands with tape, clamps, or cable ties. A test bench can be used to perform a 100% electrical function test of a cable harness.The testing computer queries the production system for order data and generates the test sequence from it. Current testing technology utilizes special test benches for testing the cable harnesses. This testing technology is designed as a pure master-slave system, tailored to a specific cable harness and only expandable with considerable effort. While some steps, such as cutting, stripping, and contacting the wire, can already be automated, the majority of the work still needs to be done manually. Description of the invention

[0003] One object of the invention is therefore to create an improved testing system for verifying the fault-free condition of cable harnesses, which can be flexibly extended to other types of cable harnesses with minimal effort, and at the same time offers a cost-effective and reliable solution for verifying the fault-free condition of cable harnesses. Furthermore, it is an object of the invention to further increase the automation of the individual testing steps.

[0004] The problem is solved by the subject matter of the independent claims. Advantageous embodiments of the invention are specified in the dependent claims, the description, and the accompanying figures.

[0005] The inventive solution is based on the idea of ​​creating a new testing system in which a varying number of intelligent test adapters can be connected to a test computer. By connecting different bus systems in series, a flexible, segmented architecture is enabled. The developed bus structure eliminates data bottlenecks during transmission. Each participant can independently register with the master (test computer) by selecting the appropriate bus system. The use of standardized bus systems commonly used in microcontrollers optimizes costs.

[0006] The bus concept presented here offers a flexible, cost-effective, and expandable solution for the future of testing technology. It provides the following advantages over previous testing systems: flexible expandability of the testing system; independent registration of all bus participants with the test computer; no speed bottlenecks; retention of the advantages of a master-slave system; support for intelligent test adapters; and support for the distribution system concept.

[0007] According to a first aspect, the task described above is solved by a test system for checking a plurality of connections of a cable harness for fault-free operation, wherein the test system comprises the following: a plurality of test adapters for testing respective connections of the cable harness; a plurality of control boards, wherein each control board is electrically connectable to one or more test adapters of the plurality of test adapters; and a plurality of segment controllers that are connectable to a test computer via a bus system, wherein each segment controller is electrically connectable to one or more control boards of the plurality of control boards; wherein each test adapter of the plurality of test adapters comprises a microcontroller configured to perform a test query regarding the respective connection and to forward information about it to the test computer via the corresponding control board and segment controller.

[0008] The test query can be used, for example, to check whether a pin of the cable harness is plugged into the test adapter and / or whether, for example, the connector has a housing coding.

[0009] Such a test system offers improved verification of the fault-free condition of cable harnesses. The system can be flexibly expanded to other types of cable harnesses through the flexible connection of components such as test adapters, control boards, and segment controllers. It simultaneously provides a cost-effective and reliable solution for verifying the fault-free condition of cable harnesses.

[0010] The test adapters can be implemented, for example, as electronic circuit boards or electronic modules, on which a microprocessor handles the functional control and a connector serves to insert a corresponding connection or pin of the wiring harness. Additionally, a receptacle for the device under test can be provided. Furthermore, valves, latches, pushbuttons, LEDs, etc., can be mounted on the circuit board or module.

[0011] The control boards can be implemented as electronic circuits on a suitable printed circuit board.

[0012] The segment controls can be implemented as electronic circuit boards, on which a microprocessor takes over the logical controls, especially for processing the bus protocol of the bus system, advantageously DDS (Data-Distribution Service), since DDS is required by the manufacturer.

[0013] According to an exemplary embodiment of the test system, each segment controller of the plurality of segment controllers comprises a microprocessor configured to communicate with the test computer via a bus protocol of the bus system.

[0014] To process the tasks required when a DDS bus system is connected to the segment controller, a simple microcontroller is usually no longer sufficient; the computing power of a microprocessor is necessary. Equipped with such a microprocessor, the segment controller has sufficient computing power to meet customer-specific requirements for using a DDS bus system.

[0015] According to an exemplary embodiment of the test system, the bus system comprises an Ethernet-based DDS (Data Distribution Service) system.

[0016] With such a DDS system, customer-specific requirements for communication between the test computer and the segment control can be met.

[0017] The bus system can be based on Ethernet.

[0018] According to an exemplary embodiment of the test system, each test adapter has a specific hardware address; and a respective segment controller of the plurality of segment controllers is configured to forward messages from the test computer, which are directed to the specific hardware address, only to the control board which is electrically connected to the test adapter which has the specific hardware address.

[0019] This allows messages to be sent from the test computer to the test adapters in a targeted manner, without the message overload that occurs with broadcast or multicast data transmission. The data interfaces in the test system are thus used efficiently and in a resource-saving manner.

[0020] According to an exemplary embodiment of the test system, each test adapter of the plurality of test adapters includes a memory configured to store information about how many connections or pins the test adapter has.

[0021] Each test adapter can use the same software, even though the hardware of the test adapters may be fundamentally different. This means that the software describes the lowest common denominator. A description can be stored in memory detailing which queries and test contours each test adapter possesses. In this way, the basic software of the test adapter can acquire a flexible description.

[0022] This offers the technical advantage that the test adapters are intelligent test adapters that can remember how many connections, pins, or test pins they have. The test adapter can store the number of its test pins and I / O queries. The status (OK or not OK) of the test pins, however, comes from the dASK control board. The status of the simple I / O queries can be stored in the test adapter.

[0023] According to an exemplary embodiment of the test system, the microcontroller of the test adapter is configured to recognize and store in memory at least one of the following pieces of information, particularly preferably all of the following: a number of connections or test pins of the test adapter; a connector coding of the test adapter; and / or a locking capability of the test adapter.

[0024] The connector coding of the test adapter can, in accordance with the present invention, include information on a contour of the test adapter and / or on the arrangement of the connections or test pins of the test adapter.

[0025] The locking capability of the test adapter can include information about a receptacle designed in such a way that a locking mechanism and / or a CPA (Connector Position Assurance) contour of the corresponding connector of the cable harness can be recorded and detected by means of the receptacle.

[0026] This offers the technical advantage that the test adapters are intelligent test adapters that can store a wide variety of information about the pins and make it available to the test computer for evaluation.

[0027] According to an exemplary embodiment of the test system, the microcontroller of the test adapter is configured to store an identification of the test adapter, in particular a hardware address of the test adapter. Alternatively, the identification of the test adapter or the hardware address can also be stored in memory.

[0028] This offers the technical advantage that the test adapters are intelligent test adapters that can be specifically addressed and queried by the test computer by sending a message to the respective identification or hardware address of the test adapter. The message could, for example, be a DDS data packet, which can be converted into a CAN or CAN-FD data packet by the test system.

[0029] According to an exemplary embodiment of the test system, each test adapter of the plurality of test adapters comprises a connector into which the respective connection of the cable harness can be inserted; wherein the connectors of at least two test adapters of the plurality of test adapters are shaped differently and are designed to enable testing of differently designed connections of the cable harness.

[0030] This offers the technical advantage that the testing system can check different types of connections or pins of cable harnesses, for example connections or pins of different sizes or types.

[0031] According to an exemplary embodiment of the test system, the test system comprises a plurality of power supply controllers, wherein a power supply controller of the plurality of power supply controllers can be switched between a respective control board and a test adapter connectable to the control board; wherein the power supply controller is configured to supply the test adapter connected to it with voltage and to forward messages from the control board to the test adapter and from the test adapter to the control board.

[0032] The voltage supply controls offer the technical advantage that the pins of the cable harness under test can be supplied with the appropriate voltage in order to perform certain functional tests.

[0033] According to an exemplary embodiment of the test system, the control board can be connected to the power supply control via a CAN-FD (Controller-Area-Network Flexible Data Rate) bus; and the power supply control can be connected to respective test adapters via one or more CAN-FD buses.

[0034] This offers the advantage that the interfaces between the control boards and the power supply controllers can be implemented via the now common and widely used CAN-FD bus, which represents a cost-efficient and effort-reduced solution, as already developed and optimized components and drivers can be used.

[0035] Alternatively or additionally, the control board can be connected to the power supply control via a CAN (Controller Area Network) bus and / or the power supply control can be connected to respective test adapters via one or more CAN buses.

[0036] According to an exemplary embodiment of the test system, the test system comprises a plurality of bridge controllers, wherein a bridge controller of the plurality of bridge controllers can be switched between a respective segment controller and a plurality of control boards connectable to the segment controller; wherein the bridge controller is configured to forward messages from the test computer, which are directed to a specific test adapter, via the corresponding control board to the specific test adapter.

[0037] Bridge controllers offer the technical advantage of functioning as independent masters, capable of sending their responses to the segment controller or its microprocessor. This also ensures that messages from the test computer are only forwarded to the test adapter(s) addressed by the test computer.

[0038] According to an exemplary embodiment of the test system, the respective segment control can be connected to the bridge control via one or more SPI (Serial Peripheral Interface) buses; and the bridge control can be connected to one or more control boards via one or more LVDS (Low-Voltage Differential Signaling) data lines; wherein the bridge control has a microcontroller designed to convert SPI data into LVDS data and vice versa.

[0039] This offers the advantage that the interfaces between segment controllers and bridge controllers can be implemented via the SPI bus, which is now the standard. This represents a cost-effective and less complex solution, as existing and optimized components and drivers can be used. The same applies to the interfaces between bridge controllers and driver boards, which can be implemented using the standard LVDS data lines.

[0040] This disclosure describes test systems for verifying the fault-free operation of wiring harnesses. A wiring harness is a bundle of individual wires, often pre-assembled, that transmit signals (information) or operating currents (power). The wires are routed as a cable bundle and sheathed or held together by clamps, cable ties, binding twine, or tubing. The wiring harness includes electrical connectors, referred to here as pins, which allow it to be electrically connected to the electrical or electronic components in the vehicle, thus wiring these components together. In addition to electrical connectors, the wiring harness may also include mechanical or pneumatic connections, such as hoses for windshield washer fluid, etc. The test system's task is to verify whether the wiring harness is fault-free by applying test signals to the wiring harness's pins and measuring whether a desired response to the test signals occurs. Brief character description

[0041] The invention will now be described in more detail with reference to exemplary embodiments and the figures. The figures show: Fig. 1 a schematic representation of a test system 100 according to a first embodiment for checking the connections of a cable harness for faultlessness; Fig. 2 a schematic representation of a test system 100 according to a second embodiment of the invention for checking the connections of a cable harness for faultlessness; and Fig. 3 a schematic representation of a test system 100 according to a third embodiment of the invention for checking the connections of a cable harness for faultlessness.

[0042] The figures are merely schematic representations and serve only to illustrate the invention. Identical or equivalent elements are consistently identified by the same reference numerals.

[0043] The following detailed description refers to the accompanying drawings, which form part thereof and illustrate specific embodiments in which the invention can be implemented. It is understood that other embodiments can also be used and structural or logical modifications can be made without deviating from the concept of the present invention. Therefore, the following detailed description is not to be understood as limiting. Furthermore, it is understood that the features of the various embodiments described herein can be combined with one another, unless specifically stated otherwise.

[0044] The aspects and embodiments are described with reference to the drawings, where the same reference numerals generally refer to the same elements. For explanatory purposes, numerous specific details are presented in the following description to provide a thorough understanding of one or more aspects of the invention. However, it may be obvious to a person skilled in the art that one or more aspects or embodiments can be implemented with a lesser degree of specific detail. In other cases, known structures and elements are shown schematically to facilitate the description of one or more aspects or embodiments. It is understood that other embodiments may be used and structural or logical modifications may be made without departing from the concept of the present invention.

[0045] Fig. Figure 1 shows a schematic representation of a test system 100 according to a first embodiment for checking the connections of a cable harness for faultlessness.

[0046] In Fig. Figure 1 shows a basic configuration of the test system 100. Examples of extended configurations of the test system 100 are shown in the Fig. 2 and Fig. 3 shown and described.

[0047] The test system 100 is used to check multiple connections of a wiring harness for faults. The wiring harness and its connections or pins are in Fig. 1 not shown.

[0048] The test system 100 comprises: a plurality of test adapters 110 for testing respective connections or pins of the cable harness; a plurality of control boards 120, wherein each control board can be electrically connected to one or more test adapters 110 of the plurality of test adapters; and a plurality of segment controllers 130, which can be connected to a test computer 140 via a bus system 150, wherein each segment controller 130 can be electrically connected to one or more control boards 120 of the plurality of control boards.

[0049] In this context, each test adapter 110 of the majority of test adapters comprises a microcontroller 111, as for example in Fig. Figure 3 shows a device that is designed to perform a test query regarding the respective connection or pin of the cable harness and to forward this information to the test computer 140 via the corresponding control board 120 and segment control 130. The test query originates, for example, from the test computer, which retrieves the order data from the production system and generates the test sequence and the corresponding test queries for the test adapters.

[0050] The test computer 140 can be part of the test system 100, as shown here in Fig. 1 shown. Alternatively, it can also not be part of the test system 100 and function as a separate external unit to which the test system 100 can establish a connection via an interface, here the bus system 150.

[0051] The individual components of the test system 100 can each be electrically interconnected via electrical interfaces. The test system 100 comprises a plurality of such components, i.e., test adapters 110, control boards 120, and segment controllers 130, which can each be electrically interconnected.

[0052] The Test System 100 is therefore flexibly expandable by allowing the number of test adapters 110, control boards 120, and segment controllers 130 to be increased and the corresponding electrical connections to be made. Furthermore, the existing connections can be reconfigured or modified to implement different circuit diagrams or schematics for testing different types of wiring harnesses. These are typically larger wiring harnesses with greater meshing and a greater number of nodes, developed for new vehicle models.

[0053] But the testing system is also able to flexibly switch between different circuit diagrams that characterize specific cable harnesses.

[0054] In the test system 100 presented here, each segment controller 130 of the majority of segment controllers can include a microprocessor 131 which is designed to communicate with the test computer 140 via a bus protocol of the bus system 150.

[0055] A bus, or data bus, is a system for transmitting data between multiple participants over a shared transmission path. The bus protocol governs the data transmission of each participant over the bus. If data transmission is taking place between two participants, the other participants must remain silent at the same time, as otherwise they would cause interference. The bus protocol regulates the time of speaking privileges, or permission to transmit data over the bus, according to a (time or signal) schedule known to all participants.

[0056] The bus system 150 can in particular include an Ethernet-based Data Distribution Service (DDS) system, in which Ethernet is used as the physical medium.

[0057] DDS is a middleware solution for data-centric communication in highly dynamic distributed systems. It is based on a publisher-subscriber concept that supports deterministic resource management. Using Quality of Service (QoS) parameters, a subscriber can declaratively define its data transmission quality requirements. It can also create filters to, for example, receive only data within a specific value range. Depending on the implementation, the components (publisher and subscriber) can locate each other or via a central server.

[0058] In the test system 100 presented here, each test adapter 110 can have a specific hardware address. A segment controller 130, or the majority of segment controllers, can be configured to forward messages from the test computer 140, which are addressed to the specific hardware address, only to the control board 120 that is electrically connected to the test adapter 110 that has the specific hardware address. This allows for targeted communication and prevents a flood of unnecessary messages.

[0059] Each test adapter 110, or the majority of test adapters, can, for example, include a memory configured to store information about how many connections the test adapter 110 has. The test adapter knows the status of the I / Os. The control board (dASK) 120, on the other hand, knows the status of the test pins.

[0060] The test adapter 110 is therefore not a purely mechanical component that merely serves to insert the pins, but rather the test adapter 110 according to the invention is an intelligent test adapter 110 equipped with a microcontroller 111 for processing information and a memory for storing information. The memory can be part of the microcontroller 111 or it can be an external memory implemented externally on the test adapter 110, separate from the microcontroller 111.

[0061] The microcontroller, or alternatively the memory of the test adapter, can be configured to store an identification of the test adapter 110, in particular a hardware address of the test adapter 110. This allows the test computer 140 to address each test adapter 110 individually and avoids the need to send a flood of messages, such as via broadcast or multicast.

[0062] For example, the microcontroller 111 of the test adapter 110 can be configured to recognize and store the following information in memory: a number of test pins of the test adapter 110; a connector coding of the test pins; and / or a locking capability of the test pins.

[0063] Each test adapter 110, or the majority of test adapters, can include a connector 112, as for example in Fig. 3 shown, into which the respective pin of the wiring harness can be inserted.

[0064] The connectors 112 of at least two test adapters 110 of the majority of test adapters can be shaped differently, as for example in Fig. 3 shown, and designed to allow testing of differently designed connections or pins of the cable harness.

[0065] Fig. Figure 2 shows a schematic representation of a test system 100 according to a second embodiment of the invention for checking the connections of a cable harness for faultlessness.

[0066] The in Fig. The test system 100 shown in section 2 is an extension of the one described above. Fig. 1 described test system 100. Additional components are shown, the function of which is described below.

[0067] The testing system 100 includes, in addition to the components listed in Fig. The components described in section 1 include a plurality of power supply controllers 160. In this case, a power supply controller 160 of the plurality of power supply controllers can be switched between a respective control board 120 and a test adapter 110 that can be connected to the control board 120.

[0068] The power supply control 160 is designed to supply voltage to the test adapter 110 connected to it and to forward messages from the control board 120 to the test adapter 110 and from the test adapter 110 to the control board 120.

[0069] The control board 120 can, for example, be connected to the power supply control 160 via a CAN FD (Controller Area Network Flexible Data Rate) bus 161, as shown in Fig. 2 and also Fig. Figure 3 shows that the power supply control 160 can, for example, be connected to the respective test adapters 110 via one or more CAN FD buses 162, as shown in Fig. 2 and also Fig. Figure 3 illustrates this. Alternatively, a CAN bus can be used instead of the CAN-FD bus. The physical structure of both buses is the same; they only differ in the higher layers of the protocol.

[0070] The CAN bus (Controller Area Network) is a serial bus system and belongs to the fieldbus family. The CAN bus operates on the "multi-master principle," meaning it connects multiple electronic control units (ECUs) of equal priority. A CSMA / CR protocol resolves collisions (simultaneous bus access) without damaging the winning, higher-priority message. In the case of copper cabling, the CAN bus uses two twisted pairs of wires (CAN_HIGH and CAN_LOW) for balanced signal transmission. CAN_GND (ground) as a third wire is optional, but is often present along with a fourth wire for 5V power supply. The CAN network can be configured as a linear or star topology.

[0071] The CAN FD (Controller Area Network Flexible Data Rate) bus is an extension of the CAN bus. CAN FD is a data communication protocol used primarily for transmitting sensor data and control information over two-wire connections between different parts of electronic instrumentation and control systems. This protocol is used in modern high-performance vehicles. The main difference between classic CAN (Controller Area Network) and CAN FD is Flexible Data (FD). CAN FD allows electronic control units (ECUs) to dynamically switch between different data rates and longer or shorter messages. Faster data rates and further improvements in data capacity result in several system operational advantages compared to classic CAN.

[0072] The in Fig. The test system 100 shown in Figure 2 also includes a plurality of bridge controllers 170. A bridge controller 170 of the plurality of bridge controllers can be connected between a respective segment controller 130 and a plurality of control boards 120 that can be connected to the segment controller 130.

[0073] The bridge control 170 is designed to forward messages from the test computer 140, which are directed to a specific test adapter 110, via the corresponding control board 120 to the specific test adapter 110.

[0074] The respective segment controller 130 can, for example, be connected to the bridge controller 170 via one or more SPI (Serial Peripheral Interface) buses 171.

[0075] The bridge controller 170 can, for example, be connected to one or more control boards 120 via one or more LVDS (Low-Voltage Differential Signaling) data lines.

[0076] The bridge controller 170, for example, includes a microcontroller designed to convert SPI data to LVDS data and vice versa, in order to convert data between the two protocols.

[0077] The Serial Peripheral Interface (SPI) is a de facto standard for synchronous serial communication, primarily used in embedded systems for wired, short-range communication between integrated circuits. SPI employs a master-slave architecture, where a master orchestrates communication by providing the clock signal and chip selection signals that control any number of subordinate peripherals.

[0078] LVDS is an interface standard for high-speed data transmission. LVDS describes the physical layer of data transmission. Key characteristics include: differential voltage levels; relatively low voltage levels; and the fact that the signals are generated using a constant current source.

[0079] Fig. Figure 3 shows a schematic representation of a test system 100 according to a third embodiment of the invention for checking the connections of a cable harness for faultlessness.

[0080] The in Fig. The test system 100 shown in section 3 is an extension of the one described above. Fig. 1 and Fig. 2 described test system 100. The components are the same as above. Fig. 2 described, however, here is an example with a specific number of the above. Fig. The two components described are shown here, which is only an example. It goes without saying that any other number of components can also be used.

[0081] The functionality of the test system 100 is described in more detail below.

[0082] The following prerequisites are decisive for the bus system used in test system 100: The products, which are manufactured in large quantities (e.g., test adapter 110), must be inexpensive and robust. The hardware must also be accessible via DDS (physical Ethernet). Since the test benches vary in size, the system must be flexibly expandable. Participants should be able to communicate independently with a command provider / master (test computer 140, shown here in the diagram). Fig. (3 not shown) can register. Since the full DDS is not available for microcontrollers, an MPU (microprocessor) must be used. These are relatively expensive compared to microcontrollers.

[0083] Therefore, instead of a system where all participants can communicate directly with each other via DDS, the solution presented here uses the physical division of the test bench into segments. Each segment is equipped with an MPU (in the Fig. 1 and Fig. 2, referred to as segment control 130), which communicates via DDS. This results in a system with various nodes.

[0084] For the communication link from the measurement cards (dASK, also referred to in this disclosure as control boards 120) to the test adapters (dPA, 110), the CAN FD bus is suitable due to its cost-effective hardware and logical requirements (independent connection of individual participants). Here, the maximum number of participants is limited, especially in a variable star topology. Additionally, the speed must be reduced due to the length of the transmission paths. Therefore, according to the solution of the invention, the bus is further subdivided.

[0085] The structure is as follows: The test computer 140 (in Fig. (3 not shown) communicates via DDS (e.g., 1 GBit Ethernet) 150 with the segment controllers (MPU) 130. In this example, the microprocessor has 6 SPI buses 171 available. The segment controller 130 selects the data to be sent and only sends the information to the next microcontroller behind which, for example, the test adapter 110 is connected, for which the information is intended.

[0086] Two SPI buses 171 can be used, for example, to establish a 1:1 connection with the SPI-LVDS Bridge microcontroller 170 (also referred to in this disclosure as the bridge controller). This allows, for example, a full-duplex SPI connection with 50 Mbit / s to be implemented. This means that the Segment Controller 130 is the master for the transmit connection and sends new information to the Bridge microcontroller 170. The Bridge microcontroller 170 is an independent master on the second SPI connection and sends its responses to the microprocessor (MPU) 130.

[0087] In this example, each Segment Controller 130 can communicate with a maximum of three Bridge-microcontrollers 170. The Bridge-microcontrollers 170 in this example have eight full-duplex UART interfaces, via which the dASK boards 120 (also referred to in this disclosure as control boards or interface cards) are connected using a 1:1 LVDS line 172. Thus, the network is divided into eight independent interfaces per Bridge-microcontroller 170.

[0088] The Bridge-µController 170 is responsible for forwarding the information to the correct dASK 120. The LVDS line 172 is a full-duplex connection with, for example, a data rate of 12 Mbit / s, which can communicate independently.

[0089] The dASK 120 has two functions. On the one hand, it performs measurement tasks, and on the other hand, it forwards information. In this example, each dASK 120 is connected to the dPCUs 160 (also referred to as power supply controllers in this disclosure) via a CAN FD bus 161. Flexible expansion within the limits of the CAN FD bus is possible.

[0090] Since the number of test adapters (110) on a test bench is flexible, the use of the CAN FD bus is advantageous here. This enables independent communication without the disadvantages of a master-slave system.

[0091] The CAN FD bus 161 between the dASK 120 and dPCU 160 can, for example, be operated at 8 Mbit / s. The dPCUs 160 handle the power supply and forwarding of messages to the test adapters 110. In this example, the Fig. 3 also uses a CAN-FD-Bus 162, but with an exemplary data rate of only 1 Mbit / s. The reasons for this selection are the inexpensive and good availability of the driver chips, flexible adaptation to the number of participants (110), and the ability to transmit messages independently.

[0092] In this example, each dPCU 160 has two independent CAN FD drivers for the dPA 110s. Up to ten dPA 110s can be operated on each of these CAN FD drivers. The reason for the 1 Mbit / s data rate chosen for the test adapters 110s in this example is the consistently slower data transmission in the direction of the "branches" of this tree and the use of a star bus topology, which supports the flexible number of participants.

[0093] In this example configuration, the speeds towards the branches decrease as follows: 1 Gbit / s (Ethernet / DDS) => 50 Mbit / s (SPI) => 12 Mbit / s (LVDS) => 8 Mbit / s (CAN-FD) => 1 Mbit / s (CAN-FD). This has the advantage of minimizing potential bottlenecks. For example, if the last CAN-FD bus 162 were also operated at 8 Mbit / s, too much data could accumulate in the dPCU 160, which would then have to be sent further towards the root. Because in the test system 100 of the Fig. 3. If a speed boost is present, the risk of data accumulation in the dPCU 160 is reduced. This concept extends to the DDS 150. REFERENCE MARK LIST 100 testing systems 110 test adapters, dPA or intelligent test adapter 120 Control board, connection card, measurement card, dASK 130 Segment Control, Segment Controller 140 test computers 150 bus system, e.g. DDS 160 Power supply control, dPCU 170 Bridge control, Bridge-µController, spiLvdsBridge 171 SPI interface 172 LVDS interface 161 CAN-FD Bus 162 CAN-FD Bus 111 µController of the test adapter 112 connectors of the test adapter

Claims

[1] Test system (100) for checking a plurality of connections of a wiring harness for faultlessness, the test system (100) comprising: a plurality of test adapters (110) for testing respective terminals of the wiring harness; a plurality of control boards (120), each control board being electrically connectable to one or more test adapters (110) of the plurality of test adapters; and a plurality of segment controllers (130) which can be connected to a test computer (140) via a bus system (150), wherein each segment controller (130) can be electrically connected to one or more control boards (120) of the plurality of control boards; wherein a respective test adapter (110) of the plurality of test adapters comprises a microcontroller (111) which is designed to carry out a test query with regard to the respective connection and to forward information thereon to the test computer (140) via the corresponding control board (120) and segment controller (130). [2] Test system (100) according to claim 1, wherein a respective segment controller (130) of the plurality of segment controllers comprises a microprocessor (131) which is designed to communicate with the test computer (140) via a bus protocol of the bus system (150). [3] Test system (100) according to claim 1 or 2, wherein the bus system (150) comprises an Ethernet-based Data Distribution Service, DDS, system. [4] Test system (100) according to one of the preceding claims, wherein each test adapter (110) has a specific hardware address; and wherein a respective segment controller (130) of the plurality of segment controllers is configured to forward messages from the test computer (140) directed to the specific hardware address only to the control board (120) that is electrically connected to the test adapter (110) having the specific hardware address. [5] Test system (100) according to one of the preceding claims, wherein a respective test adapter (110) of the plurality of test adapters comprises a memory configured to store information about how many terminals the test adapter (110) has. [6] Test system (100) according to claim 5, wherein the microcontroller (111) of the test adapter (110) is designed to recognize and store in the memory at least one of the following information: a number of terminals of the test adapter (110); a plug coding of the test adapter; a locking capability of the test adapter. [7] Test system (100) according to one of the preceding claims, wherein the microcontroller (111) of the test adapter (110) is designed to store an identification of the test adapter (110), in particular a hardware address of the test adapter (110). [8] Test system (100) according to one of the preceding claims, wherein a respective test adapter (110) of the plurality of test adapters comprises a connector (112) into which the respective terminal of the wiring harness can be plugged; wherein the connectors (112) of at least two test adapters (110) of the plurality of test adapters are differently shaped and are designed to enable testing of differently designed connections of the cable harness. [9] Test system (100) according to one of the preceding claims, with a plurality of voltage supply controllers (160), wherein a voltage supply controller (160) of the plurality of voltage supply controllers is connectable between a respective control board (120) and a test adapter (110) connectable to the control board (120); wherein the voltage supply controller (160) is designed to supply voltage to the test adapter (110) connected to it and to forward messages from the control board (120) to the test adapter (110) and from the test adapter (110) to the control board (120). [10] Test system (100) according to claim 9, wherein the control board (120) can be connected to the power supply controller (160) via a Controller Area Network Flexible Data Rate, CAN FD, bus (161); and wherein the voltage supply controller (160) can be connected to respective test adapters (110) via one or more Controller Area Network Flexible Data Rate, CAN FD, buses (162). [11] Test system (100) according to one of the preceding claims, with a plurality of bridge controllers (170), wherein a bridge controller (170) of the plurality of bridge controllers is switchable between a respective segment controller (130) and a plurality of control boards (120) connectable to the segment controller (130); wherein the bridge controller (170) is designed to forward messages from the test computer (140) which are directed to a specific test adapter (110) to the specific test adapter (110) via the corresponding control board (120). [12] Test system (100) according to claim 11, wherein the respective segment controller (130) can be connected to the bridge controller (170) via one or more serial peripheral interface, SPI, buses (171); and wherein the bridge controller (170) is connectable to one or more control boards via one or more low-voltage differential signaling, LVDS, data lines; wherein the bridge controller (170) comprises a microcontroller configured to convert SPI data into LVDS data and vice versa.

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