Extrapolation of a semiconductor temperature based on an electrical temperature coefficient using a measured thermal resistance and an applied power loss

Abstract

The temperature of a semiconductor (HL) is determined by the following steps: (a) Heating a medium (M) thermally connected to the semiconductor (HL) to initial medium temperatures (T1) and measuring an electrical, temperature-dependent parameter (U1) of an internal region of the semiconductor (J) for these initial medium temperatures; (b) Determining the thermal resistance (R) between the semiconductor and a heat-dissipating surface by generating a second medium temperature (MT2). ​​The interior of the semiconductor is heated to a second temperature, different from the first semiconductor temperature (HT1), by a first power dissipation. The thermal resistance (R) is the ratio of the temperature difference between the medium temperature and the semiconductor temperature to the power dissipation. (c) A second power dissipation generates a second semiconductor temperature (T2) in the internal region (J). The parameter is measured for this temperature.This second temperature (T2) results from thermal resistance (R) and power dissipation. (d) A mapping is determined that maps the parameter (U) to the second semiconductor temperature (T2). The semiconductor temperature (TI) is determined based on figure (A). Furthermore, a power circuit (L) with a corresponding monitoring device is described.

Description

Power semiconductors are used in particular in electric vehicle drives in order to control the required power flows. In the ON state, a large current flows through the power semiconductor, thereby generating unavoidable power loss. In order to avoid overheating of the transistor, whether in normal operation or in the examination of test specimens which may already be mounted in a module, an accurate determination of the internal transistor temperature (in particular the junction temperature) is necessary, which, however, cannot be measured directly with a temperature sensor. Temperature-dependent parameters of the power semiconductor, i.e. electrical properties with a temperature coefficient, are therefore used in order to indirectly record the temperature. For example, the contact resistance or the voltage across an inverse diode of the transistor depends on the temperature, so that the measurement of this electrical parameter leads to the temperature in the interior of the transistor via the temperature coefficient in question.Merely extrapolating the relationship between the electrical parameter and the temperature, starting from a narrow temperature interval (about to 80° C.) to a higher, broad temperature range, is subject to significant errors especially in the case of SiC transistors, in particular at higher temperatures of up to 200° C., which should likewise be covered. However, a detection of numerous support points over a broad temperature interval, i.e. up to 200° C., would require a temperature cycle which lasts significantly longer, since the transistors would have to be heated not only to 80° C., but up to about 200° C. The temperature ranges mentioned are merely exemplary, but there is generally the problem that, in the case of a wide extrapolation of a low temperature range to high temperature ranges, measured values with a strong influence of errors are produced, while the time required is significantly increased in the case of a complete measurement of the entire, wide temperature range.It is therefore an object to show a possibility with which the internal temperature of a transistor test object can be determined for a broad temperature interval with high precision and little time expenditure.This object is achieved by the subject matters of the independent claims. Further characteristics, features, embodiments and advantages result from the dependent claims, the description and the figures.It is proposed to calibrate the test specimens first, this being understood to mean that the semiconductors are temperature-controlled to first temperatures and an associated electrical parameter is detected or measured. This can be done, for example, by tempering the semiconductor (alone or already mounted in a power module) with a medium that has the first temperatures. The semiconductor is brought to different first temperatures and the associated parameter is detected on the basis of associated measurement values. These first temperatures or medium temperatures (if the semiconductor is located in the temperature-controlled medium) relate to a first temperature range which, for example, extends up to a temperature limit of, for example, 80 or 90° C. As a result, the relationship between the electrical, temperature-dependent parameter and the temperature for the first temperatures is captured sufficiently precisely. In this case, the semiconductor (or the interior of the semiconductor) can be tempered by tempering a heat emission surface which is connected to the semiconductor in a heat-transferring manner. A heat dissipation surface of a power module in which the semiconductor is provided and in which the semiconductor is heat-conductively connected to the heat dissipation surface can be tempered. The heat emission surface (and thus the semiconductor) can be tempered by means of a medium which is provided or guided past (directly or indirectly) the heat emission surface. The medium thereby determines the temperature of the semiconductor and in particular of the interior of the semiconductor.In order to now also record the relationships between electrical parameter and semiconductor temperature for second temperatures, for example for a temperature range which lies above the first temperatures, the following is carried out: the thermal resistance between the inner region of the semiconductor and a heat emission surface of a power module in which the semiconductor is thermally bonded is determined by thermally bonding the power module or its heat emission surface to a medium having a specific temperature (a moderate temperature such as 20° C.), while the semiconductor (or the inner region of the semiconductor) is tempered to a different temperature by achieving a power loss in the (inner region of the) semiconductor, but which is situated in the region of the first temperatures, for example at its maximum. Since the power dissipation introduced is known (since it has been adjusted), and furthermore the temperature of the medium can be measured, which determines the temperature of the heat emission surface of the power module, the thermal resistance results from the ratio of the temperature difference between the inner region of the semiconductor and the heat emission surface of the power module, which in turn corresponds to the temperature of the medium.The heat resistance refers to heat conduction / heat connection between the inside of the semiconductor and a heat release surface of the power module to which the semiconductor is heat-transmittingly attached. The thermal resistance relates in particular to the heat transfer from the interior of the semiconductor to the heat emission surface or thermal interface of the power module in which the semiconductor is located and in which the semiconductor is connected in a heat-transferring manner. The heat emission surface is, for example, a cooler or a part of a cooler, for example a pin fin field, which projects into a cooling channel. The heat emission surface is preferably thermally connected to a temperature control system, for example to the medium or to a temperature control device in which the medium is located (and which is temperature controlled by the temperature control device). In order to determine the thermal resistance, the heat emission surface of the power module is thus cooled with the medium. For this purpose, the heat emission surface is in direct contact with the medium, for example by virtue of the heat emission surface being immersed in the medium or being flowed around by the latter. It is not necessary to also submerge the semiconductor into the medium. Rather, in the determination of the thermal resistance, the medium is used for cooling in the manner in which it is also used in the usual operation of the power module. If the structure of the power module provides that although the heat emission surface, but not the semiconductor, is surrounded by a cooling medium, the heat emission surface, but not the semiconductor, is surrounded by the medium even when the heat resistance is determined.After the thermal resistance existing between the interior of the semiconductor and the heat emission surface of the power module has thus been determined (or has been provided in some other way), an increased power loss is generated in the semiconductor, wherein the power loss is determined or retained in this case (if it is not present anyway) and the associated electrical, temperature-dependent parameter is determined. The higher power loss is such that a second temperature above the first temperatures results, that is to say above the range for which the relationship between temperature and parameter is determined for the first temperatures. The temperature of the inner region, which results from the higher power loss, is now determined "backwards", on the basis of the previously determined thermal resistance and the (known) power loss. In this case, the relationship between power loss and temperature (thermal resistance) is applied in the opposite direction.Since it is now possible to determine the temperature inside the semiconductor on the basis of the (known, since predefined) power loss and the thermal resistance, the temperature inside the semiconductor can thus be set (by means of the known thermal resistance and the adjustable power loss) to a second temperature outside the first temperatures. In other words, the temperature of the interior of the semiconductor can thus be set to a (second) temperature of a second temperature range after the direct relationship between temperature and parameter has been determined with first temperatures (a first, lower temperature range). The second temperature, which can be determined on the basis of the (known) thermal resistance and the (known) power loss, can thus be assigned the resulting value for the parameter. The (second) temperatures of the second temperature range, which are determined on the basis of the (known) thermal resistance and the (known) power loss, are assigned the associated value of the parameter. This assignment allows, in the case of the present parameter value, also (second) temperatures to be determined which prevail in the interior of the semiconductor. This assignment is also referred to as an additional mapping.Therefore, for the second temperature or for the temperatures of the second temperature range-as well as for the first, lower temperatures-a relationship is obtained between the value of the electrical, temperature-dependent parameter ("parameter value") and the temperature which exists in the interior of the semiconductor. On the basis of these relationships ("additional mapping"), the temperature for ranges of the first temperatures and ranges of the second temperatures can be determined on the basis of the values of the parameter for the first temperatures and also for the second temperatures, starting from the parameter value, using the relationship between (second) temperatures and parameter value.The aforementioned temperatures relate to the semiconductor temperature, that is to say to the temperature of an inner region of the semiconductor (in particular of the transistor). By using the thermal resistance, the temperature range for which the relationships between the value of the parameter and temperature are present can be extended, in particular to a range above the temperatures for which the relationships between temperature and parameter are determined directly by tempering the semiconductor or the heat emission surface connected thereto to the relevant temperature. It is therefore not necessary to bring the semiconductor, and in particular the semiconductor temperature, to a large number of temperatures for an entire temperature range in order to then determine the respectively associated parameter values. Rather, the semiconductor is brought to different temperatures only for a part of the temperature range (via the heat emission surface connected thereto) and the associated parameter is measured, while a relationship between parameter values and temperature is established by means of the thermal resistance for a further temperature range (for example above the temperature range mentioned). This relationship is represented by an additional mapping.A method for determining a temperature of a semiconductor is therefore described, in which the semiconductor is first tempered (in a first step). A medium is tempered which is connected to the semiconductor in a heat-transferring manner. This can be done by mounting the semiconductor (directly or via a substrate structure) on a heat emission surface and dipping or rinsing the heat emission surface in the medium. The semiconductor can therefore already be installed in a power module which also comprises the heat emission surface (for example as a cooler element). The semiconductor is connected to the heat emission surface in a heat-transferring manner, so that a temperature control of the heat emission surface by means of the medium leads to a temperature control of the semiconductor (and of the interior of the semiconductor). The semiconductor, and in particular the interior of the semiconductor, assumes the temperature of the medium. The medium is tempered to first medium temperatures. An electrical parameter of the semiconductor is detected which depends on the semiconductor temperature, in particular on the temperature of an inner region of the semiconductor. This is carried out for the first medium temperatures. This results in a relationship between electrical parameter and semiconductor temperature. Preferably, for a plurality of the first medium temperatures, the associated parameter which results at these temperatures is detected. The first medium temperatures lie in a first medium temperature range. The associated parameter is thus detected for the first medium temperatures in order to thus determine a relationship between the parameter (the parameter value) and the medium temperature for some of the first medium temperatures. In this case, it is provided in particular that the semiconductor is tempered to the medium temperature (by the medium). In this case, no power loss is generated in the semiconductor. The temperature control of the medium is thus associated with the temperature control of the inner region of the semiconductor to the temperature of the medium. The temperature control of the medium to which the semiconductor is connected in a heat-transferring manner thus corresponds in this step to the temperature control of the inner region of the semiconductor or of the semiconductor itself to first medium temperatures.The relationship between the associated parameter (value) and the relevant medium temperature or semiconductor temperature of the same magnitude leads to at least one and preferably to a plurality of support points which represent a relationship or a mapping between semiconductor temperature and parameter (value). The medium, and thus also the semiconductor, is brought here to the first (medium) temperatures, which have an upper limit and are in particular lower than second medium temperatures or second semiconductor temperatures. The second medium temperatures lie in a second medium temperature range. This temperature is at least partially above the first medium temperature range.In a further step, the thermal resistance is provided between the inner region of the semiconductor and a heat emission surface which is connected to the semiconductor in a heat-transferring manner. This can be done by determining the thermal resistance by tempering the medium in which the heat emission surface is located to (at least) a second medium temperature. In addition, the inner region of the semiconductor is brought to a temperature which differs from the second medium temperature. This is preferably carried out by generating a (first) power loss in the semiconductor. This temperature of the inner region of the semiconductor is referred to as the first semiconductor temperature. The inner region of the semiconductor is brought to the temperature which differs from the second medium temperature by generating a (first) power loss in the inner region of the semiconductor. This can be done by generating a desired current in the inner region of the semiconductor, for example by injection of a desired current into the semiconductor or by application of a desired voltage which leads to a desired current. Alternatively, the semiconductor may also be operated with an operating current being measured. The power loss can be determined from the current (and an applied voltage).Thus, for the purpose of determining the thermal resistance, a temperature difference is generated between the inner region of the semiconductor and the heat emission surface thermally bonded to the semiconductor. This is carried out by generating a power loss in the inner region of the semiconductor. This results in a (first) semiconductor temperature which is greater than the second medium temperature at which the heat emission surface is tempered (cooled). While the heat emission surface thermally connected to the semiconductor is tempered (by the medium), the power loss is generated, so that the temperature difference mentioned is produced. The thermal resistance then results as the ratio of the temperature difference to the power loss. The temperature difference here refers to the difference between the semiconductor temperature and the medium temperature or as the amount of the difference between the (second) medium temperature and the (first) semiconductor temperature. The semiconductor temperature is determined in particular on the basis of the electrical parameter dependent on the semiconductor temperature and the relationship between the parameter and the (first) medium temperature, as was determined in the first step. In other words, the first semiconductor temperature is determined by measuring the parameter and applying the relationship between temperature and parameter that has resulted in the preceding step. The temperatures used in the first step are temperatures that are the same for the inner region of the semiconductor and the medium (since no power dissipation is generated), and can therefore be referred to as the first medium temperature (identical to a semiconductor temperature). In the determination of the thermal resistance, the interior of the semiconductor is brought (as a result of the power loss) to a temperature which lies at a first medium temperature or a temperature within the first medium temperature range, in order to be able to use the determined relationship between temperature and parameter value in order to determine the semiconductor temperature which arises with the generation of the power loss. In the determination of the thermal resistance, the relationship between temperature and parameter value determined in the first step is thus used.In the first-mentioned step, in which the semiconductor (inner region thereof) is brought to the first (medium) temperature, no power loss is generated in the semiconductor, so that the temperature control of the medium brings the semiconductor itself to the same temperature. In contrast, when determining the thermal resistance, a power loss is generated in the inner region of the semiconductor, so that the surrounding medium temperature (also second medium temperature) differs from the temperature of the inner region of the semiconductor, and a temperature difference results. The thermal resistance results from the ratio of temperature difference and power loss.Instead of determining the thermal resistance by generating a power loss and by detecting the temperature difference, the thermal resistance between the inner region of the semiconductor and the heat dissipation surface can also be predefined, for example by a manufacturer or by means of thermal simulation. The thermal resistance can thus be provided by already being present as information. In addition, other possibilities for determining the thermal resistance between the inner region of the semiconductor and the heat emission surface connected to the semiconductor can also be provided. If the thermal resistance is determined in the above-mentioned step by generating a first power loss and determining a temperature difference, then the first power loss used here is such that a semiconductor temperature results which corresponds to the range of the first medium temperatures. In other words, in the detection of the heat resistance, the temperature of the semiconductor or the inner region does not exceed the temperatures or the temperature range used in the former step (for detecting the temperature-dependent parameter of an inner region of the semiconductor for the first medium temperatures).After the electrical, temperature-dependent parameter for the first temperatures has been detected (without power loss in the semiconductor) and the thermal resistance has been provided or determined, using a (first) power loss at a semiconductor temperature which do not go beyond the temperatures during the detection of the parameter, the inner region of the semiconductor is tempered at a temperature above the temperatures of the aforementioned steps in a further step. These temperatures are referred to as second semiconductor temperature. The second semiconductor temperature(s) lies in a second semiconductor temperature range. This lies above the first semiconductor temperature range. It is thus provided to temperature-control the inner region of the semiconductor to a second semiconductor temperature by generating a power loss in the inner region. This (second) power loss is preferably above the power loss on the basis of which the thermal resistance was detected (first power loss). The electrical, temperature-dependent parameter of the inner region of the semiconductor is detected for the second semiconductor temperature, that is to say for a temperature which is in particular above the first temperature. The second semiconductor temperature is determined on the basis of the thermal resistance and the second power loss. The second semiconductor temperature is determined on the basis of the relationship between temperature difference and (first) power loss and on the basis of the second power loss.In other words, the provided or determined thermal resistance serves to determine the internal temperature of the semiconductor in the case of a second power loss (higher than the first). This can be provided, for example, by using the resistance provided or ascertained and using the second power loss to draw conclusions about the resulting temperature difference from this, so that the second semiconductor temperature can be deduced on the basis of the temperature at the heat emission surface by applying the temperature difference ascertained in this way. As a result, the second semiconductor temperature (which results in the second power loss) can be determined on the basis of the relationships already determined or provided. For this ascertained semiconductor temperature, the electrical parameter of the inner region of the semiconductor, which parameter is dependent on the semiconductor temperature, is detected. As a result, the relationship between second semiconductor temperatures (in the case of a second power loss) and corresponding values of the parameter can be established in order to thus determine temperatures in the range of the second temperature (temperatures of the second temperature range) later on the basis of the parameter. The second semiconductor temperature is calculated on the basis of the heat resistance determined (see the preceding step) and on the basis of the second power loss (which is likewise known). The second power loss is generated by, for example, passing a setpoint current through the semiconductor, which generates the second power loss. Like the first power loss, the second power loss can also be generated in a targeted manner by injection of an electric current, if appropriate at a specific voltage. Otherwise, a usual operating current can also be used, which can be measured, as a result of which the second power loss can result.Finally, a mapping is determined which maps the parameter which was detected at the second semiconductor temperature to the second semiconductor temperature. This creates the relationship or mapping between the parameter (i.e. a plurality of different parameter values) and the semiconductor temperature for temperature ranges above the first temperature. Since the parameter is thus also mapped onto the semiconductor temperature for the second semiconductor temperature, it is possible by ascertaining the parameter to infer the temperature even for temperatures outside the temperature range for which parameters and media temperatures have been detected (without power loss generation). Finally, the semiconductor temperature can be determined from the detected parameter of an inner region of the semiconductor on the basis of the mapping or on the basis of the relationship.In summary, the direct relationship between the parameter and temperature is thus determined only for the first temperature, wherein the thermal resistance is used for other temperature ranges in order to infer the semiconductor temperature (the temperature of the inner region of the semiconductor). Parameters are likewise detected for these temperatures, which are deduced on the basis of the thermal resistance, in order to thus determine a (further) relationship between the semiconductor temperature and the value of the parameter. This extends the temperature range (first semiconductor temperature) for which the relationship between temperature and parameter is directly measured. For the representation of the relationship between temperature and parameter value, no purely mathematical relationship is used, but rather the internal temperature (at certain power losses) is deduced on the basis of the thermal resistance, in order to thus infer the semiconductor temperature, to which a parameter value measured for this purpose is assigned, on the basis of the thermal resistance.As mentioned, the inner region of the semiconductor is tempered to a second semiconductor temperature by generating a second power loss in the inner region. This step may also be referred to as step (c). In this step, the inner region of the semiconductor is tempered to different second semiconductor temperatures by generating different second power losses in the inner region of the semiconductor. This can be done, for example, by injecting a setpoint current or by detecting a usual operating current that assumes different values. For the (multiple) second semiconductor temperatures at the different second power losses, the parameter is detected, in particular the associated parameter values of the inner region. If the parameter is detected for different second temperatures, respective parameter values are obtained. The phrase "detecting the parameter for a temperature" denotes the detection of corresponding values of the parameter or denotes the detection of the parameter value. If the parameter is acquired at different temperatures, this means the acquisition of parameter values at the different temperatures. The second semiconductor temperatures are determined on the basis of the thermal resistance (whether it is determined or provided) and on the basis of the (different) second power losses.There are a plurality of interpolation points for the second semiconductor temperatures, which are based on the measurement of the parameter for different second temperatures and which are based on the determination of the semiconductor temperature on the basis of the thermal resistance. The resulting interpolation points are in particular part of a mapping or part of a relationship between semiconductor temperature and parameter (value).As mentioned, a mapping or a relationship between parameter and semiconductor temperature is determined for the second semiconductor temperature. This may be referred to as step (d). In this step, it is provided that the mapping or the relationship maps the parameters that were acquired at the second semiconductor temperatures to the second semiconductor temperatures. If there are thus a plurality of second semiconductor temperatures (at different second power losses), a plurality of interpolation points are produced in the illustration, in particular for the region of the second semiconductor temperatures. While the parameter was directly measured for the first semiconductor temperatures or for the first semiconductor temperature and the temperature was directly detected, it holds true for the second semiconductor temperature or the second semiconductor temperatures that these temperatures were not measured but were determined from the heat resistance from temperatures measured at the heat emission surface. The temperature at the heat dissipation surface can be determined or measured, for example, by measuring the temperature of the medium to which the heat dissipation surface adjoins. The thermal resistance characterizes the thermal connection by means of which the interior of the semiconductor is bonded to the heat emission surface. The thermal connection, the heat emission surface and the semiconductor can be part of a power module.The semiconductor is preferably a silicon carbide MOSFET, but also a silicon MOSFET, a GaN MOSFET, a GaO MOSFET, an IGBT, a JFET or a bipolar transistor. The forward voltage of a body diode of the transistor, for example, or also a gate threshold voltage, or a resistance in the power path of the semiconductor in the conductive state, for example the drain-source state in the turned-on state of the transistor, can be used as a parameter. The parameter is determined in particular by injection of a known, preferably constant current and by measuring the voltage dropping across the semiconductor. From this, the resistance or conductance can be formed as a parameter, or the dropped voltage can be directly used as a parameter. Other embodiments provide that the parameter is determined at a target voltage, which may in particular be constant, wherein the resulting current through the semiconductor is measured. Here too, the current itself can be used as a parameter; the resistance or the conductance can be formed as a parameter from the ratio of current and voltage. In general, any electrical property of the semiconductor that is temperature-dependent can be used as parameter. This applies to numerous electrical properties of a semiconductor, for example a threshold voltage, a resistance between a pn or np junction, a resistance along the power path of the semiconductor or the like.As mentioned, an associated parameter can be detected for the at least one first medium temperature (which corresponds to the semiconductor temperature for the lack of power loss), for example by measurement. This is also referred to as step a), in which a medium in which the semiconductor is located is tempered, in order thus to provide the first medium temperature in order to record the associated parameter. Preferably, a mapping is generated which reproduces the relationship between the parameter of the inner region and the first medium temperature (determined on the basis of the temperature control of the medium to first medium temperatures in step a). In other words, a mapping is generated which relates the parameter measured in step a) to the associated first temperature (first medium temperature). At a plurality of first medium temperatures and thus also a plurality of associated parameter values, the generated mapping comprises a plurality of correlations between a parameter value and an associated temperature, for example in the form of a plurality of support values, which can also be reproduced in an approximation term. The image obtained in this way corresponds to a temperature-dependent measurement of the parameter, i.e. a parameter measurement at specific medium temperatures (and thus--lack of power loss--at specific temperatures of the semiconductor).When ascertaining the semiconductor temperature for temperatures in a temperature range outside the first temperatures, the (additional) mapping ascertained in step d) is used, which relates in particular to the second semiconductor temperature(s). In other words, relationships between temperatures and parameters are provided for temperatures which were determined with the aid of the thermal resistance (and were therefore determined in particular at different power losses). As a result, the relationships generated without power losses (in the case of a first temperature range) between parameter and temperature are supplemented for ranges in which the temperature (of a second temperature range, above the first temperature range) has been determined on the basis of the thermal resistance and on the basis of power losses greater than 0 (indirectly) (from the temperature of the outside of the semiconductor, the power loss and the thermal resistance).This mapping or this relationship for the temperature range is preferably supplemented (or corrected) by the mapping which was determined in step d). The temperature range here comprises the second temperatures, that is to say temperatures outside or above the at least one of the first temperatures. The mapping in step d), which results from ascertaining the semiconductor temperature on the basis of a power loss and the temperature on the outside of the semiconductor, and from the associated parameter, can serve in this case for supplementing higher temperatures or for correcting the relationship which results in the case of power-loss-free temperature ascertainment and associated parameter acquisition.The inner region to which the temperature-dependent parameter relates is preferably a junction region of the semiconductor, in particular at a transition of zones of different doping in a semiconductor substrate. The parameter corresponds here to an electrical variable which changes with temperature, for example the forward voltage of a body diode (or inverse diode) or other variables as specified herein.The determined mapping or the corresponding relationships, interpolation points or also approximation terms can be stored in a memory, for example in a ROM or the like. In particular, the relevant data can be stored in the form of a look-up table which assigns the associated temperature to various parameter values, or vice versa. In particular, the generated mapping(s) for the first temperature(s), the second temperature(s) or for the relevant temperature ranges can be provided by a memory in which data is stored which identifies the relevant mapping, wherein a processor can access this memory, which is configured to carry out an interpolation (linear, polynomial,... ) on the basis of these stored data. The interpolation specifies at least one (approximated) relationship between two measured / determined temperatures and their parameter values. The interpolation is preferably based on the measured values or interpolation points (cf. steps a to d) and enables the determination of temperatures for parameter values which have been measured for the temperature determination and which are not stored in a mapping, i.e. the determination of the semiconductor temperature from a captured parameter value on the basis of the (previously) determined mapping.In particular, it can be provided that the processor has an input at which a value can be received which identifies the parameter, wherein the processor and the memory are then configured together such that an associated interpolated value is output at an output on the basis of the stored data. This is used in particular for temperature determination for parameter values which lie between interpolation points or entries of the look-up table.Furthermore, a power circuit comprising at least one semiconductor and, for example, a memory in which the said figures are provided is provided. This is preferably a memory, optionally together with a processor, as illustrated above. The memory (and optionally also the processor) can be part of a monitoring device. The power circuit can thus comprise at least one semiconductor and a monitoring device in which the mapping is provided. For this purpose, the monitoring device can have a memory in which the mapping is provided, and an evaluation unit which has, for example, the processor mentioned. The image provided in the monitoring device is determined according to the method described here. The monitoring device is connected to the semiconductor and is configured to acquire the parameter, in particular by acquiring the current parameter value. This can be done by measurement or by inputting a measurement value of the monitoring device. The monitoring device can thus have a measuring unit or also only one input for measured values. The monitoring device is further configured to form the parameter by means of the mapping to a semiconductor temperature. In this case, recourse is made in particular to the optionally present memory in the monitoring device. The mapping can provide, in particular, interpolation. In order to determine the semiconductor temperature from the mapping on the basis of the parameter (by mapping), a processor can be provided which implements this function. The monitoring device can be configured to emit an error signal if this semiconductor temperature is above a predefined threshold value. For this purpose, the monitoring device can have an error signal output. In addition, the monitoring device can have a comparator which is configured to compare the temperature with the threshold value and to output a corresponding signal as a result.The power circuit is preferably a traction inverter of an electric vehicle. The semiconductor may be a power semiconductor. The semiconductor is in particular a power transistor of the traction inverter of the electric vehicle. The monitoring device can be realized in particular in a control unit of the traction inverter.FIG. 1 serves to illustrate the determination of the thermal resistance by way of example. FIGS. 2 aand 2 b are used to explain embodiments for ascertaining the mapping between parameter and temperature by way of example.Fig. 1 shows symbolically how a thermal resistance can be determined. Here, a semiconductor HL having an inner region J is mounted on a substrate SU. The substrate SU is in turn fastened on a heat sink element KE, the heat emission surface of which is immersed in a medium M. The heat emission surface can be formed by a pin fin heat sink, the pin fin field of which dips into the medium M. The medium M is, for example, in an oil or water bath, or also in tempered air or in another gas. The medium can be provided in a cooling channel. The pin fin heat sink may be part of the cooling channel. The semiconductor HL, the substrate SU, the cooling element KE and optionally also elements forming the cooling channel can be part of a power module. To generate a power loss, a current is conducted through the semiconductor. Since FIG. 1 serves only to illustrate the heat flow, electrical aspects are not illustrated in FIG. 1. The thermal resistance R characterizes the heat-transferring connection resulting from a part of the semiconductor (between region J and substrate SU), the substrate SU and the cooling element, which are heat-transferringly connected to one another.The power loss generated in FIG. 1 is generated in the inner region J of the semiconductor and is transmitted to the heat release surface WF via the heat resistor R. From there, the generated heat is absorbed by the medium M. The medium M has the temperature T 2 (second medium temperature), for example 20°, while the temperature HT 1 (first semiconductor temperature) of the inner region is higher, for example 90°, due to the power loss. Since the power loss is known (identical to the electrical power which is introduced into the semiconductor HL and is converted there into heat), the thermal resistance R can be calculated from the temperature difference between HT1 and T2. The larger the temperature difference, the larger the difference between HT1 and T2. The thermal resistance R results in particular from the temperature difference related to the power loss introduced. The determination of the thermal resistance shown with reference to FIG. 1 serves to determine the semiconductor temperature (temperature of the inner region J) at other power losses by measuring the associated parameter. The previous determination of the thermal resistance R serves here to infer the semiconductor temperature (temperature of the inner region) on the basis of the power loss and the external temperature or medium temperature.The detection of the parameter of the inner region of the semiconductor J of the first medium temperatures (see T 2, FIG. 2 b) can be carried out as shown in FIG. 1, but without the use of a power loss. Since no power loss is generated, the semiconductor temperature (temperature of region J) corresponds to the medium temperature (temperature of medium M), since at a finite thermal resistance R, the temperatures adapt to one another if no heat flow takes place from the semiconductor to the medium, that is to say if no power loss is generated in the semiconductor.As mentioned, the relationship between parameter and semiconductor temperature is directly determined for first temperatures, wherein for second semiconductor temperatures (which are approximately above the first semiconductor temperatures), the thermal resistance is used to calculate the semiconductor temperature starting from a medium temperature, in order thus to determine a relationship between the semiconductor temperature and the temperature-dependent parameter for these temperatures. Taken together, a mapping A results, which assigns a corresponding semiconductor temperature to the (measured) parameter for the first and second temperatures. The semiconductor temperature here is the temperature of the inner region J, as illustrated in FIG. 1.FIG. 2 ashows a corresponding image A, for example in a memory of a monitoring device MO, which can emit an error signal F from an output. This monitoring device MO is in contact with a traction inverter TR, illustrated by way of example, having six half bridges, each half bridge comprising two power transistors as semiconductor HL. The power module can be provided, for example, by such a half bridge, a part thereof, or by the traction inverter TR. An electric machine EM can be activated with the traction inverter TR, starting from the DC voltage between the two DC voltage poles + / -. In order to avoid overloading of the individual transistors, whether during operation or during assembly of the traction inverter, the monitoring device MO can be used to determine the temperature on the basis of a measured parameter value. A defect which results in excessively high temperatures can be, for example, incomplete heat connection of the relevant conductor HL.FIG. 2 b is used to explain embodiments of the invention on the basis of a specific example. The voltage U plotted against the temperature T is shown. The voltage U is the voltage across the inverse diode, i.e. the forward voltage, and forms the temperature-dependent parameter. The threshold voltage of this diode also changes with the temperature in the power semiconductor, which is designed in particular as a MOSFET. In this case, the voltage U measured can be, for example, the voltage which drops at a specific (constant) current across the body diode or inverse diode. Since the inverse diode is located in the inner region of the HL, the temperature can be determined on the basis of the temperature dependence of the parameter U.First, for at least one first temperature T 1, the associated voltage U 1 is determined, which corresponds to the parameter value for different voltages. The at least one first temperature T 1 is illustrated in FIG. 2 b as four different temperature points (marked with a cross) between 20 and 90° C. The associated parameter U or U 1 is detected while substantially no heat is generated in the semiconductor. In other words, the power loss in the semiconductor is (substantially) zero. In particular, when acquiring the parameter values U 1 to the first temperature T 1, there is no temperature difference between the heat emission surface WF to which the semiconductor HL is thermally bonded and the inner region of the semiconductor. As a result, for example, a medium in which the heat emission surface WF is located can be tempered, it being possible to assume that the temperature of the medium corresponds to the temperature T 1 in the inner region of the semiconductor. Therefore, in the case of a temperature difference of essentially zero or in the case of a power loss of essentially zero, it holds true that the first medium temperature T 1 corresponds to the internal temperatures of the semiconductor.For the first medium temperatures T 1, that is to say generally for the first temperature range TB 1, a mapping of different parameter values U 1 to the relevant temperatures results, such that the temperature can be deduced from a parameter value. In the example shown, the (first) temperature range TB 1 ends or the first temperatures T 1 end at 90° C. In addition, it is shown how this range is extended.The thermal resistance R between the inner region J of the semiconductor HL and the heat emission surface WF is determined by creating a temperature difference between the inner region J and the heat emission surface WF (or medium M) within the temperature range TB 1, that is to say for first medium temperatures, by generating a power loss greater than zero in the inner region J of the semiconductor. For this purpose, according to FIG. 1, a power loss is generated in the inner region J, resulting in a first semiconductor temperature HT 1 that is greater than the second medium temperature MT 2. The second medium temperature MT 2 falls in particular into the first temperature range, preferably into the lower half thereof. The power loss is dimensioned such that a first semiconductor temperature HT 1 results which is not greater than the greatest first medium temperature, i.e. which is not greater than the first temperature range TB 1 or as the range for which parameters and associated temperature have been directly detected (i.e. up to 90° C.).The thermal resistance R results from the power loss and the associated temperature difference. The temperature difference is determined by providing the second medium temperature MT 2 (measuring or setting it as a target value) and the temperature of the inner region of the semiconductor, which is determined by means of a parameter value (U 1) or interpolated on the basis of at least one of these parameter values. As mentioned, recourse is made here to the relationships between temperature and parameters which have resulted from direct detection or temperature control, that is to say when ascertaining this relationship in the event of a power loss of substantially zero.In order to also obtain corresponding relationships or images for the second temperature range TB 2, which adjoins the first temperature range TB 1, a (second) power loss is applied in the inner region. The second power loss results in temperatures above the first temperatures TB 1, which are shown as a square. These temperatures T 2 are second semiconductor temperatures (or lie in a second semiconductor temperature range), since the second power loss has a substantial influence on the temperature of the inner region J. In order to determine these temperatures, the (second) power loss is likewise used and the previously determined thermal resistance R. The resulting temperature difference can also be concluded on the basis of the thermal resistance R and the second power loss, it being possible for the lower value of the temperature difference (smaller value) to be measured or set as temperature. Knowing the difference results in the upper, higher temperature of the temperature difference than the second semiconductor temperature T 2. The associated parameter U2 for these higher temperatures T2 can then be measured for the second temperature range TB2, and an assignment between the determined temperatures T2 (in the inner region J) and the parameter values U2 can be represented.Thus, for the temperature range TB 1, a directly measured relationship between parameter and temperature results, while for the temperature range TB 2, the internal temperature is determined on the basis of the thermal resistance and the power loss, and in that the associated parameter values U 2 are assigned to the temperatures thus determined. This results in a corresponding mapping A for both the first and the second temperature range TB 1, TB 2.This map A can be used to obtain a correction KCORR with respect to an additional map EX with respect to the first temperature range TB 1, on the basis of which the relationships between temperature and parameter can be corrected. In other words, the temperature determined on the basis of the parameter can be corrected by the correction specifically for the second temperature range TB 2.When the map A is present, the temperature of the inner region J can be determined by measuring the parameter E and applying the map A so as to obtain the temperature T1 associated therewith. The diagram of FIG. 2A shows the associated assignment on the basis of dash-dot arrows. The mapping A can be created based on the support values of the temperatures T 1 and the temperatures T 2 and can assign an intermediate value such as the value E to the associated intermediate temperature value TI in particular by interpolation. The second temperature value T 2 shown at the rightmost position is above the maximum temperature of 160° C., and thus can be recognized as a defective temperature. It is also possible to continue the mapping A beyond the maximum semiconductor temperature of the inner region, in particular by extrapolation on the basis of TB 1 and TB 2, in order to assign parameter values that go beyond the measured parameter values U 1 and U 2 to a temperature.

Claims

Method for determining a temperature of a semiconductor (HL), comprising the steps: (a) tempering a medium (M) in which the semiconductor (HL) is located to first medium temperatures (T1 - 20°C - 90°C) and detecting an electrical parameter (U1), dependent on the semiconductor temperature, of an inner region of the semiconductor (J - junction) for the first medium temperatures (20°C - 90°C); (b) determining the thermal resistance (R) between the inner region (J) of the semiconductor (HL) and a heat emission surface (WF) to which the semiconductor (HL) is bonded by tempering the medium (M), wherein the heat emitting surface (WF) is at a second medium temperature (MT2) and tempering the inner region (J) of the semiconductor (HL) to a first semiconductor temperature (HT1) different from the second medium temperature (MT2) by generating a first power dissipation in the inner region of the semiconductor (HL), wherein the thermal resistance (R) is determined from the ratio of the temperature difference between the second medium temperature (MT2) and the first semiconductor temperature (HT1) and the power dissipation, or providing a given thermal resistance (R) between the inner region of the semiconductor and the outside of the semiconductor (HL); (c) tempering the inner region (J) of the semiconductor (HL) to a second semiconductor temperature (T2, more than 90° C.) by generating a second power loss in the inner region (J) of the semiconductor (HL), detecting the electrical parameter (U) of the inner region (J-junction) of the semiconductor (HL) for the second semiconductor temperature (T2, more than 90° C.) which parameter is dependent on the semiconductor temperature, wherein the second semiconductor temperature (T2) is determined on the basis of the determined thermal resistance (R) and the second power loss and (d) determining a mapping (A) which includes the parameter (U) which was detected at the second semiconductor temperature (T2), maps to the second semiconductor temperature (T2); and ascertaining the semiconductor temperature (TI) from the acquired parameter (E) of an inner region (J) of the semiconductor (HL) on the basis of the map (A).Method according to claim 1, wherein in step (c) the inner region of the semiconductor (J) is tempered to different second semiconductor temperatures (T2, more than 90°C) by generating different second power losses in the inner region (J) of the semiconductor (HL), and the parameter (U) of the inner region (J) is respectively acquired for the second semiconductor temperatures (T2), wherein the second semiconductor temperatures (T2) are determined on the basis of the determined thermal resistance (R) and the second power losses. (a plurality of interpolation points for > 90°C)Method according to claim 2, wherein in step d) the mapping maps the parameters (U2) detected at the second semiconductor temperatures to the second semiconductor temperatures. (Use of Plural Interpolation Points in Mapping)Method according to one of the preceding claims, wherein the semiconductor (HL) whose temperature is determined is a silicon MOSFET, a SiC-MOSFET, a GaO-MOSFET, an IGBT, a JFET or a bipolar transistor.Method according to one of the preceding claims, wherein an additional mapping (EX) is generated, which maps the parameter of the inner region to the first medium temperatures on the basis of the temperature control of the medium to first medium temperatures in step a), the additional mapping (EX) represents the relationships between the first medium temperatures and the associated parameter for a temperature range (TB2) greater than the first medium temperatures (T1), and the mapping (A) determined in step d) is used in the determination of the semiconductor temperature (HT) for temperatures in this temperature range (TB2).Method according to Claim 5, wherein the additional mapping (EX) for the temperature range (TB2) is corrected (KCORR) by the mapping (A) determined in step d).Method according to one of the preceding claims, wherein the forward voltage of a body diode of the semiconductor is used as parameter (U). (Description: a) Preferred at Constant. Measurement current / / gate-threshold voltage, R_DSON)Method according to any of the preceding claims, wherein the inner region (J) to which the parameter relates is a junction region of the semiconductor (HL).Power circuit (L) having at least one semiconductor (HL) and a monitoring device (MO) in which the mapping (A) is provided, which was determined according to the method according to one of the preceding claims, wherein the monitoring device (MO) is connected to the semiconductor (HL) and is configured to record the parameter, map the parameter (E) to a semiconductor temperature (TI) by means of the mapping (A) and output an error signal (F) if this semiconductor temperature is above a predefined threshold value.Power circuit according to Claim 9, which is designed as a traction inverter (TR) of an electric vehicle, wherein the semiconductor (HL) is a power transistor of the traction inverter.

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