Semiconductor devices with bent polyimide tape and related manufacturing processes

Abstract

A semiconductor device includes an electrically conductive carrier, a semiconductor chip disposed over a portion of the carrier, and a dielectric material disposed between the carrier portion and the semiconductor chip. The dielectric material galvanically insulates the carrier portion and the semiconductor chip from each other. The dielectric material comprises a polyimide tape, with an edge region of the polyimide tape bent away from the carrier portion.

Description

Technical area

[0001] The present disclosure relates to semiconductor devices having bent polyimide tape and methods of manufacturing such semiconductor devices. background

[0002] In semiconductor devices, high electrical voltage differences can occur between individual device components during operation. For example, increased electrical potential differences can arise in a current sensor between a power rail and a sensor chip arranged above it. Depending on material properties and the relative arrangement of the device components, increased voltage differences can lead to extremely high electrical field strengths in certain spatial regions of the device. Device components arranged there can be subject to wear due to the high electrical field strengths, which in the worst case can lead to device failure.

[0003] Manufacturers and developers of semiconductor devices are constantly striving to improve their products. In this context, it may be of particular interest to both extend the lifetime of the devices and ensure their continued safe operation. Furthermore, it may be of interest to provide efficient and cost-effective processes for manufacturing such semiconductor devices. Brief description

[0004] Various aspects relate to a semiconductor device. The semiconductor device comprises an electrically conductive carrier, a semiconductor chip arranged over a portion of the carrier, and a dielectric material arranged between the carrier portion and the semiconductor chip. The dielectric material galvanically insulates the carrier portion and the semiconductor chip from one another. The dielectric material comprises a polyimide tape, wherein an edge region of the polyimide tape is bent away from the carrier portion.

[0005] Various aspects relate to a method for manufacturing a semiconductor device. The method comprises providing an electrically conductive carrier and disposing a dielectric material on a portion of the carrier. Disposing the dielectric material comprises forming a polyimide tape with an edge region bent away from the carrier portion. The method further comprises disposing a semiconductor chip over the dielectric material, wherein the dielectric material galvanically isolates the carrier portion and the semiconductor chip from one another. Short description of the drawings

[0006] Devices and methods according to the disclosure are explained in more detail below with reference to drawings. Like reference numerals may designate like or similar components. The features of the various illustrated examples may be combined with one another, provided they are not mutually exclusive, and / or they may be selectively omitted unless described as absolutely necessary. Fig. 1 shows a side cross-sectional view of a semiconductor device 100 according to the disclosure. Fig. 2 shows a flowchart of a method for manufacturing a semiconductor device according to the disclosure. Fig. 3 contains the Fig. 3A and Fig. 3B, where the Fig. 3A shows a side sectional view of a semiconductor device 300 according to the disclosure and the Fig. 3B is a top view of a polyimide tape such as may be included in the semiconductor device 300. Fig. 4 contains the Fig. 4A and Fig. 4B, where the Fig. 4A shows a side sectional view of a semiconductor device 400 according to the disclosure and the Fig. 4B is a top view of a polyimide tape such as may be included in the semiconductor device 400. Fig. 5 contains the Fig. 5A and Fig. 5B, where the Fig. 5A shows a side sectional view of a semiconductor device 500 according to the disclosure and the Fig. 5B is a plan view of a portion of the semiconductor device 500. Fig. 6 shows a side cross-sectional view of a semiconductor device 600 according to the disclosure. Detailed description

[0007] The semiconductor device 100 of the Fig. 1 may include an electrically conductive carrier 2 having a first section 4 and a second section 6. A semiconductor chip 8 may be arranged above the first carrier section 4. The semiconductor device 100 may further include a dielectric material 10 arranged between the first carrier section 4 and the semiconductor chip 8. The dielectric material 10 may be configured to galvanically isolate the first carrier section 4 and the semiconductor chip 8 from one another. The dielectric material 10 may correspond to or include a polyimide tape, wherein an edge region of the polyimide tape 10 is bent away from the first carrier section 4. The semiconductor chip 8 may optionally be electrically connected to the second section 6 of the carrier 2 via an electrical connection element 12. The components of the semiconductor device 100 may optionally be at least partially encapsulated in an encapsulation material 14.

[0008] In the example shown, the electrically conductive carrier 2 can be a leadframe. The leadframe 2 can be made of a metal and / or a metal alloy, in particular of at least one of copper, copper alloys, nickel, iron-nickel, aluminum, aluminum alloys, steel, stainless steel, or the like. During operation of the semiconductor device 100, the first carrier section 4 can be a current-carrying section. In particular, in the example shown, the first section 4 of the leadframe 2 can be a busbar designed to carry an electrical current to be detected or measured by the semiconductor chip 8. In the following, the terms "first carrier section", "current-carrying section", and "busbar" can be used interchangeably. In particular, the busbar 4 can be formed or manufactured in one piece.The second section 6 of the leadframe 2 can have one or more leads (or lead fingers or pins or connecting conductors). In the side sectional view of the . Fig. Due to the chosen perspective, only one lead 6 is visible in Figure 1. Any number of additional leads 6 can be arranged, for example, behind the lead 6 shown.

[0009] In one example, the semiconductor chip 8 can be a sensor chip configured to detect a magnetic field generated by an electric current flowing through the busbar 4. Based on the detected magnetic field (or the detected magnetic flux density of the induced magnetic field), the strength of the electric current can be determined. In particular, the induced magnetic field can be measured without physical contact between the sensor chip 8 and the busbar 4 (i.e., galvanically isolated). In such a case, the sensor chip 8 (or more precisely, at least one sensor element of the sensor chip 8) can at least partially overlap with the busbar 4 when viewed in the z-direction. The physical signals detected by the sensor chip 8 can be converted into electrical signals and forwarded via the electrical connection element 12 and the lead 6 to other components (not shown) for further processing or evaluation.In the example shown, the electrical connection element 12 may correspond to or include a wire. Alternatively, or additionally, in further examples, the electrical connection element 12 may include a clip, a band, or the like.

[0010] The sensor chip 8 may have one or more sensor elements (not shown). In one example, the sensor chip 8 may be a differential magnetic field sensor chip with two sensor elements. In general, the sensor chip 8 and its sensor element(s) are not limited to a particular sensor technology. For example, a sensor element of the sensor chip 8 may be a Hall sensor element, a magnetoresistive sensor element, a vertical Hall sensor element, or a fluxgate sensor element. A magnetoresistive xMR sensor element may be an AMR (Anisotropic Magneto-Resistive) sensor element, a GMR (Giant Magneto-Resistive) sensor element, or a TMR (Tunnel Magneto-Resistive) sensor element. In one example, the sensor element(s) may be arranged on the top side of the sensor chip 8, which is facing away from the power rail 4. In further examples, the sensor element(s) maythe sensor elements can be arranged on an underside of the sensor chip 8 facing the busbar 4.

[0011] The polyimide tape 10 can galvanically insulate the sensor chip 8 and the power rail 4 from each other. An edge region of the polyimide tape 10 can be bent away from the power rail 4. This can result in a spacing of the edge region from the top side of the power rail 4. For illustration, Fig. 1, a distance d between the top side of the busbar 4 and the underside of the edge region of the polyimide tape 10 is shown. In particular, the entire edge of the polyimide tape 10 can be bent away from the busbar 4. In such a case, the entire edge of the polyimide tape 10 can then be spaced from the busbar 4. The polyimide tape 10 can thus be trough-shaped or bowl-shaped. Viewed in the z-direction, the base area of ​​the polyimide tape 10 can have any suitable shape, for example, round, oval, elliptical, square, rectangular, polygonal, or similar. In the example shown, the polyimide tape 10 can protrude at least partially beyond the right edge of the busbar 4.

[0012] A thickness of the dielectric material or of the polyimide tape 10 can be selected depending on the application of the semiconductor device 100. On the one hand, a thickness t of the polyimide tape 10 can be selected small enough so that the magnetic field generated by a measuring current at the location of the sensor element is strong enough for a measurement by the sensor chip 8. On the other hand, the thickness t of the polyimide tape 10 can be selected large enough so that the electrical insulation provided by the dielectric material between the busbar 4 and the sensor chip 8 is sufficiently large. For example, the thickness t of the polyimide tape 10 can range from approximately 20 micrometers to approximately 200 micrometers. In specific, but by no means limiting, examples, the polyimide tape 10 can have a thickness t of approximately 50 micrometers, or approximately 75 micrometers, or approximately 125 micrometers.The polyimide tape 10 may contain or be made of any suitable polyimide, for example Kapton® and / or Upilex®.

[0013] The encapsulation material 14 can at least partially encapsulate one or more components of the semiconductor device 100. In particular, the busbar 4 and the semiconductor chip 8 can be at least partially embedded in the encapsulation material 14. The encapsulation material 14 can be arranged between the busbar 4 and the curved edge region of the polyimide tape 10. The encapsulation material 14 can form a housing (or package) for the encapsulated device components in order to protect them from external influences, such as mechanical influences, chemical contamination, moisture, exposure to light, or the like. The semiconductor device 100 can also be referred to as a semiconductor package. The leads 6 can protrude at least partially from the encapsulation material 14, such that the semiconductor chip 8 can be electrically accessible from outside the encapsulation material 14.Similarly, the bus bar 4 may protrude at least partially from the encapsulation material 14 to provide an input and an output for a measuring current.

[0014] The encapsulation material 14 may include or be made from at least one of an epoxy, a filled epoxy, a glass fiber-filled epoxy, an imide, a thermoplastic, a thermosetting polymer, a polymer blend, a laminate, or the like. Various techniques may be used to encapsulate the device components with the encapsulation material 14, for example, at least one of compression molding, injection molding, powder molding, liquid molding, map molding, lamination, or the like.

[0015] During operation of the semiconductor device 100, the electrical potential of the bus bar 4 may differ from the electrical potential of the semiconductor chip 8. For example, the bus bar 4 may be located in a high-voltage region, while the semiconductor chip 8 (and the leads 6 electrically connected to it) may be located in a low-voltage region. A low-voltage region may be associated with or specified by an exemplary value range from about 0V to about 20V. In this context, exemplary operating values ​​of a low-voltage region may be about 3.3V or about 5V. A high-voltage region may be associated with or specified by an exemplary value range from about 50V to about 15,000V. In this context, exemplary operating values ​​of a high-voltage region may be about 600V, about 800V, or about 1200V.In a non-limiting example, the electrical potential of the semiconductor chip 8 may be approximately 0V, while the electrical potential of the bus bar 4 may be approximately 1000V.

[0016] Accordingly, during operation of the semiconductor device 100, large electrical potential differences may occur between the busbar 4 and the semiconductor chip 8. These electrical potential differences may reach values ​​of up to 1000V or more. Galvanic isolation between the busbar 4 and the semiconductor chip 8 may be provided by the dielectric material 10 arranged therebetween. In this context, a capacitor (or plate capacitor) may be formed, wherein the busbar 4 and the semiconductor chip 8 may each form an electrode of the capacitor, and the dielectric material 10 may form a solid insulation between these electrodes.

[0017] Since the dielectric material 10 has electrical insulating properties, high electric field strengths (or high inhomogeneous electric field peaks) may occur in certain spatial regions of the semiconductor device 100. The materials located in these regions may be exposed to high electrical voltages, which can be particularly problematic for materials with limited insulating properties. High electrical stress may lead to accelerated aging of the materials. In particular, electrical treeing may occur during the aging process of the semiconductor device 100. In general, electrical treeing may occur and propagate when a dielectric material is exposed to high and diverging electric field voltages for an extended period of time.Electrical treeing can typically begin at corners and / or edges of the semiconductor chip and / or a leadframe of the respective semiconductor device. It can ultimately lead to the formation of one or more undesired breakdown paths between the semiconductor chip and the busbar, which, in the worst case, can result in failure of the semiconductor device 100. In the . Fig. 1, an exemplary breakdown path 16 is shown by a dashed line running between the semiconductor chip 8 and the busbar 4.

[0018] The curved edge region of the polyimide tape 10 can be designed to increase the length of a (potential) breakdown path between the semiconductor chip 8 and the busbar 4. In the semiconductor device 100, the breakdown path 16 would be shorter if the polyimide tape 10 were not curved, but completely flat. The curved tape edge can thus increase the electrical insulation provided by the polyimide tape 10 and / or high-voltage resistance. Furthermore, the encapsulation material 14 arranged in the gap between the busbar 4 and the upwardly curved edge region of the polyimide tape 10 can further increase the electrical insulation between the busbar 4 and the semiconductor chip 8. In addition to lengthening potential breakdown paths, the curved shape of the polyimide tape 10 can reduce electric field strengths at the edge region of the polyimide tape 10.As a result, electrical breakdowns and / or electrical treeing can be prevented or at least reduced by the polyimide tape 10 (and in particular by its curved shape).

[0019] In the example of Fig. Figure 1 describes the use of the bent polyimide tape 10 for a magnetic current sensor with a power rail 4 and a sensor chip 8. It should be noted that the concepts presented herein can also be applied to other semiconductor devices in which large electrical potential differences may occur during operation. Examples include gate drivers, isolated drivers, digital isolators, auxiliary power components, or the like.

[0020] Fig. Figure 2 shows a method of manufacturing a semiconductor device according to the disclosure. The method is presented in a general form to qualitatively specify aspects of the disclosure. The method can be used, for example, to manufacture the semiconductor device 100 of the Fig. 1 and can therefore be used in connection with the Fig. 1. The method may be extended by aspects described in connection with other examples discussed herein. Exemplary extensions of the method are described in connection with the Fig. 3 to 5.

[0021] In a step 18, an electrically conductive carrier may be provided. In a step 20, a dielectric material may be arranged on a portion of the carrier. Arranging the dielectric material may include forming a polyimide tape with an edge region bent away from the carrier portion. In a step 24, a semiconductor chip may be arranged over the dielectric material. The dielectric material may galvanically insulate the carrier portion and the semiconductor chip from one another.

[0022] The semiconductor device 300 of the Fig. 3A may illustrate some or all of the features of the semiconductor device 100 of the Fig. 1. The semiconductor device 300 may include a die attach film (DAF) 24, which may be disposed on the underside of the polyimide tape 10. The die attach film 24 may have lower adhesion at the curved edge region of the polyimide tape 10 than adjacent to the curved edge region.

[0023] In the top view of the Fig. 3B shows an exemplary embodiment of a polyimide tape 10 with a die attach film 24, as may be included in the semiconductor device 300. The die attach film 24 may have an edge region 26 with a first adhesion strength and an inner region 28 with a second adhesion strength, wherein the first adhesion strength may be less than the second adhesion strength. In the example shown, the edge region 26 and the inner region 28 may have the shape of a rectangular frame and a rectangle, respectively. In further examples, however, the shapes of the two regions 26 and 28 may also be selected differently.

[0024] The semiconductor device 300 can be manufactured, for example, by the method of Fig. 2, which in this context can be expanded as follows. First, a die attach film 24 (or a dicing die attach film (D-DAF)) can be arranged (e.g., laminated) on a polyimide tape 10. The die attach film 24 can, for example, be a double-sided adhesive film, i.e., the polyimide tape 10 itself does not necessarily have to be adhesive. Subsequently, the adhesiveness of the die attach film 24, which initially adheres equally well everywhere, can be reduced in a plurality of edge regions 26. In one example, the die attach film 24 can be processed with laser light 30 for this purpose, as in the Fig. 3B. A laser-induced thermal pulse can at least partially cure the material of the die attach film 24 in the frame-shaped edge regions 26, which can reduce the adhesion.

[0025] In a further step, the polyimide tape 10 with the die attach film 24 arranged thereon can then be separated (e.g. sawn) into a plurality of structures. A single such structure is shown in the Fig. 3B and can then be glued to the first carrier section 4 using the die attach film 24. The semiconductor chip 8 can then be arranged on the polyimide tape 10 and electrically connected to the lead 6 via the electrical connection element 12. In a further step, the first carrier section 4 and the semiconductor chip 8 can be encapsulated with the encapsulation material 14. Due to the reduced adhesive strength in the edge region 26, the encapsulation material 14 can penetrate between the first carrier section 4 and the polyimide tape 10 and bend the edge region of the polyimide tape 10 away from the first carrier section 4. During a molding process, the polyimide tape 10 can be bent upward at its edge regions solely by the flow of the molding material.

[0026] Optionally, one or more openings (not shown) can be formed in the first carrier section 4 prior to the encapsulation process. In one example, the first carrier section 4 can be structured by one or more cutouts. During encapsulation, the encapsulation material 14 can then flow from below through the openings, thereby pushing the edge region of the polyimide tape 10 upward and away from the first carrier section 4. In the manufactured semiconductor device, the openings can thus be arranged below the bent edge region of the polyimide tape 10. The encapsulation material 14 can be arranged in the openings.

[0027] The semiconductor device 400 of the Fig. 4A may include some or all of the features of previously described semiconductor devices. Semiconductor device 400 may include a material layer 32 that may be disposed at the edge region of polyimide tape 10. Material layer 32 and polyimide tape 10 may have different thermal expansion coefficients.

[0028] In the top view of the Fig. 4B shows an exemplary embodiment of a polyimide tape 10 with a material layer 32, as may be included in the semiconductor device 400. The material layer 32 may be arranged at an edge region 34 of the polyimide tape 10. In one example, the thermal expansion coefficient of the material layer 32 may be greater than the thermal expansion coefficient of the polyimide tape 10. In the case shown, the material layer 32 may have the exemplary shape of a rectangular frame. The material layer 32 may contain or be made from at least one of a polyimide, a polyimide with additives, a polyolefin, or the like. The material layer 32 may be, for example, an adhesive film. A thickness of the material layer 32 may be less than a thickness of the polyimide tape 10 and may be in the range of a few micrometers.

[0029] The semiconductor device 400 can be manufactured, for example, by the method of Fig. 2, which in this context can be expanded as follows. In one example, the material layer 32 can be selectively formed on the polyimide tape 10 at the edge region 34. Alternatively, the material layer 32 can first be applied to a larger area of ​​the polyimide tape 10 and then suitably patterned, for example, by a photolithography process. After the material layer 32 has been applied, the edge region of the polyimide tape 10 can bend according to a bimetallic effect when the temperature changes due to the different thermal expansion coefficients of the polyimide tape 10 and the material layer 32. In one example, the material layer 32 can first be applied to the polyimide film 10 at an elevated temperature. Subsequently, the polyimide film 10 can bend upon cooling due to the different thermal expansion coefficients.

[0030] In another example, instead of a single polyimide tape 10, two tapes (e.g., polyimide tapes) with different thermal expansion coefficients can be applied (e.g., laminated) to the first carrier section 4. The upper of the two tapes can be suitably structured, for example, using a photolithography process. In one example, the tapes can first be laminated at an elevated temperature. Subsequently, the two tapes attached to one another can bend during cooling due to the different thermal expansion coefficients, resulting in a bimetallic effect.

[0031] The semiconductor device 500 of the Fig. 5A may include some or all of the features of previously described semiconductor devices. The semiconductor device 500 may include one or more support structures 36 disposed between the first carrier portion 4 and the bent edge region of the polyimide tape 10. The support structures 36 may be configured to bend the edge region of the polyimide tape 10 away from the first carrier portion 4.

[0032] In the top view of the Fig. 5B shows a possible exemplary design of the support structures 36. In practice, the Fig. 5B may be covered by the encapsulation material 14 and not visible. In the exemplary top view of the Fig. 5B, the support structures 36 can have both circular and elongated shapes. The number and shapes of the support structures 36 can be arbitrarily selected, as long as the edge region of the polyimide tape 10 is suitably bent away from the first carrier section 4. In a further case, for example, a single frame-shaped support structure can extend along the edge region of the polyimide tape 10. In yet another case, such a support structure can be interrupted at one or more locations. The support structure 36 can be made of any suitable material, for example an adhesive (in particular an epoxy resin-based adhesive). A thickness of the support structure 36 in the z-direction can, for example, be in a range from approximately 10 micrometers to approximately 20 micrometers.

[0033] The semiconductor device 500 can be manufactured, for example, by the method of Fig. 2, which in this context can be expanded as follows. First, the support structure 36 can be arranged on the first carrier section 4. Subsequently, the polyimide tape 10 can be arranged on the support structure 36, wherein the edge region of the polyimide tape 10 is bent away from the first carrier section 4 by the support structure 36. In one example, the arrangement of the support structure 36 can include applying an adhesive (in particular an epoxy resin-based adhesive) to the first carrier section 4. The adhesive can be applied, for example, by an inkjet process and / or a dispensing process.

[0034] The semiconductor device 600 of the Fig.6 may include some or all of the features of previously described semiconductor devices. The semiconductor device 600 may include a dielectric layer 38 disposed between the first carrier portion 4 and the polyimide tape 10. In one example, the dielectric layer 38 may include or be made of a polyimide (e.g., Kapton® and / or Upilex®). Viewed in the z-direction, a footprint of the dielectric layer 38 may lie within a footprint of the polyimide tape 10. The dielectric layer 38 may enable or facilitate the encapsulation material 14 to enter the space between the first carrier portion 4 and the polyimide tape 10 during the encapsulation process and to bend the polyimide tape 10 upward at its edges. In the example shown, the semiconductor device 600 may include a single dielectric layer 38.In further examples, a stack of multiple dielectric layers may be arranged between the first carrier section 4 and the polyimide tape 10. These layers may be made of the same material or of different materials.

[0035] The semiconductor devices described herein according to the disclosure can provide various technical effects. However, the following list is not intended to be exhaustive. Those skilled in the art can identify further technical effects from the present description.

[0036] By using the bent polyimide tape, electrical breakdowns and / or electrical treeing can be prevented. This can result in longer lifetimes for semiconductor devices. The reliability of the semiconductor devices can be increased, ensuring compliance with current and future standards (e.g., IEC standards).

[0037] Due to the small thickness of the polyimide tape (with simultaneous high electrical strength), the sensor chip arranged above the polyimide tape can provide a strong measurement signal.

[0038] The polyimide tape, which is bent at the edges, can provide cost-effective electrical insulation between high- and low-voltage regions in the semiconductor devices described herein. Compared to conventional solutions, both the costs of the materials used and the costs of the processes described herein can be lower.

[0039] The semiconductor devices described herein may, for example, be current sensors used to operate highly efficient motor drives. Such use can reduce the energy consumption of such motors while maintaining or even increasing the motor performance level. The reduced energy consumption of the motors can, in particular, result in reduced CO2 emissions. Overall, the semiconductor devices described herein can therefore contribute to green technology and green energy solutions, i.e., climate-friendly solutions with reduced energy consumption. Examples

[0040] Semiconductor devices according to the disclosure and associated manufacturing methods are described below by way of examples.

[0041] Example 1 is a semiconductor device comprising: an electrically conductive carrier; a semiconductor chip arranged over a portion of the carrier; and a dielectric material arranged between the carrier portion and the semiconductor chip, wherein the dielectric material galvanically isolates the carrier portion and the semiconductor chip from each other, wherein the dielectric material comprises a polyimide tape, wherein an edge region of the polyimide tape is bent away from the carrier portion.

[0042] Example 2 is a semiconductor device according to Example 1, wherein the support portion is a current-carrying portion during operation of the semiconductor device.

[0043] Example 3 is a semiconductor device according to Example 1 or 2, wherein the carrier portion is in a high voltage region and the semiconductor chip is in a low voltage region during operation of the semiconductor device.

[0044] Example 4 is a semiconductor device according to any one of the preceding examples, wherein: the carrier is a leadframe, the carrier portion is a busbar, and the semiconductor chip is a sensor chip configured to detect a magnetic field generated by an electric current flowing through the busbar.

[0045] Example 5 is a semiconductor device according to any one of the preceding examples, wherein the bent edge region of the polyimide tape is configured to increase the length of a breakdown path between the semiconductor chip and the carrier portion.

[0046] Example 6 is a semiconductor device according to any one of the preceding examples, wherein the polyimide tape is trough-shaped.

[0047] Example 7 is a semiconductor device according to any one of the preceding examples, wherein the polyimide tape has a thickness in a range of 20 micrometers to 200 micrometers.

[0048] Example 8 is a semiconductor device according to any one of the preceding examples, further comprising: a die attach film disposed on the polyimide tape, wherein the die attach film has lower adhesive strength at the bent edge region of the polyimide tape than adjacent to the bent edge region.

[0049] Example 9 is a semiconductor device according to any one of the preceding examples, further comprising: a material layer disposed at the edge region of the polyimide tape, wherein the material layer and the polyimide tape have different thermal expansion coefficients.

[0050] Example 10 is a semiconductor device according to any one of the preceding examples, further comprising: a support structure arranged between the carrier portion and the bent edge region of the polyimide tape, the support structure being configured to bend the edge region of the polyimide tape away from the carrier portion.

[0051] Example 11 is a semiconductor device according to any one of the preceding examples, wherein the dielectric material disposed between the carrier portion and the semiconductor chip further comprises: a dielectric layer disposed between the carrier portion and the polyimide tape, wherein a base area of ​​the dielectric layer lies within a base area of ​​the polyimide tape.

[0052] Example 12 is a semiconductor device according to any one of the preceding examples, further comprising: an encapsulation material that at least partially encapsulates the semiconductor chip and the carrier portion, wherein the encapsulation material is arranged between the carrier portion and the edge region of the polyimide tape.

[0053] Example 13 is a semiconductor device according to Example 12, wherein the carrier portion has at least one opening arranged below the bent edge region of the polyimide tape, wherein the encapsulation material is arranged in the at least one opening.

[0054] Example 14 is a method of manufacturing a semiconductor device, the method comprising: providing an electrically conductive carrier; disposing a dielectric material on a portion of the carrier, wherein disposing the dielectric material comprises: forming a polyimide tape having an edge region bent away from the carrier portion; and disposing a semiconductor chip over the dielectric material, wherein the dielectric material galvanically isolates the carrier portion and the semiconductor chip from each other.

[0055] Example 15 is a method according to Example 14, wherein forming the bent polyimide tape comprises: disposing a die attach film on the polyimide tape, wherein the die attach film has a lower adhesive strength at the edge region of the polyimide tape than adjacent to the edge region; and encapsulating the carrier portion and the semiconductor chip with an encapsulation material, wherein the encapsulation material penetrates between the carrier portion and the edge region of the polyimide tape, thereby bending the edge region of the polyimide tape away from the carrier portion.

[0056] Example 16 is a method according to Example 15, further comprising: processing the die attach film with laser light, wherein the adhesiveness of the die attach film at the edge region of the polyimide tape is reduced.

[0057] Example 17 is a method according to example 15 or 16, further comprising: forming at least one opening in the carrier portion, wherein the encapsulation material penetrates the at least one opening during encapsulation and thereby bends the edge region of the polyimide tape away from the carrier portion.

[0058] Example 18 is a method according to any one of Examples 14 to 17, wherein forming the bent polyimide tape comprises: forming a material layer at the edge region of the polyimide tape, wherein the material layer and the polyimide tape have different thermal expansion coefficients, wherein the edge region of the polyimide tape is bent away from the carrier portion upon a temperature change due to the different thermal expansion coefficients.

[0059] Example 19 is a method according to Example 18, wherein forming the material layer comprises: patterning the material layer by a photolithography process.

[0060] Example 20 is a method according to any one of Examples 14 to 19, wherein forming the bent polyimide tape comprises: disposing a support structure on the carrier portion, and disposing the polyimide tape on the support structure, wherein the edge region of the polyimide tape is bent away from the carrier portion by the support structure.

[0061] Example 21 is a method according to Example 20, wherein arranging the support structure comprises: applying an epoxy resin-based adhesive to the carrier portion by an inkjet process and / or a dispensing process.

[0062] Although specific embodiments are shown and described herein, it will be apparent to one of ordinary skill in the art that a variety of alternative and / or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, this disclosure is intended to be limited only by the claims and their equivalents.

Claims

[1] A semiconductor device comprising: an electrically conductive carrier (2); a semiconductor chip (8) arranged over a portion (4) of the carrier (2); and a dielectric material arranged between the carrier section (4) and the semiconductor chip (8), wherein the dielectric material galvanically insulates the carrier section (4) and the semiconductor chip (8) from each other, wherein the dielectric material comprises a polyimide tape (10), wherein an edge region of the polyimide tape (10) is bent away from the carrier section (4). [2] A semiconductor device according to claim 1, wherein the support portion (4) is a current-carrying portion during operation of the semiconductor device. [3] A semiconductor device according to claim 1 or 2, wherein the carrier portion (4) is located in a high voltage region during operation of the semiconductor device and the semiconductor chip (8) is located in a low voltage region. [4] A semiconductor device according to any one of the preceding claims, wherein: the carrier (2) is a leadframe, the support section (4) is a busbar, and the semiconductor chip (8) is a sensor chip designed to detect a magnetic field generated by an electric current flowing through the busbar. [5] Semiconductor device according to one of the preceding claims, wherein the bent edge region of the polyimide tape (10) is designed to increase the length of a breakdown path (16) between the semiconductor chip (8) and the carrier section (4). [6] Semiconductor device according to one of the preceding claims, wherein the polyimide tape (10) is trough-shaped. [7] A semiconductor device according to any one of the preceding claims, wherein the polyimide tape (10) has a thickness in a range of 20 micrometers to 200 micrometers. [8] A semiconductor device according to any one of the preceding claims, further comprising: a die attach film (24) arranged on the polyimide tape (10), wherein the die attach film (24) has a lower adhesive strength at the bent edge region of the polyimide tape (10) than next to the bent edge region. [9] A semiconductor device according to any one of the preceding claims, further comprising: a material layer (32) arranged at the edge region of the polyimide tape (10), wherein the material layer (32) and the polyimide tape (10) have different thermal expansion coefficients. [10] A semiconductor device according to any one of the preceding claims, further comprising: a support structure (36) arranged between the carrier section (4) and the bent edge region of the polyimide tape (10), which is designed to bend the edge region of the polyimide tape (10) away from the carrier section (4). [11] Semiconductor device according to one of the preceding claims, wherein the dielectric material arranged between the carrier section (4) and the semiconductor chip (8) further comprises: a dielectric layer (38) arranged between the carrier section (4) and the polyimide tape (10), wherein a base area of the dielectric layer (38) lies within a base area of the polyimide tape (10). [12] A semiconductor device according to any one of the preceding claims, further comprising: an encapsulation material (14) which at least partially encapsulates the semiconductor chip (8) and the carrier section (4), wherein the encapsulation material (14) is arranged between the carrier section (4) and the edge region of the polyimide tape (10). [13] A semiconductor device according to claim 12, wherein the carrier section (4) has at least one opening arranged below the bent edge region of the polyimide tape (10), wherein the encapsulation material (14) is arranged in the at least one opening. [14] A method of manufacturing a semiconductor device, the method comprising: Providing an electrically conductive carrier (2); Arranging a dielectric material on a portion (4) of the carrier (2), wherein the arranging of the dielectric material comprises: Forming a polyimide tape (10) with an edge region bent away from the carrier section (4); and Arranging a semiconductor chip (8) over the dielectric material, wherein the dielectric material galvanically insulates the carrier section (4) and the semiconductor chip (8) from one another. [15] The method of claim 14, wherein forming the bent polyimide tape (10) comprises: Arranging a die attach film (24) on the polyimide tape (10), wherein the die attach film (24) has a lower adhesive strength at the edge region of the polyimide tape than adjacent to the edge region; and Encapsulating the carrier section (4) and the semiconductor chip (8) with an encapsulation material (14), wherein the encapsulation material (14) penetrates between the carrier section (4) and the edge region of the polyimide tape (10) and thereby bends the edge region of the polyimide tape (10) away from the carrier section (4). [16] The method of claim 15, further comprising: Processing the die attach film (24) with laser light (30), whereby the adhesiveness of the die attach film (24) is reduced at the edge region of the polyimide tape (10). [17] The method of claim 15 or 16, further comprising: Forming at least one opening in the carrier section (4), wherein the encapsulation material (14) penetrates the at least one opening during encapsulation and thereby bends the edge region of the polyimide tape (10) away from the carrier section (4). [18] A method according to any one of claims 14 to 17, wherein forming the bent polyimide tape (10) comprises: Forming a material layer (32) at the edge region of the polyimide tape (10), wherein the material layer (32) and the polyimide tape (10) have different thermal expansion coefficients, wherein the edge region of the polyimide tape (10) is bent away from the carrier section (4) when the temperature changes due to the different thermal expansion coefficients. [19] The method of claim 18, wherein forming the material layer (32) comprises: Structuring the material layer (32) by a photolithography process. [20] A method according to any one of claims 14 to 19, wherein forming the bent polyimide tape (10) comprises: Arranging a support structure (36) on the carrier section (4), and Arranging the polyimide tape (10) on the support structure (36), wherein the edge region of the polyimide tape (10) is bent away from the carrier section (4) by the support structure (36). [21] The method of claim 20, wherein arranging the support structure (36) comprises: Applying an epoxy resin-based adhesive to the carrier section (4) by an inkjet process and / or a dispensing process.

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