Pulse duration modulation control module for an inverter
The pulse duration modulation module addresses the issue of equivalent time voltage in converters by selecting appropriate PDM approaches based on modulation index, significantly reducing CMV and associated interference while maintaining voltage linearity.
Patent Information
- Application Number
- DE102024125612
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-07
- Filing Date
- 2024-09-06
- Publication Date
- 2025-03-13
AI Technical Summary
Existing pulse duration modulation (PDM) techniques in converters, such as standard SVPWM, induce significant equivalent time voltage (CMV) in motors, leading to electromagnetic interference, high storage currents, and premature component failure.
A pulse duration modulation module that determines a modulation index based on the voltage of an energy storage device and a target output voltage, and selects from various PDM approaches, including seamstate, single mode remote-state, and double mode remote-state PDM, to reduce CMV while maintaining voltage linearity.
The proposed solution effectively reduces equivalent time voltage (CMV) across the entire operating range of the converter, minimizing electromagnetic interference and high storage currents, while maintaining voltage linearity and reducing the risk of premature component failure.
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Abstract
Description
TECHNICAL FIELD
[0001] This disclosure relates to a pulse width modulation control module for an inverter. STATE OF THE ART
[0002] An electrical device, such as a variable-speed drive, a variable-speed drive, or an uninterruptible power supply, may be connected to a high-power alternating current (AC) distribution system, such as a power grid. The electrical device drives, operates, and / or controls a machine or a non-machine load. The electrical device may include an inverter that generates a drive signal for the load. SUMMARY
[0003] In one aspect, a system includes: an energy storage device; an inverter electrically coupled to the energy storage device; and a pulse width modulation module. The pulse width modulation module is configured to: determine a modulation index based on a voltage of the energy storage device and a target output voltage of the inverter; select one of a plurality of pulse width modulation (PDM) approaches based on the modulation index; and determine a switching command for the inverter based on the target output voltage and the selected one of the plurality of PDM modulation approaches.
[0004] Implementations may include one or more of the following features.
[0005] The variety of PDM approaches may include: a near-state PDM approach, a single-mode far-state PDM approach, and a dual-mode far-state PDM approach.
[0006] In order to select one of a plurality of PDM approaches based on the modulation index, the pulse width modulation module may be configured to determine in which of at least two modulation ranges the modulation index falls.
[0007] The at least two modulation ranges may include a far-state PDM range and a near-state PDM range. The far-state PDM range may include a single-mode far-state PDM range and a dual-mode far-state PDM range. Each of the near-state PDM range, the single-mode far-state PDM range, and the dual-mode far-state PDM range may be defined by a respective minimum modulation index value and a maximum modulation index value. In these implementations, the dual-mode far-state PDM range is located between the single-mode far-state PDM range and the near-state PDM range.
[0008] The system may also include a power source electrically connected to the energy storage device, and the power source may be configured to supply a direct current (DC) to the energy storage device. The power source may be a rectifier.
[0009] The pulse width modulation module may be configured to select one of the plurality of PDM approaches based on the modulation index and a setting, and the setting may indicate whether or not to reduce a common-mode voltage. In some implementations, if the setting indicates not to reduce the common-mode voltage, the selected one of the plurality of PDM approaches is space vector pulse width modulation (SVPWM). The setting may be a value determined based on user input.
[0010] In another aspect, a control system for an inverter includes: a pulse width modulation module configured to: determine a modulation index based on a voltage of an energy storage device in the inverter and a target output voltage of the inverter; select one of a plurality of pulse width modulation (PDM) approaches based on the modulation index and / or a common mode voltage setting; determine a switching command for the inverter based on the target output voltage and the selected one of the plurality of PDM modulation approaches; and provide the switching command to the inverter to thereby modulate DC energy in the energy storage device into a drive signal.
[0011] Implementations may include one or more of the following features.
[0012] The pulse width modulation module may be configured to select one of the plurality of PDM approaches based on the modulation index and the common-mode voltage setting. The common-mode voltage setting may indicate whether or not to reduce the common-mode voltage; and the pulse width modulation module may be configured to select one of a plurality of effective voltage phasor PDM approaches based on the modulation index if the common-mode voltage setting indicates to reduce the common-mode voltage; and the pulse width modulation module may be configured to select space-vector pulse width modulation (SVPWM) if the common-mode voltage setting indicates not to reduce the common-mode voltage. The plurality of effective voltage phasor PDM approaches may include: a near-state PDM approach, a single-mode far-state PDM approach, and a dual-mode far-state PDM approach.
[0013] In another aspect, a method includes: determining a modulation index based on a voltage of an energy storage device in the inverter and a target output voltage of the inverter; selecting one of a plurality of pulse width modulation (PDM) approaches based on the modulation index; determining a switching command for the inverter based on the target output voltage and the selected one of the plurality of PDM modulation approaches; and providing the switching command to the inverter to thereby control the inverter to modulate energy in the energy storage device into a drive signal provided to the load.
[0014] Implementations may include one or more of the following features.
[0015] Selecting one of a plurality of PDM approaches based on the modulation index may include selecting one of a near-state PDM approach, a single-mode far-state PDM approach, a dual-mode far-state PDM approach, and space vector pulse width modulation (SVPWM).
[0016] In some implementations, for modulation indices less than or equal to 0.906, supplying the drive signal to the load induces less common-mode voltage in the load than a drive signal generated by controlling the inverter based on a switching command determined based on the target output voltage and standard SVPWM. In some implementations, for modulation indices less than or equal to 0.906, supplying the drive signal to the load induces lower common-mode currents in the load than a drive signal generated by controlling the inverter based on a switching command determined based on the target output voltage and standard SVPWM.
[0017] Selecting the one of the plurality of PDM approaches may include selecting the PDM approach having a linear region including the determined modulation index.
[0018] Implementations of any of the techniques described herein may include a device, an apparatus, a system, a control system, machine-executable instructions, and / or a method. The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features will be apparent from the description and drawings and from the claims. DESCRIPTION OF THE DRAWING FIG: 1 is an example of a system including an inverter. FIG: 2 is another example of a system that includes an inverter. Fig. 3 is a block diagram of an example control scheme. Fig. Figure 4 is a graphical representation showing voltage vectors for an inverter. FIG: 5 shows an example of a switching command for an inverter. Fig. Figure 6 is a flowchart of an example of a common mode voltage drop process. Fig. 7A-7C and 8A-8C show simulated data. DETAILED DESCRIPTION
[0019] Fig. 1 illustrates a system 100. The system 100 includes an electrical device 110 that includes a DC power supply 117, an energy storage device 118, and an inverter 119. The DC power supply 117 supplies a direct current (Idc) to the energy storage device 118. The DC power supply 117 may be, for example, a battery or a generator. In some implementations (as in Fig. 2), the power supply 117 is a rectifier that converts alternating current into direct current Idc. In the example of Fig. 1, the energy storage device 118 includes capacitors C1 and C2 connected to a grounded center point (denoted by o). The direct current Idc flows into the energy storage device 118 and is stored as potential energy. The inverter 119 modulates the energy stored in the energy storage device 118 into a three-phase drive signal 104, which is applied to an AC motor 102. The three-phase drive signal 104 is an alternating current (AC) or time-varying voltage signal, and the characteristics (amplitude, frequency, and / or phase) of the three-phase drive signal 104 control the speed, direction, and torque of the motor 102.
[0020] Inverter 119 includes controllable switches SW1 through SW6. Each controllable switch SW1 through SW6 is any type of electronic switch that has a controllable state. Switches SW1 through SW6 can be controlled to be in a specific state (for example, ON or OFF). In the example shown, each switch SW1 through SW6 is a transistor, and the state of each switch SW1 and SW6 is controlled by adjusting the gate voltage of that transistor.
[0021] The motor 102 is a three-phase AC motor, such as an induction motor or a synchronous permanent magnet machine. The motor 102 includes a stator 109 that is spatially fixed and a rotor (not shown) that rotates relative to the stator 109 when the drive signal 104 is applied. The stator 109 includes one electrical winding per phase: 109a, 109b, and 109c. Winding 109a is electrically connected to switches SW1 and SW4, winding 109b is electrically connected to switches SW2 and SW6, and winding 109c is electrically connected to switches SW5 and SW2. The motor 102 also includes a frame 108. The frame 108 is generally grounded during operation of the system 100.
[0022] The system 100 also includes a control system 130 that generates a switching command 151. When provided to the inverter 119, the switching command 151 operates the controllable switches SW1 through SW6 in a switching pattern defined by the switching command 151 to generate a target or reference inverter output voltage (Vref). The switches in each phase leg are complementary and have opposite states in all given switching patterns. In other words, if the switching command 151 commands SW1 to be in an OFF state, SW4 is commanded to be in an ON state.
[0023] Space vector pulse width modulation (SVPWM) is a common approach for generating the switching command 151. However, controlling an inverter driving an AC motor with a control signal generated based on standard SVPWM can generate a significant common-mode voltage (CMV) in the AC motor. The CMV is the average of the three-phase voltage potential (Vao, Vbo, Vco) with respect to ground or the midpoint of the DC bus (in Fig. 1 marked with o). The voltage Vao is the ground-referenced voltage at the point marked with (a), the voltage Vbo is the ground-referenced voltage at the point marked with (b), and the voltage Vco is the ground-referenced voltage at the point marked with (c).
[0024] The CMV can cause problems such as electromagnetic interference and high bearing currents. In addition, fluctuations in the amplitude of the CMV tend to generate common-mode currents that flow to ground through parasitic capacitances between the windings 109a, 109b, 109c and the frame 108. Additional paths for common-mode currents can be provided by parasitic capacitances between the windings 109a, 109b, 109c and the stator iron, parasitic capacitances between the windings 109a, 109b, 109c and the rotor iron, the capacitance between the rotor iron and the stator iron, and / or ball bearings in the motor 102. The amplitude of the common-mode currents depends on the rate of fluctuation of the CMV, which increases with the switching frequency of the controllable switches SW1 to SW6. The common mode currents contribute to increased electromagnetic interference (EMI) and premature failure of the ball bearings and / or other components of the motor 102.The presence of electromagnetic interference may cause noise in the motor and / or make it more likely that the electrical device 210 will not meet electromagnetic compatibility standards.
[0025] One reason standard SVPWM induces relatively high amounts of CMV is that standard SVPWM employs zero-voltage phasors as part of the switching patterns commanded to inverter 119. A zero-voltage phasor represents a condition where SW1, SW3, and SW5 are simultaneously off (or on), and the complementary switches SW4, SW6, and SW2 are simultaneously on (or off). Some legacy approaches attempt to reduce CMV by removing zero phasors from inverter switching patterns, but these approaches can have drawbacks. For example, these approaches can have low or acceptable amounts of harmonic distortion and low or acceptable amounts of CMV over a relatively narrow operating range of inverter 119.
[0026] On the other hand, the control system 130 includes a pulse width modulation (PDM) module 180 that reduces CMV in the motor 102 using a multifaceted approach that involves more than one PDM-based modulation technique. The multifaceted approach results in reduced CMV across the entire operating range of the inverter 119. As discussed in more detail below, the PDM module 180 generates the switching command 151 based on one of a variety of pulse width modulation (PDM)-based techniques. Compared to an approach that uses only standard SVPWM modulation, the PDM module 180 reduces CMV while maintaining voltage linearity across a wide range of output voltages and frequencies of the inverter 119.
[0027] Fig. 2 is a schematic diagram of a system 200. The system 200 includes an electrical device 210 that includes a rectifier 217, a DC link 218, and an inverter 219. The inverter 219 supplies a three-phase drive signal 204 to a motor 202. A control system 230 includes a PWM module 380 that generates a switching command 251. The switching command 251 controls the inverter 219 to generate the three-phase drive signal 204. The switching command 251 operates the controllable switches SW1 through SW6 in a specific pattern to generate a target or reference inverter output voltage.
[0028] An overview of the system 200 is provided prior to a more detailed discussion of the control scheme 306 and the PDM module 380.
[0029] In the example of Fig. 2, the load 202 is a three-phase motor 202, such as an induction motor or a machine with synchronous permanent magnet excitation. The motor 202 includes a stator 209, which is spatially fixed, and a rotor 208, which rotates relative to the stator 209 when the drive signal 204 is applied. The stator 209 includes one electrical winding per phase: 209a, 209b, and 209c. The motor 202 includes a frame that corresponds to the Fig. 1. Loads other than a motor may be used in the system 200.
[0030] The electrical power distribution network 201 distributes alternating electrical power having, for example, a fundamental frequency of 50 or 60 hertz (Hz). The distribution network 201 may have an operating voltage of up to 690 V. The distribution network 201 may include, for example, one or more transmission lines, distribution lines, electrical cables, and / or any other mechanism for transmitting electricity. The distribution network 201 includes three phases, referred to as a, b, and c.
[0031] The electrical device 210 includes input nodes 214a, 214b, 214c, each of which is electrically coupled to a respective one of the three phases a, b, c of the distribution network 201 via a respective filter system 216a, 216b, 216c. Each filter system 216a, 216b, 216c may be an inductor.
[0032] The electrical device 210 includes a rectifier 217, a DC link 218, and the converter 219. The rectifier 217 is a three-phase six-pulse bridge that includes six electronic switches. In the example of Fig. Figure 2 shows the six electronic switch diodes D1-D6. Each diode D1-D6 contains a cathode and an anode and is associated with a forward bias voltage. Each diode D1-D6 allows current to flow in the forward direction (from the anode to the cathode) when the anode voltage is at least the bias voltage greater than the cathode voltage. If the voltage difference between the anode and cathode is less than the forward bias voltage, the diode does not conduct current in the forward direction.
[0033] Input node 214a is electrically connected to the anode of diode D1 and the cathode of diode D4. Input node 214b is electrically connected to the anode of diode D3 and the cathode of diode D6. Input node 214c is electrically connected to the anode of diode D5 and the cathode of diode D2. Diodes D1-D6 rectify the input currents ia, ib, ic into a direct current id.
[0034] Diodes D1-D6 are also electrically connected to the DC link 218. The cathode of each diode D1, D3, D5 is electrically connected to the DC link 218, and the anode of each diode D2, D4, D6 is electrically connected to the DC link 218. The DC link 218 includes a capacitor network C. The rectified current id flows into the capacitor network C and is stored. The capacitor network C includes one or more capacitors that store electrical energy when the rectified current id is flowing from the rectifier 217 and discharge the stored electrical energy when the rectified current id is not flowing from the rectifier 217.
[0035] The converter 219 converts the DC power stored in the capacitor network C into a three-phase AC drive signal 204, which is delivered to the load 202. The converter 219 includes a network of electronic switches SW1-SW6 controlled by the control system 230 to generate the drive signal 204. Each of the switches SW1-SW6 can be, for example, a power transistor. The three-phase drive signal 204 has phase components 204u, 204v, 204w, each of which is provided to each of the three phases of the load 202.
[0036] The system 200 also includes a sensor system 238 that measures and / or estimates characteristics or parameters of the drive signal 204 and / or the motor 202. The sensor system 238 may, for example, include current sensors that measure the amount of current drawn in each phase of the motor 202 and / or voltage sensors that measure the voltage of each phase component 204u, 204v, 204w of the drive signal 204. The sensor system 238 may also include sensors that measure the angular position of the rotor 208 of the motor 202 and / or the angular velocity of the rotor 208. In some implementations, the control system 230 uses data from the sensor system 238 (apart from directly measured position data) to estimate the angular position and / or angular velocity of the rotor 208 based on a sensorless technique.
[0037] The control system 230 generates the switching command 251, which controls the switching pattern of the switches SW1-SW6 to generate the drive signal 204 with specific characteristics (e.g., amplitude, frequency, and / or phase). The control system 230 implements a control scheme 306, which includes the PDM module 380, both of which are Fig. 3 are discussed.
[0038] The control system 230 includes an electronic processing module 232, an electronic memory 234, and an input / output (I / O) interface 236. The electronic processing module 232 includes one or more electronic processors. The electronic processors of the module 232 may be any type of electronic processor and may or may not include a general-purpose central processing unit (CPU), a graphics processing unit (GPU), a microcontroller, a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), and / or an application-specific integrated circuit (ASIC).
[0039] Electronic memory 234 may be any type of electronic memory capable of storing data and instructions in the form of computer programs or software, and electronic memory 234 may include volatile and / or non-volatile components. Electronic memory 234 and processing module 232 are coupled such that processing module 232 can access, read, and write data to electronic memory 234. Electronic memory 234 stores instructions that, when executed, cause electronic processing module 232 to analyze data and / or retrieve information. Electronic memory 234 may also store information about system 200. For example, electronic memory 234 may store information about motor 202 or inverter 219.
[0040] In addition, electronic memory 234 may store executable instructions that implement control scheme 306 and PDM module 380. The executable instructions may include software, subroutines, modules, and / or functions that implement standard SVPWM, near-state PDM, far-state PDM, single-mode far-state PDM, and dual-mode PDM. These various PDM approaches are discussed below. Electronic memory 234 may also store data and / or information used in control scheme 306 and / or PDM module 380. For example, electronic memory 234 may store thresholds and / or limits associated with operating modes of inverter 219 and with the variety of PDM-based approaches.
[0041] The I / O interface 236 may be any interface that enables a human operator and / or an autonomous process to interact with the control system 230. The I / O interface 236 may include, for example, a display (such as a liquid crystal display (LCD)), a keyboard, audio input and / or output (such as speakers and / or a microphone), visual output (such as lights, light-emitting diodes (LEDs)) in addition to or in place of the display, a serial or parallel port, a Universal Serial Bus (USB) connection, and / or any type of network interface, such as Ethernet. The I / O interface 236 may also enable communication without physical contact through, for example, an IEEE 802.11, Bluetooth, or a near-field communication (NFC) connection.For example, the control system 230 may be operated, configured, modified, or updated via the I / O interface 236.
[0042] The I / O interface 236 may also enable the control system 230 to communicate with components within the system 200 and with systems external to and remote from the system 200. For example, the I / O interface 236 may control a switch or switching network (not shown) or a circuit breaker within the system 200 that allows the electrical device 210 to be disconnected from the distribution network 201. In another example, the I / O interface 236 may include a communications interface that enables communication between the control system 230 and a remote station (not shown) or between the control system 230 and a separate monitoring device. The remote station or monitoring device may be any type of station through which an operator can communicate with the control system 230 without making physical contact with the control system 230.The remote station may be, for example, a computer-based workstation, a smartphone, a tablet, or a laptop computer connected to the control system 230 via a service protocol, or a remote controller connected to the control system 230 via a radio frequency signal.
[0043] Other implementations of the electrical device 210 are possible. For example, the rectifier 217 can be a hybrid diode-thyristor rectifier or an active front-end containing six transistors or other controllable switches instead of the diodes D1-D6. The electrical device 210 can be a variable speed drive, a variable frequency drive, or a variable speed drive.
[0044] Fig. Figure 3 is a block diagram of control scheme 306. Control scheme 306 includes PDM module 380, which generates switching command 251 to control switches S1 through S6 of inverter 219. Inverter 219 generates three-phase drive signal 204 in response to being controlled by switching command 251.
[0045] The control scheme 306 includes a comparator 359 that compares a target angular velocity (ω*) of the motor 202 with an observed angular velocity (ωo) of the rotor 208 and provides the difference (Δω) to a speed controller 352. The observed angular velocity (ωo) is determined by providing a measured or estimated angular position (θo) of the rotor 208 to a derivation block 358. The observed angular position (θo) of the rotor 208 is output by an angular position block 367, which determines the observed angular position (θo) from a position sensor in the sensor system 238 or by employing a sensorless angular position estimation technique. The derivation block 358 determines the observed angular velocity (ωo) by calculating the rate of change in the angular position (θo) over time.
[0046] The sensor system 238 also measures the current drawn by each phase (each stator winding 209a, 209b, 209c) of the motor 202. The measured currents are ia, ib, and ic. The measured currents ia, ib, ic are provided to a modulation block 356, which implements the Clarke transform to transform the three-phase currents (ia, ib, ic) into two orthogonal current components: a component iα along the α-axis and a component iß along the β-axis (which is orthogonal to the α-axis). The Clark transformation projects a three-phase quantity (such as the current flowing in the windings 209a, 209b, 209c of the stator 209 or the voltage applied to the windings 209a, 209b, 209c of the stator 209) into a two-dimensional stationary coordinate system defined by the α-axis and the β-axis. The Clark transformation is shown in equation (1): iαβ=23[1−12−12032−32][iaibic] where ia, ib, ic are the instantaneous currents in the stator windings 209a, 209b, 209c and i αβ is a phasor that includes a component along the α-axis (365) and a component along the β-axis (366). The phasors 365 and 366 are provided to a modulation block 364 that implements the Park transform. The Park transform rotates the stationary α, β-axes at a frequency ω.
[0047] The Park transformation is shown in equation (2): idq=[cos(θ)sin(θ)−sin(θ)cos(θ)][iαiβ] where i dq is a phasor including a component along the d-axis (ido, or the observed d-axis current) and a component along the q-axis (iqo, or the observed q-axis current), and θ is the observed angular position (θo) of the rotor 208 of the motor 202.
[0048] The speed controller 352 generates a torque command Te*, which is provided to a current command generator block 353. The current command generator block 353 generates a d-axis current command id* and a q-axis current command iq*. The d-axis current command id* is compared with the observed d-axis current (ido) at a comparator 357 to determine a difference (Δid) between id* and ido*, and the difference (Δid) is provided to a d-axis current controller 354d. The q-axis current command iq* is compared with the observed q-axis current (iqo) at a comparator 361 to determine a difference (Δiq) between iq* and iqo*, and the difference (Δiq) is provided to a q-axis current controller 354q.
[0049] The d-axis current controller 354d is a PI controller (proportional-integral controller) with a predetermined gain constant Kd. The q-axis current controller 354q is a PI controller with a predetermined gain constant Kq. The d-axis current controller 354d determines a d-axis voltage command ud* that represents the d-axis current error (Δi d ) is minimized. The q-axis current controller 354q determines a d-axis voltage command uq* that minimizes the q-axis current error (Δi q ) is minimized.
[0050] The d-axis voltage command ud* and the q-axis voltage command uq* are provided to a modulation block 355 that implements the inverse Park transform. The inverse Park transform projects the d-axis and q-axis voltage commands (ud*, uq*) into the stationary α, β reference frame. The outputs of the modulation block 355 are uα* and uß*, which are the components of the voltage to be applied to the stator 209 in the stationary α, β reference frame.
[0051] The voltage commands uα* and uß* are provided to the PDM module 380. The module 380 implements a PDM-based controller to generate the switching command 251.
[0052] As discussed above, inverter 219 includes controllable switches S1 and S6, each of which is controllable to be in an ON state or an OFF state. For example, each switch S1 and S6 can be turned ON or OFF by controlling the voltage at the switch gate. When applied to inverter 219, switching command 251 operates switches S1 and S6 in the prescribed switching pattern by controlling the voltage at the gate of each switch. For example, switching command 219 can control a voltage and / or current source (not shown) to control the gate voltages.
[0053] The state of switches S1 to S6 is time-controlled and changed in a switching pattern defined by switching command 251. Switches S1, S3, and S5 are the upper switches, and switches S4, S6, and S2 are the lower switches. There are eight valid switching configurations or state combinations for switches S1, S3, and S5. The switching states are represented by space vectors V1 to V8 (also called voltage vectors). The switching states V1 to V8 for the upper switches S1, S3, and S5 are shown in Table 1: Zeiger S1 S3 S5 V1 1 0 0 V2 1 1 0 V3 0 1 0 V4 0 1 1 V5 0 0 1 V6 1 0 1 V7 0 0 0 V8 1 1 1
[0054] The state of each lower switch S4, S6, S2 is the opposite state of the respective upper switch S1, S3, S5, so that there are a total of eight switching configurations or combinations for the inverter 219.
[0055] On Fig. 4 With reference to Figure 4, the six non-zero phasors (or effective phasors) (V1 to V6) define a hexagon 439 and six sectors (1 to 6) in a rectangular coordinate system (Re, Im). The angle between any two adjacent non-zero phasors (V1 to V6) is 60 degrees (°). The two zero phasors (V7 and V8) are located at the origin. The perimeter of hexagon 439 represents the operating limit of the 219 inverter.
[0056] The voltage commands uα* and uß* input to the PDM module 380 define the phasor Vref in a phase angle (θref) in Fig. 4. The voltage phasor (Vref) and the angle (θref) are referred to as the target or reference voltage and the target or reference angle, respectively. The modulation index (M) associated with the target or reference voltage is determined by equation (3): M=Vref2πVdc where M is the modulation index, Vref is the amplitude of the reference or target voltage, and Vdc is the measured voltage across the DC link 218. The modulation index has a value between 0 and 1.
[0057] The PDM module 380 uses the modulation index (M) and / or a CMV reduction flag to determine which of a plurality of PDM-based approaches to use to compose Vref and generate the switching command 251. The plurality of PDM-based approaches include: a near-state PDM approach, a single-mode far-state PDM approach, a dual-mode far-state PDM approach, and standard SVPWM.
[0058] In standard SVPDM, switching states V1 to V8 are combined to approximate a voltage phasor of any size and angle within hexagon 439. For example, a desired inverter output voltage with a magnitude represented by the phasor Vref and a phase angle θref that places the voltage phasor in sector 1 is achieved by a switching sequence that employs the two adjacent switching states (V1 and V2 in this example) for a specified period and a zero phasor (V7 or V8) for the remainder of the period.
[0059] In the near-state PDM approach, Vref is composed of a group of three non-zero voltage phasors (or effective voltage phasors): the reference voltage closest to Vref is the first voltage phasor, and the two voltage phasors adjacent to the first voltage phasor are the second and third voltage phasors. Fig. In the example shown in Figure 4, Vref is closest to the voltage phasor V1. The three voltage phasors used to compose Vref based on the near-state PDM approach would be V1, V2, and V6. Continuing with this example, the composition of Vref is shown in equation (4): Vref=T1TsV1+T2TsV2+T6TsV6 where Ts is the duration of one period or switching cycle of the switching command 252; and T1, T2, and T6 are dwell times. For Vref in sector 1, the dwell times for the near-state PDM approach are determined as follows: T1=Ts∗(6πM cos θ−1) T2=Ts∗(1−23πM cos(π6−θ)) T6=1−T1−T2 where Ts is the switching cycle time, M is the modulation index for the reference or target voltage Vref and θ is θref.
[0060] The switching command 251 is a binary signal that transitions between high (1) and low (0) during the switching cycle Ts and is symmetrical about the midpoint of the switching cycle. The dwell times determine how long the switching command 251 remains high or low for a particular voltage vector. Fig. 5 shows an example of the switching command 251, which was determined from equations (4) and (5a) to (5c), over one switching cycle Ts.
[0061] The dwell times for Vref in sector 1 (as in Fig. 4) for the remote state PDM approaches are determined as follows: T3=Ts∗[13−2πM cos(π3+θ)]=T4 T1=Ts∗(13−2πM cos θ)=T2 T5=1−T3−T1 T6=1−T4−T2 where Ts is the switching cycle time, M is the modulation index for the target or reference voltage Vref and θ is θref.
[0062] In the single-mode remote-state PDM, Vref is composed using real voltage phasors (non-zero voltage phasors) separated by 120°. In other words, the single-mode remote-state PDM uses only odd non-zero voltage phasors (V1, V3, V5) or only even non-zero voltage phasors (V2, V4, V6) to compose Vref. Therefore, the switching instruction 251 includes only the odd non-zero voltage phasors or only the even non-zero voltage phasors.
[0063] In the dual-mode remote state PDM, sectors 1 to 6 and the non-zero voltage phasors V1 to V6 are compared to the Fig. 4 are rotated 30° clockwise. In the dual-mode remote-state PDM, the non-zero voltage phasors V1 to V6 define rotated sectors as follows: Sector 1: 330° ≤ θref < 30°, Sector 2: 30° ≤ θref < 90°, Sector 3: 90° ≤ θref < 150°, Sector 4: 150° ≤ θref < 210°, Sector 5: 210° ≤ θref < 270°, and Sector 6: 270° ≤ θref < 330°. If the reference voltage Vref is located in rotated sector 1, 3, or 5, Vref is composed using only odd voltage phasors (V1, V3, V3). If Vref is in rotated sector 2, 4 or 6, Vref is composed using only even voltage vectors (V2, V4, V6).
[0064] Within the linear operating range of any PDM-based approach with non-zero voltage phasors, the dwell time equations (Equations (5a) to (5c) and (6a) to (6d)) yield meaningful results, and the inverter 219 functions as a linear voltage amplifier. Outside the linear operating range of a particular effective voltage phasor PDM-based approach, using this approach to generate the switching command 251 causes the inverter 219 to no longer behave as a linear amplifier, increases the common-mode voltage in the motor 202, and generates low-frequency harmonics at the output of the inverter 219, which distort the current in the motor coils 209a, 209b, 209c.
[0065] The linear operating ranges of each active voltage phasor PDM approach are defined by a modulation index (M) range. The linear operating range of the single-mode far-state PDM approach includes modulation indices (M) less than or equal to 0.524. The linear operating range of the dual-mode far-state PDM approach includes modulation indices (M) greater than 0.524 and less than or equal to 0.605. The linear operating range of the near-state PDM approach includes modulation indices (M) greater than 0.605 and less than 0.906.
[0066] Fig. Figure 4 shows the linear operating regions of the active-phasor PDM-based approaches. A first circle 441 with a radius of 0.906 is inscribed within hexagon 439, a second circle 443 has a radius of 0.605 and lies within the first circle 441, and a third circle 445 has a radius of 0.524 and lies within the second circle 443. The third circle 445 defines a linear single-mode remote-state operating region 446. Reference voltages (Vref) having a modulation index (M) falling within the third circle 445 can be composed using the single-mode remote-state PDM approach while maintaining the voltage linearity of the converter 219. A ring 447 between the third circle 445 and the second circle 443 defines a dual-mode remote-state operating region 447.Reference voltages (Vref) having a modulation index (M) in range 447 can be composed using the dual-mode far-state PDM approach while maintaining the voltage linearity of converter 219. A ring 448 between the second circuit 443 and the first circuit 441 defines a linear near-state operating range. Reference voltages (Vref) having a modulation index (M) in ring 448 can be composed using the near-state PDM approach while maintaining the voltage linearity of converter 219.
[0067] On Fig. 6, a flow diagram of a process 600 is shown. The process 600 is an example of a common-mode voltage reduction process that may be implemented by the control system 230 and the PDM module 380. The process 600 may be implemented as executable instructions stored in the electronic memory 234 and executed by the electronic processing module 232. The process 600 may be implemented as software and may be programmed into a control system in an existing power converter. Furthermore, the process 600 may be implemented as a control system or controller installed in an existing power converter as a software update or as part of a firmware update.
[0068] The modulation index (M) is determined using equation (3) (610). In equation (3), the voltage of the DC link 218 (VDC) is a measured value of the voltage at the DC link 218, and Vref is the reference voltage associated with the voltage commands (uα*, uβ*) provided by the modulation block 355 ( Fig. 3) are issued.
[0069] The process 600 determines whether to reduce the common mode voltage (CMV) (612). Determining whether to reduce the CMV may involve analyzing a flag or user input. For example, the operator of the power converter 210 may indicate that the PDM module 380 should be enabled by selecting a CMV reduction mode on the I / O interface 236, for example. In these implementations, the input sets a value for a flag stored in electronic memory 234 to reflect the operator's selection. For example, if the operator turns on the CMV reduction mode, the flag is set to 1. If the operator turns off the CMV reduction mode, the flag is set to 0. In these implementations, the PDM module 380 is enabled if the flag is 1 and is not enabled if the flag is 0.Entities other than the operator can select the CMV reduction mode via the I / O interface 236. For example, a manufacturer of the power converter 210 can select or deselect the CMV reduction mode via the I / O interface 236 or hard-code the flag value before delivering the converter 219 to the end user.
[0070] In some implementations, the value of the flag is set to 1 or 0 by an entity that may be different from the operator (for example, the manufacturer, distributor, or assembler of the power converter 210). In these implementations, the PDM module 380 is always enabled if the flag is set to 1.
[0071] If the CMV reduction is not specified, the switching command 251 is determined based on the standard SVPWM approach (645). If the CMV reduction is specified, the modulation index (M) determined at (610) is compared with the linear operating limit for the remote-state PDM approaches to determine whether the modulation index (M) is within the linear operating range for the single-mode remote-state PDM approach or the dual-mode remote-state PDM approach (615). Modulation indices that are less than or equal to 0.605 (which is the radius of the second circle 443 of Fig. 4), are within the linear operating range of one of the two remote-state PDM approaches. Therefore, to determine if the modulation index (M) determined in (610) is within the linear operating range for a remote-state PDM approach, the modulation index (M) is compared to 0.605. If the modulation index (M) is greater than 0.605, the modulation index (M) is not within the linear range for a remote-state PDM approach, and the process continues with (635). If the modulation index (M) is on or within the second circle 443 (which occurs if M is less than or equal to 0.605), the reference voltage Vref can be composed using one of the remote-state PDM approaches while maintaining the voltage linearity of the inverter 219. The process continues with (620) to determine which of the two remote-state PDM approaches to select.
[0072] At (620), the modulation index (M) determined at (610) is compared with the boundary defining the single-mode far-state PDM approach. The boundary defining the single-mode far-state PDM approach is the third circle 445 ( Fig. 4). Therefore, if the modulation index (M) is less than or equal to the radius of the third circle 445 (0.524), the reference voltage Vref is in or on the third circle 445, then the single-mode remote-state PDM approach is selected. The switching command 251 is determined using the single-mode remote-state PDM approach (625).
[0073] Returning to (620), if the modulation index (M) is greater than 0.524 but less than or equal to 0.605, the modulation index (M) is not within the linear single-mode remote-state operating range 446 and instead is within the linear dual-mode remote-state PDM operating range 447. The dual-mode remote-state PDM approach is selected. The switching command 251 is determined using the dual-mode remote-state PDM approach (630).
[0074] Returning to (615), if the modulation index (M) determined in (610) is not in a linear far-state region, the process 600 determines whether the modulation index (M) is in the linear near-state PDM operating range 448 (635). The modulation index (M) is in the linear near-state PDM range 448 if the modulation index (M) is greater than 0.605 and less than or equal to 0.906. The switching command 251 is determined using the near-state PDM approach (640).
[0075] If the modulation index (M) determined in (610) is not in the linear near-state PDM range 448, none of the three active voltage phasor PDM approaches is selected and the switching command 251 is determined using standard SVPWM (645).
[0076] The switching command 251 is applied to the inverter 219 to generate the reference or target voltage (Vref) at the output of the inverter 219.
[0077] Other implementations of process 600 are possible. For example, in some implementations, the modulation index (M) is only determined when there is an indication that CMV reduction is to be performed. In other words, (612) may be performed before (610). In these implementations, if no CMV reduction is to be performed, process 600 proceeds to (645) to determine the switching command 251 based on standard SVPWM, without necessarily determining the modulation index (M) associated with the target or reference voltage Vref.
[0078] Fig. 7A-7C and 8A-C refer to simulated results. The simulated system was similar to System 100. In the simulation, Vdc was 300 volts (V), and the inverter fed a three-phase RL load with a resistance (R) of 10 ohms (Ω) and an inductance (L) of 6.5 millihenries. The inverter generated the three-phase drive signal in response to receiving a switching command from a control system.
[0079] Fig. 7B and Fig. 7C show results when the control system did not include the PDM module 380 and the switching command was generated using standard SVPWM only. Fig. 8B and Fig. 8C show results for a simulation in which the control system included the PDM module 380 and the switching command was generated with a PDM approach using the process 600 discussed above.
[0080] Fig. 7A and Fig. 8A shows a commanded motor speed (Hz) as a function of time (in seconds). Fig. 7B and Fig. 8B shows the common mode voltage induced in the motor as a function of time (in seconds). Fig. 7C and Fig. 8C shows the three-phase motor current as a function of time (in seconds). The commanded motor speed ( Fig. 7A and Fig. 8A) was the same for the standard SVPWM simulation ( Fig. 7B and Fig. 7C) and the simulation of the PDM module 380 ( Fig. 8B and Fig. 8C). The time scale is in all figures Fig. 7A-7C and 8A-8C are the same.
[0081] As in Fig. 7B, the amplitude of the common-mode voltage in the standard SVPWM approach is approximately + / -150 V. As shown in Fig. As shown in Figure 8B, the PDM module 380 significantly reduces the common-mode voltage. For motor speeds below approximately 48 Hz, the common-mode voltage is essentially eliminated. For motor speeds above approximately 48 Hz, the amplitude of the common-mode voltage is only one-third of the common-mode voltage of the standard SVPWM (an amplitude between approximately + / - 50 V). Therefore, the PDM module 380 greatly reduces the amount of common-mode voltage induced in the motor.
[0082] Fig. Figure 7C shows the current consumed by the RL load using the standard SVPWM approach. Fig. Figure 8C shows the current drawn by the RL load when using the PDM module 380. As can be seen by comparing Fig. 7C and Fig. As can be seen in Figure 8C, the current drawn by RL when using the PDM module is smooth and relatively free of distortion, indicating that the current harmonics have not increased significantly. In other words, the data in Fig. 8B and Fig. 8C that the PDM module 380 reduces CMV while maintaining good current harmonic performance.
[0083] These and other implementations are within the scope of the claims.
Claims
[1] System comprising: an energy storage device; an inverter electrically coupled to the energy storage device; and a pulse width modulation module designed: to determine a modulation index based on a voltage of the energy storage device and a target output voltage of the converter; to select one of a variety of pulse width modulation (PDM) approaches based on the modulation index; and to determine a switching command for the inverter based on the target output voltage and the selected one of the plurality of PDM modulation approaches. [2] The system of claim 1, wherein the plurality of PDM approaches comprises: a near-state PDM approach, a single-mode far-state PDM approach, and a dual-mode far-state PDM approach. [3] The system of claim 1, wherein, in order to select one of a plurality of PDM approaches based on the modulation index, the pulse width modulation module is configured to determine in which of at least two modulation ranges the modulation index falls. [4] The system of claim 1, wherein the at least two modulation regions comprise a far-state PDM region and a near-state PDM region. [5] The system of claim 4, wherein the remote state PDM region comprises: a single-mode remote state PDM region and a dual-mode remote state PDM region. [6] The system of claim 5, wherein each of the near-state PDM region, the single-mode far-state PDM region, and the dual-mode far-state PDM region is defined by a respective minimum modulation index value and a maximum modulation index value, and the dual-mode far-state PDM region is located between the single-mode far-state region and the near-state PDM region. [7] The system of claim 1, further comprising a power source electrically connected to the energy storage device, the power source configured to supply a direct current (DC) to the energy storage device. [8] The system of claim 7, wherein the power source comprises a rectifier. [9] The system of claim 1, wherein the pulse width modulation module is configured to select the one of the plurality of PDM approaches based on the modulation index and a setting, the setting indicating whether or not to reduce the common mode voltage. [10] The system of claim 9, wherein, if the setting indicates not to reduce the common mode voltage, the selected one of the plurality of PDM approaches is space vector pulse width modulation (SVPWM). [11] The system of claim 9, wherein the setting comprises a value determined based on user input. [12] Control system for a converter, the control system comprising: a pulse width modulation module designed: to determine a modulation index based on a voltage of an energy storage device in the inverter and a target output voltage of the inverter; select one of a plurality of pulse width modulation (PDM) approaches based on the modulation index and / or a common-mode voltage setting; determine a switching command for the inverter based on the target output voltage and the selected one of the plurality of PWM modulation approaches; and to provide the switching command to the converter in order to modulate DC energy in the energy storage device into a control signal. [13] The control system of claim 12, wherein the pulse width modulation module is configured to select the one of the plurality of PDM approaches based on the modulation index and the common mode voltage setting. [14] A control system according to claim 13, wherein the common mode voltage setting indicates whether or not the common mode voltage is to be reduced; and the pulse width modulation module is configured to select one of a plurality of effective voltage phasor PDM approaches based on the modulation index if the common-mode voltage setting indicates to reduce the common-mode voltage; and the pulse width modulation module is designed to select space vector pulse width modulation (SVPWM) if the common mode voltage setting indicates not to reduce the common mode voltage. [15] The control system of claim 14, wherein the plurality of active voltage phasor PDM approaches comprise: a near-state PDM approach, a single-mode far-state PDM approach, and a dual-mode far-state PDM approach. [16] A method comprising: Determining a modulation index based on a voltage of an energy storage device in the inverter and a target output voltage of the inverter; Selecting one of a variety of pulse width modulation (PDM) approaches based on the modulation index; Determining a switching command for the inverter based on the target output voltage and the selected one of the plurality of PDM modulation approaches; and Providing the switching command to the inverter to control the inverter: to modulate energy in the energy storage device into a drive signal delivered to the load. [17] The method of claim 16, wherein selecting one of a plurality of PDM approaches based on the modulation index comprises selecting one of a near-state PDM approach, a single-mode far-state PDM approach, a dual-mode far-state PDM approach, and space vector pulse width modulation (SVPWM). [18] The method of claim 17, wherein, for modulation indices less than or equal to 0.906, providing the drive signal to the load induces less common mode voltage in the load than a drive signal generated by controlling the inverter based on a switching command determined based on the target output voltage and standard SVPWM. [19] The method of claim 17, wherein, for modulation indices less than or equal to 0.906, providing the drive signal to the load induces lower common mode currents in the load than a drive signal generated by controlling the inverter based on a switching command determined based on the target output voltage and standard SVPWM. [20] The method of claim 16, wherein selecting the one of the plurality of PDM approaches comprises selecting the PDM approach having a linear region including the determined modulation index.