Power semiconductor module with a first and a second DC load connection
The power semiconductor module addresses the inefficiencies in DC load connection design by arranging contact elements in parallel rows and a central mounting recess, enhancing assembly and thermal management efficiency.
Patent Information
- Application Number
- DE102024127006
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2026-01-15
- Estimated Expiration
- 2044-09-19
AI Technical Summary
Existing power semiconductor modules lack improved design and arrangement of DC load connections relative to each other, which can affect assembly and disassembly efficiency and thermal management.
The power semiconductor module features DC and AC load connections formed by contact elements that protrude through recesses in the cover surface, arranged in parallel rows, with optional additional rows and groups for enhanced contact distribution, and includes a central mounting recess for fixing to a cooling device.
This design enhances assembly and disassembly efficiency while improving thermal management by optimizing contact element arrangement and distribution, facilitating better heat dissipation.
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
[0001] The invention describes a power semiconductor module with a substrate having a normal direction and a circuit arrangement in half-bridge topology, with a housing having a cover surface and with a first DC load connection, a second DC load connection and an AC load connection, wherein each load connection is formed by first and second contact elements.
[0002] DE 196 30 173 A1 discloses a power module consisting of semiconductor components and passive electronic components, which, with pressure contact of all load and control connections to a customer-specific printed circuit board or similar external connecting elements, enables simple assembly and non-destructive disassembly on a cooling device by means of screws. For this purpose, the module housing is provided with pressure contact springs, which exhibit favorable relaxation behavior, for all electrical connections and for uniform pressure distribution.
[0003] DE 10 2016 119 631 A1 discloses a power semiconductor module with a pressure inlet element, a circuit carrier comprising a first conductor track, a power semiconductor component arranged thereon, and an internal connection device, a housing comprising a guide device arranged therein, and a connection element. The connection element is designed as a bolt with a first and a second end section and an intermediate section formed between them, wherein the first end section rests on the circuit carrier and is electrically connected to it, and wherein the second end section projects out of the housing through a recess, and wherein the connection element is arranged in the associated guide device.The pressure inlet body has a first, rigid subbody and a second, elastic subbody, with the second subbody protruding from the first subbody in the direction of the housing.
[0004] DE 10 2014 110 617 A1 discloses a power semiconductor module system comprising a power semiconductor module and a printed circuit board. The power semiconductor module has a module housing with a top surface, a first terminal group, and a second terminal group. The first terminal group has at least one first electrical connection, or at least two first electrical connections, which are permanently electrically connected to each other. The second terminal group has at least one second electrical connection, or at least two second electrical connections, which are permanently electrically connected to each other. The printed circuit board, which has a first electrode and a second electrode, can be mounted on the power semiconductor module such that, in the mounted state, each first connection is electrically connected to the first electrode and each second connection is electrically connected to the second electrode.The power semiconductor module system further comprises a first insulating rib and / or a second insulating rib. In the case of a first insulating rib, it is attached to the printed circuit board even when unmounted, and when mounted, it is located between the first and second terminal groups. In the case of a second insulating rib, it is also attached to the printed circuit board even when unmounted, and when mounted, it is located on the side of the printed circuit board facing away from the power semiconductor module, between the first and second terminal groups.
[0005] EP 3 624 325 A1 discloses a phase branch for an inverter, comprising a switching module with a switching device, a power line connected to the switching module and electrically connected to the switching device, and a drive line. The drive line is connected to the switching module, electrically connected to the switching device, and separated from the power line to limit the heating of a drive module connected to the drive line by the current flowing through the power line. A multilevel inverter and a method for manufacturing the phase branch for the inverter are also disclosed.
[0006] In light of the aforementioned circumstances, the invention is based on the objective of creating a power semiconductor module whose DC load connections are improved in design and arrangement relative to each other.
[0007] The problem is solved according to the invention by a power semiconductor module with a substrate having a normal direction and a circuit arrangement in a half-bridge topology, with a housing having a cover surface and with a first DC load connection, a second DC load connection and an AC load connection, wherein each load connection is formed by first and second contact elements which extend from the substrate in a normal direction through associated recesses in the cover surface and protrude therefrom, wherein the respective load connections have a respective first and a second row of first and second contact elements, wherein the first and second row of all DC contact elements, preferably all DC and AC contact elements, are arranged on parallel, spaced-apart straight lines.wherein a first row of first contact elements of another DC load terminal is arranged between a first row of first contact elements of a first DC load terminal and a second row of second contact elements of this DC load terminal.
[0008] In most circuit arrangements, the respective DC load connections and the corresponding AC load connection are of course designed accordingly.
[0009] In principle, it can be advantageous, particularly if the circuit arrangement forms a three-level half-bridge, if a third DC load terminal is designed and arranged with a first and second row of first and second contact elements in the same way as the first and second DC load terminals. In this case, a first row of first contact elements from the other DC load terminals can be arranged between a first row of first contact elements of one DC load terminal and a second row of second contact elements of that same DC load terminal.
[0010] It is advantageous if the contact elements are designed as solder, press-pin or spring contact elements.
[0011] It can also be advantageous if a continuous mounting recess is preferably arranged centrally and preferably serves the purpose of fixing the power semiconductor module to a cooling device in the usual manner.
[0012] It can further be advantageous if a plurality of auxiliary contact elements, preferably identical to the contact elements of the load terminals, are arranged in an auxiliary contact area of the cover surface, which is located between a DC voltage area of the cover surface formed by all DC load terminals and an AC voltage area of the cover surface formed by the AC load terminal. It can be advantageous if the mounting recess, viewed in the normal direction, is located in the auxiliary contact area.
[0013] In principle, it is preferred if each row has at least three, preferably at least five, contact elements.
[0014] It may also be preferred if the contact elements of a row are not arranged equidistantly, but preferably in at least two groups. In this case, it may be advantageous if the number of contact elements differs between two of the groups. Alternatively, if there are three groups, it may be advantageous if the middle group has a smaller or larger number of contact elements than the outer groups, which each have the same number of contact elements.
[0015] Of course, unless explicitly or per se excluded or contrary to the idea of the invention, the features or groups of features mentioned in the singular, for example the circuit arrangement, can be present multiple times in the power semiconductor module according to the invention.
[0016] It is understood that the various embodiments of the invention can be implemented individually or in any combination to achieve improvements. In particular, the features mentioned and explained above and below can be used not only in the combinations specified, but also in other combinations or individually, without departing from the scope of the present invention.
[0017] Further explanations of the invention, advantageous details and features, will become apparent from the following description of the invention contained in the Fig. 1, Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6 to Fig. 7 schematically illustrated embodiments of the invention, or of respective parts thereof. Fig. 1 and Fig. Figure 2 shows a generic power semiconductor module according to the state of the art in various sectional views. Fig. Figure 3 shows a first embodiment of a power semiconductor module according to the invention in a schematic top view. Fig. Figure 4 shows a second embodiment of a power semiconductor module according to the invention in a schematic top view. Fig. Figure 5 shows a third embodiment of a power semiconductor module according to the invention in a schematic top view. Fig. Figure 6 shows a fourth embodiment of a power semiconductor module according to the invention in a schematic top view. Fig. Figure 7 shows a fifth embodiment of a power semiconductor module according to the invention in a schematic top view.
[0018] Fig. 1 and Fig. Figure 2 shows a generic power semiconductor module 1 according to the state of the art in various sectional views, a three-dimensional view in Fig. 1 and a two-dimensional in Fig. 2. Each illustration shows a power semiconductor module 1 with a substrate 2 having a normal direction N that coincides with the z-direction. A circuit arrangement 20 in a standard two- or multi-level half-bridge topology is formed on the substrate 2. In this configuration, a plurality of three half-bridge topologies are formed on the substrate 2. The substrate 2 may additionally have a standard metallic base plate (not shown). Also shown is a housing 3, which is cup-shaped. The housing 3, formed in one piece without limitations of generality, covers the substrate 2 and has a cover surface 30 opposite and parallel to the substrate 2.
[0019] The power semiconductor module 1 further comprises DC load terminals 4, 5, AC load terminals 6, and auxiliary contact elements 90, all designed as identical spring contact elements. These spring contact elements are electrically connected to the substrate 2, more precisely to conductor tracks of the substrate 2, and extend in the normal direction N through associated recesses 300 of the cover surface 30, protruding there for external contact. Of course, alternative contact elements, in particular solder contact elements, which are preferably pin-shaped, or conventional press-pin contact elements can be provided.
[0020] Fig. Figure 3 shows a first embodiment of a power semiconductor module according to the invention in a schematic top view. In principle, in this and the following embodiments according to the invention, the substrate 2, the housing 3, and the contact elements are identical to those of the Fig. 1 and Fig. 2. However, the recesses of the housing 3 are not explicitly shown. Furthermore, only the positions of the contact sections protruding from the housing 3 are shown.
[0021] According to the invention, the respective load terminals 4, 5, 6 of this power semiconductor module each have a first and a second row 40, 42, 50, 52, 60, 62 of first and second contact elements 44, 46, 54, 56, 64, 66. A first DC load terminal 4 is shown, which is configured as a first and second row 40, 42 of first DC contact elements 44, 46, which are arranged on two parallel, spaced-apart straight lines 400, 420.
[0022] The first seven DC contact elements 44 of the first row 40 of the first DC load terminal 4 are arranged equidistantly on a straight line 400 in the x-direction. The second seven DC contact elements 46 of the second row 42 of the first DC load terminal 4 are arranged equidistantly on an immediately adjacent, parallel straight line 420 in the x-direction.
[0023] The first seven DC contact elements 54 of the first row 50 of the second DC load terminal 5 are arranged equidistantly on a straight line 500. The second seven DC contact elements 56 of the second row 52 of the second DC load terminal 5 are arranged equidistantly on a parallel straight line 520.
[0024] The respective DC contact elements of the first and second DC load terminals 4, 5 form groups that are arranged in a completely overlapping manner when viewed in the y-direction. All straight lines 400, 420, 500, 520 on which DC contact elements 44, 46, 54, 56 are arranged run parallel to each other. The second row 42 of the first DC load terminal 4 is further away from the first row 50 of the second DC load terminal than the first row 40 of the first DC load terminal 4.
[0025] The seven AC contact elements 64 of the first row 60 of the AC load terminal 6 are arranged equidistantly on a straight line 600. The second seven AC contact elements 66 of the second row 62 of the AC load terminal 6 are arranged equidistantly on a parallel straight line 620.
[0026] All contact elements 44, 46, 54, 56, 64, 66 of the first and second DC load terminals 4, 5 and of the AC load terminal 6 form groups that are arranged in a completely overlapping manner when viewed in the y-direction. All straight lines 400, 420, 500, 520, 600, 620 on which DC or AC contact elements 44, 46, 54, 56, 64, 66 are arranged run parallel to each other. The second row 42 of the second DC load terminal 5 is further away from the first row 60 of the AC load terminal 6 than the first row 50 of the second DC load terminal 5.
[0027] Basically, all contact elements can be arranged not only in two, but also in three or more rows.
[0028] Fig. Figure 4 shows a second embodiment of a power semiconductor module according to the invention in a schematic top view. This differs from the first embodiment in that the contact elements of a row are not arranged equidistantly. The DC contact elements 44, 46, 54, 56 are arranged in three groups 440, 442, 444, 464 per straight line 400, 420, 500, 520, wherein the outer groups each have two and the inner group each has three DC contact elements 44, 46, 54, 56. The AC contact elements 64, 66 are arranged in two groups 640, 642, 662 per straight line 600, 620, wherein one group 640 has four and the other respective group 642, 662 has three AC contact elements 64, 66.
[0029] The respective groups 440,442,444,464 of the DC voltage contact elements 44,46,54,56 of the first and second DC voltage load terminal 4,5 are arranged in a completely overlapping manner when viewed in the y-direction.
[0030] Fig. Figure 5 shows a third embodiment of a power semiconductor module according to the invention in a schematic top view. Here, the first row 50 of first contact elements 54 of the second DC load terminal 5 is arranged between a first row 40 of first contact elements 44 of the first DC load terminal 4 and the second row 42 of second contact elements 46 of this first DC load terminal 4.
[0031] All DC load connections 4, 5 form a DC voltage area 430 of the top surface 30. The AC load connection 6 forms an AC voltage area 630 of the top surface 30. An auxiliary contact area 930 is arranged between the DC voltage area 430 and the AC voltage area 630. All auxiliary contact elements 90 are arranged in this auxiliary contact area 930.
[0032] Fig. Figure 6 shows a fourth embodiment of a power semiconductor module according to the invention in a schematic top view. Here, a third DC load terminal 7 is configured with a first and second row 70, 72 of first and second contact elements 74, 76 in the same way as the first and second DC load terminals 4, 5. The third DC load terminal 7, more precisely its two rows and thus also the straight lines on which the contact elements 74, 76 are arranged, is located between the first and second DC load terminals 4, 5.
[0033] All contact elements of the respective DC load terminals 4, 5, 7 are arranged in groups that are laterally offset in the x-direction but overlap by more than 50%.
[0034] Fig.Figure 7 shows a fifth embodiment of a power semiconductor module according to the invention in a schematic top view. The DC contact elements 44, 46, 54, 56 of all rows 40, 42, 50, 52 are again not arranged equidistantly. The DC contact elements are arranged in two equally sized groups for each straight line 400, 420, 500, 520. The respective groups of DC contact elements of the first and second DC load terminals 4, 5 are again arranged to completely overlap in the y-direction.
[0035] Furthermore, this power semiconductor module has a centrally arranged continuous mounting recess 8 designed according to the prior art. This mounting recess 8 is located in the auxiliary contact area 930 of the cover surface 30, which in turn is located between the DC voltage area 430 of the cover surface 30 and the AC voltage area 630 of the cover surface 30.
Claims
[1] Power semiconductor module (1) with a substrate (2) having a normal direction (N) and a circuit arrangement (20) in a half-bridge topology, with a housing (3) having a cover surface (30) and with a first DC load terminal (4), a second DC load terminal (5) and an AC load terminal (6), wherein each load terminal is formed by first and second contact elements (44, 46, 54, 56, 64, 66) extending from the substrate (2) in a normal direction (N) through associated recesses (300) of the cover surface (30) and protruding therefrom, wherein the respective load terminals (4, 5, 6) have a respective first and second row (40, 42, 50, 52, 60, 62) of first and second contact elements (44, 46, 54, 56, 64, 66), wherein the first and second row (40, 42, 50, 52) all DC contact elements (44, 46, 54, 56), preferably all DC and AC contact elements, on parallel, spaced-apart straight lines (400, 420,500, 520, 600, 620) are arranged, wherein between a first row (40, 50) of first contact elements (44, 54) of a DC load terminal (4, 5) and a second row (42, 52) of second contact elements (46, 56) of this DC load terminal (4, 5) a first row (40, 50) of first contact elements of another DC load terminal (4, 5) is arranged. [2] Power semiconductor module according to claim 1, wherein a third DC load terminal (7) is formed and arranged with a first and second row (70,72) of first and second contact elements (74,76) in the same way as the first and second DC load terminal (4,5). [3] Power semiconductor module according to claim 2, wherein between a first row (40) of first contact elements (44) of a first DC load terminal (4) and a second row (42) of second contact elements (46) of this DC load terminal (4) a first row (50,70) of first contact elements (52,72) of the other DC load terminals (5,7) are arranged. [4] Power semiconductor module according to one of the preceding claims, wherein the contact elements (44,46,54,56,64,66,74,76) are designed as solder, press-pin or spring contact elements. [5] Power semiconductor module according to one of the preceding claims, wherein a continuous mounting recess (8) is preferably arranged centrally. [6] Power semiconductor module according to one of the preceding claims, wherein a plurality of auxiliary contact elements (90), which are preferably identical to the contact elements (44, 46, 54, 56, 64, 66, 74, 76) of the load terminals (4, 5, 6, 7), are arranged in an auxiliary contact area (930) of the cover surface (30), which is arranged between a DC voltage area (430) of the cover surface (30) formed by all DC load terminals (4, 5, 7) and an AC voltage area (630) of the cover surface (30) formed by the AC load terminal (6). [7] Power semiconductor module according to claims 5 and 6, wherein the mounting recess (8) is arranged in the auxiliary contact area (930) when viewed in the normal direction (N). [8] Power semiconductor module according to one of the preceding claims, wherein each row (40,42,50,52,60,62,70,72) has at least three, preferably at least five, contact elements (44,46,54,56,64,66,74,76). [9] Power semiconductor module according to one of the preceding claims, wherein the contact elements (44,46,54,56,64,66,74,76) of a series (40,42,50,52,60,62,70,72) are not arranged equidistantly, but preferably in at least two groups (440,442,444,464,640,642,662). [10] Power semiconductor module according to claim 9, wherein in two groups (440,442,444,464,640,642,662) the number of respective contact elements (44,46,54,56,64,66,74,76) is different. [11] Power semiconductor module according to claim 9, wherein in three groups (440,442,444,464,640,642,662) the middle group has a smaller or larger number of contact elements (44,46,54,56,64,66,74,76) than the outer groups, which each have the same number of contact elements (44,46,54,56,64,66,74,76).
Citation Information
Patent Citations
Power semiconductor module system with high insulation strength and method for manufacturing a power semiconductor module arrangement with high insulation strength
DE102014110617A1
Power converters with segregated switch and drive modules
EP3624325A1