Power transistor and method for producing a power transistor
The integration of a monocrystalline SiC layer with AlGaN and gallium oxide layers with controlled dopant gradients addresses the high resistance and cost issues in gallium oxide-based transistors, achieving low-loss current flow and reduced production costs.
Patent Information
- Application Number
- DE102024201073
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-07
- Publication Date
- 2025-08-07
AI Technical Summary
Gallium oxide-based power transistors face high electrical resistance and high production costs due to the use of smaller diameter gallium oxide donor substrates and the abrupt transition between SiC and gallium oxide, which limits their performance and efficiency.
A power transistor design incorporating a monocrystalline SiC layer with an AlGaN layer and a gallium oxide layer, where the AlGaN layer has a controlled aluminum-to-gallium ratio and dopant gradients, and optionally a GaN layer, to create a continuous and low-resistance transition between SiC and gallium oxide.
The design reduces electrical resistance and production costs by ensuring a low-loss current flow and homogeneous energetic barriers, enhancing the performance and efficiency of the power transistor.
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Abstract
Description
[0001] The invention relates to a power transistor and a method for producing a power transistor. State of the art
[0002] Power transistors based on gallium oxide have a lower on-resistance than comparable power transistors based on SiC or GaN.
[0003] However, gallium oxide has low thermal conductivity, so the production of vertical gallium oxide transistors requires polycrystalline SiC substrates onto which a gallium oxide layer is deposited. This is usually done using a gallium oxide donor substrate.
[0004] The disadvantages here are that this procedure is expensive, the gallium oxide donor substrate has a smaller diameter than commercially available polycrystalline SiC substrates and the transition between SiC and gallium oxide has a high electrical resistance.
[0005] The object of the invention is to overcome these disadvantages. Disclosure of the invention
[0006] The power transistor comprises a monocrystalline SiC layer. According to the invention, an AlGaN layer is arranged on the monocrystalline SiC layer, with a gallium oxide layer arranged on the AlGaN layer.
[0007] The advantage here is that the conduction band of AlGaN lies between the conduction bands of SiC and gallium oxide, so that the electrical resistance between SiC and gallium oxide is low.
[0008] In a further development, the AlGaN layer has an aluminum-to-gallium ratio of 1:4 - 1:2.
[0009] The advantage here is that by varying the Al concentration in the AlGaN layer, the energetic barrier to the gallium oxide and to the SiC can be adjusted.
[0010] In a further embodiment, an Al concentration of the AlGaN layer decreases towards the gallium oxide layer.
[0011] The advantage here is that the electrical resistance between SiC and gallium oxide is further reduced because the band gap, and thus the energy position of the conduction band edge, changes gradually. The energy transition is thus continuous and not abrupt.
[0012] In a further development, the gallium oxide layer has an n-dopant concentration greater than 5e18 cm^-3 in a region facing the AlGaN layer.
[0013] The advantage here is that the energetic barrier between the AlGaN and the gallium oxide can be further reduced by the high doping in order to ensure a low-loss current flow.
[0014] In a further embodiment, a GaN layer is arranged between the AlGaN layer and the gallium oxide layer.
[0015] The advantage here is that the conduction band of GaN lies between the conduction bands of AlGaN and gallium oxide, so that the electrical resistance between SiC and gallium oxide is very low.
[0016] In a further development, the AlGaN layer has a first dopant gradient, wherein the first dopant gradient decreases from a side of the AlGaN layer facing the SiC layer towards the gallium oxide layer.
[0017] The advantage here is that the energy barrier of AlGaN is lower than that of GaN compared to that of AlGaN compared to SiC. Due to the higher dopant concentration on the side facing SiC, the energy barrier can be reduced to create a homogeneous barrier on both sides.
[0018] In a further embodiment, the GaN layer has a second dopant gradient, wherein the second dopant gradient increases from a side of the GaN layer facing the AlGaN layer towards the gallium oxide layer.
[0019] The advantage here is that the energy barrier of GaN compared to AlGaN is lower than that of GaN compared to gallium oxide. Due to the higher dopant concentration on the side facing gallium oxide, the energy barrier can be reduced to provide a homogeneous barrier on both sides.
[0020] In a further development, the gallium oxide layer has a third dopant gradient, wherein a doping of the gallium oxide layer is greatest in a lower region facing the SiC layer.
[0021] The inventive method for producing a power transistor comprises depositing an AlGaN layer on a monocrystalline SiC layer by MOCVD and depositing a gallium oxide layer on the AlGaN layer by MOCVD or HVPE.
[0022] In a further development, a GaN layer is applied to the AlGaN layer using MOCVD.
[0023] Further advantages arise from the following description of embodiments and the dependent patent claims. Short description of the drawings
[0024] The present invention is explained below with reference to preferred embodiments and the accompanying drawings. They show: Fig. 1 shows a first embodiment of the power transistor according to the invention, Fig. 2 a second embodiment of the power transistor according to the invention, and Fig. 3 a method for manufacturing a power transistor.
[0025] Fig. 1 shows a first embodiment of the power transistor 100 according to the invention. The power transistor 100 comprises a monocrystalline SiC layer 102. An AlGaN layer 103 is arranged on the SiC layer 102. A gallium oxide layer 105 is arranged on the AlGaN layer 103. In order to reduce resistance at the transition between the AlGaN layer 103 and the gallium oxide layer 105, the gallium oxide layer 105 can optionally have a very high n-type dopant concentration, in particular greater than 5e18 cm^-3, in the lower region, i.e., directly above the AlGaN layer 103.
[0026] Fig. Figure 2 shows a second embodiment of the power transistor 200 according to the invention. The power transistor 200 comprises a monocrystalline SiC layer 202. An AlGaN layer 203 is arranged on the SiC layer 202. A GaN layer 204 is arranged on the AlGaN layer 203. A gallium oxide layer 105 is arranged on the GaN layer 203. The GaN layer 203 has a layer thickness of 50-200 nm.
[0027] The dopant concentration of the GaN layer 204 is greater than 1e19 cm^-3. The doping may be homogeneous or have a dopant gradient that increases upwards from the side of the GaN layer 204 facing the AlGaN layer 203.
[0028] The monocrystalline SiC layer 102 and 202 has an n-type dopant concentration greater than 5e18 cm^-3. The AlGaN layer 103 and 203 has a layer thickness of at least 50 nm. The Al-to-Ga concentration in the AlGaN layer 103 and 203 preferably has a ratio of 1:4 - 1:2. Ideally, the Al concentration is selected so that the energy barriers to the SiC and to the gallium oxide are equal. The goal is to create an energy transition from SiC to gallium oxide that enables low-loss current transport. The dopant concentration of the AlGaN layer 103 and 203 is greater than 5e18 cm^-3, preferably 1e20 cm^-3. The doping may be homogeneous or may have a dopant gradient that decreases upwards from the side of the AlGaN layer 103 and 203 facing the SiC layer 102 and 202.This means that the conduction band edge corresponds as closely as possible to that of gallium oxide on the side facing the gallium oxide and as closely as possible to the power band edge of SiC on the side facing the SiC. The power transistors 100 and 200 each comprise a source electrode 106 or 206, respectively, and a gate electrode 108 or 208, respectively, which are arranged on the gallium oxide layer 104 or 204. The source electrode 106 or 206 and the gate electrode 108 or 208 are electrically separated from one another by an insulation region 107 or 207, respectively. A drain electrode 101 or 201 is arranged below the silicon layer 102 or 202, respectively.
[0029] The invention finds application, for example, in power transistors, particularly MOSFETs or JFETs, used in electric drivetrains of electric or hybrid vehicles, for example, in DC / DC converters and inverters, as well as in vehicle chargers. The power transistors can also be used in inverters for household appliances such as washing machines.
[0030] Fig.3 shows a method 300 for manufacturing a power transistor. The method starts with a step 310 in which an AlGaN layer is applied to a monocrystalline SiC layer, preferably by means of MOCVD. The AlGaN layer has a dopant concentration greater than 5e18 cm^-3, preferably greater than 1e20 cm^-3. The AlGaN layer can have a first dopant gradient, wherein the first dopant gradient is greatest directly above the monocrystalline SiC layer and decreases with increasing AlGaN layer thickness, i.e., the dopant concentration of the AlGaN layer has a value of 1e20 cm^-3 directly above the SiC layer and decreases to 5e18 cm^-3 with increasing layer thickness of the AlGaN layer. In a subsequent step 330, a gallium oxide layer is applied to the AlGaN layer by means of MOCVD or HVPE.The gallium oxide layer can also have a dopant gradient, with the doping preferably having an n-dopant concentration greater than 5e18 cm^-3 in the lower region, i.e., the region facing the AlGaN layer. In the following steps (not shown), the power transistor is completed by appropriately processing the gallium oxide layer, also called the device layer, and applying the electrical contacts and insulating them according to the state of the art.
[0031] Optionally, in a step 320, which is performed between steps 310 and 330, a GaN layer can be applied to the AlGaN layer by means of MOCVD. The GaN layer has a dopant concentration greater than 5e18 cm^-3, preferably greater than 1e20 cm^-3. The GaN layer can have a second dopant gradient, wherein the second dopant gradient is lowest directly above the AlGaN layer and increases with increasing AlGaN layer thickness, i.e., the dopant concentration of the GaN layer has a value of 5e18 cm^-3 directly above the AlGaN layer and increases with increasing AlGaN layer thickness to a value of 1e20 cm^-3.
Claims
[1] Power transistor (100) with a monocrystalline SiC layer (102), characterized by that an AlGaN layer (103) is arranged on the monocrystalline SiC layer (102), wherein a gallium oxide layer (105) is arranged on the AlGaN layer (103). [2] Power transistor (100) according to claim 1, characterized by that the AlGaN layer (103) has an aluminum to gallium ratio of 1:4 - 1:
2. [3] Power transistor (100) according to claim 2, characterized by that an Al concentration of the AlGaN layer (103) decreases towards the gallium oxide layer (105). [4] Power transistor (100) according to one of the preceding claims, characterized by that the gallium oxide layer (105) has an n-dopant concentration greater than 5e18 cm^-3 in a region facing the AlGaN layer (103). [5] Power transistor (100) according to one of claims 1 to 3, characterized bythat a GaN layer (104) is arranged between the AlGaN layer (103) and the gallium oxide layer (105). [6] Power transistor (100) according to one of the preceding claims, characterized by in that the AlGaN layer (104) has a first dopant gradient, wherein the first dopant gradient decreases from a side of the AlGaN layer (104) facing the SiC layer (102) towards the gallium oxide layer (105). [7] Power transistor (100) according to one of claims 5 or 6, characterized by in that the GaN layer (105) has a second dopant gradient, wherein the second dopant gradient increases from a side of the GaN layer (104) facing the AlGaN layer (103) towards the gallium oxide layer (105). [8] Power transistor (100) according to one of the preceding claims, characterized byin that the gallium oxide layer (105) has a third dopant gradient, wherein a doping of the gallium oxide layer (105) is greatest in a lower region facing the SiC layer (102). [9] Method (300) for producing a power transistor comprising the steps: • Applying (310) an AlGaN layer onto a monocrystalline SiC layer by means of MOCVD, • Application (330) of a gallium oxide layer on the AlGaN layer by means of MOCVD or HVPE. [10] Method (300) according to claim 9, characterized by that a GaN layer is deposited on the AlGaN layer using MOCVD.
Citation Information
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semiconductor device
DE102017210711A1