Superjunction device and method for producing a superjunction region

Abstract

A superjunction device and a method for producing a superjunction device are disclosed. The superjunction device comprises a semiconductor body (100) comprising an inner region (110) and an edge region (120) laterally surrounding the inner region (110); a superjunction region (1) comprising first regions (11) of an effective first doping type and second regions (12) of an effective second doping type, which are arranged alternately in a first lateral direction (x) of the semiconductor body (100).The first regions have a first width (w1) in the inner region (110) and are spaced apart from one another by a first distance (d1), have a second width (w2) in the first edge region section (121) and are spaced apart from one another by a second distance (d2), and are elongated in the inner region (110) and the edge region (120) in a second lateral direction (y) that differs from the first lateral direction. The second width (w2) is smaller than the first width (w1), and the second distance (d2) is smaller than the first distance (d1).

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a superjunction device comprising a superjunction region and a method for manufacturing a superjunction region of a superjunction device. BACKGROUND

[0002] A vertical superjunction device, such as a superjunction transistor device, comprises a superjunction region having a plurality of first regions of a first doping type and a plurality of second regions of a second doping type complementary to the first doping type. The superjunction region is arranged in an inner region and an edge region of a semiconductor body of the superjunction device. The edge region surrounds the inner region in lateral directions of the semiconductor body and is free of active device regions, such as source and body regions in a transistor device. The first and second regions may be arranged alternately in a lateral direction of the semiconductor body.

[0003] The first regions are connected to a first terminal, and the second regions are connected to a second terminal that is different from the first terminal of the superjunction device. In a transistor device, for example, the first and second terminals are drain and source terminals. The superjunction device is in an off-state when PN junctions between adjacent first and second regions are reverse-biased, so that space charge regions (depletion regions) expand in the adjacent first and second regions of the superjunction region. The expansion of depletion regions in the first and second regions is associated with an electric field.A voltage blocking capability is achieved and an avalanche breakdown can occur when the voltage applied between the first and second terminals is such that a magnitude of the electric field reaches a critical value.

[0004] In many cases, it is desirable to design a superjunction transistor device such that a voltage blocking capability in the inner region is lower than in the edge region so that an avalanche breakdown, if any, occurs in the inner region, which has a larger area (and volume) compared to the edge region.

[0005] US 2018 / 0114832 A describes a superjunction component with a superjunction region arranged in an inner region and in an edge region of a semiconductor body, each having alternating N-doped regions and P-doped regions. In the inner region, the N-doped and P-doped regions are wider than in the edge region. To produce the superjunction region, it is provided to implant P-dopant atoms into a weakly N-doped epitaxial layer in a first implantation process and to implant N-dopant atoms into the epitaxial layer in a second implantation process.

[0006] WO 2024 / 122145 A1 describes a method for producing a superjunction region of a superjunction component. In this method, P-dopant atoms are implanted into a semiconductor layer in at least two implantation processes using implantation masks of different widths to produce P-doped regions, which are laterally adjacent to less heavily doped P-doped regions. Furthermore, in this method, N-dopant atoms are implanted in at least two implantation processes using implantation masks of different widths to produce N-doped regions, which are laterally adjacent to less heavily doped N-doped regions. In the finished component, a less heavily doped N-doped region and a less heavily doped P-doped region are arranged between a P-type region and an adjacent N-type region.

[0007] DE 10 2008 032 796 A1 describes a vertical superjunction device with a superjunction region that has alternating N-doped regions and P-doped regions. In an edge region of the device, the width of the N-doped regions increases toward an edge, while the width of the P-doped regions increases.

[0008] There is a need to provide a superjunction transistor device such that a voltage blocking capability in the edge region is higher than in the inner region. SUMMARY

[0009] One embodiment relates to a superjunction device according to claim 1.

[0010] A further embodiment relates to a method according to claim 14 for forming a superjunction region of a superjunction device.

[0011] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The present disclosure is illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like reference numerals refer to similar or identical elements. The elements of the drawings are not necessarily to scale relative to one another. The features of the various illustrated examples may be combined, provided they are not mutually exclusive. Fig. 1A-1C schematically illustrate a horizontal cross-sectional view of a superjunction region arranged in a semiconductor body of a superjunction device, wherein Fig. 1A illustrates an overall view of the superjunction area, Fig. 1B illustrates an example of a detailed view of the superjunction region in an inner region of the semiconductor body and Fig. Figure 1C illustrates an example of a detailed view of the superjunction region in the edge area; Fig. 2A-2B illustrate an example of the Fig. 1A-1C illustrates the superjunction area in detail; Fig. 3-5 illustrate various examples of transitions of the superjunction region between the inner region and the edge region; Fig. 6 illustrates a horizontal cross-sectional view of a superjunction region according to another example; Fig. 7 schematically illustrates a vertical cross-sectional view of a superjunction transistor device including a superjunction region; Fig. 8-9 illustrate various examples of transistor cells of a superjunction transistor device of the Fig. 7 illustrated type; Fig. 10 illustrates a modification of the superjunction transistor device according to Fig. 7; Fig. 11-12 illustrate vertical cross-sectional views of edge regions of superjunction devices according to various examples; Fig. 13A-13C illustrate an example of a method for forming first regions of a first doping type and second regions of a second doping type of a superjunction region; Fig. 14 illustrates another example of a method for forming first and second regions of a superjunction region; and Fig. 15 illustrates a modification of the method according to Fig. 13A-13B. DETAILED DESCRIPTION

[0013] The examples described herein provide a superjunction device and a method for fabricating a superjunction region of a superjunction device.

[0014] Although specific examples have been illustrated and described herein, those skilled in the art will recognize that a variety of alternative and / or equivalent implementations may be substituted for the specific examples shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific examples discussed herein. Therefore, it is intended that this invention be limited only by the claims and their equivalents.

[0015] It should be noted that the methods and devices, including their preferred embodiments, as set forth in this document can be used alone or in combination with the other methods and devices disclosed in this document. Furthermore, the features set forth in connection with one device are also applicable to a corresponding method, and vice versa. Furthermore, all aspects of the methods and devices set forth in this document can be combined in any desired manner. In particular, the features of the claims can be combined with one another in any desired manner.

[0016] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and embodiments set forth herein are primarily intended to be expressly provided for illustrative purposes only to assist the reader in understanding the principles of the proposed methods and systems. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to include their equivalents.

[0017] Fig. 1A-1C schematically illustrate a horizontal cross-sectional view of a superjunction region 1 arranged in a semiconductor body 100 of a superjunction device. The semiconductor body 100 comprises a monocrystalline semiconductor material. According to one example, the monocrystalline semiconductor material is silicon carbide (SiC). According to another example, the monocrystalline semiconductor material is silicon (Si).

[0018] Fig. Figure 1A illustrates an overall view of the superjunction area 1. With reference to Fig. 1, the semiconductor body 100 comprises an inner region 110 and an edge region 120 that laterally surrounds the inner region 110. That is, the edge region 120 surrounds the inner region 110 in lateral directions of the semiconductor body 100. Fig. 1B illustrates an example of a detailed view of a portion of the superjunction region 1 located in the inner area 110, and Fig. 1C illustrates an example of a detailed view of a portion of the superjunction region 1 located in the edge area 120.

[0019] With reference to the Fig. 1B- Fig. 1C, the superjunction region 1 comprises first regions 11 of a first doping type and second regions 12 of a second doping type, which are arranged alternately in a first lateral direction x of the semiconductor body 100. As used herein, “first doping type” denotes an effective first doping type. That is, in a doped region of the first doping type, dopant atoms of the first doping type are present, so that the doped region effectively has a first doping type. Equivalently, “second doping type” denotes an effective second doping type. That is, in a doped region of the second doping type, dopant atoms of the second doping type are present, so that the doped region effectively has a second doping type. Dopant atoms of the first doping type are, for example, P-type dopant atoms, and dopant atoms of the second doping type are N-type dopant atoms.According to another example, dopant atoms of the first doping type are N-type dopant atoms and dopant atoms of the second doping type are P-type dopant atoms.

[0020] With reference to the Fig. 1B- Fig. 1C, the first and second regions 11, 12 in the inner region 110 and the edge region 120 are elongated in a second lateral direction y. According to one example, the second lateral direction y is at least approximately perpendicular to the first lateral direction x, in which the first and second regions 11, 12 are alternately arranged. According to one example, "elongated" includes that the dimension of the first and second regions 11, 12 in the second lateral direction y is much larger than the dimension in the first lateral direction x. Hereinafter, the dimension of the first and second regions 11, 12 in the first lateral direction x is referred to as width. The dimension in the second lateral direction y may be referred to as length.

[0021] In the inner region 110, the first regions 11 have a first width w1 and are spaced apart from each other by a first distance d1. In the edge region 120, the first regions 11 have a second width w2 and are spaced apart from each other by a second distance d2. The first width w1 is greater than the second width w2, and the first distance d1 is greater than the second distance d2.

[0022] According to one example, the first width w1 is selected from a range between 1.2 times and 3 times the second width w2, and the first distance d1 is selected from a range between 1.2 times and 5 times the second distance d2. According to one example, the first width w1 is selected in absolute values ​​from a range between 0.5 micrometers (µm) and 2 micrometers.

[0023] According to one example, adjacent first and second regions 11, 12 are substantially adjacent to one another. In this example, the first distance d1 is at least approximately equal to a width w41 of the second regions 12 in the interior region 110. d1≈w41 and the second distance d2 is at least approximately equal to a width w42 of the second regions in the edge region 120, d2≈w42

[0024] Furthermore, in this example, at a PN junction between the first and second regions 11, 12, there is an abrupt change from the doping concentration of the first doping type of a respective first region 11 to the doping concentration of the second doping type of a respective adjacent second region 12.

[0025] According to another example published in the Fig. 1B- Fig. 1C in dashed lines, the superjunction region 1 comprises a third region 13 arranged between each pair of adjacent first and second regions 11, 12. The third region 13 has a lower (effective) doping concentration than each of the first and second regions 11, 12. According to one example, a doping concentration of the third region 13 is less than 10% of the doping concentration of each of the first and second regions 11, 12, such that the doping concentration of the third region 13 is at least one order of magnitude lower than the doping concentration of each of the first and second regions 11, 12.

[0026] According to one example, the doping concentration of the first and second regions 11, 12 is from a range between 5E16 cm -3 and 5E18 cm -3 selected and the doping concentration of the third region is from a range between 1E15 cm -3and 1E16 cm -3 selected. According to one example, the first and second regions 11, 12 have at least approximately the same doping concentration. This means, for example, that the doping concentration of the first regions 11 deviates from the doping concentration of the second regions 12 by more than 10%, less than 5%, or even less than 1%.

[0027] Fig. 2A-2B illustrate the example in which third regions 13 are arranged between the first and second regions 11, 12 in more detail. With reference to the Fig. 2A-2B, the third regions 13 have a width w31 in the inner region 110 and a width w32 in the edge region. According to one example, the width w31 of the third region 13 in the inner region 110 is at least approximately equal to the width w32 in the edge region 120.

[0028] The second regions 12 have a width w41 in the inner region 110 and a width w42 in the edge region 120, wherein the width w41 in the inner region is greater than a width w42 in the edge region 120. As can be seen from Fig. 2A, the first distance d1 between adjacent first regions 11 in the inner region 110 is substantially given by the width w41 of the second region 12 arranged between the two adjacent first regions 11 plus the widths w31 of the two third regions 13 arranged between the second region 12 and the adjacent first regions 11. d1≈w41+2⋅w31

[0029] As from Fig. 2B, the first distance d2 between adjacent first regions 11 in the edge region 120 is substantially given by the width w42 of the second region 12 arranged between the two adjacent first regions 11 plus the widths w32 of the two third regions 13 arranged between the second region 12 and the adjacent first regions 11. d2≈w42+2⋅w32

[0030] According to one example, the first width w1 of the first regions 11, which is the width in the inner region 110, is at least approximately equal to the width w41 of the second regions 12 in the inner region 110, w1≈w41 and the second width w2, which is the width in the edge region 120, is at least approximately equal to the width w42 of the second regions 12 in the edge region 120, w2≈w42

[0031] Furthermore, the effective doping concentration of the first type of first regions 11 can be at least approximately equal to the effective doping concentration of the second type of second regions 12, and in the optional case that third regions 13 are arranged between the first and second regions 11, 12, the third regions 13 are at least approximately intrinsic. In this example, lateral dopant doses of the first regions 11 in the inner region 110 are at least approximately equal to the dopant doses of the second regions 12 in the inner region 110, and lateral dopant doses of the first regions 11 in the edge region 120 are at least approximately equal to the dopant doses of the second regions 12 in the edge region 120. The "lateral dopant dose" is the integral of the doping concentration in the first lateral direction x, which is the direction in which the first and second regions 11, 12 are alternately arranged.

[0032] By implementing the first regions 11 such that the widths w2 of the first regions 11 in the edge region 120 are smaller than the widths w1 of the first regions 11 in the inner region 110, and by implementing the second regions 12 such that the widths w42 of the second regions 12 in the edge region 120 are smaller than the widths w42 of the second regions 12 in the inner region 110, the lateral dopant doses of the first and second regions 11, 12 in the edge region 120 are lower than the lateral dopant doses of the first and second regions 11, 12 in the inner region 110. This leads to increased avalanche robustness of the superjunction device.

[0033] Fig. 1B and Fig. 2A each illustrate a portion of the superjunction region 1 arranged in the inner region 110 of the semiconductor body 100, and Fig. 1C and Fig. 2B each illustrate a portion of the superjunction region 1 arranged in the edge region 120 of the semiconductor body. In particular, in the second lateral direction y, various types of transitions from the first width w1 in the inner region 110 to the second width w2 in the edge region 120 and from the first distance d1 in the inner region 110 to the second distance d2 in the edge region 120 are possible. Some examples are described below with reference to Fig. 3-5 explained.

[0034] Each of the Fig. 3-5 illustrates a horizontal cross-sectional view of a portion of the superjunction region 1, which is partially arranged in the inner region 110 and the edge region 120. Everything explained hereinbefore with respect to the first and second widths w1, w2 and the first and second distances d1, d2 applies to each of the Fig. 3-5. Furthermore, in each of these examples, the first and second regions 11, 12 may be adjacent to each other or may be separated by respective third regions 13, although the latter in Fig. 3-5 are not illustrated.

[0035] According to a Fig. 3, there is an abrupt transition in the second lateral direction y between the first regions 11 with the first width w1 and the first distance d1 in the inner region 110 and the second width w2 and the second distance d1 in the edge region 120. According to one example, the first and second regions 11, 12 are implemented such that, in the second lateral direction y, a first region 11 arranged in the inner region 110 borders on at least one first region 11 arranged in the edge region 120, and a second region 12 arranged in the inner region 110 borders on at least one second region 12 arranged in the edge region 120.

[0036] With reference to the above, first regions 11 arranged in the interior region 110 may have at least approximately the same lateral dopant dose of the first type as first regions 11 arranged in the exterior region 120, and second regions 12 arranged in the interior region 110 may have at least approximately the same lateral dopant dose of the second type as second regions 12 arranged in the edge region 120. In this way, in the first lateral direction x, dopant charges of the first type and dopant charges of the second type are balanced in both the interior region 110 and the edge region 120.

[0037] In the first lateral direction x, at a transition between the inner region 110 and the edge region 120, a first region 11 may have a third width w3 that differs from the first and second widths w1, w2. This serves to maintain the charge balance in which the width of the first regions 11 changes from the first width w1 in the inner region 110 to the second width w2 in the edge region 120 and the distance changes from the first distance d1 in the inner region 110 to the second distance d2 in the edge region 120. According to one example, the third width w3 is given by the average of the first and second widths w1, w2. w3=w1+w22

[0038] According to another example published in Fig. 4, each of the first regions 11 arranged in the inner region 110 merges in the second lateral direction y into two first regions 11 arranged in the edge region 120. In this example, the first width w1 is at least approximately twice the second width w2, w1 ≈ 2·w2. Referring to Fig. 4, there is a transition region 121 that borders the inner region 110 in the second lateral direction y. In the transition region 121, there are first pairs of adjacent first regions 11 and second pairs of adjacent first regions 11. In the transition region 121, the distance between the first regions 11 of the first pairs is smaller than the second distance d2 near the inner region 110 and increases in the first lateral direction y to the second distance d2. Furthermore, the distance between the first regions 11 of the second pairs is greater than the second distance d2 near the inner region 110 and decreases in the first lateral direction y to the second distance d2. In the transition region 121, the first regions 11 have at least approximately the second width w2.By providing first pairs of adjacent first regions 11 whose distance decreases in the first lateral direction y and by providing second pairs of adjacent first regions 11 whose distance increases in the first lateral direction y, a charge balance is maintained in the transition region 121.

[0039] In the first lateral direction x, at a transition between the inner region 110 and the edge region 120, a first region 11 may have a third width w3 that differs from the first and second widths w1, w2. This serves to maintain the charge balance. In the same way as with reference to Fig. 3, the third width w3 is given, for example, by the mean value of the first and second widths w1, w2.

[0040] Fig. 5 illustrates a modification of the Fig. 4 illustrated superjunction area 1. The Fig. The superjunction area 1 illustrated in Figure 5 differs from the one shown in Fig. 4 in that the superjunction region 1 comprises, in a region adjacent to the inner region 110 in the second lateral direction, first regions 11 of a first type and first regions 11 of a second type, which are arranged alternately in the first lateral direction x. The first regions 11 of the first type end in the second lateral direction y at a lateral position at which the inner region 110 ends in the second lateral direction y. The first regions 11 of the second type merge in the second lateral direction y into two first regions 11 having the second width w2.

[0041] Furthermore, in the first lateral direction x, at a transition between the inner region 110 and the edge region 120, a first region 11 may have a third width w3 that differs from the first and second widths w1, w2 in order to maintain the charge balance. In the same way as with reference to Fig. 3, the third width w3 is given, for example, by the mean value of the first and second widths w1, w2.

[0042] With reference to Fig. 1A, the semiconductor body 100 has an edge surface 101, which is a surface that closes off the semiconductor body 100 in lateral directions. As in Fig. 1A, the superjunction region 1 may extend in any lateral direction to the edge surface 101. According to another example shown in Fig. 6, the superjunction region 1 may end at a distance from the edge surface 101. In this example, the edge region 120 comprises a first edge region portion 122, which surrounds the inner region 110 in lateral directions and in which a portion of the superjunction region 1 is arranged. Furthermore, the edge region 120 comprises a second edge region portion 123, which is arranged between the first edge region portion 122 and the edge surface 101 and which is free of the superjunction region 1. According to one example, the second edge region portion 123 has a substantially homogeneous doping concentration of either the first doping type or the second doping type. According to one example, the second edge region portion 123 has a substantially lower doping concentration than the first and second regions 11, 12 of the superjunction region 1.According to a further example, the doping concentration of the second edge region section 123 is at least approximately equal to the doping concentration of the first and second regions 11, 12.

[0043] The superjunction region 1 explained above can be implemented in various types of superjunction devices, such as superjunction transistor devices or superjunction diodes. An example of a superjunction transistor device comprising a superjunction region 1 of the type explained above is shown in Fig. 7 and explained below.

[0044] Fig. Figure 7 schematically illustrates a vertical cross-sectional view of a portion of a superjunction transistor device. In particular, Fig. 7 shows a section of a semiconductor body 100 of the transistor device in a vertical sectional plane defined by the first lateral direction x, in which the first and second regions 11, 12 are arranged alternately, and a vertical direction z perpendicular to the first lateral direction x. Further, Fig. 7 a section of the interior region 110 of the semiconductor body 100.

[0045] With reference to Fig. 7, the first regions 11 are connected to a first load path node S of the transistor device, and the second regions 12 are connected to a second load path node D of the transistor device. The first load path node S is, for example, a source node, and the second load path node D is, for example, a drain node. A connection between the first regions 11 and the first load path node S is shown in Fig. 7 is only schematically illustrated. Examples of how these connections can be implemented are explained below with reference to examples.

[0046] According to one example, the second regions 12 are connected to the first load path node D via a further semiconductor region 41 of the second doping type, which is referred to below as a drain region 41. The drain region 41 may be adjacent to the second regions 12. However, this is not the case in Fig. 7 is not shown. Optionally, as in Fig. 7, a buffer region 42 of the second doping type is arranged between the drain region 41 and the second regions 12. According to one example, a doping concentration of the buffer region 42 is lower than a doping concentration of the drain region 41. According to one example, the doping concentration of the buffer region 42 is lower than the doping concentration of the drain region 41 and may be less than 50%, less than 20%, or even less than 5% of the doping concentration of the drain region 41. According to one example, the doping concentration of the drain region 41 is between 1E18 cm -3 and 1E19 cm -3 selected and the doping concentration of the buffer region 42 is between 2E15 cm -3 and 3E18 cm -3 selected.

[0047] According to one example, buffer region 42 is at least approximately homogeneously doped. According to another example, buffer region 42 comprises two or more differently doped layers arranged between drain region 41 and superjunction region 1.

[0048] According to one example, the buffer region 42 is substantially homogeneously doped. According to another example, the doping concentration of the buffer region 42 varies in the lateral direction z such that the buffer region 42 comprises at least two differently doped regions of the first doping type.

[0049] The drain region 41 and the optional buffer region 42 may be part of a contiguous semiconductor layer 4 of the first doping type, wherein the semiconductor layer 4 is arranged between the superjunction region 1 and a first surface 102 of the semiconductor body 100. The semiconductor layer 4 may comprise a semiconductor substrate forming the drain region 41 and an epitaxial layer formed on the substrate and forming the buffer region 42.

[0050] With reference to Fig. 1, the superjunction device further comprises a header structure 3 connected between the source node S and the second regions 12. The header structure 3 may be at least partially integrated into the semiconductor body 100. That is, the header structure 3 may be at least partially arranged between the superjunction region 1 and a second surface 103 opposite the first surface 102 of the semiconductor body 100. According to one example, the header structure 3 comprises a plurality of transistor cells. Examples of the transistor cells are explained further below. In the Fig. In the example illustrated in Figure 7, the transistor cells are represented by the circuit symbol of a transistor. For illustrative purposes only, the Fig. The circuit symbol illustrated in Figure 7 represents an N-type enhancement-mode MOSFET (Metal Oxide Semiconductor Field-Effect Transistor). However, the transistor device is not limited to being implemented as an N-type enhancement-mode MOSFET. It is also possible to implement the transistor device as an N-type depletion-mode MOSFET, a P-type enhancement-mode or depletion-mode MOSFET, or a JFET (Junction Field-Effect Transistor).

[0051] With reference to Fig. 7, the transistor device further comprises a control node G, which may also be referred to as a gate node G. In a conventional manner, a voltage applied between the gate node G and the source node S controls a conductive channel between the source node S and the second regions 12 of the superjunction region 1 and therefore controls whether the transistor device is in an on-state or an off-state.

[0052] The transistor device according to Fig. 7, the second regions 12 can also be referred to as drift regions and the first regions 11 can also be referred to as compensation regions.

[0053] With reference to the above, the transistor device can be operated in an on-state or an off-state. The transistor device is in the on-state when a conductive channel is located in the head structure 3 between the source node S and the second regions 12. In this operating state, a current can flow via the second regions 12 of the superjunction region 1 when a suitable load path voltage (drain-source voltage) is applied between the drain and source nodes D, S. The transistor device is in the off-state when the conductive channel is interrupted and a voltage is applied between the drain and source nodes S, D, which reverse-biases the PN junctions between the first and second regions 11, 12 of the superjunction region 1.In the off-state of the superjunction device, space charge regions (depletion regions) in the first regions 11 and the second regions 12 expand, so that the first regions 11 and the second regions 12 can be depleted of charge carriers as the load path voltage increases and absorb the drain-source voltage applied between the drain node D and the source node S.

[0054] The superjunction device can be implemented as an N-type device or as a P-type device. In an N-type device, the first doping type is P-type, and the second doping type, which is the doping type of the second regions 12 and the drain region 41, is N-type. In a P-type device, the first doping type is N-type, and the second doping type is P-type.

[0055] Fig. Figure 8 shows an example of the head structure 3 of the superjunction transistor device in more detail. Fig. 8 Examples of the transistor cells 30 contained in the head structure 3. In addition to the head structure 3, Fig. 8 only a section of the superjunction region 1 is shown, which borders the head structure 3.

[0056] With reference to Fig. 9, each transistor cell 30 comprises a body region 31 of the first doping type, a source region 32 of the second doping type, a gate electrode 33, and a gate dielectric 34. The gate dielectric 34 dielectrically insulates this gate electrode 33 from the body region 31. The body region 31 of each transistor cell 30 separates the respective source region 32 from at least one of the plurality of second regions (drift regions) 12. The source region 32 and the body region 31 of each of the plurality of transistor cells 30 are electrically connected to the source node S of the transistor device. "Electrically connected" in this context means ohmically connected. This means that there is no rectifying junction between the source node S and the source region 32 and the body region 31.According to one example, the source and body regions 32, 31 are connected to a source metallization 35, which is electrically insulated from the gate electrodes 33 by an insulating layer 36. The source metallization 35 forms the source node S or is connected to the source node S of the transistor device. The gate electrode 33 of each transistor cell 30 is electrically connected to the gate node G of the transistor device.

[0057] With reference to the above, the body region 31 of each transistor cell is adjacent to at least one second region 12. Since the body region 31 is of the first doping type and the second region 12 is of the second doping type, there is a PN junction between the body region 31 of each control transistor cell 30 and the at least one second region 11. These PN junctions form a PN diode, sometimes referred to as the body diode of the transistor device.

[0058] The gate electrodes 33 of the transistor cells 30 are configured to control conductive channels in the body regions 31 along the gate dielectrics 34 between the source regions 32 and the first regions 11 depending on a gate-source voltage between the gate node G and the source node S. The transistor device is in the off-state when the gate-source voltage is such that the conductive channels are interrupted and a polarity of the drain-source voltage is such that the PN junctions between the second regions 12 and the body regions 31 are reverse-biased. This is generally known, so no further explanation is required in this regard.

[0059] In the Fig. In the example shown in Figure 8, the gate electrode 33 of each transistor cell 30 is a planar electrode arranged on the second surface 103 of the semiconductor body 100 and dielectrically insulated from the semiconductor body 100 by the respective gate dielectric 34.

[0060] Fig. 9 shows a head structure 3 with transistor cells 30 according to another example. Fig. The transistor cells 30 shown in Figure 9 differ from those shown in Fig. 8 in that the gate electrode 33 of each transistor cell 30 is a trench electrode. That is, each gate electrode 33 is arranged in a respective trench extending from the second surface 103 into the semiconductor body 100. As in the Fig. In the example shown in Figure 8, a gate dielectric 34 dielectrically isolates the gate electrode 33 from the respective body region 31. The body region 31 and the source region 32 of each transistor cell 30 are electrically connected to the source node S. Furthermore, the body region 31 borders on at least one second region 12 and forms a PN junction with the respective second region 12.

[0061] In the in the Fig. 8 and Fig. 9, the transistor cells each comprise a gate electrode 33, wherein the gate electrode 33 of each transistor cell 30 is configured to control a conductive channel between the source region 32 of the respective transistor cell 30 and a second region 12, so that each transistor cell is associated with a second region 12. Furthermore, as shown in the Fig. 8 and Fig. 9, the body region 31 of each transistor cell 30 is connected to at least one first region 11, so that the first regions 11 are electrically connected to the source node S via the body regions 31 of the transistor cells 30.

[0062] For illustrative purposes only, the Fig. 8 and Fig. 9, the body region 31 of each transistor cell 30 is connected to a first region 11, so that each transistor cell 30 is assigned to a first region 11. Furthermore, in the examples shown in the Fig. 8 and Fig. In the examples shown in Figure 9, the source regions 32 of two (or more) adjacent transistor cells are formed by a doped region of the second doping type, the body regions 31 of two (or more) adjacent transistor cells 30 are formed by a doped region of the first doping type, and the gate electrodes 33 of two (or more) transistor cells 30 are formed by one electrode. The gate electrodes 33 may comprise doped polysilicon, a metal, or the like.

[0063] The source regions 32 and the body regions 31 may be formed by implanting dopant atoms into the semiconductor body 100 via the first surface 103. According to one example, the source regions 32 are formed such that their doping concentration is higher than 8E18 cm -3 , and the body regions 31 are manufactured such that their doping concentration is between 1E17 cm -3 and 1E18 cm -3 lies.

[0064] In addition to the body regions 31 and the second regions 12, the transistor device may include shielding regions (not shown) of the second doping type. A doping concentration of these shielding regions may be higher than the doping concentration of the body regions 31. The shielding regions border the body regions 31 and / or the first regions 11 and extend into the second regions 12. The shielding regions and the first regions 11 form JFET (Junction Field Effect Transistor)-like structures that protect the gate dielectrics 34 from high electric fields when the drain-source voltage increases in the off-state. This is generally known, so no further explanation is required in this regard.

[0065] Assigning a transistor cell of the plurality of transistor cells to a first region 11 and a second region 12, as in Fig. 8 and Fig. 9 is only an example. The implementation and arrangement of the transistor cells of the head structure 3 are largely independent of the specific implementation of the superjunction region 1 with the first regions 11 and the second regions 12.

[0066] An example illustrating that the implementation and arrangement of the head structure 3 with the transistor cells 30 is largely independent of the implementation of the superjunction region 1 with the first and second areas 11, 12 is shown in Fig. 10 shown.

[0067] In the Fig. 10, the first regions 11 and the second regions 12 are extended in the second lateral direction y of the semiconductor body 100, while the source regions 32, the body regions 31 and the gate electrodes 33 of the individual control transistor cells 30 of the head structure 3 are extended in the first lateral direction x perpendicular to the second lateral direction y. This differs from the Fig. 8 and Fig. 9, in which the source regions 32 and the body regions 31 are extended in the second lateral direction y. In the example shown in Fig. In the example illustrated in Figure 10, a transistor cell 30 is adjacent to a plurality of first regions 11 and a plurality of second regions 12.

[0068] In the in the Fig. 7 to Fig. In the examples illustrated in Figure 10, the drain region 41, the optional buffer region 42, and the source regions 32 are doped regions of the second doping type, such that the doping type of these regions is complementary to the doping type of the first regions 11 and the same as the doping type of the second regions 12. However, this is only one example.

[0069] According to another example, the drain region 41, the optional buffer region 42, and the source regions 32 are doped regions of the first doping type, such that the doping type of these regions is the same as the doping type of the first regions 11 and complementary to the doping type of the second regions 12. In this example, the body regions 31 have a doping type that is complementary to the doping type of the first regions 11. Furthermore, in this example, the first regions 11 are drift regions of the transistor device, and the second regions 12 are compensation regions of the transistor device. The first doping type is, for example, an N-type.

[0070] Fig. Fig. 11 illustrates a vertical cross-sectional view of an example of the edge region 120 in a superjunction transistor device in which the superjunction region 1 is formed according to the method shown in Fig. 6, so that the superjunction region 1 is spaced from the edge surface 101. Since Fig. 11 only illustrates the edge region 120, transistor cells 30, which are arranged only in the inner region 110, are in Fig. 6 is not shown. The transistor cells may be implemented according to one of the examples previously explained herein.

[0071] With reference to Fig. 11, the first regions 11 of the first doping type, which are arranged in the edge region 120, are electrically coupled to a first doped region 51 of the first doping type, which is electrically connected to the source node S by a second doped region 53 of the first doping type. The second doped region 53 is a contact region and has a higher doping concentration than the first doped region 51. The connection between the second doped region and the source node S is in Fig. 11 is only schematically illustrated. This electrical connection can be implemented in a conventional manner. With reference to Fig. 11, the first doped region 51 is arranged in the vertical direction z between the superjunction region 1 and the second surface 103 of the semiconductor body 100.

[0072] With reference to Fig. 11, the edge region 120 may further comprise field rings 52 of the second doping type embedded in the first doped region 51. The field rings 52 are spaced apart from each other in lateral directions and surround the inner region 110 in an annular manner.

[0073] With reference to Fig. 11, the second edge region 123 may comprise a fourth region 2 of the second doping type in regions that laterally border the superjunction region 1. The fourth region 2 laterally surrounds the superjunction region 1 and may have the same doping concentration as the second regions 12. However, a lateral extent of the fourth region 2 is much larger than the widths of the second regions 12 in both the inner region 110 and the edge region 120.

[0074] Fig. 12 shows a modification of the edge region 120 according to Fig. 11. In the Fig. In the example illustrated in Figure 12, the edge region 120 further comprises a doped region 54 of the second doping type, which is arranged between the doped region 51 of the first doping type and the edge surface 101 and which is arranged between the first surface 103 and the fourth region 2. According to one example, a doping concentration of the doped region 54 of the second doping type is lower than the doping concentration of the fourth region 2.

[0075] Fig. 13A-13C illustrate an example of a method for forming the first and second regions 11, 12 of the superjunction region 1. Each of the Fig. 13A-13B illustrates a vertical cross-sectional view of a portion of the semiconductor body 100 during the manufacturing process.

[0076] Referring to Fig. 13A, the method is based on providing a semiconductor layer 112 having the second doping type and a doping concentration equal to the desired doping concentration of the second regions 12 of the superjunction region 1. According to one example, the semiconductor layer 112 is an epitaxial layer formed on the semiconductor layer 104 forming the drain region and the optional buffer region of a transistor device previously explained herein.

[0077] With reference to Fig. 13B, the method comprises forming an implantation mask 200 on a surface of the semiconductor layer 112. The implantation mask 200 comprises openings 201 that define the position and size of the first regions 11 of the finished superjunction region 1. Referring to Fig. 13B, the method comprises implanting dopant atoms of the first type into the semiconductor layer 112 via the openings 201 of the implantation mask 200 to form implanted regions 11'. The implanted regions 11' comprise dopant atoms of the second type resulting from the basic doping of the epitaxial layer 112 and dopant atoms of the first type resulting from the implantation process. The implantation process may comprise two or more implantation processes in which dopant atoms of the first type are implanted with different implantation energies to implant dopant atoms of the first type into different depths of the epitaxial layer 112.

[0078] According to one example, the dopant atoms of the first type are P-type dopant atoms. In this example, the implanted dopant atoms are, for example, aluminum (Al) atoms or boron (B) atoms. According to another example, the dopant atoms of the first type are N-type dopant atoms. In this example, the implanted dopant atoms are, for example, phosphorus (P) or nitrogen (N) atoms. As explained above, the semiconductor material of the semiconductor body is, for example, SiC.

[0079] According to one example, the basic doping of the epitaxial layer 112 is created by in-situ doping during the epitaxial growth process in which the epitaxial layer 112 is grown. According to another example, the basic doping of the epitaxial layer 112 is created by a blanket implantation process in which dopant atoms of the second doping type are implanted into the epitaxial layer 112. This implantation process can take place before or after the implantation of the dopant atoms of the first type that form the implanted regions 11'. The same annealing process can be used to activate the implanted dopant atoms of the first and second types.

[0080] With reference to Fig. 13C, the method further comprises removing the implantation mask 200 and an annealing process. During the annealing process, the implanted dopant atoms of the first type are activated and the first regions 11 having the effective doping concentration of the first doping type are formed. A total implantation dose in the process described with reference to Fig. The implantation process explained in FIG. 13B is such that the first regions 11 have the desired effective doping concentration explained above, taking into account the basic doping of the epitaxial layer. Since the first and second regions 11, 12 are formed based on the same epitaxial layer 112, which has a basic doping concentration of the second doping type, the first and second regions 11, 12 have the same net doping concentration of dopant atoms of the second doping type. In the first regions 11, the net doping of the second doping type is overcompensated by the implantation of the dopant atoms of the first type.

[0081] In the Fig. In the process illustrated in Figures 13A-13C, the dopant atoms of the first type are implanted into an epitaxial layer 112 to form the superjunction region 1. However, this is only an example.

[0082] According to another in Fig. In the example illustrated in Figure 14, two or more epitaxial layers 112 of the second doping type are formed one above the other, and dopant atoms of the first doping type are implanted into each of the epitaxial layers 112 using a respective implantation mask 200. Fig. 14 shows two epitaxial layers 112 formed one above the other. However, this is only an example. Any number of two or more epitaxial layers 112 may be formed one above the other. According to one example, the first-type dopant atoms implanted into the individual epitaxial layers 112 are activated by a common annealing process after the first-type dopant atoms have been implanted into the last (topmost) of the two or more epitaxial layers 112.

[0083] In the procedures according to Fig. 13A-13C and Fig. 14, the first regions 11 directly adjoin the second regions 12. As explained above, the superjunction region 1 can be implemented such that a third region 13, which has a lower doping concentration than each of the first and second regions 11, 12, is arranged between each pair comprising a first region 11 and an adjacent second region 12. An example of a method for forming a superjunction region 1 of this type is described in Fig. 15A-15C.

[0084] With reference to Fig. 15A, this method comprises forming a first implantation mask 210 on the epitaxial layer 112 and performing a first implantation process. The first implantation process comprises implanting dopant atoms of the first type into the epitaxial layer 112 via openings 211 in the first implantation mask 210 to form first implanted regions 13'. Regions of the epitaxial layer 112 covered by the implantation mask 210 define the second regions 12 of the superjunction region 1. Thus, a distance between adjacent openings 211 of the first implantation mask 210 defines a width of the second regions 12 in the finished superjunction region 1.

[0085] With reference to Fig. 15B covers the procedure according to Fig. 15A, the first implantation process further comprises forming a second implantation mask 220 on the epitaxial layer 112. The second implantation mask 220 covers those regions of the epitaxial layer 112 that were covered by the first implantation mask 210 in the first implantation process and additionally covers portions of the implanted regions 13' adjacent to the second regions 12. The method further comprises a second implantation process that includes implanting dopant atoms of the first type into the epitaxial layer 112 via the openings 221 of the second implantation mask 220 to form second implanted regions 11'.

[0086] Each of the first and second implantation processes may include two or more implantation processes with different implantation energies.

[0087] With reference to Fig. 15C, the method further comprises an annealing process in which the dopant atoms of the first type implanted in the first implantation process and the second implantation process are activated.

[0088] In the Fig.15A-15C, those portions of the epitaxial layer 112 that are not covered by the first implantation mask 210 but are covered by the second implantation mask 220 form the third regions 13 after the annealing process. A doping concentration of the third regions 13 is defined by the implantation dose in the first implantation process and the basic doping of the epitaxial layer 112. As previously explained, the basic doping of the epitaxial layer 112 can result from the in-situ doping of the epitaxial layer 112 during the epitaxial growth process or from a blanket implantation process. Those regions of the epitaxial layer 112 that are not covered by the first implantation mask 210 and are not covered by the second implantation mask 220 form the first regions 11 after the annealing process.A doping concentration of the first regions 11 is defined by the implantation dose in the first implantation process and the implantation dose in the second implantation process and the basic doping of the epitaxial layer 112.

[0089] According to one example, the second implantation mask 220 is formed based on the first implantation mask 210 by a spacer process in which implantation mask material is formed along sidewalls of the openings 211 in the first implantation mask 210. In this way, the third regions 13 can be created in a self-aligned manner between the first and second regions 11, 12.

[0090] Some aspects of the superjunction device and the method for fabricating the superjunction device are briefly summarized below.

[0091] According to one example, the superjunction device comprises a semiconductor body comprising an inner region and an edge region laterally surrounding the inner region; a superjunction region comprising first regions of an effective first doping type and second regions of an effective second doping type arranged alternately in a first lateral direction of the semiconductor body. The first regions have a first width in the inner region and are spaced apart from each other by a first distance, have a second width in the first edge region portion and are spaced apart from each other by a second distance, and are elongated in the inner region and the edge region in a second lateral direction that differs from the first lateral direction. The width is smaller than the first width and the second distance is smaller than the first distance.According to one example, the first width is selected from a range between 1.2 times and 3 times the second width.

[0092] According to one example, each of the first regions arranged in the inner region transitions in the second lateral direction into two first regions arranged in the edge region. According to one example, the first width is at least approximately twice the second width.

[0093] According to one example, the distance between two adjacent first regions is equal to a width of a respective second region arranged between the two adjacent first regions.

[0094] According to one example, the superjunction region further comprises third regions having a lower effective doping concentration than the first regions and the second regions, each third region being arranged between a respective first region and an adjacent second region. According to one example, the third regions are intrinsic or have a doping concentration that is lower than 10% of a doping concentration of each of the first and second regions.

[0095] According to one example, each of the first regions comprises dopant atoms of the second doping type, and a doping concentration of the dopant atoms of the second doping type in the first regions is at least approximately equal to a doping concentration of dopant atoms of the second doping type in the second regions.

[0096] According to one example, the superjunction device is a transistor device and comprises a plurality of transistor cells arranged in the inner region of the semiconductor body. Each of the transistor cells may comprise a body region of the first doping type; a source region of the second doping type; and a gate electrode dielectrically isolated from the body region by a gate dielectric. The body region of each transistor cell may be adjacent to at least one of the first regions and may be adjacent to at least one of the second regions. The transistor device may further comprise a drain region electrically coupled to the second regions.

[0097] According to one example, the edge region comprises a first edge region portion and a second edge region portion, wherein the second edge region portion laterally surrounds the first edge region portion and the superjunction region. A doping concentration of the fourth region can be at least approximately equal to the doping concentration of the second regions.

[0098] Another example relates to a method for forming a superjunction region of a superjunction device.The superjunction device comprises a semiconductor body comprising an inner region and an edge region laterally surrounding the inner region; a superjunction region comprising first regions of an effective first doping type and second regions of an effective second doping type arranged alternately in a first lateral direction of the semiconductor body, wherein the first regions have a first width in the inner region and are spaced apart from one another by a first distance, have a second width in the first edge region portion and are spaced apart from one another by a second distance, are elongated in the inner region and the edge region in a second lateral direction different from the first lateral direction, and wherein the second width is smaller than the first width and the second distance is smaller than the first distance.Forming the superjunction region comprises implanting dopant atoms of the first doping type into a semiconductor layer having a doping concentration of the second doping type and an annealing process.

[0099] According to one example, the first width is selected from a range between 1.2 times and 3 times the second width.

[0100] According to one example, each of the first regions arranged in the inner region merges in the second lateral direction into two first regions arranged in the edge region.

[0101] According to one example, implanting the dopant atoms of the first doping type comprises a first implantation process in which dopant atoms of the first doping type are implanted into the semiconductor layer using a first implantation mask, and a second implantation process in which dopant atoms of the first doping type are implanted into the semiconductor layer using a second implantation mask.The second implantation mask is aligned with respect to the first implantation mask such that the second regions are covered by both the first implantation mask and the second implantation mask, regions that are not covered by both the first implantation mask and the second implantation mask form the first regions after the annealing process, and regions that are not covered by the first implantation mask and are covered by the second implantation mask form third regions with a lower effective doping concentration than the first regions and the second regions after the annealing process.

Claims

[1] Superjunction device comprising: a semiconductor body (100) comprising an inner region (110) and an edge region (120) laterally surrounding the inner region (110); a superjunction region (1) comprising first regions (11) of an effective first doping type and second regions (12) of an effective second doping type, which are arranged alternately in a first lateral direction (x) of the semiconductor body (100), where the first areas (11), in the inner region (110) have a first width (w1) and are spaced apart from each other at a first distance (d1), have a second width (w2) in the edge region (120) and are spaced apart from each other at a second distance (d2), are elongated in the inner region (110) and the edge region (120) in a second lateral direction (y) which differs from the first lateral direction, wherein the second width (w2) is smaller than the first width (w1) and the second distance (d2) is smaller than the first distance (d1), and wherein each of the first regions (11) comprises dopant atoms of the second doping type, and wherein a doping concentration of the dopant atoms of the second doping type in the first regions (11) is at least approximately equal to a doping concentration of dopant atoms of the second doping type in the second regions (12). [2] The superjunction device of claim 1, wherein the first width (w1) is selected from a range between 1.2 times and 3 times the second width (w2). [3] Superjunction device according to claim 1, wherein each of the first regions (11) arranged in the inner region (110) merges in the second lateral direction (y) into two first regions (11) arranged in the edge region (120). [4] The superjunction device of claim 3, wherein the first width (w1) is at least approximately twice the second width (w2). [5] Superjunction device according to one of claims 1 to 4, wherein the distance between two adjacent first regions (11) is equal to a width of a respective second region (12) arranged between the two adjacent first regions (11). [6] Superjunction device according to one of claims 1 to 5, wherein the superjunction region (1) further comprises: third regions (13) having a lower effective doping concentration than the first regions (11) and the second regions (12), wherein each third region (13) is arranged between a respective first region (11) and an adjacent second region (12). [7] Superjunction device according to claim 6, wherein the third regions (13) are intrinsic, or wherein a doping concentration of the third regions (13) is lower than 10% of a doping concentration of each of the first and second regions (11, 12). [8] The superjunction device of any one of claims 1 to 7, wherein the superjunction device is a transistor device and comprises a plurality of transistor cells (30) arranged in the inner region (110) of the semiconductor body (100). [9] A superjunction device according to claim 7, wherein each transistor cell (30) comprises: a body region (31) of the first doping type; a source region (32) of the second doping type; and a gate electrode (33) which is dielectrically insulated from the body region (31) by a gate dielectric (34). [10] The superjunction device of claim 9, wherein the body region (31) of each transistor cell (30) is adjacent to at least one of the first regions (11) and is adjacent to at least one of the second regions (12). [11] Superjunction device according to one of claims 8 to 10, further comprising: a drain region (41) electrically coupled to the second regions (12). [12] Superjunction device according to one of claims 1 to 11, wherein the edge region (120) comprises a first edge region section (122) and a second edge region section (123), wherein the second edge region section (123) laterally surrounds the first edge region section (122) and the superjunction region (1). [13] The superjunction device of claim 12, wherein a doping concentration of the second edge region portion (122) is at least approximately equal to the doping concentration of the second regions (12). [14] Method comprising: Forming a superjunction region (1) of a superjunction device, wherein the superjunction device comprises: a semiconductor body (100) comprising an inner region (110) and an edge region (120) laterally surrounding the inner region (110); a superjunction region (1) comprising first regions (11) of an effective first doping type and second regions (12) of an effective second doping type, which are arranged alternately in a first lateral direction (x) of the semiconductor body (100), where the first areas (11), in the inner region (110) have a first width (w1) and are spaced apart from each other at a first distance (d1), have a second width (w2) in the edge region (120) and are spaced apart from each other at a second distance (d2), are elongated in the inner region (110) and the edge region (120) in a second lateral direction (y) which differs from the first lateral direction, and wherein the second width (w2) is smaller than the first width (w1) and the second distance (d2) is smaller than the first distance (d1), wherein forming the superjunction region (1) comprises: implanting dopant atoms of the first doping type into a semiconductor layer (112) having a doping concentration of the second doping type; and a tempering process, and wherein a doping concentration of the second regions (12) corresponds to the doping concentration of the second doping type of the semiconductor layer (112) before the implantation of the dopant atoms of the first doping type. [15] The method of claim 14, wherein the first width (w1) is selected from a range between 1.2 times and 3 times the second width (w2). [16] Method according to claim 14, wherein each of the first regions (11) arranged in the inner region (110) merges in the second lateral direction (y) into two first regions (11) arranged in the edge region (120). [17] A method according to any one of claims 14 to 16, wherein implanting the dopant atoms of the first doping type comprises: a first implantation process in which dopant atoms of the first doping type are implanted into the semiconductor layer (112) using a first implantation mask (210); and a second implantation process in which dopant atoms of the first doping type are implanted into the semiconductor layer (112) using a second implantation mask (220), wherein the second implantation mask (220) is aligned with respect to the first implantation mask (210) such that the second regions (12) are covered by both the first implantation mask (210) and the second implantation mask (220), Areas that are not covered by both the first implantation mask (220) and the second implantation mask (220) form the first areas (11) after the annealing process, and Regions which are not covered by the first implantation mask (210) and are covered by the second implantation mask (220) form third regions (13) with a lower effective doping concentration than the first regions (11) and the second regions (12) after the annealing process.

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