METHOD FOR CONDITION MANAGEMENT OF AN ELECTRONIC CONTROL UNIT FOR A VEHICLE AND AN ELECTRONIC CONTROL UNIT

Abstract

The present invention relates to a method for state management of an electronic control unit for a vehicle, wherein the electronic control unit comprises several chips, one of the several chips serving as the master chip and the remaining chips serving as slave chips, wherein the state management method comprises at least the following steps: maintaining the current chip lifecycle state of the master chip and the slave chips; comparing the chip lifecycle state with a reference lifecycle state previously stored in the master chip, wherein the reference lifecycle state corresponds to the lifecycle state of the electronic control unit; and determining the lifecycle state of the electronic control unit based on the comparison result. The present invention further relates to a corresponding electronic control unit.The life cycle state of the electronic control unit can be precisely maintained, allowing the operating behavior of the electronic control unit to be reliably controlled and abnormal states of the electronic control unit to be detected in a timely manner.

Description

FIELD OF THE INVENTION

[0001] The present invention relates to the technical field of vehicle control, in particular, it relates to a method for managing the status of an electronic control unit for a vehicle. The present invention further relates to a corresponding electronic control unit for a vehicle. STATE OF THE ART

[0002] With the advancement of technology and the improvement of living standards, people have been placing ever-increasing demands on vehicle functionality and safety in recent years. Therefore, vehicle electronic control units (ECUs) are increasingly performing more functions, such as body stabilization, lane-keeping assistance, automatic emergency braking, adaptive driving assistance, and more. To meet the high computing demands or redundancy requirements of ECUs, multiple chips responsible for different functions are typically integrated into one ECU.

[0003] However, in current electronic control units, individual chips are provided by different chip manufacturers or chip suppliers, each with its own defined life cycle status. Therefore, the life cycle status of individual chips in the electronic control unit cannot be standardized. In such a case, the life cycle status of the electronic control unit itself cannot be accurately reflected, and an abnormal condition of the electronic control unit itself cannot be detected in a timely manner, thereby reducing the safety of the electronic control unit. DISCLOSURE OF THE INVENTION

[0004] Therefore, the object of the present invention is to propose an improved method for state management of an electronic control unit for a vehicle, wherein by means of the state management method, the life cycle state of the electronic control unit can be precisely detected based on the chip life cycle state, whereby the operating behavior of the electronic control unit can be reliably controlled and abnormal states of the electronic control unit can be detected in a timely manner to improve the safety and stability of the electronic control unit.

[0005] According to a first aspect of the present invention, there is provided a method for state management of an electronic control unit for a vehicle, wherein the electronic control unit comprises a plurality of chips, one chip among the plurality of chips serves as a master chip, and the remaining chips serve as slave chips, the state management method comprising at least the following steps: S1: Obtaining the current chip lifecycle state of the master chip and the slave chips; S2: Comparing the chip life cycle state with a reference life cycle state stored in advance in the master chip, the reference life cycle state corresponding to the electronic control unit life cycle state of the electronic control unit, and determining the electronic control unit life cycle state based on the comparison result.

[0006] Compared with the prior art, the state management method for an electronic control unit according to the present invention compares the acquired chip life cycle state and a prestored reference life cycle state, and based on the comparison result, the life cycle state of the electronic control unit can be determined at the electronic control unit level. In turn, the life cycle state of the electronic control unit can be accurately reflected based on the life cycle state of the individual chips. This enables centralized management of the life cycle state of a multi-chip electronic control unit, and an abnormal state of the electronic control unit can be detected in a timely manner, thereby improving the safety and stability of the electronic control unit.

[0007] According to a second aspect of the present invention, there is provided an electronic control unit for a vehicle, the electronic control unit being constructed to carry out a state management method according to the present invention, the electronic control unit comprising at least one master chip and at least one slave chip, and a communication connection between the master chip and the slave chips. DESCRIPTION OF THE CHARACTERS

[0008] The present invention will now be described in more detail with reference to the accompanying drawings, so that the principles, features, and advantages of the present invention will be more clearly understood. The drawings include the following: Fig. 1 shows a schematic block diagram of an electronic control unit for a vehicle according to an exemplary embodiment of the present invention; Fig.2 shows a schematic flow diagram of a method for state management of an electronic control unit for a vehicle according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0009] In order to better clarify the technical problems to be solved by the present invention, the technical solutions and the advantageous technical effects, the present invention will be explained in more detail below with reference to the figures and exemplary embodiments.

[0010] It should be understood that in this document, the terms "first," "second," etc., are used for descriptive purposes only and should not be understood to indicate or imply a relative importance, nor should they be construed as implicitly indicating the number of technical features specified. Features defined as "first" and "second" may explicitly or implicitly mean that at least one of the features is included.

[0011] Fig.Figure 1 shows a schematic block diagram of an electronic control unit 100 for a vehicle according to an exemplary embodiment of the present invention. The electronic control unit 100 is designed, for example, for an advanced driver assistance system of the vehicle and is responsible for controlling vehicle functions such as automatic emergency braking, lane keeping assistance, automatic parking, blind spot monitoring, and adaptive driving assistance.

[0012] As in Fig.1, the electronic control unit 100 comprises a plurality of chips. The chips are integrated and enclosed in the electronic control unit 100 and, when the electronic control unit 100 is in operation, implement different calculation or control functions. One of these chips serves as the master chip 10 and the remaining chips serve as slave chips 20. For example, the electronic control unit 100 comprises three slave chips 20, namely a first slave chip 201, a second slave chip 202, and a third slave chip 203. Of course, any other number of slave chips 20 deemed appropriate by those skilled in the art is also conceivable. In this case, there is a communication connection between the master chip 10 and each of the individual slave chips 20 in order to record the chip life cycle status of the slave chips 20.

[0013] For example, the master chip 10 and / or the slave chips 20 of the electronic control unit 100 may be constructed as a microcontroller (MCU) or system-on-chip (SoC). Chips constructed as microcontrollers may provide less internal memory and processing capabilities and are suitable for small, low-complexity control applications, while chips constructed as system-on-chips may be suitable for applications with many requirements and high complexity, allowing the electronic control unit 100 to comprehensively and specifically meet various functional requirements of the vehicle. It is also possible for the chips of the electronic control unit 100 to be constructed in another manner deemed appropriate by those skilled in the art, for example, as microprocessor units or digital signal processors.

[0014] In particular, based on factors such as the type, function, or manufacturing costs of the chips, the individual chips in the same electronic control unit 100 may be provided by different chip manufacturers or chip suppliers. In such a case, the master chip 10 and the slave chips 20 of the electronic control unit 100 have different life cycle states within their respective overall life cycles, which are defined by the respective chip manufacturers, and the usage rights of the chips vary accordingly in the respective life cycle states. For example, the chip life cycle state of the master chip 20 may include a chip manufacturing state A.1, a chip usage state A.2, and a chip repair state A.3; the chip life cycle state of the first slave chip 201 may include a production state B.1 and a non-production state B.2; the chip lifecycle state of the second slave chip 202 may include an adaptation state C.1, a development state C.2, an on-site state C.3, and an analysis state C.4; the chip lifecycle state of the third slave chip 203 may include a chip manufacturer state D.1, an equipment manufacturer state D.2, a user usage state D.3, a return to equipment manufacturer state D.4, and a return to chip manufacturer state D.5. Of course, any other chip lifecycle state deemed appropriate by those skilled in the art is also conceivable. Here, the chip lifecycle state of the individual chips of the electronic control unit 100 is shown as an example in Table 1: Table 1: Chip life cycle status in the overall life cycles of the individual chips of the electronic control unit 100 Master Chip 10 Chip manufacturing state A.1 Chip usage status A.2 Chip repair status A.3 First slave chip 201 Production status B.1 Non-production state B.2 Second slave chip 202 Adaptation state C.1 Developmental stage C.2 On-site condition C.3 Analysis state C.4 Third slave chip 203 Chip manufacturer state D.1 Plant manufacturer condition D.2 User usage state D.3 Return status to the system manufacturer D.4 Return status to chip manufacturer D.5

[0015] Here, the chip lifecycle states of each chip of the electronic control unit 100 are not uniform. During operation of the electronic control unit 100, different chips have different chip lifecycle states, which makes it difficult to determine the lifecycle state of the electronic control unit 100 itself.

[0016] Fig. 2 shows a schematic flow diagram of a method for state management of an electronic control unit 100 for a vehicle according to an exemplary embodiment of the present invention, wherein the method for state management is executed by the electronic control unit 100 according to the present invention.

[0017] As in Fig. 2, the state management method according to the present invention comprises at least the following steps: S1: Obtaining the current chip life cycle state of the master chip 10 and the slave chips 20 by means of the master chip 10; S2: comparing the chip life cycle state of each chip with a reference life cycle state stored in advance in the master chip 10, the reference life cycle state corresponding to the electronic control unit life cycle state of the electronic control unit 100, and determining the electronic control unit life cycle state based on the comparison result.

[0018] This allows the chip life cycle status of each chip of the electronic control unit 100 to be comprehensively analyzed, and the electronic control unit life cycle status of the electronic control unit 100 itself can be reliably determined based on the chip life cycle status, thereby comprehensively monitoring and managing the life cycle status of the electronic control unit 100 and the integrated chips.

[0019] As an example, the electronic control unit lifecycle state of the electronic control unit 100 includes a manufacturing state S.1, a usage state S.2, a diagnostic state S.3, and an abnormal state S.4. Of course, any other lifecycle state deemed appropriate by those skilled in the art is also conceivable. Within the context of the present invention, the "reference lifecycle state" of each chip is understood to be the target chip lifecycle state that the corresponding chip must possess at a specific lifecycle state of the electronic control unit. The corresponding relationships between the reference lifecycle state and the target chip lifecycle state of the individual chips are shown as an example in Table 2: Table 2: Electronic control unit life cycle state and reference chip life cycle state of the electronic control unit 100 Electronic control unit 100 Manufacturing condition p.1 Usage status p.2 Diagnostic status p.3 abnormal condition p.4 Master Chip 10 Chip manufacturing state A.1 Chip usage status A.2 Chip rework state A.3 Chip lifecycle state and reference lifecycle state do not match First slave chip 201 Production status B.1 Non-production state B.2 Second slave chip 202 Adaptation state C.1 Developmental stage C.2 On-site condition C.3 Analysis state C.4 Third slave chip 203 Chip manufacturer state D.1 Plant manufacturer status D.2 User usage state D.3 Return status to the system manufacturer D.4 Return status to chip manufacturer D.5

[0020] Here, by comparing and matching the acquired chip life cycle state of each chip and the reference chip life cycle state, the electronic control unit life cycle state of the electronic control unit 100 can be determined. For example, the obtained chip life cycle state of each chip is as follows: the master chip 10 is in the chip usage state A.2, the first slave chip 201 is in the non-production state B.2, the second slave chip 202 is in the in-field state C.3, and the third slave chip 203 is in the user usage state D.3. In this case, it can be determined that the electronic control unit life cycle state of the electronic control unit 100 is the usage state S.2. Determining the manufacturing state S.1 and the diagnostic state S.3 of the electronic control unit 100 can be performed in a similar manner.Here, the corresponding relationships between the electronic control unit lifecycle state and the reference chip lifecycle state are specified by developers of the electronic control unit 100 and stored by coding and inclusion in the master chip 10. Of course, any other corresponding relationships between the electronic control unit lifecycle state and the reference chip lifecycle state that are deemed appropriate by those skilled in the art are also conceivable.

[0021] Furthermore, if the obtained chip life cycle state of each chip does not match each reference life cycle state previously stored in the master chip 10, it is determined that the electronic control unit 100 is in the abnormal state S.4. For example, the obtained chip life cycle state of each chip is as follows: the master chip 10 is in the chip usage state A.2, the first slave chip 201 is in the production state B.1, the second slave chip 202 is in the analysis state C.4, and the third slave chip 203 is in the user usage state D.3. None of these chip life cycle states match a reference chip life cycle state under the proper life cycle state of the electronic control unit, whereby it can be judged that the electronic control unit 100 is in the abnormal state and poses a safety risk.

[0022] For example, in step S1, the master chip 10 may directly read the current chip life cycle state of the master chip 10 and send an instruction to obtain the chip life cycle state of the slave chips 20 to the corresponding slave chips 20, and the slave chips, after receiving the instruction, read their own chip life cycle state and synchronize the chip life cycle state with the master chip 10.

[0023] As in Fig.1, the master chip 10 includes, for example, a manager 11 and a memory 12. The manager 11 can read the chip lifecycle state of the master chip 10, send an instruction for obtaining the chip lifecycle state of the slave chips 20 to the corresponding slave chips 20, and receive chip lifecycle state signals from the slave chips 20. The memory 12 is configured to store the reference lifecycle state of each chip in specific electronic control unit lifecycle states and transmit the reference lifecycle state to the manager 11. Here, the manager 11 can compare the chip lifecycle state of each chip with the reference lifecycle state, thereby determining the electronic control unit lifecycle state of the electronic control unit 100.

[0024] As in Fig.1, each slave chip 20 of the electronic control unit 100 is equipped with an interface 21, for example, and the interfaces are each electrically connected to the manager 11 of the master chip 10, so that an optimized communication connection between the master chip 10 and the slave chips 20 is realized.

[0025] As an example, in step S1, the manager 11 transmits the obtained chip life cycle state of the master chip 10 and the slave chips 20 to the memory 12 so that the chip life cycle state is recorded.

[0026] As in Fig.2, for example, the state management method according to the present invention additionally comprises a step S3: When the manager 11 determines that the electronic control unit 100 is in an abnormal state, the abnormal state is recorded and / or reported by means of the master chip 10 to initiate further steps for eliminating the abnormal state.

[0027] For example, if the electronic control unit 100 is in an abnormal state, the electronic control unit 100 stops operation. This can prevent erroneous release of the usage rights of each chip of the electronic control unit 100 and enhance the safety of the electronic control unit 100. Furthermore, it can be considered that when the electronic control unit 100 is started, it is first checked whether an unrecoverable abnormal state exists in the electronic control unit 100 or has been recorded in the memory 12. If it exists, the startup of the electronic control unit 100 is stopped and the user is notified of the existence of the abnormal state.

[0028] As in Fig.2, the state management method according to the present invention additionally comprises a step S4: The electronic control unit 100, after passing an authentication, for example, a secret key authentication, enters a diagnostic mode. In the diagnostic mode, the master chip 10 first transmits the chip life cycle state of each chip recorded in the memory 12 and the abnormal state of the electronic control unit 100 to a detector for the electronic control unit 100. The detector generates a conversion instruction for the chip life cycle state of the corresponding chip based on the chip life cycle state and / or the abnormal state of the electronic control unit 100 and sends the conversion instruction to the master chip 10. The master chip 10 then sends a conversion instruction for the chip life cycle state of the slave chips 20 to the corresponding slave chips 20.and the slave chips reset the chip lifecycle state after receiving the conversion instruction. After the chip lifecycle state of the slave chips 20 is successfully converted, the slave chips 20 resynchronize the updated chip lifecycle state with the master chip 10, and the master chip sends the diagnostic result to the detector. This realizes the adjustment of the chip lifecycle state of each chip of the electronic control unit 100 to ensure the safety performance of the electronic control unit 100.

[0029] The embodiments described above were explained merely as examples to describe the present invention. It is understood that individual features of the embodiments can be freely combined with one another, as far as technically feasible, without deviating from the scope of the invention.

[0030] Other advantages and alternative embodiments of the invention will be apparent to those skilled in the art. Therefore, the present invention, in a broader sense, is by no means limited to the details, representative structures, and examples shown and described. Rather, those skilled in the art may make various changes and substitutions without departing from the spirit and scope of the present invention.

Claims

[1] A method for state management of an electronic control unit (100) for a vehicle, wherein the electronic control unit comprises a plurality of chips, one chip among the plurality of chips serves as a master chip (10) and the remaining chips serve as slave chips (20), characterized by that the condition management procedure includes at least the following steps: S1: Obtaining the current chip life cycle state of the master chip (10) and the slave chips (20); S2: comparing the chip life cycle state with a reference life cycle state stored in advance in the master chip (10), wherein the reference life cycle state corresponds to the electronic control unit life cycle state of the electronic control unit, and determining the electronic control unit life cycle state based on the comparison result. [2] A method for state management according to claim 1, characterized byin step S1, the master chip (10) sends an instruction to detect the chip lifecycle state to the slave chips (20), the slave chips (20) read out their own chip lifecycle state and synchronize the chip lifecycle state with the master chip (10); and / or in step S1, the obtained chip lifecycle state of the master chip (10) and the slave chips (20) is recorded. [3] A method for state management according to claim 1 or 2, characterized by that the life cycle state of the electronic control unit includes a manufacturing state, a usage state, a diagnostic state and an abnormal state. [4] A method for state management according to claim 3, characterized by that if the chip life cycle state does not match the single reference life cycle state stored in advance in the master chip (10), it is judged that the electronic control unit is in an abnormal state. [5] A method for state management according to claim 4, characterized by that the method for state management additionally comprises a step S3: if the electronic control unit (100) is in an abnormal state, the abnormal state is recorded and / or reported by means of the master chip (10); and / or if the electronic control unit (100) is in the abnormal state, the operation of the electronic control unit (100) is stopped; and / or when the electronic control unit (100) is started, it is first checked whether there is an abnormal state of the electronic control unit (100) that has not been corrected, and if there is an abnormal state, the starting of the electronic control unit (100) is stopped. [6] A method for state management according to any one of claims 3 to 5, characterized bythat the method for state management additionally comprises a step S4: the electronic control unit (100) goes into a diagnostic mode after an authentication has been passed, in the diagnostic mode the master chip (10) sends a conversion instruction for the chip life cycle state of the slave chips (20) to the corresponding slave chips (20), and the slave chips reset the chip life cycle state after receiving the conversion instruction. [7] A method for state management according to claim 6, characterized by in step S4, the master chip transmits the recorded chip life cycle state and / or abnormal state to a detector for the electronic control unit (100) and receives a chip life cycle state conversion instruction from the detector. [8] Electronic control unit (100) for a vehicle, characterized bythat the electronic control unit (100) is designed to carry out a state management method according to one of claims 1 to 7, wherein the electronic control unit (100) comprises at least one master chip (10) and at least one slave chip (20) and a communication connection exists between the master chip (10) and the slave chips (20). [9] Electronic control unit (100) according to claim 8, characterized byin that the master chip (10) has a manager (11) and a memory (12), wherein the manager (11) is configured to compare at least the chip lifecycle state and the reference lifecycle state, to determine the lifecycle state of the electronic control unit and to be able to send a conversion instruction for the chip lifecycle state of the slave chips (20) to the corresponding slave chips (20), and the memory (12) is configured to be able to store the chip lifecycle state of the master chip (10) and the slave chips (20), the reference lifecycle state and the electronic control unit lifecycle state of the electronic control unit (100). [10] Electronic control unit (100) according to claim 8 or 9, characterized bythat the electronic control unit (100) has a plurality of slave chips (20); and / or the slave chips (20) have interfaces (21), the interfaces are electrically connected to the manager (11) of the master chip (10); and / or the master chip (10) and / or the slave chips (20) are constructed as a microcontroller or system-on-chip.

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