HIGH-FREQUENCY SYSTEM AND CASCADE HIGH-FREQUENCY SYSTEM

Abstract

A high-frequency semiconductor device comprising a high-frequency semiconductor chip, including a high-frequency connector for transmitting or receiving high-frequency signals, and a chip package covering at least a portion of the high-frequency semiconductor chip. The chip package includes a high-frequency connector area for transmitting or receiving high-frequency signals located outside the high-frequency semiconductor device. The chip package includes a coplanar delay waveguide coupled between the high-frequency connector and the high-frequency connector area.

Description

TECHNICAL AREA

[0001] The present disclosure relates to high-frequency semiconductor devices and cascaded high-frequency systems. BACKGROUND

[0002] In many high-frequency applications, cascaded systems are used to increase the number of high-frequency channels. In cascaded systems, multiple high-frequency semiconductor devices (HF semiconductor devices) are mounted on a printed circuit board (PCB). Distributing a local oscillator signal from one HF semiconductor device to one or more other HF semiconductor devices mounted on the same PCB is typically used to achieve synchronous transmission and / or reception among the cascaded HF semiconductor devices. To transmit the local oscillator signal from one HF semiconductor device to another, HF connection pads (e.g., solder pads) are provided in the chip package (sometimes called a chip package or semiconductor package) of the HF semiconductor devices.The RF pads are mechanically and electrically connected to conductive transmission lines on the printed circuit board (PCB), for example, via solder balls or metal pillars. This transmits the local oscillator signals between the RF pad of a given RF semiconductor device and the PCB. This requires good RF impedance matching at the interface between the chip package and the PCB to maximize power transfer and minimize reflections.

[0003] Traditionally, no solution was available to achieve good RF impedance matching without affecting the size of the chip package or implementing additional matching networks on the PCB. SUMMARY

[0004] According to a first aspect, a high-frequency semiconductor device comprises a high-frequency semiconductor chip, which includes a high-frequency connector for transmitting or receiving high-frequency signals, and a chip package that covers at least part of the high-frequency semiconductor chip. The chip package includes a high-frequency connector area for transmitting or receiving high-frequency signals outside the high-frequency semiconductor device. The chip package includes a coplanar delay waveguide that is coupled between the high-frequency connector and the high-frequency connector area.

[0005] According to a second aspect, a cascaded high-frequency system comprises a printed circuit board that has a transmission line for transmitting high-frequency signals, a first high-frequency semiconductor device mounted on a circuit board, and A second high-frequency semiconductor device mounted on the printed circuit board. The first high-frequency semiconductor device and / or the second high-frequency semiconductor device is a high-frequency semiconductor device comprising a high-frequency semiconductor chip including a high-frequency connector for transmitting or receiving high-frequency signals, and a chip package covering at least a portion of the high-frequency semiconductor chip. The chip package includes a high-frequency connection area for transmitting or receiving high-frequency signals outside the high-frequency semiconductor device. The chip package includes a coplanar delay waveguide coupled between the high-frequency connector and the high-frequency connection area.

[0006] The expert will recognize additional features and advantages upon reading the following detailed description and upon examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example and without limitation in the figures of the accompanying drawings, in which the same reference symbols refer to similar or identical elements. The elements of the drawings are not necessarily to scale relative to one another. The features of the various examples shown may be combined, provided they are not mutually exclusive. Fig. Figure 1 shows a schematic view of a high-frequency semiconductor device according to an example. Fig. Figure 2A shows a partial 3D view of a high-frequency system according to an example. Fig. Figure 2B shows a top view of a metal plane in a chip package according to an example. Fig. Figure 2C shows a top view of a coplanar delay waveguide formed in a metal plane. Fig. Figure 3 shows a top view of a metal plane that includes a coplanar delay waveguide to represent an electrical length. Fig. Figure 4 shows a top view of a coplanar delay waveguide to illustrate sizes. DETAILED DESCRIPTION

[0008] The examples described herein provide a novel concept for transmitting RF signals outside a high-frequency semiconductor device (RF semiconductor device), for example, between the RF semiconductor device and a printed circuit board (PCB). The concept is based on the use of a coplanar delay waveguide within a chip package of the RF semiconductor device. Compared to standard transmission lines, the use of a coplanar delay waveguide allows for a reduction in the signal path between an RF terminal of an RF semiconductor chip within the RF semiconductor device and an RF terminal provided within the chip package for transmitting the RF signals outside the RF semiconductor device, compared to the use of a standard coplanar waveguide for the same electrical length.This enables RF impedance matching without the need for long signal paths within the RF semiconductor device and without implementing additional matching networks on the PCB. Avoiding long signal paths on the RF semiconductor devices minimizes the device's footprint, resulting in manufacturing cost savings. Furthermore, eliminating additional matching networks on the PCB reduces PCB space, simplifies the RF signal routing layout, and lowers overall manufacturing costs and RF signal distribution. Additionally, the overall RF system performance is less sensitive to manufacturing tolerances that may occur during PCB fabrication.Reference is made to a high-frequency semiconductor device (HF semiconductor device), for example between the HF semiconductor device and a printed circuit board (PCB).

[0009] With reference to Fig. Figure 1 shows a first schematic example of an RF semiconductor device 100. The RF device 100 comprises an RF semiconductor chip 10 and a chip package 14 that covers at least part of the RF semiconductor chip 10. The RF semiconductor chip 10 can include RF frequency circuitry, such as an RF transmitter, an RF receiver, analog processing circuitry, or digital processing circuitry. In one example, the RF semiconductor chip 10 is a radar semiconductor chip capable of transmitting and / or receiving radar signals in the radar frequency bands. In another example, the RF semiconductor chip 10 is a frequency-modulated continuous-wave radar semiconductor chip (FMCW radar semiconductor chip) capable of transmitting or receiving FMCW radar signals. In one example, the RF semiconductor chip 10 is a monolithic integrated microwave circuit (MMIC). The chip package 14 can cover a major surface of the RF semiconductor chip 10, as shown in Fig. Figure 1 shows. In other examples, the chip package 14 can cover a side surface of the RF semiconductor chip 10 in addition to the main surface, for example, by means of a form material covering the side surface. In one example, the chip package 14 is a wafer-level package. In another example, the chip package 14 includes a redistribution layer with a stack of layers comprising a metal layer and a dielectric material for insulating the metal layer. In yet another example, the chip package 14 includes form material covering the side surface and a redistribution layer covering the main surface. In yet another example, the chip package 14 is an embedded wafer-level ball grid array (eWLB) package.

[0010] The chip package 14 includes a coplanar delay waveguide 16 coupled between an RF terminal 12 of the RF semiconductor chip 10 and an RF connection pad 18 of the chip package 14. In other words, a first end of the coplanar delay waveguide 16 is coupled to the RF terminal 12, for example, by a standard coplanar waveguide or other RF transmission structures arranged in the chip package 14, and a second end of the coplanar delay waveguide 16 is coupled to the RF connection pad 18. The coplanar delay waveguide 16 is a structure formed by a conductor separated from a pair of ground planes, with the conductor lying on the same plane as the ground planes. In contrast to a standard coplanar waveguide, the coplanar delay waveguide 16 reduces the phase velocity of the propagating RF signals by a predetermined factor.In some examples, the phase velocity is reduced by a factor of at least 0.38. In some examples, the coplanar delay waveguide 16 is implemented in a metal layer of the chip package 14. In one example, the coplanar delay waveguide 16 is formed by a metal layer of a redistribution layer of the chip package 14. In some examples, the RF terminal 12 is coupled to a local oscillator (LO) integrated into the RF semiconductor chip 10 to transmit a local oscillator signal via the RF terminal 12 and the coplanar delay waveguide 16 to the RF terminal area 18. In such examples, the RF terminal 12 is an LO output terminal and the RF terminal area 18 is an LO output terminal.The RF terminal 12, the coplanar delay waveguide 16 and the RF terminal surface 18 can form an LO output channel for sending a local oscillator signal to another RF semiconductor device.

[0011] In some examples, the RF terminal 12 is coupled to at least one transmitter or receiver integrated into the RF semiconductor chip 10 to transmit a local oscillator signal received at the RF terminal 18, via the coplanar delay waveguide 16 and the RF terminal 12, to the at least one transmitter or receiver. In such examples, the RF terminal 12 is an LO input terminal and the RF terminal 18 is an LO input terminal. The RF terminal 12, the coplanar delay waveguide 16, and the RF terminal 18 accordingly form an LO input channel for receiving a local oscillator signal from another RF semiconductor device.

[0012] In some examples, the RF connection pad 18 is configured as a solder pad for mechanical and electrical connection of the RF connection pad 18 to a PCB via a solder ball 20. In other examples, other connection methods, such as copper pillars, can be used for mechanical and electrical connection of the RF connection pad 18 to a PCB.

[0013] In one example, the local oscillator signal is at a frequency lower than the actual operating frequency of the RF semiconductor device by a predefined fixed factor. For instance, the RF semiconductor device might operate in a frequency range between 76 and 81 GHz, while the LO signal is generated within a frequency range between 25.3 and 27 GHz. In some examples, a boost converter circuit is used to convert the LO signal into RF signals within the operating frequency range.

[0014] With reference to Fig. Figure 2A shows a partially three-dimensional open view of an RF system 200 according to an example. Fig. Figure 2A shows a section of the RF system 200, comprising section 100A of the RF device 100 and section 102A of a PCB 102. The RF system 200 shows the RF device 100, which is attached to the PCB 102 by a plurality of solder balls 20. The RF semiconductor chip 10 is encapsulated by the chip package 14, which includes a redistribution layer with a metal layer 22. The metal layer extends beneath the RF semiconductor chip and into a fan-out area 14A of the chip package 14.

[0015] The PCB 102 comprises a PCB transmission line 24, which is formed by a metal layer of the PCB 102. The PCB 102 further comprises a ground metal layer 26, which is connected via solder balls 20 to a ground section 28 of the metal layer 22. The PCB transmission line 24 is connected to the RF connection pad 18 via one of the solder balls 20.

[0016] Fig. Figure 2B shows a top view of a section of the metal layer 22, which is located in the redistribution layer of the chip package 14. The coplanar delay waveguide 16 is formed in the metal layer 22. The coplanar delay waveguide 16 is connected to the RF terminal 18 via a first coplanar waveguide section 30A. The first coplanar waveguide section 30A is formed in a meandering shape to allow it to fit within the available space. The coplanar delay waveguide 16 is connected to an RF terminal connection pad 32 via a second coplanar waveguide section 30B. The RF terminal connection pad 32 is configured to provide a connection to the RF terminal 12 of the RF semiconductor chip 10, for example, via a metallic via.

[0017] Fig. Figure 2B further shows a standard coplanar waveguide 34 connecting another RF terminal 36 to another RF terminal connection terminal 32. A standard coplanar waveguide 34 has a conductor separated by a pair of ground planes, with the conductor lying in the same plane as the ground planes. In standard coplanar waveguides, the conductor has a uniform width in the direction perpendicular to the direction of signal propagation, whereas in the coplanar delay waveguide 16, the width of the conductor varies in the direction perpendicular to the direction of signal propagation. Reference points RP1 and RP2 are shown for the standard coplanar waveguide 34, and reference points RP3 and RP4 are shown for the RF path comprising the coplanar delay waveguide 16 and the first and second coplanar waveguide sections 30A and 30B.It should be noted that the coplanar delay waveguide 16 and the first and second coplanar waveguide sections 30A and 30B are designed to have the same impedance value at reference point RP3 as the standard coplanar waveguide 34 at reference point RP1. Furthermore, the impedance values ​​at reference points RP2 and RP4 are the same. The combination of the coplanar delay waveguide 16 and the first and second coplanar waveguide sections 30A and 30B constitutes a multi-stage matching transformation that allows for a more flexible reduction of the transmit path without violating existing design rules.In other words, combining the first and second coplanar waveguide sections 30A and 30B with the coplanar delay waveguide 16 in the design of the RF semiconductor device 100 allows the coplanar delay waveguide 16 to be placed at a location where sufficient area is available to accommodate the coplanar delay waveguide 16 with an increased width (dimension perpendicular to the direction of propagation). As shown in . Fig. As shown in Figure 3, the first coplanar waveguide section 30A represents a first electrical length EL1, the coplanar delay waveguide 16 represents a second electrical length EL2, and the second coplanar waveguide section 30B represents a third electrical length EL3, which adds up to the total electrical length between the reference points RP3 and RP4.

[0018] The electrical length EL, expressed as a phase angle, is given by I e= 360°·I / λ defined, where I is the physical length and λ is the wavelength of the wave propagation.

[0019] Fig. Figure 2C shows the coplanar delay waveguide 16 in more detail. The coplanar delay waveguide 16 uses a comb-shaped conductor with a centerline 16A in the propagation direction 16C and a plurality of conductor fingers 16B connected to the centerline 16A and extending perpendicular to the propagation direction 16C. The conductor of the coplanar delay waveguide 16 therefore exhibits a variation in width perpendicular to the propagation direction 16C due to the conductor fingers 16B. Near the comb-shaped conductor, the ground metal plane 28 has a plurality of ground fingers 28A. The ground fingers 28A and the conductor fingers 16B are arranged to interlock. In other examples, the coplanar delay waveguide 16 can have other shapes, such as tapered or arbitrarily shaped.

[0020] Fig.Figure 4 shows the size effect achieved by using the coplanar delay waveguide 16. In this example, the coplanar delay waveguide 16 allows a size reduction in the propagation direction (x-direction) by a factor of 0.38 compared to the standard coplanar waveguide. A trade-off of the concept is that the dimension increases in the direction perpendicular to the propagation direction (y-direction). However, it should be noted that standard coplanar waveguides also have limits to the extent to which they can be meandering, since bending coplanar waveguides beyond a certain extent, which depends on the width of the standard coplanar waveguide, is not possible.Therefore, although the dimensions increase in the direction perpendicular to the propagation direction, the use of a coplanar delay waveguide can be advantageous over standard coplanar waveguides, or even the only option due to space constraints. Furthermore, combining the coplanar delay waveguide 16 with the first and second coplanar waveguide sections 30A and 30B provides design flexibility, allowing the bulky coplanar delay waveguide 16 to be placed in a location with sufficient area, while the thinner first and second coplanar waveguide sections 30A and 30B allow the connection to the bulky coplanar delay waveguide 16 to be made in the available area.

[0021] In addition to the examples described above, the following examples are revealed.

[0022] Example 1 is a high-frequency semiconductor device that has: a high-frequency semiconductor chip that has a high-frequency connector for sending or receiving high-frequency signals, a chip package covering at least part of the high-frequency semiconductor chip, wherein the chip package includes a high-frequency connection area for transmitting or receiving high-frequency signals outside the high-frequency semiconductor device, and wherein the chip package has a coplanar delay waveguide coupled between the high-frequency connection and the high-frequency connection area.

[0023] Example 2 is the high-frequency semiconductor device according to Example 1, wherein the chip package has a redistribution layer, wherein the redistribution layer has a metal layer, and wherein the coplanar delay waveguide is formed in the metal layer.

[0024] Example 3 is the high-frequency semiconductor device according to Example 2, wherein the chip package is a wafer-level chip package and wherein the redistribution layer has a stack of layers, the metal layer being contained in the stack of layers.

[0025] Example 4 is the high-frequency semiconductor device according to Example 3, wherein the chip package is an embedded wafer-level ball grid array package.

[0026] Example 5 is the high-frequency semiconductor device according to one of Examples 1 to 4, wherein the high-frequency contact surface has a soldering contact surface for soldering the high-frequency semiconductor device onto a printed circuit board.

[0027] Example 6 is the high-frequency semiconductor device according to Example 5, wherein the high-frequency connection area is configured to transmit an LO signal between the high-frequency semiconductor device and another high-frequency semiconductor device mounted on the circuit board in order to synchronize the high-frequency semiconductor device and the other high-frequency semiconductor device.

[0028] Example 7 is the high-frequency semiconductor device according to any one of Examples 1 to 6, which further comprises a first coplanar waveguide coupled between the high-frequency terminal and the coplanar delay waveguide, and a second coplanar waveguide coupled between the coplanar delay waveguide and the high-frequency terminal surface.

[0029] Example 8 is the high-frequency semiconductor device according to any one of Examples 1 to 7, wherein the coplanar delay waveguide has an electrical length and wherein a physical length of the coplanar delay waveguide in a transmission direction is less than a physical length of a linear coplanar waveguide having the same electrical length as the delay waveguide.

[0030] Example 9 is the high-frequency semiconductor device according to any one of Examples 1 to 8, wherein the coplanar delay waveguide has a comb shape.

[0031] Example 10 is a cascaded high-frequency system that features: a printed circuit board that has a transmission line for transmitting high-frequency signals, a first high-frequency semiconductor device mounted on a circuit board, and a second high-frequency semiconductor device mounted on the circuit board, wherein the first high-frequency semiconductor device and / or the second high-frequency semiconductor device is a high-frequency semiconductor device according to one of Examples 1 to 9.

[0032] Although specific examples have been illustrated and described here, the person skilled in the art will recognize that a multitude of alternative and / or equivalent implementations can replace the specific examples shown and described without altering the scope of protection of the present invention. This application is intended to cover any adaptations or variations of the specific examples discussed herein. Therefore, it is intended that this invention is limited only by the claims and their equivalents.

[0033] It should be noted that the devices, including their preferred embodiments, as set forth in this document, can be used alone or in combination with the other devices disclosed herein. Furthermore, the features set forth in connection with a device are also applicable to a corresponding method and vice versa. Moreover, all aspects of the devices set forth in this document can be combined in any way. In particular, the features of the claims can be combined with one another in any manner.

[0034] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. A person skilled in the art will be able to implement various arrangements which, although not explicitly described or shown here, embody the principles of the invention and are included in its meaning and scope of protection. Furthermore, all examples and embodiments set forth in this document are expressly intended primarily for illustrative purposes only, to assist the reader in understanding the principles of the proposed methods and systems. Moreover, all statements herein that provide principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to include equivalents thereof.

Claims

[1] High-frequency semiconductor device (100) comprising: a high-frequency semiconductor chip (10) having a high-frequency connector (12) for transmitting or receiving high-frequency signals, a chip package covering at least part of the high-frequency semiconductor chip, wherein the chip package (14) comprises a high-frequency connection area (18) for transmitting or receiving high-frequency signals outside the high-frequency semiconductor device (100), and wherein the chip package (14) has a coplanar delay waveguide (16) coupled between the high-frequency connector (12) and the high-frequency connection area (18). [2] High-frequency semiconductor device (100) according to claim 1, wherein the chip housing (14) has a redistribution layer, wherein the redistribution layer has a metal layer (22) and wherein the coplanar delay waveguide (16) is formed in the metal layer (22). [3] High-frequency semiconductor device (100) according to claim 2, wherein the chip package (14) is a wafer-level chip package and wherein the redistribution layer comprises a stack of layers, wherein the metal layer (22) is contained in the stack of layers. [4] High-frequency semiconductor device (100) according to claim 3, wherein the chip package (14) is an embedded wafer-level ball grid array package. [5] High-frequency semiconductor device (100) according to any one of claims 1 to 4, wherein the high-frequency connection surface (18) is configured for soldering the high-frequency semiconductor device (100) onto a printed circuit board (102). [6] High-frequency semiconductor device (100) according to claim 5, wherein the high-frequency connection surface (18) is configured to transmit a local oscillator signal between the high-frequency semiconductor device (100) and another high-frequency semiconductor device (100) mounted on the circuit board in order to synchronize the high-frequency semiconductor device (100) and another high-frequency semiconductor device (100). [7] High-frequency semiconductor device (100) according to any one of claims 1 to 6, which further comprises a first coplanar waveguide (30B) coupled between the high-frequency terminal (12) and the coplanar delay waveguide (16), and a second coplanar waveguide (30A) coupled between the coplanar delay waveguide (16) and the high-frequency terminal (18). [8] High-frequency semiconductor device (100) according to any one of claims 1 to 7, wherein the coplanar delay waveguide (16) has an electrical length and wherein a physical length of the coplanar delay waveguide (16) in a transmission direction is less than a physical length of a standard coplanar waveguide with the same electrical length as the coplanar delay waveguide (16). [9] High-frequency semiconductor device (100) according to any one of claims 1 to 8, wherein the coplanar delay waveguide (16) has a comb shape. [10] Cascaded high-frequency system which features: a printed circuit board (102) comprising a transmission line (24) for transmitting high-frequency signals, a first high-frequency semiconductor device (100) mounted on the printed circuit board (102), and a second high-frequency semiconductor device (100) mounted on the printed circuit board (102), wherein the first high-frequency semiconductor device (100) and / or the second high-frequency semiconductor device (100) is a high-frequency semiconductor device (100) according to any one of claims 1 to 9.

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