Insulation structure in a semiconductor device and manufacturing method therefor

DE102025101285A1Pending Publication Date: 2025-12-18TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
DE102025101285
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-11-08
Filing Date
2025-01-15
Publication Date
2025-12-18

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Abstract

One method of the present disclosure comprises: forming a stack having channel layers nested with sacrificial layers, structuring the stack to form a fin-shaped structure, forming a dummy-gate stack over a first region of the fin-shaped structure, selectively removing the sacrificial layers to expose the channel layers as channel elements, depositing dielectric dummy layers in spaces between the channel elements, forming a hard mask layer over the dummy-gate stack, structuring the hard mask layer to form an opening directly above the first region of the fin-shaped structure, performing an etching process through the opening to simultaneously remove the channel elements and the dielectric dummy layers in the fin-shaped structure, such that a second trench is formed through the dummy-gate stack, and depositing an insulating structure in the second trench.The insulation structure divides the dummy gate stack into two segments.
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