OSCILLATOR CIRCUIT FOR ISOLATED SYSTEMS

Abstract

An exemplary apparatus includes: a first oscillator circuit with a first terminal, a second terminal, and including a first transistor with a first threshold voltage; a second oscillator circuit with a first terminal, a second terminal, and including a second transistor with a second threshold voltage, wherein the second threshold voltage is lower than the first threshold voltage; a first resistor with a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the first oscillator circuit and the first terminal of the second oscillator circuit; a second resistor with a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the second terminal of the first oscillator circuit and the second terminal of the second oscillator circuit;and a common terminal that is coupled to the second terminal of the first resistor and the second terminal of the second resistor.

Description

TECHNICAL FIELDThis description relates generally to digital isolation and, more particularly, to methods and apparatus for oscillator circuits in isolated systems.BACKGROUNDAs electronics continue to progress, systems can be safely operated under more complex operating conditions, such as higher powers and higher speeds. In isolated systems, isolation circuits implement advanced techniques for transferring data across an isolation barrier at increasing speeds. Such circuits enable isolated systems to accurately transfer data across isolation barriers at higher speeds despite complex operating conditions.SUMMARYFor methods and apparatus for oscillator circuits in isolated systems, an example apparatus includes a first current source circuit having a terminal; a second current source circuit having a terminal; a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor being coupled to the terminal of the first current source circuit and the first terminal of the first transistor; a third transistor having a first terminal, a second terminal, and a control terminal; a fourth transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the fourth transistor being coupled to the terminal of the second current source circuit and the first terminal of the third transistor; and an inductance circuit having a first terminal and a second terminal, wherein the first terminal of the inductance circuit is coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor and the control terminal of the fourth transistor, and the second terminal of the inductance circuit is coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor and the second terminal of the fourth transistor. Further examples are described.For methods and apparatus for oscillator circuits in isolated systems, an example apparatus includes a first oscillator circuit having a first terminal, a second terminal, and including a first transistor having a first threshold voltage; a second oscillator circuit having a first terminal, a second terminal, and including a second transistor having a second threshold voltage, the second threshold voltage being less than the first threshold voltage; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the first terminal of the first oscillator circuit and the first terminal of the second oscillator circuit; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the second terminal of the first oscillator circuit and the second terminal of the second oscillator circuit; and a common terminal coupled to the second terminal of the first resistor and the second terminal of the second resistor. Further examples are described.For methods and apparatus for oscillator circuits in isolated systems, an example apparatus includes a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor; a third transistor having a first terminal, a second terminal, and a control terminal; a fourth transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the fourth transistor coupled to the first terminal of the third transistor; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor, and the control terminal of the fourth transistor; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor, and the second terminal of the fourth transistor; a common terminal coupled to the second terminal of the first resistor and the second terminal of the second resistor. Further examples are described.BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a block diagram of an example isolation system having multiple isolated communication channels coupling example transmitter circuits and example receiver circuits across an isolation barrier using an isolation transformer. FIG. 2 illustrates an example implementation of the isolation system of FIG. 1. FIG. 3 is a schematic diagram of an example of the transmitter and LC resonant circuit of FIG. 1 including a first example oscillator circuit and a second example oscillator circuit. FIG. 4 is a schematic diagram of another example of the transmitter and LC resonant circuit of FIGS. 1 and 3 including a bias current circuit. FIG. 5 is a schematic diagram of another example of the transmitter and LC tank circuit of FIGS. 1, 3, and 4 including an isolation resistor. FIG. 6 is a schematic diagram of another example of the transmitter and LC tank circuit of FIGS. 1, 3, 4, and 5 including a compensation circuit. FIG. 7 is a schematic diagram of an example of the compensation circuit of FIG. 6. FIG. 8 is a flow diagram representing example operations that may be performed, instantiated, or performed using an example implementation of the transmitter circuit of FIGS. 1, 3, 4, 5, and 6 to transmit data across an isolation barrier. FIG. 9 is a diagram of an example range of operation of the transmitter and LC tank circuit of FIGS. 1, 3, 4, 5, and 6.The drawings are not necessarily to scale. In general, the same reference numbers in the drawing(s) and this description refer to the same or similar (functional and / or structural) features and / or parts. Although the drawings show areas with clear lines and boundaries, some or all of these lines and boundaries may be idealized. In reality, the boundaries or lines may be unobservable, blurred, or irregular.DETAILED DESCRIPTIONAs electronics continue to progress, systems can be safely operated under more complex operating conditions, such as higher powers and higher speeds. In isolated systems, isolation circuits implement advanced techniques for transferring data across an isolation barrier at increasing speeds. Such circuits enable isolated systems to accurately transfer data across isolation barriers at higher speeds despite complex operating conditions.Isolation barriers (e.g., galvanic isolators, capacitive isolators, inductive isolators, and optical isolators) are commonly used to isolate signals from noisy environments (such as switching circuitry, etc.) and to isolate circuits operating at a particular voltage from circuits having a different voltage. Some isolator designs include a transmitter circuit, an isolation transformer, and a receiver circuit. The transmitter circuit modulates an input signal onto a carrier signal that passes through the isolation transformer. The isolation transformer includes a first inductance circuit electrically coupled to the transmitter circuit and a second inductance circuit electrically coupled to the receiver circuit. The transmitter circuit causes the modulated signal to pass through the isolation transformer. The receiver circuit receives the modulated signal after passing through the isolation transformer.In some implementations, the transmitter circuit uses on-off keying (OOK) modulation to modulate input signals onto a sinusoidal carrier signal. In on-off gating, generation of a sinusoidal signal is controlled based on the logic state of the input signal. For example, if the logic state of the input signal is a logic zero, the transmitter circuit turns off the oscillator to prevent the generation of the sinusoidal signal. When the logic state of the input signal is a logic one, the transmitter circuit turns on the oscillator circuit to generate the sinusoidal signal that passes through the isolation transformer.To implement the OOK modulation, the transmitter circuit includes a current source circuit and a cross-coupled transistor pair, and is coupled to an LC resonant circuit (inductor capacitor). In such designs, the input signal controls the current source circuit that powers the cross-coupled transistor pair. When the input signal turns on the current source circuit, the cross-coupled transistor pair supplies current to the LC tank circuit. The LC tank circuit generates a sinusoidal signal in response to current from the cross-coupled transistor pair. As long as the power source remains on, the amplitudes of the sinusoidal signal control the cross-coupled transistor pair which regulates the future current supply to the LC tank circuit. However, the currents through the cross-coupled transistor pair have a relatively high response to ringing the LC tank circuit. Such changes in currents through the cross-coupled transistor pair produce excessive noise that increases emissions.In some constructions, the inductance of the inductor circuit is split into two separate inductors coupled to ground to increase immunity to common mode interference. Such a technique may be referred to as a center tap of the inductance circuit. However, the additional ground path to the inductor circuit increases the magnitude of the currents flowing through the transmitter circuit, which increases emissions. Moreover, mismatches between the inductances result in first harmonic disturbances, which increase the emissions.The examples described herein include methods and apparatus for improving oscillator designs in isolated systems using intentional resistors and multiple cross-coupled transistor pairs. In some described examples, the transmitter circuit includes a first oscillator circuit, a second oscillator circuit, a first LC tank circuit, and a second LC tank circuit. The first oscillator circuit includes a first current source circuit and a first cross-coupled transistor pair. The second oscillator circuit includes a second current source circuit and a second cross-coupled transistor pair. The first LC tank circuit includes a first inductor, a first capacitor, and a first desired resistor. The second LC tank circuit includes a second inductor, a second capacitor, and a second ohmic resistor (internal resistor). The first and second resistors are connected in parallel with the first and second inductors. Advantageously, the first and second series resistances reduce asymmetry between the first and second inductances by reducing mismatches between equivalent resistances of the first and second inductances. Reducing the mismatches between the first and second inductors advantageously reduces noise and radiated emissions.The first and second oscillator circuits generate a sinusoidal signal by supplying current to the first and second LC tank circuits. The first and second oscillator circuits regulate the current supply from the first and second current source circuits to control the first and second cross-coupled transistor pairs in response to the sinusoidal signal. In the described examples, the first cross-coupled transistor pair is low threshold voltage transistors and the second cross-coupled transistor pair is high power transistors. During the generation of the sine signal, the currents of the first and second LC tank circuits switch the low threshold voltage transistors between saturation mode and linear mode. During the generation of the sine signal, the currents of the first and second LC tank circuits switch the high power transistors between a subthreshold mode and a saturation mode.It is advantageous that at least one of the transistors with a low threshold voltage conducts current during the entire cycle of the sinusoidal signal. It is advantageous that current is continuously conducted using the transistors with a low threshold voltage, so that the end node disturbances occurring during the switching of the two transistors are reduced. Advantageously, the high power transistors have a greater transconductance, allowing for greater currents of the first and second LC tank circuits. Using the low threshold voltage transistors and the high power transistors, immunity to noise is improved by reducing emissions.FIG. 1 is a block diagram of an example isolation system 100. In the example of FIG. 1, the isolation system 100 includes a programmable circuit 105, a first communication channel 110, and a second communication channel 115. Alternatively, the isolation system 100 may include any number of instances of the communication channels 110, 115. For example, the isolation system 100 includes four communication channels. The example communication channel 110 of FIG. 1 includes an example transmitter circuit 120, an example isolation transformer 130, and an example receiver circuit 135. The example transmitter circuit 120 of FIG. 1 includes a first example oscillation circuit 140 and a second example oscillation circuit 145. The example isolation transformer 130 of FIG. 1 includes a first example inductor 150, a second example inductor 155, a third example inductor 160, and a fourth example inductor 165. The isolation system 100 is configured to be coupled to an external circuit that receives digital signals from the programmable circuit 105 via the communication channels 110, 115 at the data terminals DATA CH0, DATA CHN.The programmable circuit 105 has a first terminal and a second terminal. The first terminal of the programmable circuit 105 is coupled to the communication channel 110. The second terminal of the programmable circuit 105 is coupled to the communication channel 115. The communication channel 110 has a first port and a second port (e.g., the data port DATA CH0). The first terminal of the communication channel 110 is coupled to the programmable circuit 105. The second terminal of the communication channel 110 is configured to be coupled to external circuits. The communication channel 115 has a first port and a second port (e.g., the data port DATA CHN). The first terminal of the communication channel 115 is coupled to the programmable circuit 105. The second terminal of the communication channel 115 is configured to be coupled to external circuits. In some examples, programmable circuit 105 is a programmable circuit structured to instantiate a circuit responsive to execution of machine readable instructions. In such examples, the programmable circuit 105 may be a central processing unit (CPU), a graphics processing unit (GPU), a microcontroller unit (MCU), a field programmable gate array (FPGA), etc.The transmitter circuit 120 has a first terminal, a second terminal, a third terminal (e.g., OSCP), and a fourth terminal (e.g., OSPM). The first terminal of the transmitter circuit 120 is coupled to the programmable circuit 105. The second terminal of the transmitter circuit 120 is coupled to a first common terminal (GND 1) providing a first common potential (e.g., ground, AVSS, etc.). In the examples described herein, the common terminal is structured to be coupled (e.g., routed) to a portion of a device that provides a common potential. In some examples, the first common terminal is structured to be coupled via electrical traces to a conductive layer having a potential considered common to the circuits of the device (often referred to as ground). In such examples, the conductive layer set to the common potential may be referred to as a ground plane. In the described examples, a common terminal is at least one line, pad, conductive trace, or other component of a package that may be coupled to a conductive layer placed at the common potential. The third and fourth terminals of the transmitter circuit 120 are coupled to the isolation transformer 130. Examples of the transmitter circuit 120 are illustrated and described in connection with FIGS. 3, 4, 5 and 6.The isolation transformer 130 has a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, and a sixth terminal. The first and second terminals of the isolation transformer 130 are coupled to the transmitter circuit 120. The third terminal of the isolation transformer 130 is coupled to the first common terminal that provides the first common potential. The fourth and fifth terminals of isolation transformer 130 are coupled to receiver circuit 135. The sixth terminal of isolation transformer 130 is coupled to a second common terminal (GND 2), which may be electrically isolated from the first common terminal providing a second common potential.The receiver circuit 135 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first and second terminals of the receiver circuit 135 are coupled to the isolation transformer 130. The third terminal of the receiver circuit 135 is coupled to the second common terminal, which provides the second common potential. The fourth terminal of the receiver circuit 135 is configured to be coupled to an external circuit that receives the digital signal.The oscillation circuit 140 is coupled to the programmable circuit 105, the isolation transformer 130, and the oscillation circuit 145. Examples of the oscillation circuit 140 will be illustrated and described below in connection with FIGS. 3, 4, 5, and 6. The oscillation circuit 145 is coupled to the programmable circuit 105, the isolation transformer 130, and the oscillation circuit 140. Examples of the oscillation circuit 145 will be illustrated and described in conjunction with FIGS. 3, 4, 5, and 6.The inductor 150 has a first terminal and a second terminal. The first terminal of the inductor 150 is coupled to the transmitter circuit 120. The second terminal of the inductor 150 is coupled to the first common terminal providing the first common potential. In the example of FIG. 1, the inductor 150 is electromagnetically coupled to the inductor 160. The inductor 155 has a first terminal and a second terminal. The first terminal of the inductor 155 is coupled to the transmitter circuit 120. The second terminal of the inductor 155 is coupled to the first common terminal providing the first common potential. In the example of FIG. 1, the inductor 155 is electromagnetically coupled to the inductor 165. In some examples, the inductors 150, 155 form a first inductor circuit electrically coupled to the transmitter circuit 120.The inductor 160 has a first terminal and a second terminal. The first terminal of the inductor 160 is coupled to the receiver circuit 135. The second terminal of the inductor 160 is coupled to the second common terminal providing the second common potential. In the example of FIG. 1, the inductor 160 is electromagnetically coupled to the inductor 150. The inductor 165 has a first terminal and a second terminal. The first terminal of the inductor 165 is coupled to the receiver circuit 135. The second terminal of the inductor 165 is coupled to the second common terminal providing the second common potential. In the example of FIG. 1, the inductor 165 is electromagnetically coupled to the inductor 155. In some examples, the inductors 160, 165 form a second inductor circuit electrically coupled to the receiver circuit and magnetically coupled to the first inductor circuit of the inductors 150, 155.In example operation, programmable circuit 105 generates a digital signal for transmission to receiver circuit 135 via isolation transformer 130. In the example of FIG. 1, the transmitter circuit 120 modulates the digital signal to a sinusoidal carrier signal using on-off gating. The transmitter circuit 120 generates the sinusoidal signal carrying the digital data via the isolation transformer 130 by controlling the oscillator circuit 140, 145. Oscillator circuit 140, 145 generates the sine wave signal by regulating the current supply to the LC tank circuit (shown and described in connection with FIGS. 3, 4, 5 and 6, below). In the example of FIG. 1, the oscillator circuit 140 uses a low threshold voltage characteristic and the oscillator circuit 145 uses a high power characteristic to regulate the currents. Example operations of the oscillator circuits 140, 145 will be described in more detail below in connection with FIG. 8. Using different characteristics of the oscillator circuits 140, 145 to control the currents that generate the sinusoidal signal, radiated emissions are reduced and performance improved.In such examples, inductors 150, 155 induce the modulated sinusoidal signal in inductors 160, 165 that are responsive to the magnetic coupling. The receiver circuit 135 demodulates the modulated sinusoidal signal to produce a digital output signal representing the programmable circuit digital signal. Advantageously, programmable circuit 105 is digitally isolated from noise from external circuits coupled to receiver circuit 135.In the example of FIG. 1, the receiver circuit 135 includes a circuit for detecting current waves and generating pulses. In example operation, the receiver circuit 135 detects current waves in response to the current induced in the inductors 160, 165. In addition, the receiver circuit 135 generates a PWM signal using secondary side logic levels by generating pulses in response to detection of current waves. In such examples, the receiver circuit 135 adjusts the duty cycle of the pulses of the PWM signal based on the duration of the current ripple in the inductors 160, 165.FIG. 2 is an illustration of an example device 200 implementing the isolation system 100 of FIG. 1 in a multi-chip module (MCM). In the example of FIG. 2, the device 200 includes a first lead 205, a second lead 210, a first leadframe 215, a third lead 220, a fourth lead 225, a fifth lead 230, a second leadframe 235, a first die 240, a second die 245, and a third die 250. In the example of FIG. 2, the device 200 implements the communication channel 110 of FIG. 1 using the dies 240, 245, 250. Alternatively, the device 200 may include another instance of the die 240, 245, 250 to also implement the communication channel 115. Additionally, the device 200 may include any number of instances of the die 240, 245, 250 to implement any number of communication channels.The line 205 is electrically coupled to the die 240 by a bond wire 252. In some examples, line 205 may be coupled to programmable circuit 105 of FIG. 1, which provides the digital input signal for transmission. Lead 210 is electrically coupled to die 240 via an example bond wire 254A and leadframe 215 is electrically coupled to die 240 via another example bond wire 254B. The lead frame 215 is electrically coupled to the lead 210 via the bond wire 254B. The lead frame 215 is mechanically coupled to the die 240. In some examples, the leadframe 215 is mechanically coupled to the die 240 by an adhesive. In the example of FIG. 2, lead 210 provides the first common potential to leadframe 215 in response to lead 230 connecting leadframe 215 to a portion of an external device structured to provide the first common potential. In some examples, the line 210 may be referred to as a common terminal providing the common potential.The line 220 is electrically coupled to the die 250 by example bond wires 256A, 256B. In some examples, line 220 may be coupled to external circuitry structured to receive data from the programmable circuit via communication channel 110 of FIG. 1. The line 225 is electrically coupled to the die 250 via a bond wire 258. In some examples, line 225 may be coupled to external circuitry configured to receive data from the programmable circuit via communication channel 110. Lead 230 is electrically coupled to die 250 via an example bond wire 260A and leadframe 235 via another example bond wire 260B. The lead frame 235 is electrically coupled to the lead 230 through the bond wire 260A. The leadframe 235 is mechanically coupled to the die 245, 250. In some examples, the leadframe 235 is mechanically coupled to the die 245, 250 by an adhesive. In the example of FIG. 2, lead 230 provides the second common potential to leadframe 235 in response to lead 230 connecting leadframe 235 to a portion of a device configured to provide the second common potential. In some examples, the line 220 may be referred to as a common terminal providing the common potential.During manufacture, manufacturers may use an example die flow process to encapsulate the device 200 in an insulating material and create an insulating system package. In the packaged state, the insulating material protects the bond wires 252, 254A, 254B, 256A, 256B, 258, 260A, 260B, 264A, 264B, 264C, 268A, 268B, 268C. Alternatively, the insulating material may also be represented as a package of the device 200.Die 240 is electrically coupled to leads 205, 210 by bond wires 252, 254A and to die 245 by bond wires 264A, 264B, 264C. Die 240 is mechanically coupled to leadframe 215. In the example of FIG. 2, die 240 implements transmitter circuit 120 of FIG. 1.Die 245 is electrically coupled to die 240 via bond wires 264A, 264B, 264C and to die 250 via bond wires 268A, 268B, 268C. The die 245 is mechanically coupled to the leadframe 235. In the example of FIG. 2, die 245 implements isolation transformer 130 of FIG. 1.Die 250 is electrically coupled to leads 220, 225, 230 via bond wires 256A, 256B, 258, 260B and to die 245 via bond wires 268A, 268B, 268C. Die 250 is mechanically coupled to leadframe 235. In the example of FIG. 2, the die 250 implements the receiver circuit 135 of FIG. 1.FIG. 3 is a schematic diagram of the inductors 150, 155 of FIG. 1 and an example transmitter circuit 300 that is an example of the transmitter circuit 120 of FIG. 1. In the example of FIG. 3, the transmitter circuit 300 includes a first oscillator circuit 305, a second oscillator circuit 310, a first LC tank circuit 315, a second LC tank circuit 320, and a first example capacitor 325. The example oscillator circuit 305 of FIG. 3 includes a first example current source circuit 330, a first example transistor 335 and a second example transistor 340. The example oscillator circuit 305 of FIG. 3 includes a second example current source circuit 345, a third example transistor 350, and a fourth example transistor 355. The example LC tank circuit 315 of FIG. 3 includes inductor 150, a second example capacitor 360, and a first example resistor 365. The example LC tank circuit 320 of FIG. 3 includes inductor 155, a third example capacitor 375, and a second example resistor 380. In the example of FIG. 3, the transmitter circuit 300 has an input terminal coupled to a data terminal (DATA) that provides a digital input signal. In the example of FIG. 1, the programmable circuit 105 of FIG. 1 provides the digital input signal.The oscillator circuit 305 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 305 is coupled to a supply terminal that supplies a supply voltage (Vdd). The second terminal of the oscillator circuit 305 is coupled to the data terminal that provides the digital input signal. The third terminal of the oscillator circuit 305 is coupled to the oscillator circuit 310, the LC tank circuit 315, and the capacitor 325. The fourth terminal of the oscillator circuit 305 is coupled to the oscillator circuit 310, the LC tank circuit 315, and the capacitor 325. Oscillator circuit 305 is an example of oscillator circuit 140 of FIG. 1.The oscillator circuit 310 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 310 is coupled to the supply terminal that supplies the supply voltage. The second terminal of the oscillator circuit 310 is coupled to the data terminal that provides the digital input signal. The third terminal of the oscillator circuit 310 is coupled to the oscillator circuit 305, the LC tank circuit 315, and the capacitor 325. The fourth terminal of the oscillator circuit 310 is coupled to the oscillator circuit 305, the LC tank circuit 315, and the capacitor 325. Oscillator circuit 310 is an example of oscillator circuit 145 of FIG. 1 Another example of oscillator circuit 310 is illustrated and described in conjunction with FIG. 4 (see below).The LC tank circuit 315 has a first terminal and a second terminal. The first terminal of the LC tank circuit 315 is coupled to the oscillator circuits 305, 310 and the capacitor 325. The second terminal of the LC tank circuit 315 is coupled to a common terminal providing a common potential. In the example of FIG. 3, one or more components of the LC tank circuit 315 may be distributed among one or more dies. For example, die 240 of FIG. 2 includes capacitor 360 and resistor 365, and die 245 includes inductor 150. Alternatively, in some examples, the components of the LC tank circuit 315 are illustrated and described as part of the transmitter circuit 300. In such examples, one or more components of the LC tank circuit 320 may be distributed among one or more dies.The LC tank circuit 320 has a first terminal and a second terminal. The first terminal of the LC tank circuit 320 is coupled to the oscillator circuits 305, 310 and the capacitor 325. The second terminal of the LC tank circuit 320 is coupled to a common terminal providing a common potential. In the example of FIG. 3, one or more components of the LC tank circuit 320 may be distributed among one or more dies. For example, die 240 includes capacitor 375 and resistor 380, and die 245 includes inductor 155. Alternatively, in some examples, the components of the LC tank circuit 320 are illustrated and described as part of the transmitter circuit 300. In such examples, one or more components of the LC tank circuit 320 may be distributed among one or more dies.The capacitor 325 has a first terminal and a second terminal. The first terminal of the capacitor 325 is coupled to the oscillator circuit 305, 310 and the LC tank circuit 315. The second terminal of the capacitor 325 is coupled to the oscillator circuits 305, 310 and the LC tank circuit 320. In some examples, capacitor 325 is referred to as a differential capacitor forming a differential filter. In such examples, capacitor 325 is configured as a low pass filter that reduces noise when switching transistors 335, 340, 355, 350.The current source circuit 330 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 330 is coupled to the supply terminal supplying the supply voltage. The second terminal of current source circuit 330 is coupled to transistors 335, 340. The control terminal of current source circuit 330 is coupled to the data terminal providing the digital input signal.The transistor 335 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 335 is coupled to current source circuit 330 and transistor 340. The second terminal of the transistor 335 is coupled to the oscillator circuit 310, the LC tank circuit 320, the capacitor 325, and the transistor 340. The control terminal of the transistor 335 is coupled to the oscillator circuit 310, the LC tank circuit 315, the capacitor 325, and the transistor 340. The transistor 340 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 340 is coupled to current source circuit 330 and transistor 335. The second terminal of the transistor 340 is coupled to the oscillator circuit 310, the LC tank circuit 315, the capacitor 325, and the transistor 335. The control terminal of the transistor 340 is coupled to the oscillator circuit 310, the LC tank circuit 320, the capacitor 325, and the transistor 335. In some examples, transistors 335, 340 may be referred to as a pair of cross-coupled transistors.The power source circuit 345 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 345 is coupled to the supply terminal supplying the supply voltage. The second terminal of current source circuit 345 is coupled to transistors 350, 355. The control terminal of current source circuit 345 is coupled to the data terminal providing the digital input signal.The transistor 350 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 350 is coupled to current source circuit 345 and transistor 355. The second terminal of transistor 350 is coupled to oscillator circuit 305, LC tank circuit 315, capacitor 325, and transistor 355. The control terminal of transistor 350 is coupled to oscillator circuit 305, LC tank circuit 320, capacitor 325, and transistor 355. The transistor 355 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 355 is coupled to current source circuit 345 and transistor 350. The second terminal of transistor 355 is coupled to oscillator circuit 305, LC tank circuit 320, capacitor 325, and transistor 350. The control terminal of the transistor 355 is coupled to the oscillator circuit 305, the LC tank circuit 315, the capacitor 325, and the transistor 350. In some examples, transistors 350, 355 may be referred to as a pair of cross-coupled transistors.The capacitor 360 has a first terminal and a second terminal. The first terminal of capacitor 360 is coupled to oscillator circuits 305, 310, capacitor 325, resistor 365, and inductor 150. The second terminal of capacitor 360 is coupled to the common terminal providing the common potential. The resistor 365 has a first terminal and a second terminal. The first terminal of resistor 365 is coupled to oscillator circuits 305, 310, capacitors 325, 360, and inductor 150. The second terminal of resistor 365 is coupled to the common terminal providing the common potential.The capacitor 375 has a first terminal and a second terminal. The first terminal of capacitor 375 is coupled to oscillator circuits 305, 310, capacitor 325, resistor 380, and inductor 155. The second terminal of capacitor 375 is coupled to the common terminal providing the common potential. The resistor 380 has a first terminal and a second terminal. The first terminal of resistor 380 is coupled to oscillator circuits 305, 310, capacitors 325, 375, and inductor 155. The second terminal of resistor 380 is coupled to the common terminal providing the common potential.In the example of FIG. 3, the transistors 335, 340, 350, 355 are p-channel metal oxide semiconductor field effect transistors (MOSFETs). Alternatively, transistors 335, 340, 350, 355 may be p-channel field effect transistors (FETs), p-channel insulated gate bipolar transistors (IGBTs), p-channel junction field effect transistors (JFETs), PNP bipolar transistors (BJTs), or, with minor modifications, n-equivalent devices. In some examples, transistors 335, 340, 350, 355 may be depletion transistors, extended drain devices, enhancement transistors, natural transistors, or other types of device-structure transistors. In addition, the transistors 335, 340, 350, 355 may be implemented in / over a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).In operating examples, the logic state of the digital input signal controls the current source circuit 330, 345. When the digital input signal is a logic one, current source circuit 330, 345 supplies current to transistors 335, 340, 350, 355. The LC tank circuit 315, 320 generates a sinusoidal signal in response to the currents of the transistors 335, 340, 350, 355. The transistors 335, 340, 350, 355 compensate for the loss of the LC tank circuit 315, 320 and the initialization oscillation. The LC tank circuit 315, 320 transfers the sinusoidal signal using the inductors 150, 155 via the isolation transformer 130 of FIG. 1 In such examples, the resistors 365, 380 are configured to reduce the mismatch between the inductors 150, 155 by reducing the asymmetry of equivalent resistors. The functions of the resistors 365, 380 will be described in more detail below in connection with FIG. 8.In the example of FIG. 3, transistors 335, 340 are low threshold voltage transistors manufactured to have a threshold voltage that is less than some other transistors. For example, transistors 335, 340 have a threshold of about four tenths of a volt and transistors 350, 355 have a threshold of about seven tenths of a volt. In addition, the low threshold voltage transistors have lower transconductance compared to transistors 350, 355, which reduces the amount of current supplied by transistors 335, 340. The use of different transistors with different threshold values has the advantage that the transistors of at least one of the oscillator circuits 305, 310 continue to conduct current at relatively low voltages. Such continuous routing minimizes end node interference when switching between routing modes. The operation of the oscillator circuits 305, 310 will be described in more detail below in connection with FIG. 8.FIG. 4 is a schematic diagram of the inductors 150, 155 of FIG. 1 and an example transmitter circuit 400, which is another example of the transmitter circuit 120, 300 of FIGS. 1 and 3. In the example of FIG. 4, the transmitter circuit 400 includes a first oscillator circuit 404, a second oscillator circuit 408, a first LC tank circuit 412, a second LC tank circuit 416, a first capacitor 420, and a bias circuit 424. The example oscillator circuit 404 of FIG. 4 includes a first example transistor 428, a second example transistor 432, and a third example transistor 436. The example oscillator circuit 408 of FIG. 4 includes a fourth example transistor 440, a fifth example transistor 444, and a sixth example transistor 448. The example LC tank circuit 412 of FIG. 4 includes the inductor 150, a second example capacitor 452, and a first example resistor 456. The example LC tank circuit 416 of FIG. 4 includes the inductor 155, a third example capacitor 464, and a second example resistor 468. The example bias circuit 424 of FIG. 4 includes an example current source circuit 476, a seventh example transistor 480, a first example switch 484, a second example switch 488, and an example inverter 492. In the example of FIG. 4, transmitter circuit 400 has an input terminal coupled to a data terminal (DATA) that provides a digital input signal. In the example of FIG. 1, the programmable circuit 105 of FIG. 1 provides the digital input signal.The oscillator circuit 404 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 404 is coupled to a supply terminal that provides a supply voltage. The second terminal of oscillator circuit 404 is coupled to oscillator circuit 408 and bias circuit 424. The third terminal of oscillator circuit 404 is coupled to oscillator circuit 408, LC tank circuit 412, and capacitor 420. The fourth terminal of oscillator circuit 404 is coupled to oscillator circuit 408, LC tank circuit 416, and capacitor 420. The oscillator circuit 404 is an example of the oscillator circuit 140, 305 of FIGS. 1 and 3.The oscillator circuit 408 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 408 is coupled to a supply terminal that supplies the supply voltage. The second terminal of the oscillator circuit 408 is coupled to the oscillator circuit 404 and the bias circuit 424. The third terminal of oscillator circuit 408 is coupled to oscillator circuit 404, LC tank circuit 412, and capacitor 420. The fourth terminal of oscillator circuit 408 is coupled to oscillator circuit 404, LC tank circuit 416, and capacitor 420. The oscillator circuit 408 is an example of the oscillator circuits 145, 310 of FIGS. 1 and 3.The LC tank circuit 412 has a first terminal and a second terminal. The first terminal of the LC tank circuit 412 is coupled to the oscillator circuits 404, 408 and the capacitor 420. The second terminal of the LC tank circuit 412 is coupled to a common terminal providing the common potential. In the example of FIG. 4, the LC resonant circuit 412 is described and illustrated as part of the transmitter circuit 400. However, one or more components of the LC tank circuit 412 may be distributed among one or more dies. For example, die 240 of FIG. 2 includes capacitor 452 and resistor 456, and die 245 of FIG. 2 includes inductor 150. The LC tank circuit 412 is another example of the LC tank circuit 315 of FIG. 3.The LC tank circuit 416 has a first terminal and a second terminal. The first terminal of the LC tank circuit 416 is coupled to the oscillator circuits 404, 408 and the capacitor 420. The second terminal of the LC tank circuit 416 is coupled to a common terminal that provides the common potential. In the example of FIG. 4, the LC tank circuit 416 is described and illustrated as part of the transmitter circuit 400. However, one or more components of the LC tank circuit 416 may be distributed among one or more dies. For example, die 240 includes capacitor 464 and resistor 468 and die 245 includes inductor 155. The LC tank circuit 416 is another example of the LC tank circuit 320 of FIG. 3.The capacitor 420 has a first terminal and a second terminal. The first terminal of capacitor 420 is coupled to oscillator circuit 404, 408 and LC tank circuit 412. The second terminal of capacitor 420 is coupled to oscillator circuits 404, 408 and LC tank circuit 416. In some examples, capacitor 420 is referred to as a differential capacitor. Capacitor 420 is another example of capacitor 325 of FIG. 3.The bias circuit 424 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the bias circuit 424 is coupled to the supply terminal that provides the supply voltage. The second terminal of the bias circuit 424 is coupled to the data terminal providing the digital input signal. The third terminal of the bias circuit 424 is coupled to the oscillator circuits 404, 408. The fourth terminal of the bias circuit 424 is coupled to the common terminal providing the common potential.The transistor 428 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 428 is coupled to the supply terminal that provides the supply voltage. The second terminal of transistor 428 is coupled to transistors 432, 436. The control terminal of transistor 428 is coupled to oscillator circuit 408 and bias circuit 424. In the example of FIG. 4, transistor 428 is configured as a current source circuit that provides current based on bias circuit 424.The transistor 432 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 432 is coupled to transistors 428, 436. The second terminal of transistor 432 is coupled to oscillator tank circuit 408, LC tank circuit 416, capacitor 420, and transistor 436. The control terminal of transistor 432 is coupled to oscillator circuit 408, LC tank circuit 412, capacitor 420, and transistor 436.The transistor 436 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 436 is coupled to transistors 428, 432. The second terminal of transistor 436 is coupled to oscillator tank circuit 408, LC tank circuit 412, capacitor 420, and transistor 432. The control terminal of transistor 436 is coupled to oscillator circuit 408, LC tank circuit 416, capacitor 420, and transistor 432.The transistor 440 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 440 is coupled to the supply terminal that provides the supply voltage. The second terminal of transistor 440 is coupled to transistors 444, 448. The control terminal of transistor 440 is coupled to oscillator circuit 404 and bias circuit 424. In the example of FIG. 4, transistor 440 is configured as a current source circuit that provides current based on bias circuit 424.The transistor 444 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 444 is coupled to transistors 440, 448. The second terminal of transistor 444 is coupled to oscillator circuit 404, LC tank circuit 416, capacitor 420, and transistor 448. The control terminal of transistor 444 is coupled to oscillator circuit 404, LC tank circuit 412, capacitor 420, and transistor 448.The transistor 448 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 448 is coupled to transistors 440, 444. The second terminal of transistor 448 is coupled to oscillator circuit 404, LC tank circuit 412, capacitor 420, and transistor 444. The control terminal of transistor 448 is coupled to oscillator circuit 404, LC tank circuit 416, capacitor 420, and transistor 444.The capacitor 452 has a first terminal and a second terminal. The first terminal of capacitor 452 is coupled to oscillator circuits 404, 408, capacitor 420, resistor 456, and inductor 150. The second terminal of capacitor 452 is coupled to the common terminal providing the common potential. Capacitor 452 is another example of capacitor 360 of FIG. 3. The first terminal of resistor 456 is coupled to oscillator circuits 404, 408, capacitors 420, 452, and inductor 150. The second terminal of resistor 456 is coupled to the common terminal providing the common potential. Resistor 456 is another example of resistor 365 of FIG. 3.The capacitor 464 has a first terminal and a second terminal. The first terminal of capacitor 464 is coupled to oscillator circuits 404, 408, capacitor 420, resistor 468, and inductor 155. The second terminal of the capacitor 464 is coupled to the common terminal providing the common potential. Capacitor 464 is another example of capacitor 375 of FIG. 3. The first terminal of resistor 468 is coupled to oscillator circuits 404, 408, capacitors 420, 464, and inductor 155. The second terminal of resistor 468 is coupled to the common terminal providing the common potential. Resistor 468 is another example of resistor 380 of FIG. 3.The current source circuit 476 has a first terminal and a second terminal. The first terminal of current source circuit 476 is coupled to transistor 480 and switch 484. The second terminal of the current source circuit 476 is coupled to the common terminal that provides the common potential.The transistor 480 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 480 is coupled to the supply terminal that provides the supply voltage. The second and control terminals of transistor 480 are coupled to current source circuit 476 and switch 484.The switch 484 has a first terminal, a second terminal, and a control terminal. The first terminal of switch 484 is coupled to current source circuit 476 and transistor 480. The second terminal of switch 484 is coupled to oscillator circuits 404, 408 and switch 488. The control terminal of switch 484 is coupled to the data terminal which provides the digital input signal. In some examples, the switch 484 may be implemented using a transistor. Alternatively, the switch 484 may also be implemented using other circuits.The switch 488 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 488 is coupled to the supply terminal which provides the supply voltage. The second terminal of switch 488 is coupled to oscillator circuits 404, 408 and switch 484. The control terminal of the switch 488 is coupled to the inverter 492. In some examples, the switch 488 may be implemented using a transistor. Alternatively, the switch 488 may be implemented using other switch circuits.The inverter 492 has a first terminal and a second terminal. The first terminal of inverter 492 is coupled to the data terminal providing the digital input signal. The second terminal of the inverter 492 is coupled to the switch 488.In the example of FIG. 4, transistors 428, 432, 436, 440, 444, 448, 480 are p-channel MOSFETs. Alternatively, transistors 428, 432, 436, 440, 444, 448, 480 may also be p-channel FETs, p-channel IGBTs, p-channel JFETs, PNP BJTs, or, with minor modifications, n-equivalent devices. In some examples, transistors 428, 432, 436, 440, 444, 448, 480 may be depletion mode devices, drain extended devices, enhancement mode devices, natural transistors, or other types of device structure transistors. Moreover, the transistors 428, 432, 436, 440, 444, 448, 480 may be implemented in / over a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).In operating examples, the logic state of the digital input signal controls switches 484, 488 which control transistors 428, 440. When the digital input signal is a logic one, switch 484 is closed and switch 488 is open. In such operations, current source circuit 476 pulls the control terminals of transistors 428, 440 by the bias voltage set by transistor 480. Transistors 428, 440 provide current to transistors 432, 436, 444, 448 in response to current source circuit 476 pulling down the control terminals. The operation of oscillator circuit 404, 408 and LC tank circuit 412, 416 is similar to that of FIG. 3 and will be described in more detail below in conjunction with FIG. 8.FIG. 5 is a schematic diagram of the inductors 150, 155 of FIG. 1 and an example transmitter circuit 500 that is another example of the transmitter circuits 120, 300, 400 of FIGS. 1, 3, and 4. In the example of FIG. 5, the transmitter circuit 500 includes a first oscillator circuit 504, a second oscillator circuit 508, a first LC tank circuit 512, a second LC tank circuit 516, a first capacitor 520, a first resistor 524, and a ground path circuit 528. The example oscillator circuit 504 of FIG. 5 includes a first current source circuit 530, a first example transistor 532, and a second example transistor 534. The example oscillator circuit 508 of FIG. 5 includes a second example current source circuit 536, a third example transistor 538, and a fourth example transistor 540. The example LC tank circuit 512 of FIG. 5 includes inductor 150, a second example capacitor 544, a second example resistor 546, and a third example capacitor 548. The example LC tank circuit 516 of FIG. 5 includes inductor 155, a fourth example capacitor 554, a third example resistor 556, and a fifth example capacitor 558. The example ground path circuit 528 of FIG. 5 includes a third example inductor 564, a fourth example inductor 568, a fourth example resistor 572, a sixth example capacitor 576, a fifth example inductor 580, a fifth example resistor 584, and a sixth example inductor 588. In the example of FIG. 5, transmitter circuit 500 has an input terminal coupled to a data terminal (DATA) that provides a digital input signal. In the example of FIG. 1, the programmable circuit 105 of FIG. 1 provides the digital input signal.The oscillator circuit 504 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 504 is coupled to a supply terminal that provides a supply voltage. The second terminal of the oscillator circuit 504 is coupled to the data terminal providing the digital input signal. The third terminal of the oscillator circuit 504 is coupled to the oscillator circuit 508, the LC tank circuit 512, and the capacitor 520. The fourth terminal of the oscillator circuit 504 is coupled to the oscillator circuit 508, the LC tank circuit 516, and the capacitor 520. The oscillator circuit 504 is another example of the oscillator circuits 140, 305, 404 of FIGS. 1, 3 and 4.The oscillator circuit 508 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 508 is coupled to the supply terminal that provides the supply voltage. The second terminal of the oscillator circuit 508 is coupled to the data terminal providing the digital input signal. The third terminal of the oscillator circuit 508 is coupled to the oscillator circuit 504, the LC tank circuit 512 and the capacitor 520. The fourth terminal of the oscillator circuit 508 is coupled to the oscillator circuit 504, the LC tank circuit 516, and the capacitor 520. Oscillator circuit 508 is another example of oscillator circuits 145, 310, 408 of FIGS. 1, 3, and 4.The LC tank circuit 512 has a first terminal, a second terminal, and a third terminal. The first terminal of the LC tank circuit 512 is coupled to the oscillator circuits 504, 508 and the capacitor 520. The second terminal of the LC tank circuit 512 is coupled to the LC tank circuit 516 and the resistor 524. The third terminal of the LC tank circuit 512 is coupled to the LC tank circuit 516, the resistor 524, and the ground path circuit 528.The LC tank circuit 516 has a first terminal, a second terminal, and a third terminal. The first terminal of the LC tank circuit 516 is coupled to the oscillator circuits 504, 508 and the capacitor 520. The second terminal of the LC tank circuit 516 is coupled to the LC tank circuit 512 and the resistor 524. The third terminal of the LC tank circuit 516 is coupled to the LC tank circuit 512 and the ground path circuit 528.The capacitor 520 has a first terminal and a second terminal. The first terminal of the capacitor 520 is coupled to the oscillator circuit 504, 508 and the LC tank circuit 512. The second terminal of the capacitor 520 is coupled to the oscillator circuits 504, 508 and the LC tank circuit 516. In some examples, capacitor 520 is referred to as a differential capacitor. Capacitor 520 is another example of capacitors 325, 420 of FIGS. 3 and 4.The resistor 524 has a first terminal and a second terminal. The first terminal of resistor 524 is coupled to LC tank circuit 512, 516. The second terminal of resistor 524 is coupled to LC tank circuit 512, 516 and ground path circuit 528, which provides the common potential. In some examples, resistor 524 is referred to as a blocking resistor or an isolation resistor. In the example of FIG. 5, resistor 524 is configured to isolate portions of LC tank circuit 512, 516 from non-ideal currents from the common potential. For example, when capacitors 544, 554 and resistors 546, 556 are located in die 240 of FIG. 2 and inductors 150, 155 are located in die 245, resistor 524 reduces the effects of currents from the common terminal that interfere with the operation of the components of die 240. The non-ideal ground currents will be described in more detail below in connection with the ground path circuit 528.The ground path circuit 528 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the ground path circuit 528 is coupled to a first common terminal providing a first common potential. The second terminal of the ground path circuit 528 is coupled to the LC tank circuit 512, 516 and the resistor 524. The third terminal of the ground path circuit 528 is coupled to a second common terminal providing a second common potential. The fourth terminal of the ground path circuit 528 is configured to be coupled to the receiver circuit 135 of FIG. 1.In one example, the LC tank circuit 512, 516 and the resistor 524 are directly coupled to the first common terminal providing the first common potential. However, implementing the transmitter circuit 500 results in an indirect path to the second common terminal providing the second common potential. For example, when the line 210 of FIG. 2 is coupled to the first common terminal, components of the die 240 of FIG. 2 are coupled to the first common terminal via the line 210 and the bond wire 254A of FIG. 2. In addition, the line 210 is coupled to the leadframe 215 of FIG. 2 via the bond wire 254B of FIG. 2, thereby creating an additional current path to / from the first common terminal. In the example of FIG. 5, the ground path circuit 528 is an illustrative representation of equivalent components of the implementation of the transmitter circuit 500 using the apparatus 200 of FIG. 2. for example, the components of the ground path circuit 528 form an equivalent circuit that can provide current of first or second common potentials to the transmitter circuit 500.The power source circuit 530 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 530 is coupled to the supply terminal that supplies the supply voltage. The second terminal of current source circuit 530 is coupled to transistors 532, 534. The control terminal of current source circuit 530 is coupled to the data terminal that provides the data input signal.The transistor 532 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 532 is coupled to current source circuit 530 and transistor 534. The second terminal of transistor 532 is coupled to oscillator circuit 508, LC tank circuit 516, capacitor 520, and transistor 534. The control terminal of transistor 532 is coupled to oscillator circuit 508, LC tank circuit 512, capacitor 520, and transistor 534.The transistor 534 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 534 is coupled to current source circuit 530 and transistor 532. The second terminal of transistor 534 is coupled to oscillator circuit 508, LC tank circuit 512, capacitor 520, and transistor 532. The control terminal of transistor 534 is coupled to oscillator circuit 508, LC tank circuit 516, capacitor 520, and transistor 532.The current source circuit 536 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 536 is coupled to the supply terminal that provides the supply voltage. The second terminal of current source circuit 536 is coupled to transistors 538, 540. The control terminal of current source circuit 536 is coupled to the data terminal that provides the digital input signal.The transistor 538 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 538 is coupled to current source circuit 536 and transistor 540. The second terminal of transistor 538 is coupled to oscillator circuit 504, LC tank circuit 516, capacitor 520, and transistor 540. The control terminal of transistor 538 is coupled to oscillator circuit 504, LC tank circuit 512, capacitor 520, and transistor 540.The transistor 540 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 540 is coupled to current source circuit 536 and transistor 538. The second terminal of transistor 540 is coupled to oscillator circuit 504, LC tank circuit 512, capacitor 520, and transistor 538. The control terminal of transistor 540 is coupled to oscillator circuit 504, LC tank circuit 516, capacitor 520, and transistor 538.The capacitor 544 has a first terminal and a second terminal. The first terminal of capacitor 544 is coupled to oscillator circuits 504, 508, capacitors 520, 548, resistor 546, and inductor 150. The second terminal of capacitor 544 is coupled to LC tank circuit 516 and resistors 524, 546. The resistor 546 has a first terminal and a second terminal. The first terminal of resistor 546 is coupled to oscillator circuits 504, 508, capacitors 520, 544, 548, and inductor 150. The second terminal of resistor 546 is coupled to LC tank circuit 516, resistor 524, and capacitor 544.The capacitor 548 has a first terminal and a second terminal. The first terminal of capacitor 548 is coupled to oscillator circuits 504, 508, capacitors 520, 544, resistor 546, and inductor 150. The second terminal of capacitor 548 is coupled to LC tank circuit 516, ground path circuit 528, and inductor 150. In the example of FIG. 5, capacitor 548 is an example of an equivalent capacitance formed between bond wires that couple inductor 150 from one die to another. For example, capacitor 548 represents a capacitance formed between bond wires 264A, 264B of FIG. 2 when inductor 150 is in die 245 and transmitter circuit 500 is in die 240. In some examples, capacitor 548 may not be depicted or described as a parasitic capacitor.The capacitor 554 has a first terminal and a second terminal. The first terminal of capacitor 554 is coupled to oscillator circuits 504, 508, capacitors 520, 558, resistor 556, and inductor 155. The second terminal of capacitor 554 is coupled to LC tank circuit 512 and resistors 524, 556. The resistor 556 has a first terminal and a second terminal. The first terminal of resistor 556 is coupled to oscillator circuits 504, 508, capacitors 520, 554, 558, and inductor 155. The second terminal of resistor 556 is coupled to LC tank circuit 512, resistor 524, and capacitor 554.The capacitor 558 has a first terminal and a second terminal. The first terminal of capacitor 558 is coupled to oscillator circuits 504, 508, capacitors 520, 554, resistor 556, and inductor 155. The second terminal of capacitor 558 is coupled to LC tank circuit 512, ground path circuit 528, and inductor 155. In the example of FIG. 5, capacitor 558 is an example of an equivalent capacitance formed between bond wires coupling inductor 155 from one die to another. For example, capacitor 558 represents a capacitance formed between bond wires 264B, 264C of FIG. 2 when inductor 155 is in die 245 and transmitter circuit 500 is in die 240. In some examples, capacitor 558 may not be depicted or described as a parasitic capacitor.The inductor 564 has a first terminal and a second terminal. The first terminal of inductor 564 is coupled to the first common terminal that provides the first common potential. The second terminal of inductor 564 is coupled to resistor 572 and capacitor 576. In the example of FIG. 5, the inductor 564 is an example of a parasitic inductance formed by a bond wire that couples the line providing the first common potential to the leadframe supporting the transmitter circuit 500. For example, the inductance 564 represents an inductance of the bond wire 254B of FIG. 2 when the inductance circuit 500 is in the die 240 located on the leadframe 215 of FIG. 2 and the lead 210 is coupled to the first common terminal. In some examples, the inductance 564 may not be represented or described as a parasitic inductance.The inductor 568 has a first terminal and a second terminal. The first terminal of inductor 568 is coupled to LC tank circuit 512, 516 and resistors 524, 572. The second terminal of the inductor 568 is coupled to the first common terminal providing the first common potential. In the example of FIG. 5, the inductor 568 is an example of a parasitic inductance formed by a bond wire coupling a die to the transmitter circuit 500 to the first common terminal. For example, the inductance 568 represents an inductance of the bond wire 254A of FIG. 2 when the inductance circuit 500 is in the die 240 and the line 210 of FIG. 2 is coupled to the first common terminal. In some examples, the inductance 568 may not be represented or described as a parasitic inductance.The resistor 572 has a first terminal and a second terminal. The first terminal of resistor 572 is coupled to LC tank circuit 512, 516, resistor 524, and inductor 568. The second terminal of resistor 572 is coupled to inductor 564 and capacitor 576. In the example of FIG. 5, the resistor 572 is an example of an equivalent resistor formed by a "die attach pad" located between the leadframe supporting the transmitter circuit 500 and the die including the transmitter circuit 500. For example, when transmitter circuit 500 is located in die 240 located on leadframe 215 of FIG. 2, resistor 572 represents a resistance of the physical connection of leadframe 215 to die 240. In some examples, resistor 572 may not be represented or described as a parasitic resistance.The capacitor 576 has a first terminal and a second terminal. The first terminal of capacitor 576 is coupled to inductor 564 and resistor 572. The second terminal of capacitor 576 is coupled to inductor 580 and resistor 584. In the example of FIG. 5, capacitor 576 is an example of a parasitic capacitance formed between a first leadframe supporting transmitter circuit 500 and a second leadframe supporting receiver circuit 135. For example, capacitor 576 represents a capacitance between leadframes 215, 235 when transmitter circuit 500 is located in die 240 that sits on leadframe 215 and receiver circuit 135 in die 250 of FIG. 2 that sits on leadframe 235 of FIG. 2. In some examples, capacitor 576 may not be represented or described as parasitic capacitance.The inductor 580 has a first terminal and a second terminal. The first terminal of the inductor 580 is coupled to the second common terminal providing the second common potential. The second terminal of inductor 580 is coupled to capacitor 576 and resistor 584. In the example of FIG. 5, the inductance 580 is an example of a parasitic inductance formed by a bond wire coupling a line providing the second common potential to a leadframe supporting the receiver circuit 135. For example, the inductance 580 represents an inductance of the bond wire 260A of FIG. 2 when the receiver circuit 135 is located in the die 250 seated on the leadframe 235 and the lead 230 of FIG. 2 is coupled to the second common terminal. In some examples, the inductance 580 may not be represented or described as a parasitic inductance.The resistor 584 has a first terminal and a second terminal. The first terminal of resistor 584 is coupled to receiver circuit 135 and inductor 588. The second terminal of resistor 584 is coupled to capacitor 576 and inductor 580. In the example of FIG. 5, the resistor 584 is an example of an equivalent resistor formed by a "die attach pad" located between the leadframe supporting the receiver circuit 135 and the die including the receiver circuit 135. For example, when the receiver circuit 135 is located in the die 250 located on the leadframe 235, the resistor 584 represents a resistance of the physical connection of the leadframe 235 to the die 250. In some examples, resistor 584 may not be represented or described as a parasitic resistance.The inductor 588 has a first terminal and a second terminal. The first terminal of inductor 588 is coupled to receiver circuit 135 and resistor 584. The second terminal of the inductor 588 is coupled to the second common terminal that provides the second common potential. In the example of FIG. 5, the inductor 588 is an example of an equivalent inductor formed by a bond wire that couples a die including the receiver circuit 135 to a line that provides the second common potential. For example, the inductance 588 represents an inductance of the bond wire 260B of FIG. 2 when the receiver circuit 135 is in the die 250 and the line 230 is coupled to the second common terminal. In some examples, the inductance 588 may not be represented or described as a parasitic inductance.In the example of FIG. 5, transistors 532, 534, 538, 540 are p-channel MOSFETs. Alternatively, transistors 532, 534, 538, 540 may be p-channel FETs, p-channel IGBTs, p-channel JFETs, PNP BJTs, or, with minor modifications, n-equivalent devices. In some examples, transistors 532, 534, 538, 540 may be depletion mode devices, drain extended devices, enhancement mode devices, natural transistors, or other types of device structure transistors. In addition, the transistors 532, 534, 538, 540 may be implemented in / over a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).In an example of operation, non-ideal common potential currents may be fed into the transmitter circuit 500 via one of two possible current paths. A first current path extends from the first common terminal, through the inductor 568, and into the resistor 524. A second current path extends from the second common potential across capacitor 576 and through resistor 572. In either case, the non-ideal currents must traverse resistor 524 to interfere with the operation of LC tank circuit 512, 516. Advantageously, resistor 524 blocks the non-ideal currents by isolating capacitors 544, 554 and resistors 546, 556 from the current paths of ground path circuit 528, improving radiation immunity. The operation of the oscillator circuit 504, 508 and the LC tank circuit 512, 516 is similar to that of FIGS. 3 and 4 and will be described in more detail below in connection with FIG. 8.FIG. 6 is a schematic diagram of the inductors 150, 155 of FIG. 1 and an example transmitter circuit 600 that is another example of the transmitter circuits 120, 300, 400, 500 of FIGS. 1, 3, 4, and 5. In the example of FIG. 6, transmitter circuit 600 includes a first oscillator circuit 604, a second oscillator circuit 608, a first LC tank circuit 612, a second LC tank circuit 616, a first example capacitor 620, a first example resistor 624, and an example compensation circuit 628. The example oscillator circuit 604 of FIG. 6 includes a first example current source circuit 630, a first example transistor 632, and a second example transistor 634. The example oscillator circuit 608 of FIG. 6 includes a second example current source circuit 636, a third example transistor 640, and a fourth example transistor 642. The example LC tank circuit 612 of FIG. 6 includes inductor 150, a second example capacitor 644, a second example resistor 646, and a third example capacitor 648. The example LC tank circuit 616 of FIG. 6 includes inductor 155, a fourth example capacitor 654, a third example resistor 656, and a fifth example capacitor 658. The example compensation control circuit 628 of FIG. 6 includes an example compensation control circuit 664, a third example current source circuit 668, a fifth example transistor 672, and a sixth example transistor 676. In the example of FIG. 6, transmitter circuit 600 has an input terminal coupled to a data terminal (DATA) that provides a digital input signal. In the example of FIG. 1, the programmable circuit 105 of FIG. 1 provides the digital input signal.The oscillator circuit 604 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 604 is coupled to a supply terminal that provides a supply voltage. The second terminal of the oscillator circuit 604 is coupled to the data terminal that provides the digital input signal. The third terminal of oscillator circuit 604 is coupled to oscillator circuit 608, LC tank circuit 612, capacitor 620, and compensation circuit 628. The fourth terminal of oscillator circuit 604 is coupled to oscillator circuit 608, LC tank circuit 616, capacitor 620, and compensation circuit 628. The oscillator circuit 604 is another example of the oscillator circuits 140, 305, 404, 504 of FIGS. 1, 3, 4, and 5.The oscillator circuit 608 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the oscillator circuit 608 is coupled to the supply terminal that provides the supply voltage. The second terminal of the oscillator circuit 608 is coupled to the data terminal that provides the digital input signal. The third terminal of oscillator circuit 608 is coupled to oscillator circuit 604, LC tank circuit 612, capacitor 620, and compensation circuit 628. The fourth terminal of oscillator circuit 608 is coupled to oscillator circuit 604, LC tank circuit 616, capacitor 620, and compensation circuit 628. Oscillator circuit 608 is another example of oscillator circuits 145, 310, 408, 508 of FIGS. 1, 3, 4, and 5.The LC tank circuit 612 has a first terminal, a second terminal, and a third terminal. The first terminal of the LC tank circuit 612 is coupled to the oscillator circuit 604, 608, the capacitor 620, and the compensation circuit 628. The second terminal of the LC tank circuit 612 is coupled to the LC tank circuit 616 and the resistor 624. The third terminal of the LC tank circuit 612 is coupled to the common terminal providing the common potential. The LC tank circuit 612 is another example of the LC tank circuit 512 of FIG. 5.The LC tank circuit 616 has a first terminal, a second terminal, and a third terminal. The first terminal of the LC tank circuit 616 is coupled to the oscillator circuits 604, 608, the capacitor 620, and the compensation circuit 628. The second terminal of the LC tank circuit 616 is coupled to the LC tank circuit 612 and the resistor 624. The third terminal of the LC tank circuit 616 is coupled to the common terminal that provides the common potential. The LC tank circuit 616 is another example of the LC tank circuit 516 of FIG. 5.The capacitor 620 has a first terminal and a second terminal. The first terminal of capacitor 620 is coupled to oscillator circuit 604, 608, LC tank circuit 612, and compensation circuit 628. The second terminal of capacitor 620 is coupled to oscillator circuits 604, 608, LC tank circuit 616, and compensation circuit 628. In some examples, capacitor 620 is referred to as a differential capacitor. Capacitor 620 is another example of capacitors 325, 420, 520 of FIGS. 3, 4, and 5.The resistor 624 has a first terminal and a second terminal. The first terminal of resistor 624 is coupled to LC tank circuit 612, 616 and compensation circuit 628. The second terminal of resistor 624 is coupled to the common terminal that provides the common potential. In some examples, resistor 624 is referred to as a blocking resistor or an isolation resistor. Resistor 624 is another example of resistor 524 of FIG. 5.The compensation circuit 628 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the compensation circuit 628 is coupled to the supply terminal that provides the supply voltage. The second terminal of the compensation circuit 628 is coupled to the oscillator circuits 604, 608, the LC tank circuit 612, and the capacitor 620. The third terminal of the compensation circuit 628 is coupled to the oscillator circuits 604, 608, the LC tank circuit 616, and the capacitor 620. The fourth terminal of the compensation circuit 628 is coupled to the LC tank circuit 612, 616 and the resistor 624.The power source circuit 630 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 630 is coupled to the supply terminal supplying the supply voltage. The second terminal of current source circuit 630 is coupled to transistors 632, 634. The control terminal of current source circuit 630 is coupled to the data terminal providing the data input signal.The transistor 632 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 632 is coupled to current source circuit 630 and transistor 634. The second terminal of transistor 632 is coupled to oscillator circuit 608, LC tank circuit 616, capacitor 620, compensation circuit 628, and transistor 634. The control terminal of transistor 632 is coupled to oscillator circuit 608, LC tank circuit 612, capacitor 620, compensation circuit 628, and transistor 634.The transistor 634 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 634 is coupled to current source circuit 630 and transistor 632. The second terminal of transistor 634 is coupled to oscillator circuit 608, LC tank circuit 612, capacitor 620, compensation circuit 628, and transistor 632. The control terminal of transistor 634 is coupled to oscillator circuit 608, LC tank circuit 616, capacitor 620, compensation circuit 628, and transistor 632.The current source circuit 636 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 636 is coupled to the supply terminal that provides the supply voltage. The second terminal of current source circuit 636 is coupled to transistors 640, 642. The control terminal of current source circuit 636 is coupled to the data terminal providing the digital input signal.The transistor 640 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 640 is coupled to current source circuit 636 and transistor 642. The second terminal of transistor 642 is coupled to oscillator circuit 604, LC tank circuit 616, capacitor 620, compensation circuit 628, and transistor 640. The control terminal of transistor 640 is coupled to oscillator circuit 604, LC tank circuit 612, capacitor 620, compensation circuit 628, and transistor 642.The transistor 642 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 642 is coupled to current source circuit 636 and transistor 640. The second terminal of transistor 642 is coupled to oscillator circuit 604, LC tank circuit 612, capacitor 620, compensation circuit 628, and transistor 640. The control terminal of transistor 642 is coupled to oscillator circuit 604, LC tank circuit 616, capacitor 620, compensation circuit 628, and transistor 640.The capacitor 644 has a first terminal and a second terminal. The first terminal of capacitor 644 is coupled to oscillator circuits 604, 608, capacitors 620, 648, compensation circuit 628, resistor 646, and inductor 150. The second terminal of capacitor 644 is coupled to LC tank circuit 616, resistors 624, 646, and compensation circuit 628. The resistor 646 has a first terminal and a second terminal. The first terminal of resistor 646 is coupled to oscillator circuits 604, 608, capacitors 620, 644, 648, compensation circuit 628, and inductor 150. The second terminal of resistor 646 is coupled to LC tank circuit 616, resistor 624, compensation circuit 628, and capacitor 644.The capacitor 648 has a first terminal and a second terminal. The first terminal of capacitor 648 is coupled to oscillator circuits 604, 608, capacitors 620, 644, compensation circuits 628, resistor 646, and inductor 150. The second terminal of capacitor 648 is coupled to the common terminal providing the common potential. In the example of FIG. 6, capacitor 648 is an example of a parasitic capacitance formed between bond wires coupling inductor 150 from one die to another. For example, capacitor 648 represents a capacitance formed between bond wires 264A, 264B of FIG. 2 when inductor 150 is on die 245 of FIG. 2 and transmitter circuit 600 is on die 240 of FIG. 2. In some examples, capacitor 648 may not be depicted or described as a parasitic capacitor.The capacitor 654 has a first terminal and a second terminal. The first terminal of capacitor 654 is coupled to oscillator circuits 604, 608, capacitors 620, 658, compensation circuit 628, resistor 656, and inductor 155. The second terminal of capacitor 654 is coupled to LC tank circuit 612, resistors 624, 656, and compensation circuit 628.The resistor 656 has a first terminal and a second terminal. The first terminal of resistor 656 is coupled to oscillator circuits 604, 608, capacitors 620, 654, 658, compensation circuit 628, and inductor 155. The second terminal of resistor 656 is coupled to LC tank circuit 612, resistor 624, compensation circuit 628, and capacitor 654.The capacitor 658 has a first terminal and a second terminal. The first terminal of capacitor 658 is coupled to oscillator circuits 604, 608, capacitors 620, 654, compensation circuits 628, resistor 656, and inductor 155. The second terminal of capacitor 658 is coupled to the common terminal providing the common potential. In the example of FIG. 6, capacitor 658 is an example of an equivalent capacitance formed between bond wires coupling inductor 155 from one die to another. For example, capacitor 658 represents a capacitance formed between bond wires 264B, 264C of FIG. 2 when inductor 155 is in die 245 and transmitter circuit 600 is in die 240. In some examples, capacitor 658 may not be depicted or described as a parasitic capacitor.The compensation control circuit 664 has a first terminal and a second terminal. The first terminal of the compensation control circuit 664 is coupled to the LC tank circuit 612, 616 and the resistor 624. The second terminal of the compensation control circuit 664 is coupled to the current source circuit 668. An example of the compensation control circuit 664 is illustrated and described below in connection with FIG. 7.The current source circuit 668 has a first terminal, a second terminal, and a control terminal. The first terminal of the current source circuit 668 is coupled to the supply terminal that supplies the supply voltage. The second terminal of current source circuit 668 is coupled to transistors 672, 676. The control terminal of current source circuit 668 is coupled to compensation control circuit 664.The transistor 672 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 672 is coupled to current source circuit 668 and transistor 676. The second terminal of transistor 672 is coupled to oscillator circuits 604, 608, LC tank circuit 616, capacitor 620, and transistor 676. The control terminal of transistor 672 is coupled to oscillator circuits 604, 608, LC tank circuit 612, capacitor 620, and transistor 676.The transistor 676 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 676 is coupled to current source circuit 668 and transistor 672. The second terminal of transistor 676 is coupled to oscillator circuits 604, 608, LC tank circuit 612, capacitor 620, and transistor 672. The control terminal of transistor 676 is coupled to oscillator circuit 604, 608, LC tank circuit 616, capacitor 620, and transistor 672.In the example of FIG. 6, transistors 632, 634, 640, 642, 672, 676 are p-channel MOSFETs. Alternatively, transistors 632, 634, 640, 642, 672, 676 may also be p-channel FETs, p-channel IGBTs, p-channel JFETs, PNP BJTs, or, with minor modifications, n-equivalent devices. In some examples, transistors 632, 634, 640, 642, 672, 676 may be depletion mode devices, drain-extended devices, enhancement mode devices, natural transistors, or other types of device structure transistors. Moreover, the transistors 632, 634, 640, 642, 672, 676 may be implemented in / over a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).In example operation, resistor 624 reduces mismatches resulting from the non-ideal currents by isolating capacitors 644, 654 and resistors 646, 656. In such operating examples, resistor 624 generates a voltage difference that responds to the non-ideal currents. The compensation control circuit 664 turns on the current source circuit 668 in response to determining that the voltage difference of the resistor 624 represents non-ideal currents. Transistors 672, 676 provide additional charge to LC tank circuit 612, 616 to compensate for the non-ideal currents. Advantageously, the compensation circuit 628 controls the current source circuit 668 which provides additional current to compensate for the oscillation loss for the non-ideal ground currents. The operation of the oscillator circuit 604, 608 and the LC tank circuit 612, 616 is similar to that of FIGS. 3, 4 and 5 and will be described in more detail below in connection with FIG. 8.FIG. 7 is a schematic diagram of an example compensation control circuit 700 that is an example implementation of the compensation control circuit 664 of FIG. 6. In the example of FIG. 7, the compensation control circuit 700 includes a first current source circuit 705, a first transistor 710, a first resistor 715, a first capacitor 720, a second current source circuit 725, a second transistor 730, a third current source circuit 735, a third transistor 740, a second resistor 745, a second capacitor 750, a fourth transistor 755, a fourth current source circuit 760, and a fifth transistor 765.The compensation control circuit 700 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the compensation control circuit 700 is coupled to a supply terminal providing a supply voltage. The second terminal of the compensation control circuit 700 is coupled to the common terminal providing the common potential. The third terminal of the compensation control circuit 700 is configured to be coupled to blocking or isolation resistors (e.g., resistors 524, 624 of FIGS. 5 and 6 ) that provide a reference voltage (V R). In the example of FIG. 7, the reference voltage represents a voltage difference across the resistors 524, 624. The reference voltage is approximately equal to a resistance of the resistors 524, 624 times a ground current from the common potential of the transmitter circuit 500, 600 of FIGS. 5 and 6. The compensation control circuit 700 is configured to control the current source circuit 668 of FIG. 6 by generating a control voltage (V CTRL) at the fourth terminal of the compensation control circuit 700.The current source circuit 705 has a first terminal and a second terminal. The first terminal of the current source circuit 705 is coupled to the supply terminal supplying the supply voltage. The second terminal of current source circuit 705 is coupled to transistor 710 and resistor 715. The transistor 710 has a first terminal, a second terminal, and a control terminal. The first and control terminals of transistor 710 are coupled to current source circuit 705 and resistor 715. The second terminal of transistor 710 is coupled to the common terminal that provides the common potential. In the example of FIG. 7, current source circuit 705 and transistor 710 are configured as a bias circuit that biases transistors 710, 730 near a subthreshold operating region. Alternatively, the compensation control circuit 700 may be modified to use a different circuit to bias the transistor 730.The resistor 715 has a first terminal and a second terminal. The first terminal of resistor 715 is coupled to current source circuit 705 and transistor 710. The second terminal of resistor 715 is coupled to capacitor 720 and transistor 730. The capacitor 720 has a first terminal and a second terminal. The first terminal of capacitor 720 is configured to be coupled to the blocking or isolation resistor (e.g., resistors 524, 624) that provides the reference voltage. The second terminal of capacitor 720 is coupled to resistor 715 and transistor 730. Capacitor 720 is configured to control transistors 710, 730 by filtering the reference voltage. Alternatively, the compensation control circuit 700 may be modified or the capacitor 720 may be replaced with another filter circuit.The power source circuit 725 has a first terminal and a second terminal. The first terminal of the current source circuit 725 is coupled to the supply terminal that supplies the supply voltage. The second terminal of current source circuit 725 is coupled to transistors 730, 765 and is configured to be coupled to current source circuit 668. The transistor 730 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 730 is coupled to current source circuit 725 and transistor 765 and is configured to be coupled to current source circuit 668. The second terminal of transistor 730 is coupled to the common terminal providing the common potential. The control terminal of transistor 730 is coupled to resistor 715 and capacitor 720.The current source circuit 735 has a first terminal and a second terminal. The first terminal of current source circuit 735 is coupled to transistor 740 and resistor 745. The second terminal of the current source circuit 735 is coupled to the common terminal providing the common potential. The transistor 740 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 740 is coupled to the supply terminal that provides the supply voltage. The second and control terminals of transistor 740 are coupled to current source circuit 735 and resistor 745. In the example of FIG. 7, current source circuit 735 and transistor 740 are configured as a bias circuit that biases transistors 740, 755 near a subthreshold operating range. Alternatively, the compensation control circuit 700 may be modified to use an alternative circuit to bias the transistor 755.The resistor 745 has a first terminal and a second terminal. The first terminal of resistor 745 is coupled to current source circuit 735 and transistor 740. The second terminal of resistor 745 is coupled to capacitor 750 and transistor 755. The capacitor 750 has a first terminal and a second terminal. The first terminal of capacitor 750 is configured to be coupled to the blocking or isolation resistor (e.g., resistors 524, 624) that provides the reference voltage. The second terminal of capacitor 750 is coupled to resistor 745 and transistor 755. The capacitor 750 is configured to control the transistors 740, 755 by filtering the reference voltage. Alternatively, the compensation control circuit 700 may be modified or the capacitor 750 may be replaced with another filter circuit.The transistor 755 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 755 is coupled to the supply terminal that provides the supply voltage. The second terminal of transistor 755 is coupled to current source circuit 760 and transistor 765. The control terminal of transistor 755 is coupled to resistor 745 and capacitor 750. The current source circuit 760 has a first terminal and a second terminal. The first terminal of current source circuit 760 is coupled to transistors 755, 765. The second terminal of the current source circuit 760 is coupled to the common terminal providing the common potential. In the example of FIG. 7, the transistor 755 and the current source circuit 760 are configured as a bias circuit that controls the transistors 765. Alternatively, the compensation control circuit 700 may be modified to use a different circuit to control the transistor 765.The transistor 765 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 765 is coupled to current source circuit 725 and transistor 730 and is configured to be coupled to current source circuit 668. The second terminal of transistor 765 is coupled to the common terminal providing the common potential. The control terminal of transistor 765 is coupled to transistor 755 and current source circuit 760. Example operations of the compensation control circuit 700 are described below in connection with FIG. 8.In the example of FIG. 7, transistors 710, 730, 765 are n-channel MOSFETs. Alternatively, transistors 710, 730, 765 may also be n-channel FETs, n-channel IGBTs, n-channel JFETs, NPN BJTs, or, with minor modifications, p-equivalent devices. In the example of FIG. 7, transistors 740, 755 are p-channel MOSFETs. Alternatively, transistors 740, 755 may be p-channel FETs, p-channel IGBTs, p-channel JFETs, PNP BJTs, or, with minor modifications, n-equivalent devices. In some examples, transistors 710, 730, 740, 755, 765 may be depletion transistors, drain extended transistors, enhancement transistors, natural transistors, or other types of device structure transistors. Moreover, the transistors 710, 730, 740, 755, 765 may be implemented in / over a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN) or a gallium arsenide substrate (GaAs).FIG. 8 is a flow diagram representing example operations 800 that may be performed, instantiated, or performed using an example implementation of the transmitter circuit 120, 300, 400, 500, 600 of FIGS. 1, 3, 4, 5, and 6 to transmit data via an isolation transformer 130 of FIG. 1. The example operations 800 of FIG. 8 begin at block 805, where the transmitter circuit 120, 300, 400, 500, 600 receives data to be transmitted. (Block 805). In some examples, the communication channels 110, 115 of FIG. 1 receive a digital signal from the programmable circuit 105 of FIG. 1. In such examples, the digital signal represents data to be transmitted from the transmitter circuit 120, 300, 400, 500, 600 to the receiver circuit 135 via the isolation transformer 130. The transmission of data via isolation transformer 130 has the advantage that programmable circuit 105 can operate using different supply voltages as compared to the circuit coupled to receiver circuit 135.The oscillator circuit 140, 145, 305, 310, 404, 408, 504, 508, 604, 608 of FIGS. 1, 3, 4, 5, and 6 is structured in response to whether the data is a logical one. (Block 810). In some examples, the logic state of the digital input signal controls current source circuit 330, 345, 530, 536, 630, 636 of FIGS. 3, 5, and 6. In other examples, the logic state of the digital input signal controls bias circuit 424 of FIG. 4. In such examples, bias circuit 424 controls transistors 428, 440 of FIG. 4, similar to current source circuit 330, 345, 530, 536, 630, 636. Current source circuits 330, 345, 530, 536, 630, 636 may also be implemented using transistors and bias circuits as shown in FIG. 4.If the data is not a logical one (e.g., block 810 provides a result of NO), current source circuits 330, 345, 530, 536, 630, 636 and transistors 428, 440 prevent current supply. (Block 815). When the transmitter circuit 120, 300, 400, 500, 600 is configured to implement the OOK modulation, a logical zero of the digital signal is represented by the absence of a modulated signal. In some examples, when the logic state of the digital signal is a logic zero, the digital signal turns off the current source circuit 330, 345, 530, 536, 630, 636. In such examples, oscillator circuits 305, 310, 504, 508, 604, 608 are configured to prevent additional current from being supplied. In other examples, when the logic state of the digital signal is a logic zero, the digital signal opens switch 484 of FIG. 4 and closes switch 488 of FIG. 4. in such examples, bias circuit 424 prevents oscillator circuits 404, 408 from supplying additional current by coupling the control terminals of transistors 428, 440, which are p-channel transistors, to the supply terminal.If the data is a logical one (e.g., block 810 provides a result of YES), current source circuits 330, 530, 630 and transistor 428 provide a first current to a first transistor pair. (Block 820). When transmitter circuit 120, 300, 400, 500, 600 is configured to implement OOK modulation, a logical one of the digital signal is represented by generating a sinusoidal signal that is a modulated representation of the logical one. In some examples, if the logic state of the digital signal is a logic one, the digital signal turns on current source circuit 330, 530, 630. In other examples, if the logic state of the digital signal is a logic one, the digital signal closes switch 484 and opens switch 488. In such examples, bias circuit 424 patterns transistor 428 to conduct current.The transistors 335, 340, 432, 436, 532, 534, 632, 634 of FIGS. 3, 4, 5, and 6 provide the first current using low threshold voltage transistors. (Block 825). In some examples, transistors 335, 340, 432, 436, 532, 534, 632, 634 are low threshold voltage (LVT) transistors. Low threshold voltage transistors are a class of transistors that have a reduced threshold voltage. For example, some transistors have a threshold voltage of about seven tenths of a volt and low threshold transistors have a threshold voltage of about four tenths of a volt. The low threshold voltage has the advantage that transistors 335, 340, 432, 436, 532, 534, 632, 634 may transition between saturation and linear operating ranges during modulation. Example switching between the modes of operation of transistors 335, 340, 432, 436, 532, 534, 632, 634 are illustrated and described in connection with FIG. 9. When transistors 335, 340, 432, 436, 532, 534, 632, 634 are low threshold voltage transistors, transistors 335, 340, 432, 436, 532, 534, 632, 634 also have a relatively low transconductance. By reducing the transconductance, the current swing between transistors 335, 340, 432, 436, 532, 534, 632, 634 during modulation is reduced.Current source circuits 345, 536, 636 and transistor 440 provide a second current to a second transistor pair. (Block 830). When the transmitter circuit 120, 300, 400, 500, 600 is configured to implement OOK modulation, a logical one of the digital signal is represented by generating a sinusoidal signal that is a modulated representation of the logical one. In some examples, when the logic state of the digital signal is a logic one, the digital signal turns on current source circuit 345, 536, 636. In other examples, if the logic state of the digital signal is a logic one, the digital signal closes switch 484 and opens switch 488. In such examples, bias circuit 424 patterns transistor 440 to conduct current.The transistors 350, 355, 444, 448, 538, 540, 640, 642 of FIGS. 3, 4, 5, and 6 provide the second current using high threshold voltage transistors. (Block 835). In some examples, transistors 350, 355, 444, 448, 538, 540, 640, 642 are high threshold voltage transistors (also referred to as high power transistors). High-power transistors are a class of transistors that are designed for power efficiency and have a higher threshold voltage than low-threshold-voltage transistors. An example of the switching between the operating ranges of the transistors 350, 355, 444, 448, 538, 540, 640, 642 is illustrated and described below in connection with FIG. 9. Advantageously, transistors 350, 355, 444, 448, 538, 540, 640, 642 have a higher transconductance than transistors 335, 340, 432, 436, 532, 534, 632, 634. Advantageously, the relatively high transconductance of transistors 350, 355, 444, 448, 538, 540, 640, 642 increases the current swing between transistors 350, 355, 444, 448, 538, 540, 640, 642 during modulation.The LC tank circuits 315, 412, 512, 612 of FIGS. 3, 4, 5, and 6 drive a P-side inductance using currents from the first and second transistor pairs. (Block 840). In some examples, the LC tank circuit 315, 412, 512, 612 generates a sinusoidal signal across the inductor 150 of FIGS. 1, 3, 4, 5, and 6 in response to currents from the oscillator circuit 140, 145, 305, 310, 404, 408, 504, 508, 604, 608. In such examples, the frequency of the sinusoidal signal is approximately equal to a resonant frequency of the LC tank circuit 315, 412, 512, 612, which is determined by the inductance of the inductor 150 and the capacitance of the capacitors 360, 452, 544, 644 of FIGS. 3, 4, 5, and 6. Advantageously, the sinusoidal signal of the LC tank circuit 315, 412, 512, 612 controls the transistors 335, 355, 432, 444, 532, 538, 632, 640 providing current to the LC tank circuit 320, 416, 516, 616 of FIGS. 3, 4, 5 and 6.The LC tank circuits 320, 416, 516, 616 of FIGS. 3, 4, 5, and 6 drive an M-side inductance using the currents of the first and second transistor pairs. (Block 850). In some examples, the LC tank circuit 320, 416, 516, 616 generates a sinusoidal signal across the inductor 155 of FIGS. 1, 3, 4, 5, and 6 in response to currents from the oscillator circuit 140, 145, 305, 310, 404, 408, 504, 508, 604, 608. In such examples, the frequency of the sinusoidal signal is approximately equal to a resonant frequency of the LC tank circuit 320, 416, 516, 616 determined by the inductance of the inductor 155 and the capacitance of the capacitors 375, 464, 554, 654 of FIGS. 3, 4, 5, and 6. Advantageously, the sinusoidal signal of the LC tank circuit 320, 416, 516, 616 controls the transistors 340, 350, 436, 448, 534, 540, 642, 634 to regulate the current supply to the LC tank circuit 315, 412, 512, 612.The resistors 365, 380, 456, 468, 546, 556, 646, 656 of FIGS. 3, 4, 5, and 6 compensate for the P-side and M-side inductances for mismatches. (Block 855). In some examples, resistors 365, 380, 456, 468, 546, 556, 646, 656 are connected in parallel with inductors 150, 155. In such examples, the resistors 365, 380, 456, 468, 546, 556, 646, 656 are intentionally selected to be lower than the equivalent resistances of the inductors 150, 155. For example, if inductor 150 has an equivalent resistance of sechshundertfünfundsechzig ohms (Ω) and inductors 155 have an equivalent resistance of six hundred eighty-eight ohms, resistors 365, 380, 456, 468, 546, 556, 646, 656 are selected to have a resistance of five hundred ohms. In such examples, the parallel connection of the resistors 365, 380, 456, 468, 546, 556, 646, 656 results in effective resistors having a difference of five ohms compared to the original twenty-two ohm mismatch between the equivalent resistors. In another example, if inductor 150 has an equivalent resistance of sechshundertfünfundsechzig ohms and inductor 155 has an equivalent resistance of six hundred eighty-eight ohms, resistors 365, 380, 456, 468, 546, 556, 646, 656 are selected to have a resistance of two hundred fifty ohms. In such examples, the parallel connection of the resistors 365, 380, 456, 468, 546, 556, 646, 656 results in effective resistors having a difference of about two ohms compared to the original twenty-two ohm mismatch between the equivalent resistors.Advantageously, the resistors 365, 380, 456, 468, 546, 556, 646, 656 reduce the mismatch between the equivalent resistances of the inductors 150, 155. Advantageously, reducing the mismatch between the equivalent resistances of the inductors 150, 155 reduces the mismatch between the currents of the oscillator circuit 140, 145, 305, 310, 404, 408, 504, 508, 604, 608. Advantageously, reducing the mismatch between the currents of the oscillator circuits 140, 145, 305, 310, 404, 408, 504, 508, 604, 608 reduces radiated emissions.The compensation control circuit 664, 700 of FIGS. 6 and 7 detects common mode noise through the P-side and M-side inductors. (Block 860). In some examples, the compensation control circuit 664, 700 detects common mode noise based on the voltage difference across the resistors 524, 624 of FIGS. 5 and 6. Such non-ideal common potential currents result from components of the implementation of the communication channels 110, 115 in a device, such as the device 200 of FIG. 2 For example, as described above in connection with FIG. 5, components of the device 200 form the ground path circuit 528. Advantageously, the resistors 524, 624 reduce the effects of the non-ideal currents by blocking the current path to the capacitors 544, 554, 644, 654 and the resistors 546, 556, 646, 656. Advantageously, the resistors 524, 624 allow the compensation control circuit 664, 700 to detect the non-ideal currents.The compensation control circuit 664, 700 determines whether there are common mode noise. (Block 865). In some examples, transistor 710 of FIG. 7 biases transistor 730, which conducts a current corresponding to the current from current source circuit 705 of FIG. 7. Similarly, transistor 740 of FIG. 7 biases transistor 755 of FIG. 7, which conducts a current corresponding to the current of current source circuit 735 of FIG. 7. The current of current source circuit 760 of FIG. 7 is designed to be greater than the current of current source circuit 735, thereby current source circuit 760 may pull down the control terminal of transistor 765. The current of the current source circuit 725 of FIG. 7 is designed to be larger than the current of the current source circuits 705, 735, whereby the current source circuit 725 can pull up the control voltage (V CTRL).In example operation, when a ground current across resistors 524, 624 increases the reference voltage (also referred to as a positive ground current), the reference voltage increases the voltage at the ground terminal of transistor 730. Transistor 730 begins to draw additional current, pulling down the control voltage.In such example cases, if a ground current across resistors 524, 624 reduces the reference voltage (also referred to as negative ground current), the reference voltage reduces the voltage at the control terminal of transistor 755. Transistor 755 begins to decrease additional current in response to an increase in the gate-source voltage of transistor 755. The additional current from transistor 755 pulls up the voltage at the control terminal of transistor 765. Transistor 765 begins to conduct current in response to the additional current from transistor 755. Transistor 765 pulls down the control voltage in response to conduction of current.Advantageously, the control voltage of the compensation control circuit 664, 700 is approximately equal to the supply voltage when the reference voltage is approximately equal to the common potential. Advantageously, the control voltage of the compensation control circuit 664, 700 is approximately equal to the common potential when the reference voltage is not equal to the common potential.If the compensation control circuit 664, 700 determines that there are no common mode noise (e.g., block 865 provides the result NO), control returns to block 805. In some examples, the resistors 524, 624 generate a reference voltage that is approximately equal to the common potential when non-ideal ground currents are not present. In such examples, the compensation control circuit 664, 700 turns off the current source circuit 668 to prevent a compensation current from being supplied.If the compensation control circuit 664, 700 determines that there are common mode noise (e.g., block 865 provides the result YES), the compensation control circuit 628 of FIG. 6 compensates for the common mode noise. (Block 870). In some examples, the compensation control circuit 664, 700 adjusts the control voltage in response to the resistors 524, 624 generating a reference voltage representing non-ideal ground currents. In such examples, the compensation control circuit 664, 700 turns on the current source circuit 668, which supplies current to the transistors 672, 676 of FIG. 6. Advantageously, transistors 672, 676 provide excess current to LC tank circuit 612, 616 to compensate for non-ideal ground currents. Advantageously, the radiation immunity is further improved by compensating the non-ideal ground currents. Control returns to block 805.Although example methods are described with reference to the flowchart illustrated in FIG. 8, many other methods may also be used in this description to implement the transmitter circuits 120, 300, 400, 500, 600 of FIGS. 1, 3, 4, 5 and 6, or more generally the communication channel 110 of FIG. 1. For example, the order of execution of the blocks may be changed, or some of the described blocks may be changed, eliminated, or combined. Likewise, additional operations may be included in the fabrication process before, between, or after the blocks shown in the illustrated examples.FIG. 9 is a timing diagram 900 of example operations of the transmitter circuits 120, 300, 400, 500, 600 of FIGS. 1, 3, 4, 5, and 6. The oscillator output signal 910 represents a modulated signal across the inductors 150, 155 of FIGS. 1, 3, 4, 5, and 6 when a logical one is to be transmitted across the isolation transformer 130 of FIG. 1. In the example of OOK modulation, the oscillator output signal 910 is a sinusoidal signal.The high power transistor mode 920 represents an operating state of the transistors 355, 444, 538, 640 of FIGS. 3, 4, 5, and 6 during operation to generate the oscillator output signal 910. The oscillation of the LC tank circuit 315, 412, 512, 612 of FIGS. 3, 4, 5, and 6 controls the operating state of the transistors 355, 444, 538, 640. The high power transistor mode 930 shows a portion of the operation of the transistors 350, 448, 540, 642 of FIGS. 3, 4, 5 and 6 during operation to generate the oscillator output signal 910. The oscillation of the LC tank circuit 320, 416, 516, 616 of FIGS. 3, 4, 5 and 6 controls the operating range of the transistors 350, 448, 540, 642.In the example of FIG. 9, the high-power transistor mode 920, 930 switches between a subthreshold mode ( 2) and a saturation mode ( 3). In the subthreshold mode, transistors 350, 355, 444, 448, 538, 540, 640, 642 conduct a relatively small and limited current. Advantageously, operation of transistors 350, 355, 444, 448, 538, 540, 640, 642 in the subthreshold and saturation modes allows relatively high forward currents. However, the relatively high transconductance and threshold voltage of transistors 350, 355, 444, 448, 538, 540, 640, 642 result in periods when only one of transistors 350, 355, 444, 448, 538, 540, 640, 642 is conducting current (e.g., both high power transistor modes 920, 930 are in subthreshold mode). As described further below, transistors 335, 340, 432, 436, 532, 534, 632, 634 advantageously reduce emissions by reducing end node variations (e.g., end noise) by continuing to conduct current throughout the oscillation of LC tank circuit 315, 320, 412, 416, 512, 516, 612, 616, reducing currents through transistors 350, 355, 444, 448, 538, 540, 640, 642.The low threshold voltage transistor mode 940 represents an operating state of the transistors 335, 432, 532, 632 of FIGS. 3, 4, 5, and 6 during operation to generate the oscillator output signal 910. The oscillation of the LC tank circuit 315, 412, 512, 612 controls the operating state of the transistors 335, 432, 532, 632. The low threshold voltage transistor mode 950 shows an operating state of the transistors 340, 436, 534, 634 of FIGS. 3, 4, 5, and 6 during operation to generate the oscillator output signal 910. The oscillation of the LC tank circuit 320, 416, 516, 616 controls the operating state of the transistors 340, 436, 534, 634.In the example of FIG. 9, the low threshold voltage transistors 940, 950 switch between a linear mode ( 1) and a saturation mode ( 2). In the linear mode and the saturation mode, transistors 335, 340, 432, 436, 532, 534, 632, 634 conduct current. Using low thresholds for switching transistors 335, 340, 432, 436, 532, 534, 632, 634 between the subthreshold and linear operating modes, oscillator circuit 305, 404, 504, 604 may advantageously continuously conduct current throughout the current swing. Advantageously, operating transistors 335, 340, 432, 436, 532, 534, 632, 634 in the subthreshold and linear modes avoids end node variations, reducing radiated emissions. However, the relatively low transconductance of transistors 335, 340, 432, 436, 532, 534, 632, 634 results in the current variations at weak corners being relatively small. Advantageously, the use of a combination of high power transistors and low threshold voltage transistors is advantageous which reduces radiated emissions and compensates for weak corner lift."Including" and "comprising" (as well as all forms and time forms thereof) are used herein as open terms. Thus, when any form of "include" or "comprise" (e.g., comprises, includes, comprises, including, including, having, etc.) is used in a claim as a preamble or within any claim enumeration, additional elements, terms, etc. may be present without departing from the scope of the corresponding claim or enumeration. For example, when the phrase "at least" is used in the preamble of a claim as a transition term, it is open to the same meaning as the terms "comprise" and "include.". The term "and / or," when used in a form such as A, B, and / or C, for example, refers to any combination or subset of A, B, C, such as (1) A alone, (2) B alone, (3) C alone, (4) A with B, (5) A with C, (6) B with C, or (7) A with B, and with C. As used herein in connection with describing structures, components, elements, objects, and things, the term "at least one of A and B" refers to implementations including any of the following elements: (1) at least one A, (2) at least one B or (3) at least one A and at least one B. Similarly, the term "at least one of A or B" as used herein in describing structures, components, elements, objects, and things refers to implementations including any of the following elements: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in describing the performance or execution of processes, instructions, actions, activities, etc., the term "at least one of A and B" refers to implementations including any of the following elements: (1) at least one A, (2) at least one B or (3) at least one A and at least one B. Similarly, the term "at least one of A or B" as used herein to describe the performance or execution of processes, instructions, actions, activities, etc., refers to implementations including any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.As used herein, singular references (e.g., "a", "first", "second", etc. do not exclude a plurality. The term "a" object, as used herein, refers to one or more of these objects. The terms "a", "one or more", and "at least one" are used interchangeably herein. Moreover, although individually listed, a variety of means, elements, or acts may be implemented, e.g., by the same entity or object. Although individual features are included in different examples or claims, these may possibly be combined, and inclusion in different examples or claims does not mean that a combination of features is not at least possible or advantageous.Unless otherwise indicated, the term "over" describes the relationship between two parts relative to the surface of the earth. A first part is located over a second part when the second part has at least a part between the surface of the earth and the first part. Similarly, a first part is "below" a second part when the first part is closer to the surface of the earth than the second part, as used herein. As mentioned, a first part may be above or below a second part, with one or more of the following features: other parts therebetween, without other parts therebetween, wherein the first and second parts contact each other, or without the first and second parts being in direct contact with each other.Using this patent, the indication that any part (e.g., a layer, film, region, or plate) is located (e.g., positioned on, disposed on, or formed on) another part in any manner, means that the referenced part is either in contact with the other part or that the referenced part is over the other part with one or more intervening parts therebetween.Using these terms (e.g., "attached," "coupled," "connected," and "joined"), intermediate elements between the elements to which at least one of the terms relates may include or relative movement between these elements, unless otherwise indicated. Thus, connection indications do not necessarily suggest that two elements are directly connected to each other or are in fixed relation to each other. The indication that any part is in "contact" with another part is defined herein as there being no intermediate part between the two parts.Unless expressly stated otherwise, descriptors such as "first," "second," "third," etc. are used herein without implying or otherwise indicating any meaning of priority, physical order, arrangement in a list or order in any manner; they are used merely as at least one of labels or arbitrary names to distinguish elements for ease of understanding the described examples. In some examples, the descriptor "first" may be used to refer to an element in the detailed description, while the same element in a claim may be referred to as a different descriptor such as "second" or "third.". In such cases, such descriptors are used only to identify those elements within the context of the specification (e.g., within a claim) that might otherwise have, e.g., the same name.As used herein, "about" and "about" modify their topics / values to detect the possible presence of deviations that occur in real applications. For example, "about" and "about" may modify dimensions that are not accurate in practice due to manufacturing tolerances or other deficiencies. For example, "about" and "about" may indicate that such dimensions may be within a tolerance range of + / - 10%, unless otherwise specified herein.As used herein, the term "in communication," including variations thereof, includes one or a combination of direct communication or indirect communication via one or more intervening components, and does not require direct physical (e.g., wired) communication or continuous communication, but also includes selective communication in at least one of the following cases: periodic intervals, scheduled intervals, aperiodic intervals, or one-time events.A "programmable circuit" is defined herein to include at least one of the following: (i) one or more special-purpose electrical circuits (e.g., an application specific circuit (ASIC)) structured to perform specific operation(s) and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), or (ii) one or more general-purpose semiconductor-based electrical circuits programmable with instructions to perform one or more specific functions or operations and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuits include programmable microprocessors such as central processing units (CPUs) that can execute first instructions to perform one or more operations or functions, and field programmable gates (FPGAs) that can be programmed with second instructions to at least design or structure the FPGAs to instantiate one or more operations or functions corresponding to the first instructions, graphics processing units (GPUs) that can execute first instructions to perform one or more operations or functions, digital signal processors (DSPs) that can execute first instructions to perform one or more operations or functions, XPUs, network processing units (NPUs), one or more microcontrollers that can execute first instructions to perform one or more operations or functions, or integrated circuits such as application specific integrated circuits (ASICs). For example, an XPU may be implemented by a heterogeneous computer system that includes multiple types of programmable circuits (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc.), and any combinations thereof), and orchestration technology (e.g., application programming interfaces (APIs) that may assign the computing tasks to those of the multiple types of programmable circuits that are suitable and available for performing the computing tasks.An integrated circuit / circuit arrangement is understood to mean one or more semiconductor packages containing one or more circuit elements such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit may be implemented as one or more of an ASIC, an FPGA, a chip, a microchip, a programmable circuit, a semiconductor substrate coupling multiple circuit elements, a system on chip (SoC), etc.In this specification, the term "couple" may include connections, communications, or signal paths that enable a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by direct connection; or (b) in a second example, device A is coupled to device B via an interposed component C, if the interposed component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.A device "configured" to perform a task or function may be configured (e.g., programmed or hardwired) by a manufacturer at the time of manufacture to perform the function or configured (or re-configured) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be through at least one of firmware or software programming of the device, at least one of a construction or layout of hardware components and connections of the device, or a combination thereof.In this document, the terms "port", "node", "connection", "pin", and "line" are used interchangeably. Unless specifically stated otherwise, these terms are generally used to refer to an interconnection or termination of a device, circuit element, integrated circuit, device, or other electronic or semiconductor component.In the specification and claims, the term "circuit" may include one or more circuits. A circuit or device described herein as including certain components may instead be configured to be coupled to those components to form the described circuit or device. For example, a structure described as one or more semiconductor elements (such as transistors), one or more passive elements (such as one or a combination of resistors, capacitors, or inductors), or one or more sources (such as voltage and / or current sources) may instead include only the semiconductor elements within a single physical device (i.e., include at least one semiconductor chip or integrated circuit (IC) package) and be configured to be coupled to at least some of the passive elements or the sources to form the described structure either at the time of manufacture or after the time of manufacture, for example, by at least one end user or a third party.The circuits described herein are reconfigurable in a manner that includes the exchanged components to provide functionality that at least partially matches the functionality available prior to the exchange of the components. Unless otherwise indicated, components represented as resistors generally represent any one or more elements connected at least in series or in parallel to provide an impedance represented by the represented resistor. For example, a resistor or capacitor, shown and described herein as a single component, may instead consist of multiple resistors or capacitors connected in parallel between the same nodes. For example, a resistor or capacitor, illustrated and described herein as a single component, may instead consist of multiple resistors or capacitors coupled in series between the same two nodes as the single resistor or capacitor. While certain elements of the described examples are included in an integrated circuit and other elements are external to the integrated circuit, additional or fewer features may be integrated into the integrated circuit in other example embodiments. Moreover, some or all of the features shown as being external to the integrated circuit may be included in the integrated circuit, and some features shown as being internal to the integrated circuit may be included external to the integrated circuit. The term "integrated circuit" refers to one or more circuits that (i) are integrated into / on a semiconductor substrate, (ii) are integrated into a single semiconductor package, (iii) are integrated into the same module, or (iv) are integrated into / on the same circuit board.The use of the term "ground" in the foregoing description includes at least one of the following: housing ground, ground, floating ground, virtual ground, digital ground, common ground, or any other form of ground connection that is applicable or suitable for the teachings of this specification. Unless otherwise indicated, "about", "about" or "substantially" means prior to a + / - 10 percent of the indicated value or, when the value is zero, an appropriate range of values around zero.Modifications of the described embodiments are possible and other embodiments are also conceivable within the scope of the claims.

Claims

An apparatus comprising: a first current source circuit having a terminal; a second current source circuit having a terminal; a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is coupled to the terminal of the first current source circuit and the first terminal of the first transistor; a third transistor having a first terminal, a second terminal, and a control terminal; a fourth transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the fourth transistor is coupled to the terminal of the second current source circuit and the first terminal of the third transistor; and an inductance circuit having a first terminal and a second terminal, wherein the first terminal of the inductance circuit is coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor, and the control terminal of the fourth transistor, wherein the second terminal of the inductance circuit is coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor, and the second terminal of the fourth transistor.The apparatus of claim 1, wherein the inductor circuit includes: a first inductor having a first terminal and a second terminal, the first terminal of the first inductor being coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor, and the control terminal of the fourth transistor; and a second inductor having a first terminal and a second terminal, the first terminal of the second inductor being coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor, and the second terminal of the fourth transistor, and the second terminal of the second inductor being coupled to the second terminal of the first inductor.The apparatus of claim 2, further comprising: a first resistor having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor, the control terminal of the fourth transistor, and the first terminal of the first inductor, the second terminal of the first resistor being coupled to the second terminal of the first inductor; and a second resistor having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor, the second terminal of the fourth transistor, and the first terminal of the second inductor, the second terminal of the second resistor being coupled to the second terminal of the second inductor.The apparatus of claim 3, further comprising a third resistor having a first terminal and a second terminal, wherein the first terminal of the third resistor is coupled to the second terminal of the first inductor and the second terminal of the second inductor, and the second terminal of the third resistor is coupled to the second terminal of the first resistor and the second terminal of the second resistor.The apparatus of claim 1, wherein the first current source circuit includes a fifth transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the fifth transistor is coupled to the first terminal of the first transistor and the first terminal of the second transistor, the second current source circuit includes a sixth transistor having a first terminal and a control terminal, the first terminal of the sixth transistor is coupled to the first terminal of the third transistor and the first terminal of the fourth transistor, the second terminal of the sixth transistor is coupled to the second terminal of the fifth transistor, the control terminal of the sixth transistor is coupled to the control terminal of the fifth transistor.The apparatus of claim 5, wherein the apparatus further comprises a bias circuit including: a third current source circuit having a terminal; a seventh transistor having a first terminal and a control terminal; and a switch circuit having a first terminal and a second terminal, wherein the first terminal of the switch circuit is coupled to the terminal of the third current source circuit, the first terminal of the seventh transistor, and the control terminal of the seventh transistor, the second terminal of the switch circuit is coupled to the control terminal of the fifth transistor and the control terminal of the sixth transistor.The apparatus of claim 1, wherein the first and second transistors have a first threshold voltage and a first transconductance, the second and third transistors have a second threshold voltage and a second transconductance, the first threshold voltage is greater than the second threshold voltage, and the first transconductance is greater than the second transconductance.The apparatus of claim 1, wherein the inductance circuit is a first inductance circuit, and the apparatus further comprises: a second inductance circuit electromagnetically coupled to the first inductance circuit; and a receiver circuit coupled to the second inductance circuit.An apparatus comprising: a first oscillator circuit having a first terminal, a second terminal, and including a first transistor having a first threshold voltage; a second oscillator circuit having a first terminal and a second terminal and including a second transistor having a second threshold voltage, the second threshold voltage being less than the first threshold voltage; a first resistor having a first terminal and a second terminal, the first terminal of the first resistor being coupled to the first terminal of the first oscillator circuit and the first terminal of the second oscillator circuit; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the second terminal of the first oscillator circuit and the second terminal of the second oscillator circuit; and a common terminal coupled to the second terminal of the first resistor and the second terminal of the second resistor.The apparatus of claim 9, further comprising: a first inductor having a first terminal and a second terminal, wherein the first terminal of the first inductor is coupled to the first terminal of the first oscillator circuit, the first terminal of the second oscillator circuit, and the first terminal of the first resistor; and a second inductor having a first terminal and a second terminal, wherein the first terminal of the second inductor is coupled to the second terminal of the first oscillator circuit, the second terminal of the second oscillator circuit, and the first terminal of the second resistor, the second terminal of the second inductor is coupled to the second terminal of the first resistor, the second terminal of the second resistor, the second terminal of the first inductor, and the common terminal.The apparatus of claim 9, wherein the first oscillator circuit includes: a current source circuit having a terminal; a first transistor having a first terminal, a second terminal, and a control terminal; and a second transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is coupled to the terminal of the current source circuit and the first terminal of the first transistor, the second terminal of the second transistor is coupled to the first terminal of the second oscillator circuit, the first terminal of the first resistor, and the control terminal of the first transistor, the control terminal of the second transistor is coupled to the second terminal of the second oscillator circuit, the first terminal of the second resistor, and the second terminal of the first transistor.The apparatus of claim 11, wherein the second oscillator circuit further comprises a third terminal, the current source circuit is a first current source circuit, the current source circuit is a third transistor having a first terminal and a control terminal, the first terminal of the third transistor is coupled to the first terminal of the first transistor and the first terminal of the second transistor, and the apparatus further comprises: a second current source circuit having a terminal; a fourth transistor having a first terminal and a control terminal; and a switch circuit having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the switch circuit is coupled to the terminal of the second current source circuit, the first terminal of the fourth transistor, and the control terminal of the fourth transistor, the second terminal of the switch circuit is coupled to the third terminal of the second oscillator circuit and the control terminal of the third transistor.The apparatus of claim 9, further comprising: a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the first terminal of the first oscillator circuit, the first terminal of the second oscillator circuit, and the first terminal of the first resistor; and a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the second terminal of the first oscillator circuit, the second terminal of the second oscillator circuit, and the first terminal of the second resistor, the second terminal of the second capacitor is coupled to the second terminal of the first inductor, the second terminal of the second resistor, the common terminal, and the second terminal of the first capacitor.The apparatus of claim 9, further comprising a capacitor having a first terminal and a second terminal, wherein the first terminal of the capacitor is coupled to the first terminal of the first oscillator circuit, the first terminal of the second oscillator circuit, and the first terminal of the first resistor, the second terminal of the capacitor is coupled to the second terminal of the first oscillator circuit, the second terminal of the second oscillator circuit, and the first terminal of the second resistor.The apparatus of claim 9, wherein the first inductance and the second inductance are a first inductance circuit, the apparatus further comprising: a second inductance circuit electromagnetically coupled to the first resistor; and a receiver circuit coupled to the second resistor.An apparatus, comprising: a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is coupled to the first terminal of the first transistor; a third transistor having a first terminal, a second terminal, and a control terminal; a fourth transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the fourth transistor is coupled to the first terminal of the third transistor; a first resistor having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor, and the control terminal of the fourth transistor; a second resistor having a first terminal and a second terminal, the first terminal of the second resistor being coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor, and the second terminal of the fourth transistor; and a common terminal coupled to the second terminal of the first resistor and the second terminal of the second resistor.The apparatus of claim 16, wherein the first transistor and the second transistor further have a first transconductance, the third transistor and the fourth transistor further have a second transconductance, and the first transconductance is greater than the second transconductance.The apparatus of claim 16, further comprising: a first inductor having a first terminal and a second terminal, the first terminal of the first inductor being coupled to the second terminal of the first transistor, the control terminal of the second transistor, the second terminal of the third transistor, the control terminal of the fourth transistor, and the first terminal of the first resistor; a second inductor having a first terminal and a second terminal, the first terminal of the second inductor being coupled to the control terminal of the first transistor, the second terminal of the second transistor, the control terminal of the third transistor, the second terminal of the fourth transistor, and the first terminal of the second resistor; a third resistor having a first terminal and a second terminal, wherein the first terminal of the third resistor is coupled to the second terminal of the first resistor and to the second terminal of the fourth resistor, the second terminal of the first resistor is coupled to the second terminal of the first inductor and to the second terminal of the second inductor.The apparatus of claim 18, further comprising: a third inductor having a first terminal and a second terminal, the third inductor being magnetically coupled to the first inductor and the second inductor; a receiver circuit having a first terminal and a second terminal, the first terminal of the receiver circuit being coupled to the third inductor and the second terminal of the receiver circuit being coupled to the second terminal of the third inductor.The apparatus of claim 16, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the first resistor, and the second resistor form a first communication channel, and the apparatus further comprises a second communication channel.

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