LAYERING METHOD, VACUUM PROCESSING DEVICE, MANUFACTURING METHOD OF A LIGHT-EMPLOYING SEMICONDUCTOR ELEMENT, LIGHT-EMPLOYING SEMICONDUCTOR ELEMENT AND LIGHTING DEVICE

Abstract

Layer formation process for growing a semiconductor thin film of a wurtzite structure by sputtering on a substrate (107) for epitaxial growth using a vacuum processing device comprising: a vacuum chamber (101) that is capable of being evacuated; a substrate holder (99) for supporting the substrate (107) for epitaxial growth; and a heater (103) that is able to heat the substrate (107) for epitaxial growth, which is held by the substrate holder (99), to a desired temperature, wherein the epitaxial layer of the semiconductor thin film of the wurtzite structure on the substrate (107) is formed for epitaxial growth in a state in which the substrate (107) is held away from a surface of the heater (103) facing the substrate (107) by the substrate holder (99) at a distance of 0.5 to 5 mm and the epitaxial layer has a +c polarity; and wherein the substrate holder (99) holds the substrate (107) for epitaxial growth in a state in which the substrate holder (99) is in contact with a surface of the substrate (107) for epitaxial growth on a lower side in a direction of gravity.

Description

Technical field

[0001] The present invention relates to a layer formation process, a vacuum processing device, a manufacturing process for a light-emitting semiconductor element, a light-emitting semiconductor element and a lighting device, and relates in particular to a layer formation process and a vacuum processing device capable of forming a high-quality epitaxial layer, as well as to a manufacturing process for a light-emitting semiconductor element, a light-emitting semiconductor element and a lighting device that utilize such an epitaxial layer. State of the art

[0002] Group III nitride semiconductors are compound semiconductor materials obtained as compounds of any of aluminum (Al) atoms, gallium (Ga) atoms and indium (In) atoms, which are group IIIB elements (hereafter simply III elements), and nitrogen (N) atoms, which is a group VB element (hereafter simply group V element), i.e., aluminum nitride (AlN), gallium nitride (GaN) and indium nitride (InN), as well as mixed crystals thereof (AlGaN, InGaN, InAlN, and InGaAlN). Such group III nitride semiconductors are materials expected to be used in optical elements such as light-emitting diodes (LEDs), laser diodes (LDs), photovoltaic solar cells (PVSCs), and photodiodes (PDs), which cover a wide wavelength range from the far ultraviolet to the visible and near-infrared regions, as well as in electronic elements such as...High electron mobility transistors (HEMTs) and metal oxide semiconductor field-effect transistors (MOSFETs) are used for applications at high frequency or high output.

[0003] In general, to implement applications like the one described above, it is necessary to epitaxially grow a group III nitride semiconductor thin film on a single-crystal substrate to obtain a high-quality single-crystal layer (an epitaxial layer) with few crystal defects. To obtain such an epitaxial layer, it is particularly desirable to perform homoepitaxial growth by using a substrate made of the same material as the epitaxial layer.

[0004] However, a single-crystal substrate made from a group III nitride semiconductor is very expensive and has therefore not been used except in a few applications. Instead, a single-crystal layer has been obtained by heteroepitaxial growth on a substrate of a different type of material, primarily sapphire (α-Al₂O₃) or silicon carbide (SiC). In particular, α-Al₂O₃ substrates are inexpensive, and those with a large area and high quality are readily available. Therefore, α-Al₂O₃ substrates are used in almost all commercially available LEDs that utilize group III nitride semiconductor thin films.

[0005] Meanwhile, the epitaxial growth of a group III nitride semiconductor thin film, as described above, utilizes metal-organic chemical evaporation deposition (MOCVD), which can provide an epitaxial layer with high quality and productivity. However, MOCVD has problems such as requiring high production costs and a tendency to develop particles, making it difficult to achieve high yields.

[0006] In contrast, sputtering has the characteristic of being able to save production costs and have a low probability of particle evolution. Accordingly, it may be possible to solve at least some of the problems mentioned above if at least part of the process for forming a group III nitride semiconductor thin film can be replaced by sputtering.

[0007] However, group III nitride semiconductor thin films produced by sputtering have a problem: their crystal qualities tend to be inferior to those produced by MOCVD. For example, NPL 1 discloses the crystallinity of a group III nitride semiconductor thin film produced using sputtering. According to the description in NPL 1, a c-axis oriented gallium nitride layer is epitaxially grown on an α-Al₂O₃-(0001) substrate using radiofrequency magnetron sputtering, and the full width at half maximum (FWHM) of the X-ray rocking curve (XRC) measurement at the GaN-(0002) plane is 35.1 arcmin (2016 arcsec). This value is significantly large compared to GaN layers on α-Al2O3 substrates currently available commercially, indicating that a tilt mosaic scattering measure, which will be described below, is large and the crystalline quality is poor.

[0008] In other words, in order to use sputtering as a method for forming a group III nitride semiconductor thin film, it is necessary to reduce the mosaic scattering of an epitaxial layer made of a group III nitride semiconductor so that a high crystalline quality can be achieved.

[0009] Meanwhile, there is an inclination mosaic scattering measure (offset of the crystalline orientation in a direction perpendicular to the substrate) and a twist mosaic scattering measure (offset of the crystalline orientation in an in-plane direction) as indices to indicate the crystalline quality of an epitaxial layer made of a group III nitride semiconductor. Fig. Figures 10A to 10D are schematic views of crystals made from a group III nitride semiconductor and grown epitaxially in the c-axis direction on an α-Al2O3-(0001) substrate. Fig. 10A to 10D are reference symbols; 901 is the α-Al2O3-(0001) substrate; 902 to 911 are the crystals made from the group III nitride semiconductor; c f the orientation of the c-axis of each crystal made from the group III nitride semiconductor; c s the orientation of the c-axis of the α-Al2O3-(0001) substrate; a f the orientation of the a-axis of each crystal made from the group III nitride semiconductor; and a s the orientation of the a-axis of the α-Al2O3-(0001) substrate.

[0010] Here is Fig. 10A a bird's-eye view showing how crystals made from the group III nitride semiconductor are formed while exhibiting an inclination mosaic scattering measure, and Fig. Figure 10B shows the cross-sectional structures of some of the crystals. As can be seen from these drawings, the orientation is c. fthe c-axis of each of the crystals 902, 903 and 904, which are made from the group III nitride semiconductor, is essentially parallel to the orientation c s the c-axis of the substrate, and is the most dominant crystalline orientation in the direction perpendicular to the substrate. On the other hand, each of the crystals 905 and 906, which are made from the group III nitride semiconductor, is formed such that the orientation c f its c-axis deviates slightly from the dominant crystalline orientation in the direction perpendicular to the substrate. Furthermore, Fig. 10C a bird's-eye view showing how crystals made from the group III nitride semiconductor are formed while exhibiting a twist mosaic scattering measure, and Fig. Figure 10D shows a top view of it. As can be seen from these drawings, the orientation is a fthe a-axis of each of the crystals 907, 908 and 909, which are made from the group III nitride semiconductor, the most dominant crystalline orientation in an in-plane direction, because their angles with respect to the orientation a s the a-axis of the α-Al2O3-(0001) substrate is all approximately 30°. On the other hand, each of the crystals 910 and 911, which are made from the group III nitride semiconductor, is formed such that the orientation a f its a-axis deviates slightly from the dominant crystalline orientation in the in-plane direction.

[0011] An offset from the most dominant crystalline orientation, as described above, is called a mosaic scattering measure. Specifically, an offset of a crystalline orientation in the direction perpendicular to the substrate is called a tilt mosaic scattering measure, while an offset of a crystalline orientation in an in-plane direction is called a twist mosaic scattering measure. It is known that tilt and twist mosaic scattering measures correlate with the density of defects formed within a group III nitride semiconductor thin film, such as screw dislocations and edge dislocations. By reducing the tilt and twist mosaic scattering measures, the defect density, as described above, can be reduced, thus making it easier to obtain a high-quality group III nitride semiconductor thin film.

[0012] Note that the levels of the inclination and twist mosaic scattering measures can be evaluated by checking the half-width of a diffraction peak obtained by XRC measurement on a specific grating plane (plane of symmetry) formed parallel to the substrate surface, or on a specific grating plane formed perpendicular to the substrate surface.

[0013] Note that Fig. Sections 10A to 10D and the description above intend to describe the inclination and twist mosaic scattering measure through a simple conceptual approach, rather than guaranteeing a specificity. For example, it is not always the case that the most dominant crystalline orientation described above in the direction perpendicular to the substrate and the most dominant crystalline orientation described above in the in-plane direction completely coincide with the c-axis and a-axis orientations of the α-Al₂O₃-(0001) substrate. Furthermore, it is not always the case that a gap between two crystals, as in Fig. 10D is shown, and it is formed. What is important is that the mosaic scatter measure indicates the degree of offset from a dominant crystalline orientation.

[0014] Meanwhile, group III nitride semiconductor thin films generally contain a +c polarity growth type and a -c polarity growth type, as in Fig. Figure 11 shows that a thin epitaxial layer is more likely to be obtained by +c polarity growth than by -c polarity growth. Therefore, it is desirable to obtain an epitaxial layer of +c polarity, in addition to using sputtering as a process for forming a group III nitride semiconductor thin film.

[0015] It should be noted that in this description, "+c-polarity" is an expression that denotes Al-polarity, Ga-polarity, and In-polarity for AIN, GaN, and InN, respectively. Furthermore, "-c-polarity" is an expression that denotes N-polarity.

[0016] Several approaches have been made to obtain a fine group III nitride semiconductor thin film (see PTLs 1 and 2).

[0017] PTL 1 discloses a method in which an α-Al2O3 substrate is subjected to plasma processing before a group III nitride semiconductor thin film (AlN in PTL 1) is formed on the substrate using sputtering, so that the group III nitride semiconductor thin film can achieve a high quality, i.e. a group III nitride semiconductor thin film which in particular has a significantly small tilt mosaic scattering measure can be obtained.

[0018] Furthermore, PTL 2 discloses a method for manufacturing a light-emitting element of a group III nitride semiconductor (a group III nitride compound semiconductor in PTL2), in which a buffer layer (an intermediate layer in PTL2) is formed from a group III nitride semiconductor (a group III nitride compound semiconductor in PTL 2) on a substrate by sputtering, and wherein an n-type semiconductor layer with a substrate layer, a light-emitting layer, and a p-type semiconductor layer are then successively stacked on the buffer layer made from the group III nitride semiconductor.

[0019] In PTL 2, the method for forming the buffer layer made of the group III nitride semiconductor is described, comprising: a preprocessing step of performing plasma processing on the substrate; and a post-preprocessing step of forming the buffer layer made of the group III nitride semiconductor by sputtering. Furthermore, in PTL 2, an α-Al₂O₃ substrate and AIN are used as preferred forms of the substrate and buffer layer made of the group III nitride semiconductor, respectively, and MOCVD is preferably used as the method for forming the n-type semiconductor layer, including the underlayer, the light-emitting layer, and the p-type semiconductor layer. Reference list patent literature PTL 1: International published patent application no. WO 2009 / 096 270 A1 PTL 2: Japanese published patent application no. JP 2008 - 109 084 A Nichtpatentliteratur

[0020] NPL 1: DAIGO, Y.; MUTSUKURA, N: Synthesis of epitaxial GaN single-crystalline film by ultra high vacuum r.f. magnetron sputtering method. In : Thin solid films, Vol. 483, 2005, No. 1-2, S. 38-43.

[0021] Relevant prior art can be found, for example, in US 2009 / 0039378 A1, which discloses a light-emitting layer, a light-emitting device, and a manufacturing method for the same. Furthermore, EP 1614775 A2 discloses a method for improving the surface flatness of a group III nitride crystal, a substrate for epitaxial growth, and a semiconductor device. Further relevant prior art can be found in US 2011 / 0198212 A1, which discloses a sputtering device and a manufacturing method for a semiconductor light-emitting element, and in the publication https: / / de.wikipedia.org / wiki / Galliumnitrid (accessed on May 28, 2011).2020), in the publication JP H09 - 202 969 A, which discloses a film-forming protective layer for a wafer heating element, and in DE 42 39 511 A1, which discloses a method and device for coating substrates. Summary of the invention: Technical problem

[0022] As is clear from the above, the technique described in PTL 1 is capable of reducing a tilt mosaic scattering measure and appears to be a promising technique. However, the technique still has problems to solve in order to form a higher-quality epitaxial layer using sputtering. In particular, it is desirable, because the +c polarity growth, as mentioned above, enables the formation of a fine epitaxial layer, to form a group III nitride semiconductor thin film with +c polarity across the entire substrate area. However, PTL 1 does not mention a specific device for obtaining the desired polarity. The present inventors carried out an experiment to confirm the technique disclosed in PTL 1. The result showed that the obtained group III nitride semiconductor thin film was indeed obtained as an epitaxial layer with low mosaic scattering measures, but +c and -c polarities existed in a mixed state.It is therefore clear that the technique disclosed in PTL 1 cannot in itself provide a group III nitride semiconductor thin film of +c polarity.

[0023] Furthermore, it cannot be said that the technique described in PTL 2 is satisfactory, due to the following point.

[0024] In particular, PTL 2 does not contain a description of a method for controlling the polarity of the buffer layer made of the group III nitride semiconductor and formed by sputtering. The present inventors conducted an experiment to confirm the technique disclosed in PTL 2. The result showed that the resulting light-emitting element was not capable of exhibiting good light emission characteristics.

[0025] The present inventors further investigated the light-emitting element obtained in the above confirmation experiment of PTL 2 and found that the buffer layer, formed from the group III nitride semiconductor and created by sputtering, was an epitaxial layer in which +c and -c polarities existed in a mixed state. More precisely, even when the n-type semiconductor layer with the substrate layer, the light-emitting layer, and the p-type semiconductor layer were sequentially stacked by MOCVD, a large number of defects, such as inversion domain boundaries, which can be attributed to the presence of mixed polarities in the buffer layer made from the group III nitride semiconductor, were formed within the element and reduced the light emission characteristics.In other words, it is clear that the technique disclosed in PTL 2 cannot on its own provide a group III nitride semiconductor thin film of +c polarity, and therefore cannot on its own provide a light-emitting element with good light emission characteristics.

[0026] As described above, it is difficult for the conventional techniques disclosed in PTL 1 and 2 to control the polarity of a group III nitride semiconductor thin film from within, i.e., to obtain an epitaxial layer of +c polarity from within, and therefore to obtain a more advantageous light-emitting element.

[0027] Furthermore, the present inventors concluded from the results of the confirmation experiments of PTL 1 and 2 described above that if the group III nitride semiconductor thin film produced using sputtering is an epitaxial layer in which mixed polarities exist, it is impossible to avoid a deterioration of element characteristics due to defects such as inversion domain boundaries formed within the element.

[0028] In view of the above problems, it is an object of the present invention to provide a layer formation process capable of producing an epitaxial layer of +c polarity by sputtering and a vacuum processing device suitable for this layer formation process, and furthermore to provide a manufacturing process for a light-emitting semiconductor element using this epitaxial layer, as well as a light-emitting semiconductor element and an exposure device produced by this manufacturing process.

[0029] The present inventors, through their intensive research, have perfected the present invention by obtaining a new insight that the polarity of an epitaxial layer is influenced by how a substrate is mounted on a substrate holder.

[0030] To achieve the above-described objective, a first aspect of the present invention is a layer formation process for growing a semiconductor thin film of a wurtzite structure by sputtering on a substrate for epitaxial growth according to the corresponding claims.

[0031] Furthermore, a second aspect of the present invention is a vacuum processing device according to the corresponding claims.

[0032] According to the present invention, an epitaxial group III nitride semiconductor layer with low tilt and twist mosaic scattering values ​​and also a +c polarity can be fabricated on an α-Al₂O₃ substrate using sputtering. Furthermore, the light emission characteristics of light-emitting elements such as LEDs and LDs can be improved using this epitaxial group III nitride semiconductor layer fabricated by sputtering. Brief description of the drawings Fig. Figure 1 is a schematic cross-sectional view of a radio frequency sputtering device according to an embodiment of the present invention. Fig. Figure 2 is a schematic cross-sectional view of a heater according to an embodiment of the present invention. Fig. Figure 3 is another schematic cross-sectional view of the heater according to an embodiment of the present invention. Fig. Figure 4A is a top view showing a configuration of an example of a heater electrode according to an embodiment of the present invention. Fig. Figure 4B is a top view showing a configuration of an example of the heater electrode according to an embodiment of the present invention. Fig. Figure 5 is a cross-sectional view of the heater and a substrate holding device according to an embodiment of the present invention. Fig. Figure 6 is a cross-sectional view showing a second configuration example of the substrate holding device according to an embodiment of the present invention. Fig. Figure 7 is a cross-sectional view showing a third configuration example of the substrate holding device according to an embodiment of the present invention. Fig. Figure 8 is a view showing a configuration example of a holder support section according to an embodiment of the present invention. Fig. Figure 9 is a cross-sectional view showing an example of the structure of an LED produced using an epitaxial layer formed by a layering process according to an embodiment of the present invention. Fig. Figure 10A is a schematic view showing inclination and twist mosaic scattering measures of crystals made from a group III nitride semiconductor. Fig. Figure 10B is a schematic view showing the inclination and twist mosaic scattering measures of the crystals made from the group III nitride semiconductor. Fig. Figure 10C is a schematic view showing inclination and twist mosaic scattering measures of crystals made from the group III nitride semiconductor. Fig. Figure 10D is a schematic view showing the inclination and twist mosaic scattering measures of the crystals made from the group III nitride semiconductor. Fig. Figure 11 is a schematic view showing +c polarity and -c polarity in a group III nitride semiconductor thin film. Fig. Figure 12 is a diagram showing a measurement result of a CAICISS measurement of a group III nitride semiconductor thin film according to an embodiment of the present invention. Description of an exemplary embodiment

[0033] An embodiment of the present invention will now be described in detail with reference to the drawings. Note that in the drawings described below, items having the same function are designated by the same reference numeral, and any overlapping descriptions are omitted. (Example of implementation)

[0034] A key feature of the present invention is that the semiconductor layer with a wurtzite structure is formed in a state where the substrate, heated by a heater, is held at a predetermined distance from the heater's surface facing the substrate. This occurs when a semiconductor thin film with a wurtzite structure (e.g., a group III nitride semiconductor thin film or a ZnO-based semiconductor thin film with a wurtzite structure) is epitaxially grown on a substrate for epitaxial growth (e.g., a substrate with a nonpolar surface (to be described later), such as an α-Al₂O₃ substrate, a Si substrate, or a Ge substrate, and a substrate with a polar surface (to be described later), such as a 4H-SiC substrate, by radio frequency sputtering. The present invention is further described with reference to the drawings.It should be noted that the components and arrangements described below are merely examples that embody the invention and do not limit the present invention. They can, of course, be modified in various ways based on the essence of the present invention.

[0035] Fig. Figures 1 to 9 are views of a vacuum processing device (radio frequency sputtering device) according to an embodiment of the present invention and of the structure of an LED formed using an epitaxial layer according to an embodiment of the present invention. Fig. Figure 1 is a schematic cross-sectional view of the radio frequency sputtering device. Fig. Figure 2 is a schematic cross-sectional view of a heater. Fig. Figure 3 is a schematic cross-sectional view of another example of the heater. Fig. 4A and Fig. 4B are views showing configuration examples of a heater electrode. Fig. Figure 5 is a cross-sectional view of the heater and a substrate holding device. Fig. Figure 6 is a view showing a second configuration example of the substrate holding device. Fig. Figure 7 is a view showing a third configuration example of the substrate holding device. Fig. Figure 8 is an enlarged view of a section showing the substrate holding device. Fig. Figure 9 is a cross-sectional view of an example of the LED structure fabricated using the formed epitaxial layer. Note that only certain components are illustrated to avoid complicating the drawings.

[0036] Fig. Figure 1 is a schematic configuration diagram of an example of the sputtering device used to form a group III nitride semiconductor thin film according to the present invention. Fig. Reference numeral 1, which shows a sputtering device S, denotes: reference numeral 101 a vacuum chamber; reference numeral 102 a target electrode; reference numeral 99 a substrate holder; reference numeral 103 the heater; reference numeral 503 the substrate holding device; reference numeral 105 a target shield; reference numeral 106 a radio frequency voltage source; reference numeral 107 a substrate; reference numeral 108 a target; reference numeral 109 a gas introduction mechanism; reference numeral 110 an exhaust mechanism; reference numeral 112 a reflector; reference numeral 113 an insulating component; reference numeral 114 a chamber shield; reference numeral 115 a magnet assembly; reference numeral 116 a target shield holding mechanism; and reference numeral 203 the heater electrode. Furthermore, reference numeral 550 is a holder support section for supporting the substrate holding device 503.

[0037] The vacuum chamber 101 is constructed from components made of a metal such as stainless steel or an aluminum alloy and is electrically grounded. Furthermore, the vacuum chamber 101 prevents or reduces a rise in temperature on its wall surface by means of a cooling mechanism (not illustrated). The vacuum chamber 101 is also connected to a gas inlet mechanism 109 with a mass flow controller (not illustrated) intervening, and to the outlet mechanism 110 with a variable flow valve (not illustrated) intervening.

[0038] The target shield 105 is attached to the vacuum chamber 101 with the target shield retention mechanism 116 in between. The target shield retention mechanism 116 and the target shield 105 can be components made of a metal such as stainless steel or an aluminum alloy, and are at the same DC potential as the vacuum chamber 101.

[0039] The target electrode 102 is attached to the vacuum chamber 101 with the insulating component 113 interposed. Furthermore, the target 108 is attached to the target electrode 102, and the target electrode 102 is connected to the radio frequency voltage source 106 with an interposed matching box (not illustrated). The target 108 can be attached directly to the target electrode 102, or it can be attached to the target electrode 102 with an interposed connecting plate (not illustrated), which may be made of a metal component such as copper (Cu).

[0040] Furthermore, the target 108 can be a metal target containing at least one of Al, Ga, and In, or a nitrogen target containing at least one of the above Group III elements. The target electrode 102 incorporates a cooling mechanism (not illustrated) to prevent an increase in the temperature of the target 108. The magnet unit 115 is also located within the target electrode 102. For industrial applications, a radio frequency voltage source 106 operating at 13.56 MHz is convenient. However, it is possible to use one at a different frequency, to superimpose a direct current onto the radio frequency waves, or to use them in pulsed form.

[0041] The chamber shield 114 is attached to the vacuum chamber 101 and prevents a layer from adhering to the vacuum chamber 101 during layer formation.

[0042] The substrate holder 99 comprises the heater 103, the substrate holding device 503, and the reflector 112 as its main components. The heater 103 has the built-in heater electrode 203. The substrate holding device 503 is constructed of an insulating component, at least in one section of which is in contact with the substrate, and is fixed by the reflector 112, a shaft (not illustrated), or the like. By holding the substrate 107 on the substrate holding device 503, the substrate 107 can be held with a predetermined gap between the substrate 107 and a surface P of the heater 103 facing the substrate. Note that specific examples of the substrate holding device 503 are described later.

[0043] In this embodiment, as in Fig. As shown in Figure 1, in the vacuum chamber 101, the target electrode 102, on which the target can be positioned, is arranged on an upper side in the direction of gravity, while the substrate holder is arranged below the target electrode 102 in the direction of gravity. This allows the substrate holding device 503 to hold the substrate 107 by means of gravity. Accordingly, by simply mounting the substrate 107 on the substrate support section (reference numeral 503a or similar, as mentioned later) of the substrate holding device 503, the entire surface of the substrate 107 can be exposed to the target 108 side, and epitaxial layering can therefore be carried out over the entire surface of the substrate 107.

[0044] This embodiment shows an example in which the target electrode 102 is arranged on an upper side in the direction of gravity in the vacuum chamber 101, and the substrate holder 99 is arranged below the target electrode in the direction of gravity. Note, however, that it is possible to arrange the substrate holder 99 on an upper side in the direction of gravity in the vacuum chamber 101 and to arrange the target electrode 102 below the substrate holder 99 in the direction of gravity (not claimed).

[0045] Fig. 2 and Fig. Figure 3 shows structural examples of the heater 103. Fig. Reference 201 is a base; reference 202 is a base coating; reference 203 is the heater electrode; reference 204 is a back coating; and reference 205 is an overcoat. Note that reference P is the upper surface (the surface facing the substrate) of the holder 103, which faces the substrate held by the substrate holding device 503 described later.

[0046] The base 201 is graphite. The heater electrode 203 and the back coating 204 are pyrolytic graphite (PG). The base coating 202 and the top coating 205 are pyrolytic boron nitride (PBN). Note that the base coating 202 and the top coating 205, which are made of PBN, are high-resistance materials.

[0047] With the configuration described above, the heater can emit 103 infrared rays in a predetermined wavelength range, thereby heating the substrate to a desired temperature.

[0048] Fig. Figure 3 is another configuration example of the heater. Reference numeral 301 is a base; reference numeral 302 is a heater electrode; reference numeral 303 is a backside coating; and reference numeral 304 is an overcoat. The base 301 is boron nitride (BN). The heater electrode 302 and the backside coating 303 are PG. The overcoat 304 is PBN. Note that the base 301, which is made of BN, and the overcoat 304, which is made of PBN, are high-resistance materials.

[0049] The materials described above, which constitute the heater, are preferred for their ability to heat an α-Al₂O₃ substrate with higher efficiency than conventional infrared lamps. It should be noted, however, that the materials are not limited to this, as long as they can heat an α-Al₂O₃ substrate to a predetermined temperature.

[0050] Fig. 4A and Fig. Figure 4B shows configuration examples (views) of the heater electrode 203 (or 302).

[0051] The heater electrode 203 (or 302), which is located in the heater 103, has an electrode pattern as described in Fig. 4A or Fig. 4B shown. By connecting a voltage source (not illustrated) to this electrode pattern and applying a DC or AC voltage to it, a current flows through the heater electrode 203 (or 302), and the generated Joule heat accordingly heats the heater 103. The infrared rays emitted by the heater 103 heat the substrate.

[0052] Note that the electrode pattern does not correspond to the one in Fig. 4A and Fig. The limitations shown in 4B are significant. However, by using an electrode pattern as shown in Fig. 4A or Fig. As shown in Figure 4B, the heat is applied uniformly to the entire surface of the substrate 107. For this reason, it is desirable to use an electrode pattern that can apply heat to the entire surface of the substrate as uniformly as possible. However, although the present invention can use an electrode pattern that can apply heat uniformly to the substrate, it is important that an epitaxial layer of +c polarity can be formed, and the shape of the electrode pattern is not a crucial consideration. Therefore, it is unnecessary to state in this embodiment that the electrode pattern is not limited to those shown in Figure 4B. Fig. 4A and Fig. 4B are shown, and that this embodiment can use any electrode pattern.

[0053] In each of the structural examples of the stoker 103, which are in Fig. 2 and Fig. As shown in Figure 3, the surface of the heater 103 facing the substrate, designated by the reference numeral P, is the surface on the side where the heater electrode 203 or 302 is formed with a pattern as shown in Figure 3. Fig. 4A or Fig. 4B shown. However, the heater can have a structure in which the heater 103, which is in Fig. 2 or Fig. Figure 3 is shown, turned from top to bottom, i.e., the surface opposite the surface marked with reference P in Fig. 2 and Fig. The area marked 3 can be considered the surface facing the substrate. In this case, the substrate is heated through the back coating 204 or 303. This can reduce the energy efficiency of the substrate heating, even though the back coating 204 or 303 is designed to enable uniform heating, thus providing the beneficial effect of uniform heat application to the substrate.

[0054] Fig. Figure 5 is a cross-sectional view of the heater and the substrate holding device according to an embodiment of the present invention (first configuration example). Fig. Reference numeral 5 is the heater (reference numeral 103); reference numeral 203 is the heater electrode; reference numeral 503 is the substrate holding device; reference numeral 504 is a substrate (the support support section 550 is not illustrated). The substrate holding device 503 is generally an annular component with a uniform cross-section and includes the substrate support section 503a, which is formed from an insulating component that comes into contact with an outer edge section of the substrate and supports it from below (from a lower side in the direction of gravity, i.e., from the heater 103 side). The substrate support section 503a is mounted with a gap d1 between itself and the substrate-facing surface P of the heater 103. Furthermore, a gap d2 is provided between the substrate 504 and the substrate-facing surface P of the heater 103.As described above, the substrate support section 503a is provided such that the substrate 504 is positioned with a predetermined gap (a predetermined section, e.g., d2) between itself and the surface P of the heater 103 facing the substrate, in a state where the substrate 504 is supported by the substrate support section 503a. A gap of 0.4 mm or larger is desirablely used as gap d1 (second predetermined distance), and a gap of 0.5 mm or larger is desirablely used as gap d2.

[0055] In a case where the gap d1 is less than 0.4 mm, a mixed-polarity group III nitride semiconductor thin film is likely to form in an outer peripheral section. In a case where the gap d2 is less than 0.5 mm, a mixed-polarity group III nitride semiconductor thin film is formed across the entire substrate area. Therefore, these cases are not preferred.

[0056] As described above, a gap d1 of 0.4 mm or greater is provided between the lower surface of the substrate holding device 503 and the substrate-facing surface P of the heater 103. Similarly, a gap d2 of 0.5 mm or greater is provided between the substrate 504 and the substrate-facing surface P of the heater 103.

[0057] Note that it is not preferred to make the gaps d1 and d2 too large, because the efficiency of heating the substrate 504 with the heater 103 decreases as the gaps d1 and d2 increase. Furthermore, if the gaps d1 and d2, and in particular gap d2, are made too large, plasma may be generated in a space between the heater 103 and the substrate 504, which may result in a loss of the advantageous effect of the present invention. Accordingly, the gaps d1 and d2 are preferably set to 5 mm or less, and even more preferably to 2 mm or less.

[0058] Other configuration examples of the substrate holding device are given with reference to Fig. 6 and Fig. 7 described.

[0059] Fig. Figure 6 is a second configuration example of the substrate holding device. Fig. Reference numeral 6 is 504, the substrate, and reference numeral 603 is the substrate holding device (the holder support section 550 is not illustrated). The substrate holding device 603 is generally an annular component with a uniform cross-section and comprises: a substrate support section 603a, which is formed from an insulating component for holding the substrate 504 from below; and a mounting section 603b, which is integral with the outer periphery of the substrate support section 603a. In a state in which the mounting section 603b is arranged on the surface P of the heater 103 facing the substrate, a gap d1 is provided between the rear of the substrate support section 603a (the side facing the heater 103) and the surface P of the heater 103 facing the substrate, and a gap d2 is provided between the substrate 504 and the surface P of the heater 103 facing the substrate.A gap of 0.4 mm or larger is desirable for d1, and 0.5 mm or larger is desirable for d2.

[0060] Fig. Figure 7 shows a third configuration example of the substrate holding device. Fig. Reference numeral 7 is 504, the substrate, and reference numeral 703, the substrate holding device. The substrate holding device 703 is generally an annular component with a uniform cross-section and comprises a first substrate holding unit 704 and a second substrate holding unit 705. The second substrate holding unit 705 carries an outer peripheral section of the first substrate holding unit 704. The second substrate holding unit 705 is formed from a conductive ring and is connected to a radio frequency voltage source (not illustrated) with an intermediate matching box (not illustrated). This allows a plasma to be generated near the substrate by supplying radio frequency power to the second substrate holding unit 705 in an atmosphere containing a gas such as N2 or a noble gas, and this plasma can be used to perform a surface treatment of the substrate.

[0061] Furthermore, the first substrate holding unit 704 includes a substrate support section 704a, which is formed from an insulating component to support the substrate 504 from below. A gap d1 is provided between the rear of the substrate support section 704a and the surface P of the heater 103 facing the substrate, and a gap d2 is provided between the substrate 504 and the surface P of the heater 103 facing the substrate. A gap of 0.4 mm or larger is desirable for gap d1, and a gap of 0.5 mm or larger is desirable for gap d2.

[0062] While here in Fig. 7. A support section 750 is not illustrated; its enlarged view is shown in Fig. 8 shown. Fig. Figure 8 is an enlarged view of the support section (holder support section 750) for the substrate holding device 703. The holder support section 750 has a structure that supports the second substrate holding unit 705 and contains a conductive component 751, an insulating component 753, and a stainless steel tube 755 as its main components. The conductive component 751 is electrically connected to a radio frequency voltage source 757, which is provided outside the vacuum chamber 101, and to the second substrate holding unit 705. This allows radio frequency power to be supplied to the second substrate holding unit 705 from the radio frequency voltage source 757 through the conductive component 751. The conductive component 751 is covered by the insulating component 753 and the stainless steel tube 755. Furthermore, electrical insulation between the conductive component 751 and the vacuum chamber 101 is also ensured by the insulating component 753.As described above, the holder support section 750 is configured to support the second substrate holding unit 705, and also to supply power to the second substrate holding unit 705.

[0063] The holder carrying section 750, which is in Fig. Figure 8 shows a structure that includes a conductive component 751 for supplying radio frequency power to the second substrate holding unit 705. However, note that the conductive component 751 is not intended for the holder support section 550 (see Figure 8). Fig. 1) is required, which carries the substrate holding device 503 or 603.

[0064] In the first to third configuration examples ( Fig. In Figures 5 to 7 of the substrate holding device, ring-shaped insulating components are used as the substrate support sections 503a, 603a, and 704a. It should be noted, however, that they do not have to be ring-shaped. For example, each of the substrate support sections 503a, 603a, and 704a can be a plate-shaped insulating component without an opening. In this case, the substrate support section is, of course, also arranged with a predetermined gap (e.g., d1) between itself and the heater 103. Nevertheless, forming the substrate support section in a ring shape, as in this embodiment, allows the substrate 107 to be exposed to the heater 103, while the substrate 107 and the surface P of the heater 103 facing the substrate are arranged at a predetermined distance between them. This enables efficient heating of the substrate 107. Therefore, forming the substrate support section in a ring shape is a preferred mode.

[0065] Furthermore, quartz, sapphire, aluminum oxide or similar materials can be used, for example, as the insulating components that serve as the substrate support sections 503a, 603a and 704a.

[0066] The structure of the heater 103 can be any of the ones in Fig. 2 and Fig. The structures shown in Figure 3, or a structure obtained by folding any of these structures from top to bottom, can be used. Some other structures may be used instead, because the heater structure is not essential to this embodiment. It is even possible to use a heater structure in which the heater electrode is arranged on the surface P of the heater facing the substrate, with nothing above it.

[0067] The structure of each of the substrate holding devices 503, 603 and 703 can be any of the in Fig. 5, Fig. 6 and Fig. The structures shown in Figure 7 can be used, or a substrate holding device with a different structure can be used instead. What is important in this embodiment is that the substrate is positioned at a predetermined distance from the heater face P, which faces the substrate, during the formation of a group III nitride semiconductor thin film. In this embodiment, there is a gap in a space between the heater face P and the substrate, but it is assumed that a similar advantageous effect can be achieved even if an insulating component is inserted into this gap. Accordingly, it is possible to use a substrate holding device with any structure other than those shown in Figure 7. Fig. 5 to 7 is acceptable as long as it is a structure that allows the substrate to be positioned at a predetermined distance from the surface P of the heater facing the substrate. For example, in a device containing a mechanism configured to handle a substrate by moving lifting pins up and down, the lifting pins can be used to hold the substrate in a position with a predetermined gap between the substrate and the surface P of the heater 103 facing the substrate. However, in this case, the layer enters a gap between the outer periphery of the substrate and the heater 103 and adheres to the surface P of the heater 103 facing the substrate, causing the radiation from the heater 103 to change over time. Therefore, this embodiment is a desirable mode.

[0068] Furthermore, prior to the formation of a group III nitride semiconductor thin layer, the radio frequency voltage source 757, which is connected to the in Fig. The second substrate holding unit 705 shown in Figure 7 (the third configuration example) is connected to this unit to generate a plasma near the substrate and remove components such as moisture and hydrocarbons adhering to the substrate surface. Furthermore, any of the heater electrode structures shown in Figure 7 can be used. Fig. 4A and Fig. The pattern shown in 4B can be used, or another structural pattern can be used, as mentioned above.

[0069] The structure in Fig. 6 is preferred over the structure in Fig. 5 is used, due to its simplicity, to accurately control the gaps d1 and d2 between the structure and the surface P of the heater 103 facing the substrate. Furthermore, it is possible, if the structure in Fig. 7 is used to remove components such as moisture and hydrocarbons adhering to the substrate surface, thereby improving the reproducibility of the group III nitride semiconductor thin film with respect to crystallinity. Therefore, the structure in Fig. 7 is preferred.

[0070] Fig. Figure 9 is an example of the cross-sectional structure of a light-emitting diode (LED) that was fabricated as a light-emitting semiconductor element using a method for producing a group III nitride semiconductor thin film according to an embodiment of the present invention. Fig. Reference numeral 801 is an α-Al2O2 substrate; reference numeral 802 is a buffer layer; reference numeral 803 is a group III nitride semiconductor interlayer; reference numeral 804 is an n-type group III nitride semiconductor layer; reference numeral 805 is an active group III nitride semiconductor layer; reference numeral 806 is a p-type group III nitride semiconductor layer; reference numeral 807 is an n-type electrode; reference numeral 808 is a p-type junction electrode; reference numeral 809 is a protective layer; and reference numeral 810 is a translucent electrode.

[0071] AlN, AlGaN, or GaN are preferably used as a group III nitride semiconductor with a wurtzite structure as the material contained in the buffer layer 802. AlGaN, GaN, and InGaN are preferably used as the materials in the group III nitride semiconductor intermediate layer 803, the n-type group III nitride semiconductor layer 804, the active group III nitride semiconductor layer 805, and the p-type group III nitride semiconductor layer 806. The material of the n-type group III nitride semiconductor layer 804 is preferably doped with a small amount of silicon (Si) or germanium. The material of the p-type group III nitride semiconductor layer 806 is preferably doped with a small amount of magnesium (Mg) or zinc (Zn). In this way, their electrical conductivity can be controlled.Furthermore, it is desirable that the active group III nitride semiconductor layer 805 forms a multiple quantum well (MQW) structure with some of the materials described above. Additionally, the light-emitting diode (LED) described above can be used to form a lighting device.

[0072] A method for forming a group III nitride semiconductor thin film with a wurtzite structure (an epitaxial formation method) using the sputtering device according to an embodiment of the present invention is described below with reference to the drawings. In this embodiment, an epitaxial layer is formed on an α-Al₂O₃ substrate by a method comprising the following first to fourth steps. It goes without saying that, while this embodiment describes a method for forming a group III nitride semiconductor thin film with a wurtzite structure, the layer formation method according to this embodiment can also be used to form a ZnO-based semiconductor thin film on an α-Al₂O₃ substrate.

[0073] First, in the initial step (substrate transport step), the substrate 107 is introduced into the vacuum chamber 101, which is maintained at a predetermined pressure by the outlet mechanism 110. In this step, a treatment robot (not illustrated) transports the substrate (α-Al₂O₃ substrate) 107 to the upper side of the heater 103 and mounts the substrate 107 onto the lifting pins (not illustrated) protruding from the heater 103 (substrate transport). The lifting pins holding the substrate 107 are then lowered, so that the substrate 107 is positioned on the substrate holding device 103. Subsequently, in the second step (substrate heating step), the substrate 107 is maintained at a predetermined temperature by controlling the voltage applied to the heater electrodes 203 located within the heater 103.In this step, a (not illustrated) thermocouple located in the heater 103 is used to measure the temperature of the heater 103, or a (not illustrated) pyrometer is used in the vacuum chamber 101 to monitor the temperature of the heater 103, and the temperature is controlled to the predetermined temperature.

[0074] Subsequently, in the third step, a gas consisting of N2 gas, a noble gas, or a mixed gas of N2 gas and a noble gas is introduced into the vacuum chamber 101 through the gas inlet mechanism 109, and the pressure in the vacuum chamber 101 is set to a predetermined pressure by the mass flow controller (not illustrated) and the variable flow valve (not illustrated).

[0075] Finally, in the fourth step (layer formation step), radio frequency power is applied from the radio frequency voltage source 106 to generate a radio frequency plasma in front of the target 108. Ions in the plasma sputter the element constituting the target 108, thereby forming a group III nitride semiconductor thin film. Note that if a metal target is used as the target 108, an N₂ gas or a mixture of an N₂ gas and a noble gas is preferably used as the process gas. In this case, the group III element constituting the metal target is nitrided in at least one of the regions that comprise the surface of the target 108, the surface of the substrate 107, and the space between the target 108 and the substrate 107. As a result, a group III nitride semiconductor thin film is formed on the substrate.

[0076] On the other hand, in one case where a nitride target is used, one of a nitrogen gas, a noble gas, or a mixed gas of nitrogen and a noble gas is preferably employed. Sputtered particles in the form of atoms or nitride molecules are then emitted from the target surface. The group III element emitted from the target surface in the form of atoms is nitrided in at least one of the regions that comprise the surface of target 108, the surface of substrate 107, and the space between target 108 and substrate 107. As a result, a group III nitride semiconductor thin film is formed on the substrate. Furthermore, most of the nitride molecules emitted from the target surface reach the substrate and form a group III nitride semiconductor thin film.

[0077] Some of the nitride molecules emitted from the target surface may dissociate at the surface of substrate 107 or in the space between target 108 and substrate 107. However, the group III element produced by the dissociation is re-nitrated, at least at the surface of substrate 107 or in the space between target 108 and substrate 107, forming a group III nitride semiconductor thin film.

[0078] The predetermined pressure in the first step is preferably below 5×10 -4 Pa. If the predetermined pressure is at or above 5×10 -4If Pa is used, impurities such as oxygen are incorporated into the group III nitride semiconductor thin film, making it difficult to obtain a fine epitaxial layer. Furthermore, the temperature of heater 103 is not particularly restricted in the first step, but with a view to productivity, it is desirable to set it to a temperature that helps maintain a substrate temperature used in film formation.

[0079] The predetermined temperature in the second step is preferably adjusted to a layer formation temperature in the fourth step for productivity purposes. Similarly, the predetermined pressure in the third step is preferably adjusted to a layer formation pressure in the fourth step for productivity purposes. The timing for performing the second and third steps can be reversed, or the steps can be performed concurrently. Furthermore, the temperature set in the second step and the pressure set in the third step are preferably maintained at least until the start of the fourth step for productivity purposes.

[0080] The substrate temperature during the fourth step is preferably set to a range between 100 and 1200 °C, and even more preferably to a range between 400 and 1000 °C. Below 100 °C, a layer is likely to form in which amorphous structures exist in a mixed state. Above 1200 °C, no layer is formed at all, or if a layer is formed, it is likely to be an epitaxial layer with many defects attributable to thermal stress. Furthermore, the layer formation pressure is preferably set to a range of 0.1 to 100 mTorr (1.33 × 10⁻⁶). -2 up to 1.33×10 1 Pa) and ideally in a range of 1.0 to 10 mTorr (1.33×10 -1 (up to 1.33 Pa).

[0081] In a case of less than 0.1 mTorr (1.33×10 -2At pressures above 100 mTorr (1.33 × 10⁻⁶ Pa), it is likely that high-energy particles will fall onto the substrate surface, making it difficult to obtain a thin group III nitride semiconductor film. 1 At Pa), the layer formation rate is extremely low. Therefore, these cases are not preferred. At the start of the fourth step, it is possible to temporarily increase the pressure in vacuum chamber 101 to the layer formation pressure or higher to facilitate plasma generation. In this case, the layer formation pressure can be increased by temporarily increasing the flow rate of at least one of the gases in the process gas. Alternatively, the layer formation pressure can be increased by temporarily reducing the opening degree of the variable flow valve (not illustrated).

[0082] Furthermore, before the first step, steps of transporting the substrate 107 to a preprocessing chamber (not illustrated) and performing a heat treatment or plasma treatment on the substrate at a temperature equal to or above the layer formation temperature can of course take place.

[0083] Examples of an epitaxial layer of a group III nitride semiconductor thin film formed by the method according to the exemplary embodiment include the buffer layer 802, the group III nitride semiconductor intermediate layer 803, the n-type group III nitride semiconductor layer 804, the active group III nitride semiconductor layer 805, and the p-type group III nitride semiconductor layer 806, which are in Fig. Figure 9 shows that all these layers can be produced using the sputtering device (the layer formation process) according to this embodiment, or some particular layer(s) can be produced using the sputtering device (the layer formation process) according to this embodiment.

[0084] For example, one method includes, as a first example, a process for the LED element in Fig. 9. The buffer layer 802 is produced using the sputtering device (of the layer formation process) according to this embodiment, and then the group III nitride semiconductor intermediate layer 803, the n-type group III nitride semiconductor layer 804, the active group III nitride semiconductor layer 805, and the p-type group III nitride semiconductor layer 806 are successively stacked using MOCVD to produce an epitaxial wafer.

[0085] Furthermore, as a second example, a method includes fabricating the buffer layer 802 and the group III nitride semiconductor intermediate layer 803 using the sputtering device (of the layer formation method) according to this embodiment, and then successively stacking the n-type group III nitride semiconductor layer 804, the active group III nitride semiconductor layer 805 and the p-type group III nitride semiconductor layer 806 using MOCVD to produce an epitaxial wafer.

[0086] As a third example, a method includes fabricating the buffer layer 802, the group III nitride semiconductor intermediate layer 803 and the n-type group III nitride semiconductor layer 804 using the sputtering device (of the layering method) according to this embodiment, and then successively stacking the active group III nitride semiconductor layer 805 and the p-type group III nitride semiconductor layer 806 using MOCVD to fabricate an epitaxial wafer.

[0087] As a fourth example, a method includes fabricating the buffer layer 802, the group III nitride semiconductor intermediate layer 803, the n-type group III nitride semiconductor layer 804 and the active group III nitride semiconductor layer 805 using the sputtering device (of the layering method) according to this embodiment and then fabricating the p-type group III nitride semiconductor layer 806 using MOCVD to produce an epitaxial wafer.

[0088] As a fifth example, a method includes fabricating the buffer layer 802, the group III nitride semiconductor intermediate layer 803, the n-type group III nitride semiconductor layer 804, the active group III nitride semiconductor layer 805 and the p-type group III nitride semiconductor layer 806 using the sputtering device (of the layering method) according to this embodiment to fabricate an epitaxial wafer.

[0089] A lithography technique and a RIE (reactive ion etching) technique are applied to the epitaxial wafer thus obtained to fabricate the translucent electrode 810, the p-type junction electrode 808, the n-type electrode 807, and the protective layer 809, which are in Fig. Figure 9 shows how to obtain the LED structure. Note that the materials of the translucent electrode 810, the p-type junction electrode 808, the n-type electrode 807, and the protective layer 809 are not particularly restricted, and materials well-known in this technical field can be used without limitations. (First example)

[0090] As a first example of the present invention, a description is given of an example in which an AIN layer is used on an α-Al₂O₃-(0001) substrate using the method of forming a group III nitride semiconductor thin film with a wurtzite structure according to an embodiment of the present invention. More precisely, a description is given of an example in which an AIN layer with a wurtzite structure is formed using sputtering on an α-Al₂O₃-(0001) substrate mounted with the aid of a substrate holding device having a gap between the substrate and the surface of a heater facing the substrate. Note that in this example, the AIN layer is formed using a sputtering device similar to that described in Fig. 1 is formed. A similar heater structure to the one in Fig. 2, a similar heater electrode pattern to that in Fig. 4A and a similar substrate holding device to the one in Fig. 5 are used. Furthermore, the gap d1 between the substrate support section 503a and the surface P of the heater 103 is in Fig. 5, which faces the substrate, is set to 1 mm, and the gap d2 between the substrate 504 and the surface P of the heater 103 in Fig. 5, which faces the substrate, is set to 2 mm.

[0091] In this example, in the first step, the α-Al2O3-(0001) substrate is transported into the vacuum chamber 101, which is heated at or below 1×10 -4The substrate is held at 550 °C and is positioned on the substrate holding device 503. In the second step, the substrate is held at 550 °C, which is the layer formation temperature in the fourth step. In this step, the heater 103 is controlled so that the monitoring value of the thermocouple located within it can be 750 °C. Subsequently, in the third step, a mixed gas of N₂ and Ar is introduced such that N₂ / (N₂+Ar) is 25%, and the pressure in the vacuum chamber 101 is set to 3.75 mTorr (0.5 Pa), which is the layer formation pressure in the fourth step. Under these conditions, sputtering is carried out in the fourth step by applying a radio frequency power of 2000 W from the radio frequency voltage source 106 to the target 108, which is made of the metal Al. As a result, an Al layer with a thickness of 50 nm is formed on the substrate.

[0092] Note that in this example, the layer formation temperature is set by performing a substrate temperature measurement on the α-Al2O3-(0001) substrate in advance by burying a thermocouple and studying the relationship between the temperature of the α-Al2O3-(0001) substrate and the monitor value of the thermocouple located in the heater, i.e., the temperature of the heater at that moment.

[0093] In this example, the resulting AIN layer is evaluated by: X-ray diffraction (XRD) measurement in a 2θ / ω scanning mode at symmetrical reflection positions; XRC measurement in a ω scanning mode with reference to a plane of symmetry; XRC measurement in a Φ scanning mode in an in-plane array; and coaxial impact collision ion scattering spectroscopy (CAICISS). Here, the XRD measurement in the 2θ / ω scanning mode at the symmetrical reflection positions is used to verify the crystalline orientation, and the XRC measurement in the ω scanning mode with reference to the plane of symmetry and the XRC measurement in the Φ scanning mode in the in-plane array are used to evaluate the tilt and twist mosaic scattering measures, respectively. Furthermore, CAICISS measurement is used as a means to determine polarity.

[0094] First, the AIN layer produced in this example is subjected to an XRD measurement in the 2θ / ω scanning mode at the symmetrical reflection positions within a measurement range of 2θ = 20 to 60°. As a result, only diffraction maxima of the AIN-(0002) plane and the α-Al2O3-(0006) plane are observed; diffraction maxima indicating other AIN grating planes are not observed. From this, it is found that the obtained AIN layer is oriented in the c-axis direction.

[0095] Next, the AIN layer is subjected to XRC measurement in the ω-scanning mode with respect to the plane of symmetry, as described in this example. Note that the AIN-(0002) plane is used in this measurement. The FWHM of the obtained XRC profile is 450 arcsec or less in a case where the detector is in an open detector state, and 100 arcsec or less in a case where the analysis crystals are inserted into the detector. This reveals that the tilt mosaic scatter of the fabricated AIN layer is significantly small. Furthermore, under other fabrication conditions, layers with an FWHM of 20 arcsec or less are found in the XRC measurement where the analysis crystals are inserted into the detector.

[0096] As a rule, an XRC measurement should be performed with a detector in an open detector state. However, in the case of a sample with a small layer thickness, as in this example, its thickness effect and lattice relaxation broaden the FWHM of the XRC profile, making it difficult to perform an accurate mosaic scattering measure evaluation. For this reason, nowadays the insertion of analysis crystals into the detector, as described above, is considered an XRC measurement in a broad sense. In the following, the XRC measurement will be performed using the open detector state unless otherwise stated.

[0097] Next, the AIN layer is subjected to XRC measurement in the Φ-scanning mode in the in-plane configuration, as described in this example. Note that the AlN-{10-10} plane is used in this measurement. Six diffraction maxima appear in the resulting XRC profile at 60° intervals. This indicates that the AIN layer has hexagonal symmetry; in other words, the AIN layer has grown epitaxially. Furthermore, the FWHM, determined from the diffraction maxima of highest intensity, is 2.0° or less. This reveals that the inclination mosaic scattering of the fabricated AIN layer is relatively small. Note that a comparison of the in-plane crystalline orientation between the α-Al2O3-(0001) substrate and the AIN layer reveals that the a-axis of the AIN layer is rotated by 30° in an in-plane direction with respect to the a-axis of the α-Al2O3-(0001) substrate.This indicates that the AIN layer is formed in a common epitaxial relationship, which is observed when an AIN layer is grown epitaxially on an α-Al2O3-(0001) substrate.

[0098] Fig. Figure 12 is the result of the CAICISS measurement performed on the AIN layer according to this example. In this measurement, an Al signal is detected with an angle of incidence that varies from the AlN [11-20] direction.

[0099] It can be observed that a maximum appears around an angle of incidence of 70° in a single shape. This fact indicates that the resulting AlN layer has a +c polarity (Al polarity).

[0100] From the above facts, it is observed that the AIN layer according to this example is a c-axis-oriented epitaxial layer with +c polarity (Al polarity) and also has a significantly small tilt mosaic scattering measure. In other words, it is demonstrated that the present invention can provide a group III nitride semiconductor thin film with reduced tilt and twist mosaic scattering measures and also with a +c polarity.

[0101] Furthermore, in this example there is no need to cover part of the layering surface of the substrate 107 with supporting components (e.g., supporting clamps) or similar to hold the substrate 107, because the target electrode 102 is arranged on an upper side in the direction of gravity to hold the target, while the substrate holder 99 is arranged on a lower side in the direction of gravity, as shown in Fig. Figure 1 shows this. Therefore, the entire layer formation area of ​​substrate 107 can be exposed to target 108. As a result, a group III nitride semiconductor thin film with reduced tilt and twist mosaic scattering and also a uniform +c polarity can be formed over the entire layer formation area of ​​substrate 107, according to this example. (Second example)

[0102] Next, as a second example of the present invention, a description is given of an example in which an AIN layer with a wurtzite structure is produced as a buffer layer using the method for forming a group III nitride semiconductor thin film with a wurtzite structure according to an embodiment of the present invention, and then an undoped GaN layer is formed on the buffer layer using MOCVD.

[0103] An AIN layer is formed using sputtering on an α-Al2O3-(0001) substrate under the same conditions as the first example. The wafer is then inserted into a MOCVD apparatus to form an undoped GaN layer with a thickness of 5 µm.

[0104] The surface of the undoped GaN layer obtained in this way is a mirror surface. An XRD measurement in a 20 / ω scan mode at symmetrical reflection positions shows that the undoped GaN layer is oriented in the c-axis direction. Next, an XRC measurement in a ω scan mode using a GaN (0002) plane as a plane of symmetry and an XRC measurement in a Φ scan mode referenced to a GaN {10⁻¹⁰} plane in an in-plane arrangement are performed. As a result, it is observed that the FWHMs in the measurements are 250 arcseconds or less and 500 arcseconds or less, respectively. From these findings, it follows that the undoped GaN layer is obtained as high-quality crystals with small tilt and twist mosaic scattering measures. Furthermore, according to a CAICISS measurement, the polarity of the undoped GaN layer is a +c polarity (Ga polarity).It can be assumed that this is because the polarity of the AIN layer, which is used as the buffer layer, can be controlled so that it has a +c polarity, as described in the first example, and that therefore the undoped GaN layer formed on top of it also inherits this polarity.

[0105] From the above facts, it follows that if an AIN layer is produced as a buffer layer using the method of forming a group III nitride semiconductor thin film according to an embodiment of the present invention, controlled to have a +c polarity, an undoped GaN layer grown thereon can be obtained using MOCVD as a high-quality epitaxial layer with low mosaic scattering, controlled to have a +c polarity. In other words, a group III nitride semiconductor thin film of +c polarity can be epitaxially grown on an α-Al₂O₃ substrate.

[0106] Note that while the undoped GaN layer in this example is formed by MOCVD, a similar result can be obtained using sputtering instead. (Third example)

[0107] As a third example of the present invention, a description is given of an example in which: an AIN layer with a wurtzite structure is produced as a buffer layer using the method for forming a group III nitride semiconductor thin film with a wurtzite structure according to an embodiment of the present invention; then a group III nitride semiconductor intermediate layer made of undoped GaN, an n-type group III nitride semiconductor layer made of Si-doped GaN, an active group III nitride semiconductor layer with an MQW structure with InGaN and GaN, and a p-type group III nitride semiconductor layer made of Mg-doped GaN are epitaxially grown sequentially on the buffer layer using MOCVD; furthermore, an n-type electrode layer, a transparent electrode, a p-type electrode layer, and a protective layer are formed;and then the wafer is split by slits to produce LED elements.

[0108] An AIN layer is formed using sputtering on an α-Al₂O₃-(0001) substrate under the same conditions as the first example. The wafer is then inserted into a MOCVD apparatus to form a 5 µm thick group III nitride semiconductor interlayer made of undoped GaN and a 2 µm thick n-type group III nitride semiconductor layer made of Si-doped GaN. Furthermore, an active group III nitride semiconductor layer with an MQW structure is formed in the MOCVD apparatus. This structure is a layered structure that begins and ends with GaN, and consists of five 3 nm thick InGaN layers and six 16 nm thick GaN layers stacked alternately. and a p-type group III nitride semiconductor layer with a layer thickness of 200 nm, made of Mg-doped GaN, is formed.

[0109] A lithography technique and a RIE technique are applied to the epitaxial wafer thus obtained to form the translucent electrode 810, the p-type junction electrode 808, the n-type electrode 807 and the protective layer 809, as shown in Fig. Figure 9 shows that in this example ITO (indium tin oxide) is used as the translucent electrode; a structure in which titanium (Ti), Al, and gold (Au) are stacked is used as the p-type junction electrode; a structure in which nickel (Ni), Al, Ti, and Au are stacked is used as the n-type electrode; and SiO2 is used as the protective layer.

[0110] The wafer, in which the resulting LED structure is formed as described above, is divided by scoring into LED chips measuring 350 µm × 350 µm. Each LED chip is then mounted on a feed frame and wired to the frame with metal wires. This process creates an LED assembly.

[0111] A forward current is introduced between the p-type junction electrode and the n-type electrode of the resulting LED element. As a result, the LED element exhibits good light emission characteristics, namely a forward voltage of 3.0 V, a wavelength of 470 nm, and a luminous efficacy of 15 mW at a current of 20 mA. These characteristics are found in LED elements produced from almost the entire surface area of ​​the manufactured wafer, without variation.

[0112] From the above, it can be deduced that an LED element with good light emission characteristics can be obtained by fabricating an AIN layer as a buffer layer using the method for forming a group III nitride semiconductor thin film according to an embodiment of the invention, which is controlled to have a +c polarity. In this example, the group III nitride semiconductor intermediate layer made of undoped GaN, the n-type group III nitride semiconductor layer made of Si-doped GaN, the active group III nitride semiconductor layer with the MQW structure with InGaN and GaN, and the p-type group III nitride semiconductor layer made of Mg-doped GaN are formed by MOCVD. It should be noted, however, that a similar result can be obtained using sputtering instead to fabricate these layers. (First comparative example)

[0113] As a first comparative example of the present invention, a description is given of an example in which an AIN layer is formed using sputtering on an α-Al₂O₃-(0001) substrate mounted in contact with a heater, i.e., without using the substrate holding device that is a characteristic feature of the present invention. It should be noted that for the AIN layer in this comparative example, the same sputtering device, heater, and heater electrode are used as in the first example, except that the substrate mounting method is different (arranging an α-Al₂O₃-(0001) substrate with a gap between the substrate and the heater). Furthermore, the same conditions are used for the layer formation of the AIN layer as in the first example.

[0114] The AIN layer according to this comparison example is subjected to an XRD measurement in a 20 / ω sampling mode at symmetrical reflection positions, an XRC measurement in a ω sampling mode referenced to an AIN-(0002) plane (in a state where analysis crystals are inserted into a detector and in an open detector state), and an XRC measurement in a Φ sampling mode referenced to the AlN-{10-10} plane. As in the AIN layer according to the first example, an epitaxial layer oriented in the c-axis direction is obtained, and the tilt and twist mosaic scattering measures are essentially the same.

[0115] On the other hand, a CAICISS measurement performed on the AIN layer according to this comparison example shows that the AIN layer is a layer in which +c polarity (Al polarity) and -c polarity (N polarity) exist in a mixed state.

[0116] The above facts demonstrate that a group III nitride semiconductor thin film of +c polarity cannot be obtained when the α-Al2O3-(0001) substrate is mounted in contact with the heater. (Second comparative example)

[0117] Next, as a second comparative example of the present invention, a description is given of an example in which a buffer layer made of AlN is formed using sputtering on an α-Al₂O₃-(0001) substrate mounted in contact with the top of a heater, and then an undoped GaN layer is formed thereon using MOCVD. It should be noted that in this comparative example, the AlN buffer layer is formed using the same sputtering apparatus, heater, heater electrode, and layer formation conditions as those in the first comparative example. The undoped GaN layer is formed under similar conditions to those in the second example.

[0118] A buffer layer made of AIN is formed on an α-Al₂O₃-(0001) substrate using sputtering with the same sputtering device, heater, heater electrode, and layer formation conditions as in the first comparative example. The wafer is then inserted into a MOCVD device to form an undoped GaN layer with a thickness of 5 µm.

[0119] The surface of the undoped GaN layer thus obtained appears cloudy, and an XRD measurement in a 2θ / ω sampling mode at symmetrical reflection positions shows that the undoped GaN layer is oriented in the c-axis direction. Next, an XRC measurement in an ω sampling mode with reference to the GaN (0002) plane as a plane of symmetry is performed, and an XRC measurement in a Φ sampling mode with reference to the GaN {10-10} plane in an in-plane arrangement is performed. As a result, the FWHMs in the measurements are approximately 360 arcsec and approximately 1000 arcsec, respectively. From these facts, it is found that the undoped GaN layer obtained in this comparative example consists of low-quality crystals with larger inclination and twist mosaic scattering measures than the undoped GaN layer obtained in the second example.

[0120] Furthermore, according to the CAICISS measurement, the polarity of the undoped GaN layer is such that +c polarity (Ga polarity) and -c polarity (N polarity) exist in a mixed state within the layer. As described in the first comparative example, this can be assumed to be because the AlN buffer layer is a layer in which +c polarity and -c polarity exist in a mixed state, and therefore the undoped GaN layer formed on top of it also inherits these mixed polarities.

[0121] From the facts above, it follows that if an AIN buffer layer is formed by sputtering, with an α-Al₂O₃-(0001) substrate mounted in contact with a heater, an undoped GaN layer grown on it using MOCVD will be obtained as a low-quality epitaxial layer. Note that while the undoped GaN layer is formed by MOCVD in this comparative example, a similar result can be obtained using sputtering instead. (Third comparative example)

[0122] As a third comparative example of the present invention, a description is given of an example in which: a buffer layer made of AIN is formed by sputtering, wherein an α-Al2O3-(0001) substrate is mounted in contact with a heater; then a group III nitride semiconductor intermediate layer made of undoped GaN, an n-type group III nitride semiconductor layer made of Si-doped GaN, an active group III nitride semiconductor layer with an MQW structure with InGaN and GaN, and a p-type group III nitride semiconductor layer made of Mg-doped GaN are epitaxially grown successively on the buffer layer using MOCVD; furthermore, an n-type electrode layer, a transparent electrode, a p-type electrode layer, and a protective layer are formed; and then the wafer is split by slits to produce LED elements.Note that the method for forming the buffer layer made of AIN is similar to that in the first comparative example. The group III nitride semiconductor intermediate layer made of undoped GaN, the n-type group III nitride semiconductor layer made of Si-doped GaN, the active group III nitride semiconductor layer with the MQW structure of InGaN and GaN, and the p-type group III nitride semiconductor layer made of Mg-doped GaN, formed using MOCVD, are all similar to those in the third example. Furthermore, the material and layer formation method of each of the subsequently formed components—namely, the n-type electrode layer, the transparent electrode, the p-type electrode layer, and the protective layer—as well as the subsequent element formation steps, are all similar to those in the third example.

[0123] A forward current is introduced between the p-type junction electrode and the n-type electrode of the resulting LED element. As a result, the LED element does not exhibit good diode characteristics. Furthermore, the element characteristics are poor, such that, for example, sufficient light emission intensity cannot be achieved in the visible range. Similar characteristics are found in LED elements fabricated from nearly the entire surface of the manufactured wafer.

[0124] The facts above demonstrate that an LED element with good light emission characteristics cannot be obtained by sputtering an AlN buffer layer in which an α-Al₂O₃-(0001) substrate is mounted in contact with a heater. In this example, the undoped GaN group III nitride semiconductor intermediate layer, the Si-doped GaN n-type group III nitride semiconductor layer, the MQW active group III nitride semiconductor layer with InGaN and GaN, and the Mg-doped GaN p-type group III nitride semiconductor layer are formed by MOCVD. Note, however, that a similar result can be obtained by using sputtering instead.

[0125] As described above, a key characteristic feature of the present invention is that it focuses on how a substrate is to be mounted to obtain a group III nitride semiconductor epitaxial layer of +c polarity on an α-Al₂O₃ substrate. To obtain this epitaxial layer with uniform +c polarity, an improvement has been added to a substrate holder, in particular the relationship between the position of a substrate held by a substrate holder and the position of a heater contained within the substrate holder is set to a specific ratio. This is a technical concept not found in conventional techniques.

[0126] In the present invention, according to the above-described technical idea, which is unique to the present invention, a substrate holder with a substrate holding device (substrate support section) is provided to position a substrate away from the surface of a heater facing the substrate at a predetermined distance, and the substrate is positioned away from the surface of the heater facing the substrate during the formation of a group III nitride semiconductor thin film. With the substrate holder configured in this way, a group III nitride semiconductor thin film with reduced tilt and twist mosaic scattering dimensions and also with uniform +c polarity can be formed by sputtering, as shown in the first to third examples and the first to third comparative examples described above.

[0127] It should be noted that, while the exemplary embodiment and the examples described above have shown cases in which only the substrate was introduced into the vacuum chamber, the substrate can also be introduced using a conveying device. According to the present invention, the substrate and the conveying device with the substrate mounted thereon are to be arranged at a predetermined distance from the heater when the conveying device with the substrate mounted thereon is positioned on the substrate holding device. Alternatively, the substrate can be introduced using the substrate holding device 503 or 603 or the substrate support section 704 as a conveying device.

[0128] Furthermore, the present inventors have found that applying the above-described technical idea was effective in obtaining a high-quality epitaxial layer even when using a substrate material such as a Si-(111) substrate and in forming a thin-film material such as a zinc oxide (ZnO)-based semiconductor thin film. A description is given below of: an example (fourth example) in which a group III nitride semiconductor thin film with a wurtzite structure is formed on a Si-(111) substrate using the layer formation process according to an embodiment of the present invention; an example (fourth comparative example) in which a group III nitride semiconductor thin film is formed on a Si-(111) substrate without using the layer formation process according to an embodiment of the present invention.an example (fifth example) in which a ZnO-based semiconductor thin film with a wurtzite structure is formed on an α-Al2O3-(0001) substrate using the layer formation process according to an embodiment of the present invention; and an example (fifth comparative example) in which a ZnO-based semiconductor thin film is formed on an α-Al2O3-(0001) substrate without using the layer formation process according to an embodiment of the present invention. (Fourth example)

[0129] In this example, an AIN layer with a wurtzite structure is formed using a procedure and conditions similar to those in the first example, except that a Si-(111) substrate is used from whose surface a natural oxide layer has been removed by a hydrofluoric acid process. Note that the layer formation temperature (550 °C) in this example is set based on the result of a substrate temperature measurement previously performed on the Si-(111) substrate by burying a thermocouple.

[0130] The AIN layer formed on the Si-(111) substrate in this example is found to be an epitaxial layer with +c polarity, according to the results of CAICISS and XRD measurements. Furthermore, when an undoped GaN layer with a thickness of 2 µm is formed on the obtained AIN layer using MOCVD, the surface of the undoped GaN layer thus obtained appears as a mirror surface, and the undoped GaN layer is obtained as a single-crystal layer oriented in the c-axis direction.

[0131] Furthermore, an LED element and a HEMT element were fabricated using the undoped GaN layer obtained in this way. As a result, element characteristics that are considered relatively good for an LED element and a HEMT element on a Si-(111) substrate can be achieved. (Fourth comparative example)

[0132] In this comparative example, an AIN layer is formed on a Si-(111) substrate using a method and conditions similar to those in the fourth example, except that the substrate is mounted in contact with the heater. As a result, the AIN layer obtained in this way is an epitaxial layer in which +c and -c polarities exist in a mixed state. Furthermore, when an undoped GaN layer with a thickness of 2 µm is formed on the obtained AIN layer using MOCVD, the surface of the undoped GaN layer thus obtained appears cloudy.

[0133] Furthermore, if an LED element and a HEMT element are manufactured using the undoped GaN layer thus obtained, neither element can achieve good element characteristics.

[0134] As described above, the layer formation process according to the present invention, i.e., the process in which a group III nitride semiconductor thin film is formed when the substrate is mounted remotely from the heater, is found to be a significantly effective means also in a case of forming a group III nitride semiconductor thin film which has a +c polarity and also has excellent crystallinity on a Si-(111) substrate. (Fifth example)

[0135] In this example, a ZnO layer with a wurtzite structure is formed on an α-Al₂O₃-(0001) substrate using a process and conditions similar to those in the first example, except that the target material, process gas, layer formation temperature, and layer thickness differ. The target material is metallic Zn, the process gas is a mixture of O₂ and Ar (O₂ / (O₂+Ar): 25%), the layer formation temperature is 800 °C, and the layer thickness is 100 nm.

[0136] A ZnO layer according to this example has a crystalline structure similar to those of group III nitride semiconductors (wurtzite structure) and is formed as an epitaxial layer oriented in the c-axis direction, similar to group III nitride semiconductors, with +c polarity (Zn polarity). Furthermore, an epitaxial wafer is formed from stacked layers of an n-type ZnO layer and a p-type ZnO layer (LED structure) using MBE on the resulting n-type ZnO layer. Then, an LED element is fabricated using lithography, RIE, or similar techniques.

[0137] As a result, element characteristics that are considered good for an LED element using a ZnO layer can be achieved.

[0138] Furthermore, if an undoped GaN layer with a thickness of 2 µm is formed on the ZnO layer according to this example using MOCVD, the surface of the resulting undoped GaN layer appears as a mirror surface, and the undoped GaN layer is obtained as a single-crystal layer oriented in the c-axis direction. This allows the ZnO layer according to this example to be used as a buffer layer in the fabrication of an LED element using a group III nitride semiconductor thin film or similar material.

[0139] Furthermore, instead of a target made of the metal Zn, a target made of a Mg-Zn alloy can be used to form a Mg-doped ZnO layer (hereinafter referred to as the MgZnO layer) with a wurtzite structure based on the layer formation process according to one embodiment of the present invention. In this way, an MgZnO layer with +c polarity and excellent crystallinity, similar to the ZnO layer, can also be obtained. The MgZnO layer is able to control the bandgap energy according to the amount of doped Mg. Therefore, it is possible to realize an LED element with a light emission wavelength different from that achieved when using only a ZnO layer, by using the MgZnO layer as a light-emitting layer. (Fifth comparative example)

[0140] In this comparative example, a ZnO layer is formed on an α-Al₂O₃-(0001) substrate using a method and conditions similar to those in the fifth example, except that the substrate is mounted in contact with the heater. The ZnO layer in this comparative example is obtained as an epitaxial layer oriented along the c-axis, as in the fifth example, but the polarity is such that +c-polarity and -c-polarity (O-polarity) exist in a mixed state. Furthermore, an LED is fabricated using the ZnO layer thus obtained, in a manner similar to that in the fifth example, but it fails to achieve good elemental characteristics.

[0141] Furthermore, if an undoped GaN layer with a thickness of 2 µm is formed on the ZnO layer according to this comparative example using MOCVD, the surface of the resulting undoped GaN layer appears cloudy. Therefore, a GaN layer with excellent crystallinity cannot be obtained. Additionally, if an MgZnO layer is formed using a target made of a Mg-Zn alloy, +c and -c polarities exist in a mixed state within the resulting MgZnO layer. Therefore, a MgZnO layer with good crystallinity cannot be obtained.

[0142] As described above, the layer formation process according to the present invention is highly effective even when the thin-film material to be formed is a ZnO-based semiconductor thin film, such as a ZnO layer or a MgZnO layer. Accordingly, the layer formation process according to the present invention is a significantly effective means of obtaining a ZnO-based semiconductor thin film that has +c polarity and also excellent crystallinity.

[0143] Note that even when an experiment similar to the fifth example is performed using a Si-(111) substrate, a ZnO-based semiconductor thin film with +c polarity can still be obtained on the Si-(111) substrate. Furthermore, even when an experiment similar to the fifth comparative example is performed using a Si-(111) substrate, the polarity of the ZnO-based semiconductor thin film is still such that +c and -c polarity exist in a mixed state.

[0144] It should be noted that substrates which can be used in the layer formation process according to the present invention are not limited to α-Al2O3-(0001) substrates and Si-(111) substrates.

[0145] Although, for example, α-Al₂O₃-(0001) substrates and Si-(111) substrates have an epitaxial relationship with group III nitride semiconductor thin films and ZnO-based semiconductor thin films, they do not possess crystal information on their substrate surfaces that would allow the polarity of the group III nitride semiconductor thin films and ZnO-based semiconductor thin films to be controlled. In this description, these substrates are described as substrates with a nonpolar surface.

[0146] For this reason, it is difficult to obtain a group III nitride semiconductor thin film or a ZnO-based semiconductor thin film with +c polarity on a substrate with a nonpolar surface without employing a layering process similar to the layering process according to the present invention, which can control the polarity of a group III nitride semiconductor thin film or ZnO-based semiconductor thin film with a wurtzite structure. However, using the layering process according to the present invention, a group III nitride semiconductor thin film or ZnO-based semiconductor thin film with a wurtzite structure and a +c polarity can be formed even on a substrate having a nonpolar surface.

[0147] Examples of the above-mentioned substrates with a nonpolar surface include a germanium-(Ge)-(111) substrate, a Si-(111) substrate on whose surface a SiGe epitaxial layer with (111) orientation is formed, a Si-(111) substrate on which a Si-(111) epitaxial layer with (111) orientation is formed that is doped with carbon (C), and similar.

[0148] Meanwhile, a 4H-SiC-(0001) substrate and a 6H-SiC-(0001) substrate with a substrate surface called a Si surface, a GaN-(0001) substrate with a substrate surface called a Ga surface, and similar substrates have been commonly used to obtain group III nitride semiconductor thin films and ZnO-based semiconductor thin films of +c polarity. These substrates with the aforementioned surfaces have an epitaxial relationship with group III nitride semiconductor thin films and ZnO-based semiconductor thin films to be formed on a substrate and possess crystal information on their substrate surfaces that allows the polarity of the group III nitride semiconductor thin films and ZnO-based semiconductor thin films to be controlled so that they have +c polarity.Accordingly, these substrates possess a characteristic feature such that a +c polarity group III nitride semiconductor thin film or ZnO-based semiconductor thin film can be obtained simply without using a special layering technique to control the polarity. It should be noted that substrates exhibiting an epitaxial relationship with group III nitride semiconductor thin films and ZnO-based semiconductor thin films, and also possessing crystal information that allows the polarity of these thin films to be controlled to achieve +c polarity, are described as substrates with a polar surface.

[0149] Group III nitride semiconductor thin films and ZnO-based semiconductor thin films, in which the proportion of +c polarity is high and which have a relatively high quality, can be obtained on these substrates with a polar surface without using the layer formation process according to an embodiment of the present invention. However, in the case of using such a substrate, the use of the layer formation process according to an embodiment of the present invention also makes it possible to obtain a group III nitride semiconductor thin film or ZnO-based semiconductor thin film with a higher-quality wurtzite structure.

[0150] In the case of using the aforementioned substrate with a polar surface, a group III nitride semiconductor thin film, a ZnO-based semiconductor thin film, or the like can be easily obtained as an epitaxial layer with a substantially uniform +c polarity. However, a small region of -c polarity (hereinafter referred to as an inverted domain region) sometimes forms in some parts, particularly during the initial growth phase and the like. Defects, such as inverted domain boundaries, may develop through the inverted domain region and propagate to the surface of the thin film. In other words, the layer formation process according to one embodiment of the present invention further reduces the probability of developing such inverted domains and suppresses the development of defects such as inverted domain boundaries.It is therefore assumed that the advantageous effect of the present invention can be obtained even in the case where a substrate with a polar surface is used.

[0151] The term “substrate for epitaxial growth” is used as a common expression for the above-mentioned substrates with an epitaxial relationship with group III nitride semiconductor thin films and ZnO-based semiconductor thin films, and also with a non-polar surface or a polar surface.

[0152] A key distinguishing feature of the present invention is its focus on how a substrate should be mounted when a group III nitride semiconductor thin film or a ZnO-based semiconductor thin film with a wurtzite structure is formed on a substrate for epitaxial growth. To obtain an epitaxial layer with uniform +c polarity, an improvement is added to a substrate holder, specifically the relationship between the position of a substrate held by the substrate holder and the position of a heater held within the substrate holder. This relationship is adjusted accordingly (such that the substrate is held by the substrate holder while being separated from the heater by a predetermined distance). This is a technical concept not found in conventional techniques.

Claims

[1] Layer formation process for growing a semiconductor thin film of a wurtzite structure by sputtering on a substrate (107) for epitaxial growth using a vacuum processing device comprising: a vacuum chamber (101) that is capable of being evacuated; a substrate holder (99) for supporting the substrate (107) for epitaxial growth; and a heater (103) that is able to heat the substrate (107) for epitaxial growth, which is held by the substrate holder (99), to a desired temperature, wherein the epitaxial layer of the semiconductor thin film of the wurtzite structure on the substrate (107) is formed for epitaxial growth in a state in which the substrate (107) is held away from a surface of the heater (103) facing the substrate (107) by the substrate holder (99) at a distance of 0.5 to 5 mm and the epitaxial layer has a +c polarity; and wherein the substrate holder (99) holds the substrate (107) for epitaxial growth in a state in which the substrate holder (99) is in contact with a surface of the substrate (107) for epitaxial growth on a lower side in a direction of gravity. [2] Layer formation process according to claim 1, comprising: a substrate transport of the transport of the substrate (107) for epitaxial growth and of causing the substrate holder (99) to hold the substrate (107) for epitaxial growth in such a way that the substrate (107) for epitaxial growth is held away from the surface of the heater (103) facing the substrate (107) at the predetermined distance; a substrate heating of the substrate (107) for epitaxial growth, which is held in the substrate transport step by the substrate holder (99), to the desired temperature by the heater (103); and a layer formation of the formation of the epitaxial layer of the semiconductor thin film of the wurtzite structure on the substrate (107) for epitaxial growth, which is heated in the substrate heating. [3] Vacuum processing device with: a vacuum chamber (101) that is capable of being evacuated; a substrate holder (99) for carrying a substrate (107) for epitaxial growth; a heater (103) capable of heating the substrate (107) for epitaxial growth, held by the substrate holder (99), to a desired temperature; and a target electrode (102) which is provided inside the vacuum chamber (101) and to which a target (108) can be attached, wherein the substrate holder (99) is provided within the vacuum chamber (101) under the target electrode (102) in one direction of gravity, wherein the substrate holder (99) holds the substrate (107) for epitaxial growth away from a surface of the heater (103) facing the substrate (107) at a distance of 0.5 to 5 mm in order to form an epitaxial layer of a semiconductor thin film of a wurtzite structure by sputtering on the substrate (107) for epitaxial growth, which is heated to a desired temperature using the heater (103), where the epitaxial layer has a +c polarity, wherein the substrate holder (99) has a substrate support section (503a, 603a, 704a) and a mounting section (603b), wherein the substrate support section (503a, 603a, 704a) is configured to support an outer edge section of the substrate (107) for epitaxial growth from below in the direction of gravity during layering, and the mounting section (603b) is formed integrally with the substrate support section (503a, 603a, 704a) and is arranged in contact with the heater (103), and wherein in the state in which the mounting section (603b) is in contact with the heater (103), the substrate support section (503a, 603a, 704a) is arranged away from the surface of the heater (103) facing the substrate (107) at a distance of 0.4 to 5 mm. [4] Vacuum processing device according to claim 3, wherein the substrate support section (503a, 603a, 704a) is an annular insulating component configured to support the outer edge section of the substrate (107) for epitaxial growth. [5] Vacuum processing device according to claim 4, further comprising an annular conductive component (705) for carrying an outer peripheral section of the annular insulating component, wherein a radio frequency power is applied to the annular conductive component (705). [6] Manufacturing method of a light-emitting semiconductor element comprising the layer formation method according to one of claims 1 to 2. [7] Light-emitting semiconductor element comprising an epitaxial layer of the semiconductor thin film of the wurtzite structure produced by the layering process according to one of claims 1 to 2. [8] Lighting device comprising the light-emitting semiconductor element according to claim 7. [9] Layer formation method according to claim 1, wherein, in forming the semiconductor thin film, an epitaxial layer of the semiconductor thin film of the wurtzite structure with a +c polarity is grown on the substrate (107) for epitaxial growth in the state that the substrate (107) is in an electrically isolated state for epitaxial growth. [10] Vacuum processing device according to claim 3, wherein the substrate holder (99) is suitable for holding the substrate (107) for epitaxial growth in an electrically isolated state. [11] Vacuum processing device according to claim 5, further comprising a conductive component (751) which is electrically connected to a radio frequency voltage source (757) which is provided outside the vacuum chamber (101) and to the annular conductive component (705), wherein the radio frequency power is supplied to the annular conductive component (705) from the radio frequency voltage source (757) through the conductive component (751).

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