Laminated ceramic capacitor and manufacturing process for it
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- MURATA MFG CO LTD
- Filing Date
- 2013-04-30
- Publication Date
- 2026-07-02
AI Technical Summary
Conventional laminated ceramic capacitors experience excessive grain growth leading to increased initial short circuit ratios and insulation resistance degradation under high-temperature loads, particularly in thin-film portions with thicknesses of 3 μm or less.
A laminated ceramic capacitor composition comprising a perovskite-type compound with specific molar ratios of Sr, Ba, Zr, Ti, and optional Ca, Si, Mn, Al, and V, with controlled crystal grain sizes of 1.2 μm or less, and internal electrodes made of Ni or Ni alloy, combined with a manufacturing process that includes slurry preparation, sheet formation, and controlled firing.
The solution results in a highly reliable laminated ceramic capacitor with low initial short circuit ratios and improved insulation degradation and moisture-proof stress life, even at reduced element thicknesses of 3.0 μm or less.
Abstract
Description
TECHNICAL AREA
[0001] The present invention relates to a laminated ceramic capacitor and a manufacturing method therefor, and in particular to a laminated ceramic capacitor comprising: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at several interfaces between the dielectric ceramic layers; and an external electrode formed on the outer surface of the laminated body and electrically connected to the internal electrodes, and a manufacturing method therefor. TECHNICAL BACKGROUND
[0002] In recent years, with the reduction of size and weight in electronic devices, laminated ceramic capacitors have become widely used. These capacitors are small in size and capable of achieving high capacitance. These laminated ceramic capacitors exhibit, for example, the following characteristics: Fig.Figure 2 shows a structure which includes: a laminated body 10 , which consists of several layered dielectric ceramic layers 11 and several internal electrodes 12 , which are located at several interfaces between the dielectric ceramic layers 11 are provided, includes; and a pair of external electrodes 13a , 13a , which are located on both end faces of the laminated body 10 are designed to be in electrical contact with the inner electrodes 12 to be brought, which are alternately exposed at the opposite end faces.
[0003] Furthermore, in these laminated ceramic capacitors, dielectric ceramic materials with a high dielectric constant and containing a perovskite-like compound containing Ba, Ti, etc. as their main component are widely used as the material forming the dielectric ceramic layers.
[0004] Furthermore, dielectric ceramic compositions as described in patent specification 1 were proposed as such dielectric ceramic materials.
[0005] This dielectric ceramic composition contains as its main component a composition that can be described by a general formula: n(BaO x -SrO y -CaO z )(Zr m Ti 1-m )O2 is represented (where x + y + z = 1, x, y, z, m and n represent molar ratios), where x, y and z, expressed in molar ratios, lie within the composition ranges shown in Table 1 of Patent Specification 1, where a, b, c, d and e are surrounded by straight lines and m and n lie in the ranges of m ≥ 0.95 and 0.8 ≤ n ≤ 1.04, and contains as additives 0.1 to 0.7 wt.% Mn3O4, 0.5 to 3.0 wt.% BaSiO3, 0.01 to 0.07 wt.% V2O5 and furthermore 0.05 to 0.30 wt.% Al2O3 added based on 100 wt.% of the main component.
[0006] In the case of the aforementioned conventional dielectric ceramic composition, however, since grain growth of crystal grains is expected to be rapidly promoted by firing, the problem arises that, particularly in such a thin-film region with an element thickness (the thickness of a dielectric ceramic layer sandwiched between inner electrodes to form capacitance) of 3 μm or less, the grain sizes of crystal grains are excessively enlarged with respect to the element thickness. This not only increases the initial short-circuit ratio but also increases the time-dependent degradation of the insulation resistance in a high-temperature stress test, thereby reducing the lifetime under high-temperature stress. DOCUMENT FROM THE STATE OF TECHNOLOGY PATENT SHEET Patent specification 1: Published Japanese patent application no. 2001-294481 SUMMARY OF THE INVENTION Problem to be solved by the invention
[0007] The present invention is intended to solve the aforementioned problem, and one object of the present invention is to provide a highly reliable laminated ceramic capacitor which experiences a small change in insulation resistance over time in a high-temperature stress test and exhibits excellent resistance to insulation degradation. Means to solve the problem
[0008] To solve the aforementioned problem, a laminated ceramic capacitor according to the present invention is: a laminated ceramic capacitor which includes: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at more than one interface between the dielectric ceramic layers; and an outer electrode formed on the outer surface of the laminated body and electrically connected to the inner electrodes, and characterized by the fact that: the laminated body contains: a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing Si; Mn; Al; and V; if the total proportion of Zr and Ti is considered as 100 parts by mole, (a) the total proportion m (moles) of Sr, Ba and Ca 100 ≤ m 105 ≤ is met; (b) the Si fraction a (mol parts) 0.1 ≤ a ≤ 4.0 is satisfied; (c) the Mn fraction b (mol parts) 0.1 ≤ b ≤ 4.0 is satisfied; (d) the Al content c (moles) 0.01 ≤ c ≤ 3.0 is satisfied; (e) the V-part d (mol parts) 0.01 ≤ d ≤ 0.3 is satisfied; (f) the molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr 0.60 ≤ w ≤ 0.95 is satisfied; (g) the molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca 0 ≤ y ≤ 0.35 is satisfied; (h) the molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr 0.92 ≤ z ≤ 0.98 is satisfied; the sum of the value of w and the value of y satisfies the relationship 0.6 ≤ w + y ≤ 0.95; and the multiple dielectric ceramic layers each have crystalline grains; and the crystalline grains have an average grain size of 1.2 μm or less.
[0009] It should be noted that when a dielectric ceramic composition in a composition range containing much Sr and Ba (especially Sr) at the A-center of the perovskite-like compound represented by the general formula ABO3 as mentioned above, and containing a low Ca content or no Ca, is used as the dielectric ceramic forming the laminated ceramic capacitor, the sintered dielectric ceramic layers are expected to experience an increase in the linear expansion coefficient and be brought closer to the linear expansion coefficient of the inner electrodes, and thus there is a tendency to suppress internal stress and, in particular, to improve the lifetime under moisture resistance stress (lifespan under insulation degradation in a moisture resistance stress test), for example, when the composition is used in a laminated ceramic capacitor.which includes Ni internal electrodes.
[0010] Furthermore, the laminated ceramic capacitor according to the invention is: a laminated ceramic capacitor which includes: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at more than one interface between the dielectric ceramic layers; and an outer electrode formed on the outer surface of the laminated body and electrically connected to the inner electrodes, and characterized by the fact that: the laminated body contains: a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing Si; Mn; Al; and V, If, in the laminated body undergoing dissolution treatment to become a solution, the total proportion of Zr and Ti is considered to be 100 parts per mole, (a) the total proportion m (moles) of Sr, Ba and Ca 100 ≤ m 105 ≤ is met; (b) the Si fraction a (mol parts) 0.1 ≤ a ≤ 4.0 is satisfied; (c) the Mn fraction b (mol parts) 0.1 ≤ b ≤ 4.0 is satisfied; (d) the Al content c (moles) 0.01 ≤ c ≤ 3.0 is satisfied; (e) the V-part d (mol parts) 0.01 ≤ d ≤ 0.3 is satisfied; (f) the molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr 0.60 ≤ w ≤ 0.95 is satisfied; (g) the molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca 0 ≤ y ≤ 0.35 is satisfied; (h) the molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr 0.92 ≤ z ≤ 0.98 is satisfied; the sum of the value of w and the value of y satisfies the relationship 0.6 ≤ w + y ≤ 0.95; and the multiple dielectric ceramic layers each have crystalline grains; and the crystalline grains have an average grain size of 1.2 μm or less.
[0011] It should be noted that the expression “which is subjected to a dissolution treatment in order to become a solution” in the present invention denotes a concept which includes a case of the laminated body being dissolved with an acid so that it becomes a solution, a case of alkaline digestion of the laminated body and then dissolving it in an acid so that it becomes a solution, etc., and the method by which the laminated body is subjected to the dissolution treatment is not particularly limited.
[0012] Furthermore, a laminated ceramic capacitor according to the invention is: a laminated ceramic capacitor which includes: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at more than one interface between the dielectric ceramic layers; and an outer electrode formed on the outer surface of the laminated body and electrically connected to the inner electrodes, and characterized by the fact that: the dielectric ceramic layers contain: a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing Si; Mn; Al; and V, if the total proportion of Zr and Ti is considered as 100 parts by mole, (a) the total proportion m (moles) of Sr, Ba and Ca 100 ≤ m 105 ≤ is met; (b) the Si fraction a (mol parts) 0.1 ≤ a ≤ 4.0 is satisfied; (c) the Mn fraction b (mol parts) 0.1 ≤ b ≤ 4.0 is satisfied; (d) the Al content c (moles) 0.01 ≤ c ≤ 3.0 is satisfied; (e) the V-part d (mol parts) 0.01 ≤ d ≤ 0.3 is satisfied; (f) the molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr 0.60 ≤ w ≤ 0.95 is satisfied; (g) the molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca 0 ≤ y ≤ 0.35 is satisfied; (h) the molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr 0.92 ≤ z ≤ 0.98 is satisfied; the sum of the value of w and the value of y satisfies the relationship 0.6 ≤ w + y ≤ 0.95; and the multiple dielectric ceramic layers each have crystalline grains; and the crystalline grains have an average grain size of 1.2 μm or less.
[0013] In the laminated ceramic capacitor according to the invention, the crystal grains preferably have an average grain size of 1.0 μm or less.
[0014] The crystal grains adapted to an average grain size of 1.0 μm or less can provide a laminated ceramic capacitor which furthermore exhibits a low initial short-circuit ratio and excellent insulation degradation lifetime as well as moisture resistance stress lifetime.
[0015] Furthermore, the inner electrodes preferably contain Ni or a Ni alloy.
[0016] The use of Ni or a Ni alloy-containing inner electrodes makes it possible to provide a highly reliable laminated ceramic capacitor while reducing material costs.
[0017] Furthermore, a method for manufacturing a laminated ceramic capacitor according to the invention is characterized in that it comprises the following steps: (1) Producing a ceramic slurry by mixing a powder comprising a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further comprising a Si compound, a Mn compound, an Al compound and a V compound, and forming the mixture into a slurry, wherein in the ceramic slurry, when the total proportion of Zr and Ti is considered to be 100 parts by mole, a) the total proportion m (moles) of Sr, Ba and Ca meets the requirement 100 ≤ m ≤ 105, b) the Si fraction a (molten parts) meets the requirement 0.1 ≤ a ≤ 4.0, c) the Mn fraction b (mol parts) meets the requirement 0.1 ≤ b ≤ 4.0, d) the Al content c (moles) meets the requirement 0.01 ≤ c ≤ 3.0, e) the V-part d (mol parts) meets the requirement 0.01 ≤ d ≤ 0.3, f) the molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies the requirement 0.60 ≤ w ≤ 0.95, g) the molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies the requirement 0 ≤ y ≤ 0.35, h) the molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies the requirement 0.92 ≤ z ≤ 0.98 and The sum of the value of w and the value of y satisfies the requirement 0.6 ≤ w + y ≤ 0.95; (2) Forming the ceramic slip into a layered form to obtain ceramic green films; (3) Forming an unfired laminated body obtained by layers of ceramic green films and conductor patterns, which are to serve as internal electrodes after firing; and (4) Firing the unfired laminated body to obtain a laminated body having a structure with internal electrodes provided at more than one interface of the interfaces between the multiple layered dielectric ceramic layers and having crystalline grains contained in the dielectric ceramic layers with an average grain size of 1.2 μm or less.
[0018] Furthermore, a method for manufacturing a laminated ceramic capacitor according to the invention is characterized in that it comprises the following steps: (1) Producing a ceramic slurry by weighing and mixing a powder comprising a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further comprising a Si compound, a Mn compound, an Al compound and a V compound, and forming the mixture into a slurry, wherein in the mixture, when the total proportion of Zr and Ti is considered to be 100 parts by mole, a) the total proportion m (moles) of Sr, Ba and Ca meets the requirement 100 ≤ m ≤ 105, b) the Si fraction a (molten parts) meets the requirement 0.1 ≤ a ≤ 4.0, c) the Mn fraction b (mol parts) meets the requirement 0.1 ≤ b ≤ 4.0, d) the Al content c (moles) meets the requirement 0.01 ≤ c ≤ 3.0, e) the V-part d (mol parts) meets the requirement 0.01 ≤ d ≤ 0.3, f) the molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies the requirement 0.60 ≤ w ≤ 0.95, g) the molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies the requirement 0 ≤ y ≤ 0.35, h) the molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies the requirement 0.92 ≤ z ≤ 0.98 and The sum of the value of w and the value of y satisfies the requirement 0.6 ≤ w + y ≤ 0.95; (2) Forming the ceramic slip into a layered form to obtain ceramic green films; (3) Forming an unfired laminated body obtained by layers of ceramic green films and conductor patterns, which are to serve as internal electrodes after firing; and (4) Firing the unfired laminated body to obtain a laminated body having a structure with internal electrodes provided at more than one interface of the interfaces between the multiple layered dielectric ceramic layers and having crystalline grains contained in the dielectric ceramic layers with an average grain size of 1.2 μm or less.
[0019] Furthermore, in the invention of the method for producing a laminated ceramic capacitor according to the invention, the powder is preferably a powder produced by calcining and loosening a material containing an Sr compound, a Ba compound, a Ti compound and a Zr compound, and a powder having a diffraction peak (202) obtained by powder X-ray diffraction with an integral width of 0.4° or less.
[0020] The aforementioned composition makes it possible to reduce the average grain size of the crystal grains to 1.2 μm or less, and makes it possible to keep the initial short-circuit ratio low and to achieve excellent high-temperature stress life and excellent moisture resistance stress life, even when the element thickness (the thickness of the dielectric ceramic layer sandwiched between the inner electrodes for capacitance formation) is reduced to 3.0 μm or less.
[0021] Furthermore, the integral width is preferably 0.3° or less.
[0022] The integral width being adjusted down to 0.3° or less makes it possible to reduce the average grain size of the crystal grains down to 1.0 μm or less, and makes it possible to keep the initial short-circuit ratio low and achieve excellent high-temperature stress life and excellent moisture resistance stress life, even when the element thickness (the thickness of the dielectric ceramic layer sandwiched between the inner electrodes for capacitance formation) is adjusted down to 1.0 μm or less. Advantageous effect of the invention
[0023] In the laminated ceramic capacitor according to the invention, the “laminated body”, which comprises the several layered dielectric ceramic layers and the several internal electrodes provided at more than one interface of the interfaces between the dielectric ceramic layers, includes: the perovskite-like compound containing Sr, Ba, Zr and Ti and optionally Ca; Si; Mn; Al; and V, and if the total proportion of Zr and Ti is considered as 100 parts by mole, (a) if the total fraction m (moles) of Sr, Ba and Ca satisfies the condition 100 ≤ m ≤ 105, (b) if the Si fraction a (mol parts) satisfies the condition 0.1 ≤ a ≤ 4.0, (c) if the Mn fraction b (mol parts) satisfies the condition 0.1 ≤ b ≤ 4.0, (d) Does the Al content c (moles) satisfy the condition 0.01 ≤ c ≤ 3.0 (e) the V-part d (mol parts) satisfies the condition 0.01 ≤ d ≤ 0.3, (f) the molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies the condition 0.60 ≤ w ≤ 0.95, (g) the molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies the condition 0 ≤ y ≤ 0.35, (h) the molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies the condition 0.92 ≤ z ≤ 0.98, the sum of the value of w and the value of y satisfies the condition 0.6 ≤ w + y ≤ 0.95 and The crystal grains have an average grain size of 1.2 μm or less. This allows for the realization of a highly reliable laminated ceramic capacitor that exhibits a low initial short-circuit ratio and excellent durability under humidity and high temperatures.
[0024] Even if the individual element thickness is reduced down to 3.0 μm or less, a laminated ceramic capacitor can be provided according to the invention which enables a low initial short-circuit ratio and exhibits excellent high-temperature stress life and moisture resistance stress life.
[0025] Even if the “dielectric ceramic layers” that form the laminated body are brought into the aforementioned composition range and are composed in such a way that they meet the requirement of crystal grains with an average grain size of 1.2 μm or less, a highly reliable laminated ceramic capacitor can also be realized that has a low initial short-circuit ratio and excellent moisture resistance lifetime and high-temperature stress lifetime.
[0026] Furthermore, the method for producing a laminated ceramic capacitor according to the invention is designed to produce the ceramic slurry that meets the aforementioned composition requirements, to form the unfired laminated body of the layered ceramic green sheets obtained by shaping the ceramic slurry and the conductor patterns that are to serve as inner electrodes after firing, and then to fire the unfired laminated body to obtain the laminated body having a structure with inner electrodes provided between the dielectric ceramic layers and having crystal grains contained in the dielectric ceramic layers with an average grain size of 1.2 μm or less, and thus laminated ceramic capacitors that meet the aforementioned requirements of the present invention can be efficiently produced.
[0027] Even if the aforementioned predetermined composition requirements are met, in the phase of mixing (weighed material mixture) of weighed materials obtained by weighing the respective raw materials, producing the ceramic slurry from the weighed material mixture, forming the unfired laminated body of the layered ceramic green sheets obtained by shaping the ceramic slurry, and of conductor patterns to serve as internal electrodes after firing, and then firing the unfired laminated body to obtain the laminated body, which has a structure with internal electrodes provided between the dielectric ceramic layers and contains crystal grains with an average grain size of 1.2 μm or less within the dielectric ceramic layers, a laminated ceramic capacitor can alternatively be efficiently produced.which fulfills the aforementioned requirements of the present invention. BRIEF EXPLANATION OF THE DRAWINGS
[0028] Fig. Figure 1 is a perspective view of a laminated ceramic capacitor according to an embodiment of the invention.
[0029] Fig. Figure 2 is a cross-sectional front view of the laminated ceramic capacitor according to an embodiment of the invention.
[0030] Fig. Figure 3 is a diagram illustrating a method for measuring the thickness of dielectric ceramic layers of the laminated ceramic capacitor according to an embodiment of the invention.
[0031] Fig. Figure 4 is a diagram illustrating a method for measuring the average grain size of crystal grains per dielectric ceramic layer in the laminated ceramic capacitor according to an embodiment of the invention. METHOD FOR IMPLEMENTING THE INVENTION
[0032] With reference to an embodiment of the invention, features of the present invention are described in more detail below. <Erzeugung eines laminierten Keramikkondensators>
[0033] To produce a laminated ceramic capacitor, powders of CaCO3, SrCO3, BaCO3, TiO2 and ZrO2 with 99% or more purity by weight were first produced as materials to form the dielectric ceramic layers.
[0034] The aforementioned powders (main component materials) were then weighed such that the total fraction of Sr, Ba, and Ca was m moles per 100 moles of the total fraction of Zr and Ti, the molar ratio Sr / (Sr + Ba + Ca) of Sr to the sum of Sr, Ba, and Ca was w, the molar ratio Ca / (Sr + Ba + Ca) of Ca to the sum of Sr, Ba, and Ca was y, and the molar ratio Zr / (Zr + Ti) of Zr to the sum of Zr and Ti was z. These mixtures were then wet-mixed using a ball mill, dried, and then loosened. Tables 1A and 1B show the values of m, w, y, z, and w + y in the respective samples.
[0035] This powder was calcined for 2 hours at 1100 to 1300°C to synthesize a perovskite-like compound containing Sr, Ba, Zr, and Ti, and optionally Ca. It was then loosened to obtain a powder (major component powder) as the main component forming the dielectric ceramic layers. It should be noted that the manufacturing process (synthesis process) for this powder (major component powder) is not particularly restricted; a solid-state process, a hydrothermal process, and various other known methods can be used. Furthermore, the materials are also not particularly restricted; it is possible to use various forms of carbonates, oxides, hydroxides, chlorides, etc. Furthermore, unavoidable impurities such as HfO₂ may be present.
[0036] Then, for this powder (main component powder), the integral width of a (202) diffraction peak was measured by XRD. Note that the integral width is a value obtained by dividing the area enclosed by the curve representing the peak shape by the height of the peak top. The measurement result of the integral width is shown together in Tables 1A and 1B.
[0037] It should be noted that the average grain size for crystal grains in the dielectric ceramic layers forming the laminated ceramic capacitor in this embodiment was mainly controlled by the integral width of the main component powder.
[0038] Next, separate powders of SiO₂, MnCO₃, Al₂O₃, and V₂O₅ were prepared as additive materials. These powders were weighed such that the Si, Mn, Al, and V content was a, b, c, and d, respectively, based on 100 mol of the total Zr and Ti content in the main component powder, and were mixed with the main component powder to obtain a blended product. This blended product was then wet-milled, dried, and loosened to a dielectric raw material powder. Tables 1A and 1B show the values of a, b, c, and d in the respective samples.
[0039] It should be noted that it is also possible to add materials such as CaCO3, SrCO3, BaCO3, TiO2 and ZrO2 for adjusting the molar ratios during the additive addition phase.
[0040] Furthermore, in some cases, zirconium oxide may be mixed from materials other than those weighed, such as when using YSZ spheres (spheres of yttrium oxide-stabilized zirconium oxide) as media in the wet mixing process, and in such cases the proportions of the mixed materials are adjusted taking into account the mixing quantity to provide the compositions in Tables 1A and 1B.
[0041] The dielectric raw material powder obtained in the manner described above was then wet-mixed with a ball mill to produce ceramic slip, with the addition of a polyvinyl butyral-based binder and an organic solvent such as ethanol.
[0042] The dielectric raw material powder in the generated ceramic slurry was dissolved with an acid and subjected to ICP atomic emission spectroscopy analysis to confirm that the powder had nearly the same composition as the compositions shown in Tables 1A and 1B.
[0043] It should be noted that in Tables 1A and 1B, the samples marked with * are samples that do not meet the requirements of the present invention, whereas the other samples are samples that do meet the requirements of the present invention.
[0044] This ceramic slip was then subjected to a sheet forming process using a doctor blade and cut to obtain rectangular ceramic green sheets measuring 15 cm × 15 cm. Next, a conductive paste containing nickel as a conductive component was printed onto the ceramic green sheets to form conductor patterns (internal electrode patterns) that would serve as internal electrodes after firing. It should be noted that in this embodiment, the conductive paste used consisted of 100 parts by weight of nickel powder as the metal powder, 7 parts by weight of ethylcellulose as the organic support, and terpineol as the solvent.
[0045] Several ceramic green films with the formed conductor patterns (internal electrode patterns) were then layered so that the conductor patterns alternately protruded from opposite sides, thus creating an unfired laminated body. This unfired laminated body was then heated to 250°C in the atmosphere to remove the binder.
[0046] The laminated body, after binder removal, was then subjected to firing under conditions of a temperature increase rate of 3.33°C / min; maximum temperature: 1200 to 1300°C; and oxygen partial pressure (log PO2) = -10.0 MPa to obtain a sintered laminated body.
[0047] Next, the resulting sintered laminated body was subjected to drum polishing to expose the inner electrodes of the end faces, and a Cu electrode paste was applied to the end faces of the laminated body, with the inner electrodes exposed, to form outer electrodes. It was then dried and subsequently heat-treated at a maximum temperature of 800°C in a reducing atmosphere to form outer electrodes.
[0048] Subsequently, nickel-plated layers were formed on the surface of the outer electrodes by barrel electroplating, and tin-plated layers were then formed on top of the nickel-plated layers. This resulted in the laminated ceramic capacitor (sample), which was then Fig. 1 in perspective view and in Fig. 2 is shown in the front cross-sectional view.
[0049] As in Fig. 1 and Fig.As shown in Figure 2, this laminated ceramic capacitor is constructed such that it has a pair of outer electrodes (Cu electrodes) 13a , 13b , which are designed to be in electrical contact with the inner electrodes 12 are brought, which are alternately exposed at the opposite end faces, at the two end faces of the laminated body (laminated ceramic element) 10 features the multiple stacked dielectric ceramic layers 11 and the multiple internal electrodes 12 , which are located at the multiple interfaces between the dielectric ceramic layers 11 are planned, includes.
[0050] It should be noted that the dimensions of the laminated ceramic capacitor produced in the manner described above were 1.2 mm in width (W), 2.0 mm in length (L) and 0.6 mm in thickness (T), and that the dielectric ceramic layer 11The layer placed between the inner electrodes had a thickness of 3.0 μm or 1.5 μm. Furthermore, the total number of effective dielectric ceramic layers was... 80 , excluding the outer layer section. <Bezüglich der Dicke der dielektrischen Keramikschicht> (1) Sample production
[0051] Three samples were produced for each of the samples (laminated ceramic capacitors) of sample numbers 1 to 44 produced in the manner described above. (2) Assessment of the LT cross-section1) Polishing
[0052] Each sample was held in a position of the width direction (W) in a vertical direction, the sample was enclosed in resin and the LT surface, which was defined by the length (L) and thickness (T) of the sample, was exposed from the resin.
[0053] The LT surfaces of the respective samples were then polished with a polishing machine to a depth on the order of 1 / 2 in the width directions (W) of the respective samples. To eliminate shear wear of the internal electrodes caused by polishing, the polished surfaces were then machined by ion milling after polishing was completed. 2) Thickness measurement of the dielectric ceramic layer
[0054] Then, as in Fig. Figure 3 shows a line (orthogonal line) L orthogonal to the inner electrodes 12 at a position approximately 1 / 2 of the LT cross-section in the L-direction. Next, a region of the sample with the layered inner electrodes was drawn. 12The area is divided into three equal parts in the thickness direction (T), i.e., the three regions: upper region; middle region; and lower region. Excluding the outermost dielectric layers and two or more dielectric ceramic layers classified as connected due to the absence of internal electrodes, the thicknesses of ten layers of the dielectric ceramic layers were measured along the orthogonal line L in a middle section for each region to obtain the average value (number of data: 10 layers × 3 regions × 3 (number of samples) = 90 data points).
[0055] It should be noted that the thickness of the dielectric ceramic layers was measured using a scanning electron microscope. <Bestätigung der Zusammensetzung des laminierten Körpers>
[0056] For each of the produced samples (laminated ceramic capacitors), the laminated body (sintered ceramic body) with the outer electrodes removed was dissolved in an acid and subjected to ICP atomic emission spectroscopy analysis. This confirmed that, with the exception of Ni as an inner electrode component, the body has almost the same composition as the compositions shown in Tables 1A and 1B. <Eigenschaftsbeurteilung für jede Probe>
[0057] The following assessments were carried out for each of the samples (laminated ceramic capacitors) produced in the manner described above. (1) Average grain size
[0058] Each sample (laminated ceramic capacitor) was fractured to expose the WT cross-section at a depth on the order of 1 / 2 inch along the longitudinal direction (L) of the sample. Next, the sample was subjected to a heat treatment to define the boundaries (grain boundaries) between crystal grains in the dielectric ceramic layers. The temperature for the heat treatment was adjusted to prevent grain growth and the formation of grain boundaries, and in this embodiment, the treatment was performed at 1000°C.
[0059] Then, as in Fig. Figure 4 shows an area near the position on the order of 1 / 2 in each of the W and T directions (i.e., an essentially central region of the fractional section) on the fractional section (WT cross-section) of the laminated body. 10 , which was broken in the manner described above, as a measuring range ( Fig.4) viewed at 10000x magnification using a scanning electron microscope (SEM).
[0060] Then, forty crystal grains were randomly extracted from the obtained SEM image and subjected to image analysis to calculate the area of the section at the grain boundary for each crystal grain and to calculate the equivalent circle diameter, and the diameter was considered the grain size for each crystal grain. This grain size measurement per crystal grain was performed for three samples under the respective conditions (the number of data points: 40 crystal grains × 3 (the number of samples) = 120 data points).
[0061] Furthermore, assuming that the shape of each crystal grain was a sphere with the grain size calculated as described above as its diameter, the volume of each crystal grain was calculated as the volume of the sphere. Then, from the grain size and the volume calculated as described above, the average grain sizes of the volumes of the samples under the respective conditions were calculated and considered as the average grain sizes for those conditions. The average grain sizes thus obtained are shown together in Tables 1A and 1B. (2) Initial short-circuit ratio
[0062] For each sample numbered 1 to 44, 100 pieces (n = 100) were tested for the initial short-circuit ratio. In this case, the sample with an initial log IR value down to 6 or less was counted as a defective short-circuited sample. The results are shown in Tables 2A and 2B. (3) Accelerated moisture resistance test (PCBT)
[0063] Under the conditions of temperature: 120°C, humidity: 100% relative humidity, atmospheric pressure: 0.122 MPa (1.2 atm), applied voltage: 50 V, and a sample size of 100 (samples without a detected initial short circuit), an accelerated moisture resistance stress test (PCBT) was performed to count the number of samples with a log IR value down to 6 or fewer after 250 hours. The results are shown together in Tables 2A and 2B. (4) Service life under high temperature stress
[0064] Under the conditions of: (a) 170°C and 200 V (200 / 3 kV / mm with respect to electric field strength) in the case of an element thickness (the thickness of the dielectric ceramic layer sandwiched between inner electrodes to form capacitance) of 3.0 μm; and (b) At 150°C and 100 V (100 / 1.5 kV / mm with respect to electric field strength) in the case of element thickness of 1.5 μm, the measurement was carried out for n = 100 (samples without detected initial short circuit) in order to determine, after an elapsed time of 250 hours, the number of samples with IR below 10 6 to count Ω. The results are shown together in Tables 2A and 2B.
[0065] It should be noted that for the samples with the initial short-circuit ratio of 100 / 100 (sample number 9 with an element thickness of 1.5 μm, sample number 22 with an element thickness of 1.5 μm, samples number 38 with element thicknesses of 3.0 μm and 1.5 μm) in Tables 2A and 2B, suitable samples for the accelerated moisture resistance test and the high-temperature stress lifetime test, i.e., samples without a detected initial short circuit, could not be obtained and therefore were not subjected to the accelerated moisture resistance test and the high-temperature stress lifetime test. [Table 2A] Sample number Initial short circuit moisture resistance, stress lifespan High-temperature stress lifespan Element thickness Element thickness Element thickness 3.0 μm 1.5 μm 3.0 μm 1.5 μm 3.0 μm 1.5 μm 1 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 1q00 2 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 3 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 4 0 / 100 1 / 100 0 / 100 0 / 100 0 / 100 7 / 100 5 0 / 100 2 / 100 0 / 100 0 / 100 0 / 100 12 / 100 6 0 / 100 3 / 100 0 / 100 0 / 100 0 / 100 13 / 100 7* 3 / 100 90 / 100 22 / 100 100 / 100 46 / 100 98 / 100 8 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 9* 90 / 100 100 / 100 100 / 100 - 100 / 100 - 10 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 11 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 12* 93 / 100 88 / 100 100 / 100 100 / 100 100 / 100 100 / 100 13 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 14 1 / 100 2 / 100 0 / 100 2 / 100 1(100 2 / 100 15 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 16 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 17* 80 / 100 85 / 100 100 / 100 100 / 100 100 / 100 100 / 100 18* 90 / 100 90 / 100 100 / 100 100 / 100 100 / 100 100 / 100 19* 83 / 100 88 / 100 100 / 100 100 / 100 100 / 100 100 / 100 20* 95 / 100 96 / 100 100 / 100 100 / 100 100 / 100 100 / 100 21* 93 / 100 90 / 100 100 / 100 100 / 100 100 / 100 100 / 100 22* 96 / 100 100 / 100 100 / 100 - 100 / 100 - [Table 2B] Sample number Initial short circuit moisture resistance, stress lifespan High-temperature stress lifespan Element thickness Element thickness Element thickness 3.0 μm 1.5 μm 3.0 μm 1.5 μm 3.0 μm 1.5 μm 23* 60 / 100 70 / 100 100 / 100 100 / 100 100 / 100 100 / 100 24* 65 / 100 77 / 100 100 / 100 100 / 100 100 / 100 100 / 100 25 1 / 100 1 / 100 0 / 100 2 / 100 1 / 100 3 / 100 26 0 / 100 1 / 100 0 / 100 1 / 100 0 / 100 0 / 100 27 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 28 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 29* 3 / 100 83 / 100 19 / 100 100 / 100 45 / 100 100 / 100 30 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 31 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 32 0 / 100 1 / 100 0 / 100 0 / 100 0 / 100 0 / 100 33* 88 / 100 92 / 100 100 / 100 100 / 100 100 / 100 100 / 100 34* 78 / 100 96 / 100 98 / 100 100 / 100 100 / 100 100 / 100 35* 97 / 100 96 / 100 100 / 100 100 / 100 100 / 100 100 / 100 36* 5 / 100 90 / 100 100 / 100 100 / 100 93 / 100 100 / 100 37* 95 / 100 90 / 100 100 / 100 100 / 100 100 / 100 100 / 100 38* 100 / 100 100 / 100 - - - - 39 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 40 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 41 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 42 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 43 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 0 / 100 44 0 / 100 0 / 100 0 / 100 0 / 100 1 / 100 1 / 100
[0066] It should be noted that in Tables 2A and 2B, the samples marked with * are samples that do not meet the requirements of the present invention, whereas the other samples are samples that do meet the requirements of the present invention.
[0067] As shown in Tables 2A and 2B, it has been confirmed that each of the samples that meet the composition requirements specified by the present invention and that meet the requirement (1.2 μm or less) for the average grain size among crystal grains has a low initial short-circuit ratio in the case of an element thickness of 3.0 μm and provides a laminated ceramic capacitor that exhibits an advantageous insulation degradation lifetime and moisture resistance stress lifetime.
[0068] Furthermore, it was confirmed that samples meeting the composition requirements specified by the present invention and having an average grain size of 1.0 μm or less for crystal grains exhibit a low initial short-circuit ratio even when the element thickness is adjusted to 1.5 μm and provide laminated ceramic capacitors that exhibit excellent insulation degradation lifetime and moisture resistance stress lifetime.
[0069] In contrast, it was confirmed that samples that do not meet at least one of the composition requirements specified by the present invention and the average grain size requirement among crystalline grains show adverse results in at least one of the initial short circuit, moisture resistance stress lifetime and high temperature stress lifetime.
[0070] While in the embodiment described above the dielectric raw material powder in the ceramic slurry was dissolved with an acid and subjected to ICP atomic emission spectroscopy analysis, or the laminated body (ceramic sintered body) was dissolved with an acid and subjected to ICP atomic emission spectroscopy analysis after removal of the outer electrodes of the laminated ceramic capacitor (sample), it is also possible to perform a composition analysis for the dielectric ceramic layers forming the laminated body.
[0071] It should be noted that the present invention is not limited to the embodiment described above, but that various applications and modifications can be made within the scope of protection of the invention with regard to the number of dielectric ceramic layers and internal electrodes forming the laminated body, the composition of the dielectric ceramic layers, etc. Reference symbol list 10 laminated body (laminated ceramic element) 11 dielectric ceramic layer 12 Internal electrode 13a, 13b External electrode Length L T Thickness W width
Claims
[1] Laminated ceramic capacitor comprising: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at more than one interface between the dielectric ceramic layers; and an outer electrode formed on an outer surface of the laminated body and electrically connected to the inner electrodes, the laminated body contains: a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing Si; Mn; Al; and V, If the total proportion of Zr and Ti is considered to be 100 parts per mole, the following relationship is satisfied: (a) a total fraction m (moles) of Sr, Ba and Ca satisfies 100 ≤ m ≤ 105, (b) a Si fraction a (mol parts) satisfies 0.1 ≤ a ≤ 4.0, (c) a Mn fraction b (mol fractions) satisfies 0.1 ≤ b ≤ 4.0, (d) an Al fraction c (moles) satisfies 0.01 ≤ c ≤ 3.0, (e) a V-part d (mol parts) satisfies 0.01 ≤ d ≤ 0.3, (f) a molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies 0.60 ≤ w ≤ 0.95, (g) a molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies 0 ≤ y ≤ 0.35, (h) a molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies 0.92 ≤ z ≤ 0.98, a sum of a value of w and a value of y satisfies 0.6 ≤ w + y ≤ 0.95 and The multiple dielectric ceramic layers each contain crystal grains, and the crystal grains have an average grain size of 1.2 μm or less. [2] Laminated ceramic capacitor comprising: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at more than one interface between the dielectric ceramic layers; and an outer electrode formed on an outer surface of the laminated body and electrically connected to the inner electrodes, the laminated body contains: a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing Si; Mn; Al; and V, If, in the laminated body undergoing dissolution treatment to become a solution, a total proportion of Zr and Ti is considered to be 100 moles, the following relationship is satisfied: (a) a total fraction m (moles) of Sr, Ba and Ca satisfies 100 ≤ m ≤ 105, (b) a Si fraction a (mol parts) satisfies 0.1 ≤ a ≤ 4.0, (c) a Mn fraction b (mol fractions) satisfies 0.1 ≤ b ≤ 4.0, (d) an Al fraction c (moles) satisfies 0.01 ≤ c ≤ 3.0, (e) a V-part d (mol parts) satisfies 0.01 ≤ d ≤ 0.3, (f) a molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies 0.60 ≤ w ≤ 0.95, (g) a molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies 0 ≤ y ≤ 0.35, (h) a molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies 0.92 ≤ z ≤ 0.98, a sum of a value of w and a value of y satisfies 0.6 ≤ w + y ≤ 0.95 and The multiple dielectric ceramic layers each contain crystal grains, and the crystal grains have an average grain size of 1.2 μm or less. [3] Laminated ceramic capacitor comprising: a laminated body comprising several layered dielectric ceramic layers and several internal electrodes provided at more than one interface between the dielectric ceramic layers; and an outer electrode formed on an outer surface of the laminated body and electrically connected to the inner electrodes, containing the dielectric ceramic layers: a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing Si; Mn; Al; and V, If the total proportion of Zr and Ti is considered to be 100 parts per mole, the following relationship is satisfied: (a) a total fraction m (moles) of Sr, Ba and Ca satisfies 100 ≤ m ≤ 105, (b) a Si fraction a (mol parts) satisfies 0.1 ≤ a ≤ 4.0, (c) a Mn fraction b (mol fractions) satisfies 0.1 ≤ b ≤ 4.0, (d) an Al fraction c (moles) satisfies 0.01 ≤ c ≤ 3.0, (e) a V-part d (mol parts) satisfies 0.01 ≤ d ≤ 0.3, (f) a molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies 0.60 ≤ w ≤ 0.95, (g) a molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies 0 ≤ y ≤ 0.35, (h) a molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies 0.92 ≤ z ≤ 0.98, a sum of a value of w and a value of y satisfies 0.6 ≤ w + y ≤ 0.95 and The multiple dielectric ceramic layers each contain crystal grains, and the crystal grains have an average grain size of 1.2 μm or less. [4] Laminated ceramic capacitor according to any one of claims 1 to 3, wherein the crystal grains have an average grain size of 1.0 μm or less. [5] Laminated ceramic capacitor according to any one of claims 1 to 4, wherein the inner electrodes contain Ni or a Ni alloy. [6] Method for manufacturing a laminated ceramic capacitor, the method comprising the following steps: (1) Producing a ceramic slurry by mixing a powder comprising a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further comprising a Si compound, a Mn compound, an Al compound and a V compound, and forming it into a slurry, where, if a total proportion of Zr and Ti is considered to be 100 parts per mole, the following relationship is satisfied in the ceramic slurry: a) a total fraction m (moles) of Sr, Ba and Ca satisfies 100 ≤ m ≤ 105, b) a Si fraction a (mol parts) satisfies 0.1 ≤ a ≤ 4.0, c) a Mn fraction b (mol fractions) satisfies 0.1 ≤ b ≤ 4.0, d) an Al fraction c (moles) satisfies 0.01 ≤ c ≤ 3.0, e) a V-component d (mol parts) satisfies 0.01 ≤ d ≤ 0.3, f) a molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr satisfies 0.60 ≤ w ≤ 0.95, g) a molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca satisfies 0 ≤ y ≤ 0.35, h) a molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr satisfies 0.92 ≤ z ≤ 0.98, and a sum of a value of w and a value of y satisfies 0.6 ≤ w + y ≤ 0.95; (2) Forming the ceramic slip into a film mold to obtain ceramic green films; (3) Forming an unfired laminated body obtained by layers of ceramic green films and conductor patterns, which are to serve as internal electrodes after firing; and (4) Firing the unfired laminated body to obtain a laminated body having a structure with internal electrodes provided at more than one interface between the multiple layered dielectric ceramic layers and having crystalline grains contained in the dielectric ceramic layers with an average grain size of 1.2 μm or less. [7] Method for manufacturing a laminated ceramic capacitor, the method comprising the following steps: (1) Producing a ceramic slurry by weighing and mixing a powder containing a perovskite-like compound containing Sr, Ba, Zr, Ti and optionally Ca, further containing a Si compound, a Mn compound, an Al compound and a V compound, and forming the mixture into a slurry, where in the mixture, if a total proportion of Zr and Ti is considered to be 100 moles, a) a total proportion m (moles) of Sr, Ba and Ca 100 ≤ m ≤ 105 is fulfilled, b) a Si fraction a (mol parts) 0.1 ≤ a ≤ 4.0 is satisfied, c) a Mn fraction b (mol parts) 0.1 ≤ b ≤ 4.0 is satisfied, d) an Al content c (molar parts) 0.01 ≤ c ≤ 3.0 is satisfied, e) a V-component d (mole parts) 0.01 ≤ d ≤ 0.3 is satisfied, f) a molar ratio w (Sr / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Sr 0.60 ≤ w ≤ 0.95 is satisfied, g) a molar ratio y (Ca / (Sr + Ba + Ca)) of the sum of Sr, Ba and Ca to Ca 0 ≤ y ≤ 0.35 is satisfied, h) a molar ratio z (Zr / (Zr + Ti)) of the sum of Zr and Ti to Zr 0.92 ≤ z ≤ 0.98 is satisfied and a sum of a value of w and a value of y 0.6 ≤ w + y ≤ 0.95 is satisfied; (2) Forming the ceramic slip into a film mold to obtain ceramic green films; (3) Forming an unfired laminated body obtained by layers of ceramic green films and conductor patterns, which are to serve as internal electrodes after firing; and (4) Firing the unfired laminated body to obtain a laminated body having a structure with internal electrodes provided at more than one interface between the multiple layered dielectric ceramic layers and having crystalline grains contained in the dielectric ceramic layers with an average grain size of 1.2 μm or less. [8] Method for producing a laminated ceramic capacitor according to one of claims 6 and 7, wherein the powder is a powder produced by calcining and loosening a material containing an Sr compound, a Ba compound, a Ti compound and a Zr compound, and a powder having a diffraction peak obtained by powder X-ray diffraction (202) with an integral width of 0.4° or less. [9] Method for manufacturing a laminated ceramic capacitor according to claim 8, wherein the integral width is 0.3° or less.