semiconductor device
Patent Information
- Application Number
- DE112015003158
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2014-07-07
- Filing Date
- 2015-05-08
- Publication Date
- 2025-08-14
- Estimated Expiration
- 2035-05-08
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Abstract
Description
Technical area
[0001] This application claims priority from publication JP 2014 - 139 703 A, filed on July 7, 2014, which is hereby incorporated in its entirety by reference into the present application.
[0002] The present invention relates to a semiconductor device. State of the art
[0003] JP 2005-116 702 A discloses a semiconductor device in which a good heat conductor is connected to a surface portion of a surface electrode of a semiconductor component arranged on a semiconductor substrate. Furthermore, DE 197 20 439 A1 describes a bipolar semiconductor component with a built-in temperature sensor and a method for its manufacture. Invention summaryTechnical problem
[0004] In this type of semiconductor device, there may be a case where a configuration is adopted in which the surface of the surface electrode located close to a periphery of the surface electrode is covered with an insulating layer, and a good thermal conductor is connected to the surface of the surface electrode within an opening in which the insulating layer is not disposed. Furthermore, there may be a case where a configuration is adopted in which a temperature sensor is arranged in a different part of the semiconductor substrate than the semiconductor device. Preferably, the temperature sensor detects a part having as high a temperature as possible. In this case, the semiconductor device located below the surface electrode has a good thermal conductor within a region to which the good thermal conductor is not connected (ie,, the surface electrode within the region where the insulating layer is disposed), it is difficult to transfer heat generated by the operation of the semiconductor device to the good thermal conductor, possibly heating the semiconductor device to a high temperature. In this case, a part whose temperature is not detected by the temperature sensor may be warmer than a part whose temperature is detected, and thus temperature detection cannot be performed properly.
[0005] The present specification discloses a semiconductor device in which a temperature sensor can suitably perform temperature detection. Solution to the technical problem
[0006] A semiconductor device disclosed herein comprises: a semiconductor substrate; a gate insulating layer; a gate electrode; a front-side electrode; a temperature sensor; a front-side insulating layer; and a heat conductor. The semiconductor substrate comprises: a plurality of first n-type regions exposed on a front side of the semiconductor substrate; a p-type body region in contact with the first regions and exposed on the front side; and a second n-type region in contact with the body region and separated from the first regions by the body region. The gate insulating layer is in contact with the body region.The semiconductor substrate comprises an active region overlapping the first regions, a region positioned between the respective first regions, and a non-active region positioned outside the active region when viewed from the front side. The front side electrode is positioned on the front side in the active region and is connected to the first regions and the body region. The temperature sensor is arranged above the front side in the non-active region. The front side insulation layer is provided on the front side in the non-active region and on the front side electrode, and extends over the non-active region to the active region, wherein at least a portion of the front side insulation layer above the front side electrode has an opening. The heat conductor is connected to the front side electrode within the opening.The front-side electrode includes a first side positioned closer to the temperature sensor and a second side positioned on an opposite side to the first side when viewed from above. The front-side insulation layer on the front-side electrode within the active region includes: a first portion extending along the first side and having a first width in a direction from the inactive region to the active region; and a second portion extending along the second side and having a second width in the direction from the inactive region to the active region. The first width is wider than the second width.
[0007] The body region comprises a body contact region with a high p-type dopant concentration and a low-concentration region with a low p-type dopant concentration. The body contact region is exposed on the front side of the semiconductor substrate. The front-side electrode is connected to the body contact region. The low-concentration region is located below the body contact region.
[0008] According to the above configuration, the first width of the first portion within the front-side insulation layer (that is, a width of the front-side insulation layer located closer to the temperature sensor and in the active region) is wider than the second width of the second portion within the front-side insulation layer (that is, a width of the front-side insulation layer located on the opposite side from the temperature sensor and in the active region). This means that the semiconductor substrate located below the first portion has a harder time transferring the generated heat to the heat conductor than the semiconductor substrate below the second portion, and therefore is likely to have a high temperature.Therefore, according to the above configuration, the part where the temperature sensor performs temperature detection tends to have a higher temperature than the part where the temperature sensor does not perform temperature detection. Accordingly, the temperature sensor can properly perform temperature detection of the semiconductor device. Short description of the drawing Fig. 1 is a plan view schematically showing a semiconductor device of a first embodiment; Fig. 2 shows a cross-sectional view of Fig. 1 along a line II-II; Fig. 3 is a cross-sectional view (1) schematically showing a semiconductor device of a second embodiment; Fig. Fig. 4 is a cross-sectional view (2) schematically showing the semiconductor device of the second embodiment; Fig. 5 is a plan view schematically showing a semiconductor device of a third embodiment; Fig. 6 is a plan view schematically showing a semiconductor device of a fourth embodiment; Fig. 7 is a plan view schematically showing a semiconductor device of a fifth embodiment. Description of the embodiments
[0009] Some features of the described embodiments are listed below. In particular, each of the following features is useful in its own right.
[0010] (Feature 1) The semiconductor substrate may include a p-type voltage resistance region provided in the non-active region and extending from the front side to a position deeper than the body region. The body region may be provided between the voltage resistance region and the first regions. The front side electrode may extend from the active region to a position in contact with a front side of the voltage resistance region and may be connected to the voltage resistance region.A portion of the front-side electrode provided within the inactive region may comprise: a third portion extending along the first side and having a third width in the direction from the inactive region to the active region; and a fourth portion extending along the second side and having a fourth width in the direction from the inactive region to the active region. The fourth width may be wider than the third width. A portion of the voltage resistance region provided below the front-side electrode may comprise: a fifth portion extending along the first side and having a fifth width in the direction from the inactive region to the active region; and a sixth portion extending along the second side and having a sixth width in the direction from the inactive region to the active region.The sixth width can be wider than the fifth width. (First embodiment)
[0011] A semiconductor device 2 in a first embodiment according to Fig. 1 comprises a semiconductor substrate 10, two front-side electrodes 40, a temperature sensor 50, a front-side insulation layer 70 and four small signal contact areas 80. In particular, Fig. 1 the representations of the heat conductors 60 (see Fig. 2) connected to the front side electrodes 40 are omitted.
[0012] The semiconductor substrate 10 is a substrate formed of silicon. The semiconductor substrate 10 includes an active region 100, a non-active region 110 (see Fig. 2), both of which are described below. A structure of the semiconductor substrate 10 is described in detail below.
[0013] The front side electrodes 40 are connected to a front side of the semiconductor substrate 10. The front side electrodes 40 are formed from layered layers of Al, Ti, Ni, and Au. Each surface electrode 40 has a first side 40a, which is located closer to the temperature sensor 50, and second sides 40b different from the first side 40a. A concave 45 is formed in the first side 40a in the surface electrode 40 on the right side at Fig. 1. The respective sides 45a, 45b and 45c, which form the concave 45, are part of the first side 40a.
[0014] The temperature sensor 50 is a diode capable of detecting a temperature of the semiconductor substrate 10. The temperature sensor 50 is provided on the semiconductor substrate 10 and between the two surface electrodes 40. In detail, the temperature sensor 50 is provided on the semiconductor substrate 10 and within the concave 45 in the front side electrode 40 on the right side at Fig. 1 arranged.
[0015] The front-side insulating layer 70 is formed of polyimide. The front-side insulating layer 70 is disposed on the semiconductor substrate 10, specifically, on a part of the front side where the front-side electrodes 40 are not provided, on a front side of the temperature sensor 50, and on a front side of a peripheral portion of the front-side electrodes 40. Openings 72 are formed in the front sides of the front-side electrodes 40 at positions where the front-side insulating layer 70 is not provided. The front-side electrodes 40 are exposed within the openings 72. A heat conductor 60 (not shown) is connected to the front side of each of the exposed front-side electrodes 40.
[0016] According to Fig. 2, the semiconductor substrate 10 includes the active region 100 and the inactive region 110. In a top view of the semiconductor substrate 10, the active region 100 includes regions where emitter regions 24 (described below) are arranged, and regions located between the respective emitter regions 24. In the top view of the semiconductor substrate 10, the inactive region 110 is located outside the active region 100. The inactive region 110 does not include the emitter regions 24.
[0017] A plurality of trenches 19 is formed in the front side of the semiconductor substrate 10 (upper surface in Fig. 2). A gate insulation layer 20 is disposed on a wall surface of each trench 19. The gate insulation layer 20 is a silicon dioxide layer. A gate electrode 22 is disposed in each trench 19.
[0018] The emitter areas 24 of the n +-type are provided in an area defining the front side of the active region 100. Each emitter region 24 is provided such that it is in contact with the corresponding gate insulation layer 20. Furthermore, a body region 16 of the p --type in the area defining the front side of the active region 100 and below the emitter regions 24. The body region 16 is in contact with the gate insulation layer 20 below the emitter regions 24. The body region 16 is provided such that it extends to a position shallower than the lower ends of the trenches 19. In particular, a part of the body region 16 is also arranged in the non-active region 110. The body region 16 includes body contact regions 16a located in the area defining the front side of the semiconductor substrate 10, and a low concentration region 16b below the body contact regions 16a and the emitter regions 24. A p-type dopant concentration of the body contact regions 16a is higher than a p-type dopant concentration of the low concentration regions 16b.
[0019] In an area defining a front side of the non-active area 110, an FLR area (abbreviation for field limiting ring, so-called “Field Limiting Ring”) 18 is defined by the p + -type. The FLR region 18 is arranged at a position away from the emitter regions 24. The body region 16 (a body contact region 16a) is located between the FLR region 18 and the emitter regions 24. The FLR region 18 is provided to extend to a position lower than the body region 16. Specifically, the FLR region 18 is provided to extend to a position lower than the lower ends of the gate electrode 22.
[0020] A drift area 14 from the n - -type is arranged below the body region 16 and the FLR region 18. The drift region 14 is separated from the emitter regions 24 by the body region 16. A collector region 12 of the p +-type is provided below the drift region 14 and in an area which is a back side of the semiconductor substrate 10 (lower surface in Fig. 2). The collector region 12 is separated from the body region 16 by the drift region 14. In the active region 100, many IGBTs (abbreviation for insulated gate bipolar transistors) are formed by the emitter regions 24, the body region 16, the drift region 14, the collector region 12, and the gate electrodes 22.
[0021] A backside electrode 90 is provided on the backside of the semiconductor substrate 10 over its entire surface. The backside electrode 90 establishes an ohmic contact with the collector region 12.
[0022] On the front side of the semiconductor substrate 10, an insulating layer 30 is provided on a front side of each electrode 22 in the active region 100. Furthermore, an insulating layer 32 is provided on the front side of the FLR region 18 in the non-active region 110. Specifically, the insulating layer 32 is not disposed on a part of the front side of the FLR region 18 that is closer to the active region 100.
[0023] Furthermore, the front-side electrodes 40 are provided on the front side of the semiconductor substrate 10. The front-side electrodes 40 are provided such that they cover the respective insulating layers 30 and a part of the insulating layer 32. The front-side electrodes 40 are each in contact with the semiconductor substrate 10 in a region where no insulating layers 30 and 32 are arranged, and establish an ohmic contact with the emitter regions 24, the body contact regions 16a (i.e., the body region 16), and the FLR region 18. Furthermore, the front-side electrodes 40 are insulated from the gate electrodes 22 in the active region 100 by the respective insulating layers 30. The gate electrodes 22 in the active region 100 are connected to the small signal contact pads 80 (see Fig. 1). A left side at Fig. 2 is the first side 40a of the front electrode 40 (ie, the side closer to the temperature sensor 50), and a right side at Fig. 2 is one of the sides 40b (ie, the sides opposite the temperature sensor 50). According Fig. 2, the first side 40a is an upper end (ie, an edge) on the left side of the front side electrode 40, and the second side 40b is an upper end (ie, an edge) on the right side of the front side electrode 40.
[0024] The temperature sensor 50 is arranged on a front side of the insulation layer 32 on one side of the front side electrode 40 in the direction of the first side 40a.
[0025] The front-side insulation layer 70 is arranged on the front side of the temperature sensor 50, on the front side of a part of the insulation layer 32 in which the front-side electrodes 40 are not provided, and on the front side of the peripheral portion of the front-side electrodes 40. According to Fig. 2, the front-side insulation layer 70 extends into an area that extends from the non-active region 110 across the active region 100. The openings 72 are formed at locations where the front-side insulation layer 70 is not arranged.
[0026] According to Fig. 2, the front-side insulation layer 70 on each of the front-side electrodes 40 comprises a portion extending along the first side 40a, and this portion comprises a first portion 70a located in an upper part of the active region 100, and the first portion 70a has a first width W1 in a direction from the non-active region 110 to the active region 100. On the other hand, the front-side insulation layer 70 on each front-side electrode 40 comprises a portion extending along the second sides 40b, and this portion comprises a second portion 70b located in the upper part of the active region 100, and the second portion 70b has a second width W2 in the direction from the non-active region 110 to the active region 100. According to Fig. 2, the first width W1 is wider than the second width W2.
[0027] The heat conductor 60 is arranged on the front side of each front-side electrode 40 located in the opening 72. The heat conductor 60 has a higher thermal conductivity than the thermal conductivities of the semiconductor substrate 10 and the front-side insulation layer 70. It is preferable that the thermal conductivity of the heat conductor 60 be greater than or equal to 100 W / m·K. In the present embodiment, copper is used for the heat conductors 60. The heat conductor 60 is connected to the front side of each front-side electrode 40 in the opening 72 via solder 62.
[0028] An operation of the semiconductor device 2 in the present embodiment will be described below. The semiconductor device 2 in the present embodiment is used such that the front electrodes 40 are connected to a ground potential via an external device (e.g., a motor) not shown, and the back electrode 90 is connected to a potential of a power source. Upon application of a voltage to the semiconductor device 2, an emitter side (the front electrodes 40) in the IGBTs formed in the active region 100 is brought to a lower potential, and a collector side (back electrode 90) is brought to a higher potential. When a positive potential (a voltage between the gate and emitter) is applied to the gate electrodes 22 in this state, the body region 16 (ie,The low-concentration region 16b) changes from p-type to n-type in a region in contact with the gate insulation layers 20, thereby forming channels. When the channels are formed, electrons flow from the front-side electrodes 40 through the emitter regions 24, the channels in the body region 16, the drift region 14, and the collector region 12 to the back-side electrode 90. Furthermore, holes flow from the back-side electrode 90 through the collector region 12 into the drift region 14. As a result, a conductivity modulation phenomenon occurs in the drift region 14, which greatly reduces the electrical resistance of the drift region 14. This means that the IGBTs are turned on. This means that a collector current flows in the IGBTs. When the application of the potential to the gate electrodes 22 is stopped, the channels disappear, and the IGBTs turn off. This means that the collector current flowing in the IGBTs is reduced and disappears.The holes flowing into the drift region 14 traverse the body region 16 (the low concentration region 16b and the body contact regions 16a) toward the front-side electrodes 40. Likewise, a portion of the holes traverse the FLR region 18 toward the front-side electrodes 40.
[0029] In the present embodiment according to Fig. 2, a first width W1 of the first portion 70a of the front-side insulation layer 70 (that is, the portion located in the upper part of the active region 100 of the portion extending along the first side 40a of each front-side electrode closer to the temperature sensor 50) is wider than the second width W2 of the second portion 70b of the front-side insulation layer 70 (that is, the portion located in the upper part of the active region 100 of the portion extending along the second sides 40b of each front-side electrode 40). Thus, when the IGBTs are turned on, the generated heat is not as easily transferred to the heat conductor 60 in the active region 100 below the first portions 70a as in the active region 100 below the second portions 70b. Thus, the active region 100 below the first sections 70a will have a higher temperature than the active region 100 below the second sections 70b.This means that the first portions 70a closer to the temperature sensor 50 will have a higher temperature than the second portions 70b farther from the temperature sensor 50. Thus, the temperature sensor 50 can detect the temperature of a portion that has a higher temperature than other parts in the semiconductor substrate 10. Based on the value detected by the temperature sensor 50, the semiconductor substrate 2 can be appropriately controlled so that it has a maximum temperature that does not exceed a standard value.
[0030] Furthermore, by reducing the width of the second portions 70b remote from the temperature sensor 50, heat dissipation performance of the semiconductor device 2 can be improved. (Second embodiment)
[0031] According to the Fig. 3 and Fig. 4, similarly to the first embodiment, in the second embodiment as well, the second width W2 of the second portions 70b in the front side insulation layer 70 is narrower than the first width W1 of the first portions 70a.
[0032] In the second embodiment, a width W4 of each front-side electrode 40 extending along the second sides 40b in the non-active region 110 (that is, a width of the fourth portion 41b) is wider than a width W3 of the front-side electrode 40 extending along the first side 40a in the non-active region 110 (that is, a width of a third portion 41a). Further, in the second embodiment, a width W6 of the FLR region 18 located below the front-side electrode 40 and extending along the second sides 40b (that is, a width of a sixth portion 18b) is wider than a width W5 of the FLR region 18 located below the front-side electrode 40 and extending along the first side 40a (that is, a width of a fifth portion 18).In particular, each of the widths W3 to W6 is a dimension based on the direction from the active region 100 to the non-active region 110.
[0033] Thus, the width W3 and the width W4 of the front side electrode 40 in the non-active region 110 may differ from each other, in addition to the difference between the first width W1 and the second width W2. In this case, by setting the widths W5 and W6 of the FLR region 18, which is below the front side electrode 40 as described above, a positional deviation of the distances between the emitter regions 24 and the FLR region 18 can be reduced. Specifically, the deviation between the positions may be approximately the same. In the examples according to the Fig. 3 and Fig. 4, the distance between an emitter region 24a and the fifth section 18a ( Fig. 3), as well as the distance between an emitter region 24b and the sixth section 18b ( Fig. 4) be made approximately equal to each other.
[0034] If, when applying the structures according to the Fig. 3 and Fig. 4 deviations in the distances between the FLR region 18 and the emitter regions 24, there may be a case where, upon turn-off of the IGBTs, it becomes difficult for holes to traverse a position having a large distance between the FLR region 18 and the emitter regions 24, as a result of which a breakdown resistance of the semiconductor device 2 upon turn-off may be reduced. In this regard, in the present embodiment, the fourth width W4 of the fourth portion 41b of each front-side electrode 40 (that is, a part of the non-active region 110 from the part extending along the second sides 40b; see Fig. 4) wider than the third width W3 of the third portion 41a of the front side electrode 40 (that is, the part of the non-active region 110 below the region extending along the first side 40a; see Fig. 3), and the sixth width W6 of the sixth portion 18b of the FLR region 18 (that is, the part extending along the second sides 40b from the part located below each front side electrode 40; see Fig. 4) is wider than the fifth width W5 of the fifth portion 18a of the FLR region 18 (that is, the part extending along the first side 40a, below the part below each front side electrode 40). Thus, a difference between a distance between the fifth portion 18a of the FLR region 18 and the active region 100 (see Fig. 3), as well as a distance between the sixth section 18b of the FLR area 18 and the active area 100 (see Fig. 4) small. Specifically, the respective distances can be made approximately equal to each other. Therefore, deviations in hole conductivity during IGBT turn-off can be minimized. Accordingly, the semiconductor device 2 can be prevented from having a deteriorated breakdown resistance. (Third embodiment)
[0035] Differences in a semiconductor device 2 according to the third embodiment from the first and second embodiments will be described below. Fig. 5, the present embodiment differs from the first and second embodiments in that four front-side electrodes 40 are arranged on the semiconductor substrate 10. Each front-side electrode 40 has two sides closer to the temperature sensor 50, which are the first sides 40a, and the remaining two sides are the second sides 40b. In the front-side insulation layer 70, also in the present embodiment, a width of a portion extending along the first sides 40a of each front-side electrode 40 is wider than a width of a portion extending along the second sides 40b of the front-side electrodes 40. A cross-sectional structure near the first sides 40a and a cross-sectional structure near the second sides 40b are similar to those of the first and second embodiments (see Fig. 2, Fig. 3 and Fig. 4). (Fourth embodiment)
[0036] As with the semiconductor device 2 according to the fourth embodiment, the differences from the first and second embodiments are described below. Fig. 6, the present embodiment differs from the first and second embodiments in that three front electrodes 40 are arranged on the semiconductor substrate 10. The temperature sensor 50 is arranged between two of the front electrodes 40 (two front electrodes 40 on the left side in Fig. 6). In the two front side electrodes 40, the sides closer to the temperature sensor 50 are the first sides 40a, and the remaining sides are the second sides 40b. Furthermore, each side of the one front side electrode 40 in the vicinity of which the temperature sensor 50 is not arranged (the front side electrode 40 at the rightmost end of Fig. 6), the second side 40b. In the front-side insulation layer 70, also in the present embodiment, a width of the portion extending along the first sides 40a of the front-side electrodes 40 is wider than a width of the portion extending along the second sides 40b of the front-side electrodes 40. A cross-sectional structure near the first sides 40a and a cross-sectional structure near the second sides 40b are similar to those of the first and second embodiments (see Fig. 2, Fig. 3 and Fig. 4). (Fifth embodiment)
[0037] As with the semiconductor device 2 according to the fifth embodiment, differences from the first and second embodiments are described. According to Fig. 7, the present embodiment is different from the first and second embodiments in an arrangement direction of the two front side electrodes 40 arranged on the semiconductor substrate 10.
[0038] Also in the present embodiment, each front-side electrode 40 has a first side 40a closer to the temperature sensor 50, and second sides 40b different from the first side 40a. Also in the present embodiment, in the front-side insulation layer 70, a width of the portion extending along the first sides 40a of the front-side electrodes 40 is wider than a width of the portion extending along the second sides 40b of the front-side electrodes 40. A cross-sectional structure near the first sides 40a and a cross-sectional structure near the second sides 40b are similar to those of the first and second embodiments ( Fig. 2, Fig. 3 and Fig. 4).
[0039] (Modification 1) In the semiconductor substrate 10, other types of power semiconductor devices including an insulated gate electrode, such as a MOSFET, etc., can be applied, which are not limited to the IGBT. Furthermore, the semiconductor substrate 10 is not limited to being made of Si material, but may also be formed of SiC material or GaN material.
Claims
[1] Semiconductor device (2), comprising: a semiconductor substrate (10); a gate insulation layer (20); a gate electrode (22); a front-side electrode (40); a temperature sensor (50); a front-side insulation layer (70); and a heat conductor (60), where the semiconductor substrate (10) comprises: a plurality of first n-type regions (24) exposed on a front side of the semiconductor substrate (10); a p-type body region (16) in contact with the first regions (24) and exposed on the front side; and a second region (14) of the n-type which is in contact with the body region (16) and is separated from the first regions (24) by the body region (16), the gate insulation layer (20) is in contact with the body region (16), the gate electrode (22) faces the body region (16) positioned between the first regions (24) and the second region (14) via the gate insulation layer (20), the semiconductor substrate (10) comprises an active region (100) overlapping the first regions (24), a region positioned between the respective first regions (24), and a non-active region (110) positioned outside the active region (100) in a plan view of the front side, the front side electrode (40) is positioned on the front side in the active region (100) and is connected to the first regions (24) and the body region (16), the temperature sensor (50) is arranged above the front side in the non-active area (110), the front side insulation layer (70) is provided on the front side in the non-active region (110) and on the front side electrode (40), and extends from the non-active region (110) into the active region (100), wherein at least a part of the front side insulation layer (70) above the front side electrode (40) has an opening (72), the heat conductor (60) is connected to the front electrode (40) within the opening (72), the front side electrode (40) comprises a first side (40a) positioned closer to the temperature sensor (50) and a second side (40b) positioned on a side opposite the first side (40a) when viewed from above the front side electrode (40), the front-side insulation layer (70) on the front-side electrode (40) within the active region (100) comprises: a first portion (70a) extending along the first side (40a) and having a first width (W1) in a direction from the non-active region (110) to the active region (100); and a second portion (70b) extending along the second side (40b) and having a second width (W2) in the direction from the non-active region (110) to the active region (100), and the first width (W1) is wider than the second width (W2). [2] The semiconductor device (2) according to claim 1, wherein the semiconductor substrate (10) comprises a p-type voltage resistance region (18) provided in the non-active region (110) and extending from the front side to a position deeper than the body region (16), the body region (16) is provided between the voltage resistance region (18) and the first regions (24), the front side electrode (40) extends from the active region (100) to a position in contact with a front side of the voltage resistance region (18) and is connected to the voltage resistance region (18), a portion of the front side electrode (40) provided within the non-active region (110) comprises: a third portion (41a) extending along the first side (40a) and having a third width (W3) in the direction from the non-active region (110) to the active region (100); and a fourth section (41b) extending along the second side (40b) and having a fourth width (W4) in the direction from the non-active region (110) to the active region (100), the fourth width (W4) is wider than the third width (W3), a portion of the voltage resistance region (18) provided below the front electrode (40) comprises: a fifth portion (18a) extending along the first side (40a) and having a fifth width (W5) in the direction from the non-active region (110) to the active region (100); and a sixth portion (18b) extending along the second side (40b) and having a sixth width (W6), and the sixth width (W6) is wider than the fifth width (W5).
Citation Information
Patent Citations
Bipolar semiconductor device especially IGBT
DE19720439A1