Semiconductor device

Abstract

Semiconductor device, which includes: a drift layer (1) of a first conductivity type, an anode region (3) of a second conductivity type, which is provided in an upper part of the drift layer (1), an extraction area (4) of the second conductivity type in contact with and surrounding the anode area (3) and a field boundary ring area (6 j , 6 j+1 , 6 j+2 ) of the second conductivity type, which surrounds and is separated from the extraction area (4) in the upper part of the drift layer (1), wherein the extraction area (4) has a greater depth than the anode area (3) and the field limiting ring area (6) j , 6 j+1 , 6 j+2 ) has; wherein the semiconductor device further comprises: an insulating film (10) provided on the drift layer (1), and an anode electrode (12) having an ohmic contact part (12a) which is in ohmic contact with the anode region (3) through a contact hole (11) which passes through the insulating film (10), and which has an extension part (12b) which extends from the ohmic contact part (12a) onto the insulating film (10), wherein the extraction area (4) extends from the ohmic contact part (12a) to the extension part (12b) and is connected to the ohmic contact part (12a); i) wherein a relationship given by B>A is satisfied with a distance A from an outer curved part of the extraction area (4) and an outer edge of the ohmic contact part (12a) and a distance B between the outer edge of the ohmic contact part (12a) and an inner curved part of the extraction area (4); or ii) wherein: an edge of the insulating film (10) between the extraction area (4) and the anode electrode (12) is formed by a square flat structure having arc-shaped corners, the extraction area (4) is formed by a frame-shaped flat structure having corners, and an outer edge at each corner of the extraction area (4) is formed by an arc having a radius of curvature, the center of which is on an inner side compared with the center of a radius of curvature at each corner of the edge of the insulating film (10).

Description

TECHNICAL SECTOR

[0001] The present invention relates to semiconductor devices and in particular to a technology that is effectively applicable to semiconductor devices comprising a diode element. GENERAL STATE OF THE ART

[0002] Power diode devices connected antiparallel to switching devices, such as IGBTs and MOSFETs, can break down depending on the operating conditions if the rate of change of current (di / dt) at the time of recovery from a forward to a reverse state is excessively high. Therefore, such power diode devices are typically required to exhibit a large di / dt value in the event of breakdown, i.e., high reverse recovery immunity.

[0003] In JP 2014 - 3 271 A it is disclosed that on the outside of an anode region and in contact with it an extraction region is formed which has a greater depth than the anode region in order to relax the electric field which is compressed on an outer curvature part (outer curved part) of the extraction region in order to ensure improved blocking recovery immunity.

[0004] The required blocking recovery value di / dt, which is necessary for blocking recovery immunity, tends to increase year by year. Such an increase gives rise to concerns that breakdown may occur due to current compression at an outer edge where the anode electrode is connected to the anode region, or that breakdown may occur due to electric field compression on the outer curvature of the extraction region. Therefore, the need for further improvement of blocking recovery immunity remains.

[0005] JP H08-306937A describes the formation of a lightly doped, p-type diffusion layer on an n-type silicon substrate using a field oxide film as a mask. A multitude of guard rings and a stop region are formed from a p-type diffusion layer, and a field plate, formed using Al electrodes and extending to the vicinity of the adjacent guard rings, is provided on the oxide film.

[0006] WO 2014 / 087522A1 describes a termination region that has an annular region. The annular region is provided with a plurality of annular P-type ring layers arranged in a periodic manner. The annular region is subdivided into a plurality of units, each containing the plurality of P-type ring layers. Each unit is of constant width.

[0007] FR 2 958 452 B1 describes a high-voltage power device having termination extension regions extending along the surface of a silicon carbide substrate. These regions have conductivity-type termination extension zones formed in an epitaxial layer of the substrate. The regions include termination extension rings formed in the layer. The rings border the substrate surface, and the cumulative dose of impurities in the rings is less than or equal to the cumulative dose of impurities in the epitaxial layer.

[0008] US 2013 / 0161645A1 describes a semiconductor device comprising a semiconductor substrate with a primary surface and an insulating film formed on the primary surface that continuously covers an upper surface of a first boundary region and an upper surface of a second boundary region, wherein the first boundary region includes a boundary between a trough layer and a resurf layer, and the second boundary region includes a boundary between the resurf layer and a first impurity region. The semiconductor device further comprises a plurality of lower field plates formed in the insulating layer such that the plurality of lower field plates do not lie directly over the first and second boundary regions, and a plurality of upper field plates formed on the insulating layer such that the plurality of upper field plates do not lie directly over the first and second boundary regions.

[0009] US 5,969,400 A describes a semiconductor device comprising a first semiconductor layer of a first conductivity type having a first and a second principal surface, a second semiconductor layer of a second conductivity type selectively formed on the first principal surface of the first semiconductor layer, wherein the second semiconductor layer comprises a first region with a relatively high injection efficiency and a second region with a relatively low injection efficiency and the first region is surrounded by the second region, a third semiconductor layer of the first conductivity type formed on the second principal surface of the first semiconductor layer, a first electrode selectively formed on the second semiconductor layer of the second conductivity type and connected to at least the first region, and a second electrode formed on the third semiconductor layer of the first conductivity type. BRIEF DESCRIPTION OF THE INVENTIONAL PROBLEM

[0010] One object of the present invention is to provide a technology capable of ensuring improved reverse recovery immunity of a diode device. SOLUTION TO THE PROBLEM

[0011] The problem described above is solved by a semiconductor device according to claim 1. Claims 2 to 11 describe particularly advantageous implementations of the semiconductor device according to claim 1.

[0012] According to one aspect of the present invention, a semiconductor device comprises: a drift layer of a first conductivity type, an anode region of a second conductivity type provided in an upper part of the drift layer, and an extraction region of the second conductivity type that contacts and surrounds the anode region. A field-limiting ring region of the second conductivity type surrounds and is separated from the extraction region in the upper part of the drift layer. The extraction region has a greater depth than the anode region and the field-limiting ring region. ADVANTAGEOUS OUTCOME OF THE INVENTION

[0013] The present invention can ensure improved reverse recovery immunity of a diode device. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a chip layout of a semiconductor device according to an embodiment of the present invention; Fig. 2 is a chip playout where one in Fig. The anode electrode shown in point 1 has been omitted; Fig. 3 is a cross-sectional view representing a major part of a cross-sectional structure extending along line II-II of Fig. 1 was taken; Fig. 4 is a partially enlarged cross-sectional view of the in Fig. 3 main part shown; Fig. Figure 5 is a characteristic diagram that represents a relationship between the depth of an extraction area and a maximum value of [current×voltage] in the semiconductor device according to the embodiment of the present invention; Fig. Figure 6 is a characteristic diagram that represents a relationship between a distance between an outer curved part of the extraction area and an outer edge of a connecting part of the anode electrode and the maximum value of [current×voltage] in the semiconductor device according to the embodiment of the present invention; Fig. Figure 7 is a characteristic diagram representing a hole current density in the semiconductor device according to the embodiment of the present invention; Fig. 8 is a partially enlarged top view of the in Fig. 2 of the main part shown; Fig. Figure 9 is a cross-sectional view showing a major part of a cross-sectional structure of a semiconductor device according to a further embodiment of the present invention; and Fig. Figure 10 is a cross-sectional view of a main part of a previous semiconductor device. DESCRIPTION OF EXECUTION FORMS

[0014] With reference to the drawings, a semiconductor device according to an embodiment of the present invention is described in detail below. In the description and the accompanying drawings, the designation of a layer or region with "n" indicates that electrons serve as the majority charge carriers, and the designation of a layer or region with "p" indicates that holes serve as the majority charge carriers. The sign "+" or "-" added to the designation "n" or "p" indicates that a semiconductor region has a higher or lower impurity concentration than a region to which the sign "+" or "-" has not been added.

[0015] In the following embodiment and the accompanying drawings, similar elements are identified by the same reference numerals, and overlapping explanations are not repeated. For clarity or to facilitate understanding of the embodiment, the dimensions of elements described in the embodiment and illustrated in the accompanying drawings are not shown to scale. The use of directional terms such as "above," "below," "top layer," "bottom layer," "top surface," and "bottom surface" is for illustrative purposes only and is not intended to have any technical significance. The positional relationships "above" and "below" can be changed by 90 or 180 degrees from the original direction. With regard to such a definition of "above" and "below," Fig. 1 and Fig. 3. The upper layers above an anode electrode have been omitted for brevity. <Aufbau der zu der Ausführungsform gehörenden Halbleitervorrichtung >

[0016] As in Fig. As shown in Figure 3, the semiconductor device according to the embodiment of the present invention has a drift layer 1 of the first conductivity type (n - -type) which serves as a semiconductor substrate, consisting, for example, of single-crystal silicon.

[0017] As seen in the top views of Fig. 1 and Fig. As shown in Figure 2, the drift layer 1 has an active component arrangement area 21 located in the center and a contour termination area (peripheral area) 22 surrounding the active component arrangement area 21. The active component arrangement area 21 is equipped with a diode component 20. The contour termination area 22 has the [missing information - likely a specific component or feature] shown in Figure 2. Fig. 3 depicted structure, for example triple field limiting ring (FLR) regions of the second conductivity type (p-type) 6 j , 6 j+1 and 6 j+2 However, this is not limited to the potential-free areas. The FLR areas 6 j , 6 j+1 and 6 j+2 are arranged in parallel and separated from each other.

[0018] As in Fig. As shown in Figure 3, the diode device 20 has a drift layer 1 and a second anode region 3 of the second conductivity type (p-type), which is optionally provided on the upper part of one of the main surfaces (hereinafter referred to as an "upper surface") of the drift layer 1. Adjacent to the anode region 3 is an extraction region 4 of the second conductivity type (p-type) and surrounds the anode region 3 at the upper part of the drift layer 1. As shown in Fig. As shown in Figure 2, the extraction area 4 has a ring-shaped flat structure extending along a ring to encompass the anode area 3. As shown in Fig. As shown in Figure 3, the diode element 20 has a cathode region 15 of the first conductivity type (n + -Type) extending from the active component arrangement area 21 to the contour termination area 22 on the other main surface (hereinafter referred to as a "lower surface") of the drift layer 1.

[0019] As in Fig. 1 to Fig. Figure 3 shows the triple FLR areas 6 j , 6 j+1 and 6 j+2 sequentially aligned and separated from extraction area 4 of the diode device 20, and they surround extraction area 4 on the upper surface of the drift layer 1. The triple FLR areas 6 j , 6 j+1 and 6 j+2Each has a ring-shaped flat structure extending along a ring to encompass the anode area 3 and the extraction area 4.

[0020] As in Fig. 3 and Fig. As shown in Figure 4, the extraction area 4 has a greater depth than the anode area 3 and the triple FLR areas 6. j , 6 j+1 and 6 j+2 on. For example, as in Fig. As shown in section 4, the depth d b of extraction area 4 approximately 20 µm, the depth d a of the anode area 3 approximately 5 µm and the depth d j the respective FLR areas 6 j , 6 j+1 and 6 j+2 approximately 9 µm. The depth d j the respective FLR areas 6 j , 6 j+1 and 6 j+2 is preferably, for example, 3 µm or larger and smaller than 10 µm.

[0021] As in Fig. As shown in Figure 3, the semiconductor device according to the embodiment has an insulating film 10 provided on the upper surface of the drift layer 1 and an anode electrode 12, which is connected to the anode region 3 by a contact hole 11 that extends through the insulating film 10. The lower surface of the drift layer 1 is provided with a cathode electrode 16, which extends from the active component arrangement region 21 to the contour termination region 22. The cathode electrode 16 is electrically and metallurgically connected to the cathode region 15 in order to achieve a low-resistance contact between them.

[0022] As in Fig. As shown in Figure 3, the anode electrode 12 has an ohmic contact section 12a, which establishes an effective ohmic contact with the anode region 3, and an extension section 12b, which extends from the ohmic contact section 12a onto the insulating film 10. The extraction region 4 is located directly below the extension section 12b of the anode electrode 12. The extraction region 4 is also located below and across the ohmic contact section 12a of the anode electrode 12, in contact with the anode region 3 and the extension section 12b on the insulating film 10. The extraction region 4 is electrically and metallurgically connected to the ohmic contact section 12a of the anode electrode 12 in order to achieve a low-resistance contact between them.

[0023] As in Fig. As shown in Figure 4, a distance between the edge of an outer curved part 4a, which is the side face of the extraction area 4 located on the upper surface of the drift layer 1, and the outer edge of the ohmic contact part 12a of the anode electrode 12 is defined as “A”. Specifically, distance A lies between the edge 10a of the insulating film 10 (the inner edge of the contact hole 11), which is the edge of the ohmic contact part 12a, and the edge of the outer curved part 4a of the extraction area 4. A distance between the outer edge of the ohmic contact part 12a (the edge 10a of the insulating film 10) and the edge of an inner curved part 4b of the extraction area 4 is defined as “B”. The extraction area 4 satisfies the relationship given by the following inequality: B>A

[0024] Although not explicitly shown, the semiconductor device according to the embodiment satisfies the relationship represented by the following inequality: B≥A×3

[0025] The semiconductor device according to the embodiment has a structure in which the outer curved part 4a of the extraction area 4 is separated outwards from the outer edge of the ohmic contact part 12a (the edge 10a of the insulating film 10). The semiconductor device also has a structure in which the inner curved part 4b of the extraction area 4 is separated inwards from the outer edge of the ohmic contact part 12a (the edge 10a of the insulating film 10).

[0026] The surface charge carrier concentration of anode region 3 is higher than that of the respective FLR regions 6. j , 6 j+1 and 6 j+2 The surface charge carrier concentration of the respective FLR regions 6 j , 6 j+1, and 6 j+2 The surface charge carrier concentration of anode region 3 is higher than that of extraction region 4. For example, the surface charge carrier concentration of anode region 3 is approximately 1 × 10 17 / cm 3 up to 3×10 18 / cm 3 The surface charge carrier concentration of the respective FLR regions 6 j , 6 j+1 and 6 j+2 is approximately 3×10 16 / cm 3 up to 1×10 18 / cm 3 The surface charge carrier concentration of extraction area 4 is approximately 1×10 16 / cm 3 up to 3×10 17 / cm 3 .

[0027] In the semiconductor device according to the embodiment, the anode region 3, the extraction region 4, and the respective FLR regions 6 are j , 6 j+1 and 6 j+2 formed in such a way that the foreign atom ions of the p-type, such as boron ions ( 11B + ), into the respective areas on the upper surface of drift layer 1 in separate steps. Afterwards, the respective areas are annealed together or separately to activate the foreign atom ions that were implanted in separate steps.

[0028] The implantation of boron ions to form anode region 3 is carried out under conditions that the dose is approximately 7×10 13 / cm 2 up to 1×10 14 / cm 2 and the acceleration energy is approximately 100 keV. The implantation of boron ions to form extraction region 4 is carried out under conditions where the dose is approximately 1 × 10 15 / cm 2 up to 5×10 15 / cm 2 and the acceleration energy is approximately 100 keV. The implantation of boron ions to form the respective FLR regions 6 j , 6 j+1 , and 6 j+2is performed under the conditions that the dose is approximately 1×10 15 / cm 2 up to 3×10 15 / cm 2 and the acceleration energy is approximately 45 keV.

[0029] The respective steps can be carried out in the following order: the step to form the extraction area by implanting the ions into the area corresponding to extraction area 4 and diffusing the ions by annealing; after the step to form the extraction area, the step to form the FLR area follows by implanting the ions into the area corresponding to the respective FLR areas 6. j , 6 j+1 and 6 j+2This corresponds to the step of forming the FLR region, and the ions are diffused by annealing; and after the step of forming the FLR region, the step of forming the anode region follows, with the ions being implanted into the area corresponding to anode region 3, and the ions diffusing by annealing. The step of forming the extraction region is carried out first, so that extraction region 4 has a greater diffusion depth than anode region 3 and the respective FLR regions 6. j , 6 j+1 and 6 j+2 exhibits.

[0030] As in Fig. Figure 3 shows the FLR areas 6. j , 6 j+1 and 6 j+2 each through the field limiting ring (FLR) contact holes 11 j , 11 j+1 and 11 j+2 , which pass through the insulating film 10, with the field limiting ring (FLR) electrodes 13 j , 13 j+1 and 13 j+2 connected. The FLR areas 6 j , 6 j+1and 6 j+2 are electrically and metallurgically connected to the electrodes 13 j , 13 j+1 and 13 j+2 connected to achieve a low contact resistance between them. As in Fig. 1 and Fig. As shown in Figure 2, the FLR areas have 6 j , 6 j+1 and 6 j+2 and the FLR contact holes 11 j , 11 j+1 and 11 j+2 each has a ring-shaped flat structure extending along a ring that includes the anode area 3 and the anode electrode 12.

[0031] The insulating film 10, for example, consists of a silicon oxide film. The anode electrode 12 and the FLR electrode 13 j , 13 j+1 , and 13 j+2Each consists of an aluminum (Al) film or a film made of an aluminum alloy, such as an aluminum-silicon (Al-Si) alloy, an aluminum-copper (Al-Cu) alloy, or an aluminum-copper-silicon (Al-Cu-Si) alloy. The cathode electrode 16, for example, consists of a gold (Au) film.

[0032] As in Fig. 2 and Fig. As shown in Figure 3, a pot area 7 of the second conductivity type (p-type) is provided at a location which includes the FLR areas 6. j , 6 j+1 and 6 j+2 , surrounds, with the pot area 7 being surrounded by the FLR areas 6 j , 6 j+1 and 6 j+2 in and on the upper surface of the drift layer 1 is separated. A pot electrode 14 is connected to the pot area 7 and has an annular flat structure extending along a ring that separates the FLR areas 6. j , 6 j+1 and 6 j+2The pot area 7 is electrically and metallurgically connected to the pot electrode 14 in order to achieve a low-resistance contact between them. <Funktion der Halbleitervorrichtung, die zu der Ausführungsform gehörent >

[0033] With reference to Fig. 4. The function of the semiconductor device according to the embodiment is described below, with reference to Fig. Reference is made to 10, which represents an earlier semiconductor device.

[0034] First, the earlier semiconductor device, which was in Fig. Figure 10 shows that when the diode device is forward-biased, such that the potential of the p-type anode region 103 becomes a diffusion potential (internal potential) of a pn junction between the anode region 103 and the drift layer 101 of the n -If the conductivity exceeds the specified value, holes are injected as minority charge carriers from the anode region 103 into the drift layer 101. Due to the conductivity modulation caused by the concentration of hole charge carriers injected to a large extent into the drift layer 101, the concentration of hole charge carriers (majority charge carriers) increases. Since the on-resistance decreases sharply, the forward current increases drastically, and the forward characteristics typically depicted in the IU curves of diodes appear.

[0035] When the diode is reverse-biased, a depletion layer spreads across the drift layer 101 due to the recombination of holes (the minority charge carriers remaining in the drift layer 101) and electrons (the majority charge carriers). The holes are then pushed out towards the anode (the negative electrode). Once the depletion layer has completely spread across the drift layer 101, current is blocked. The transition process until the blocking state is reached is called reverse recovery. The stage of charge carrier displacement during reverse recovery is macroscopically referred to as a reverse recovery current, during which current flows temporarily despite the reverse bias. If the rate of decay of the reverse recovery current during the forward-to-block transition is greater, the peak current value will be higher (also referred to as "non-smooth recovery").

[0036] The holes, as minority charge carriers, accumulate on the outer curved part 104a of the extraction region 104 when the holes are extracted (or forced out) from the anode electrode 112, which is a negative electrode during the reverse bias. This occurs because the lines of equal potential of an electric field generated by the reverse bias are locally dense on the outer curved part 104a, and the electric field tends to increase, so both the current density and the electric field strength increase. The concentration increases particularly when the decay rate of the reverse recovery current is high at the time of the forward-to-reverse transition.

[0037] Depending on the operating conditions, the diode device can break down if the di / dt current value at the time of the forward-to-backflow transition during recovery is excessively high. Therefore, it is generally required that the diode device exhibit a large di / dt value in the event of breakdown and possess high reverse recovery immunity.

[0038] The required blocking recovery value di / dt, which is necessary for blocking recovery immunity, tends to increase from year to year. Such an increase gives rise to concerns that breakdown may occur due to current compression at the outer edge of the ohmic contact part 112a, where the anode electrode 112 is connected to the anode area 103, or that breakdown may occur due to the compression of the electric field on the outer curved part 104a of the extraction area 104. Therefore, a need for further improvement of blocking recovery immunity remains.

[0039] The semiconductor device according to the embodiment of the present invention, which is in Fig. As shown in Figure 4, the FLR areas are 6. j , 6 j+1 and 6 j+2on, which surround the anode region 3 and the extraction region 4 and are separated from the extraction region 4 on the main surface of the drift layer 1, as described above. Since the semiconductor device according to the embodiment of the present invention reduces the electric field that is concentrated at the outer curved part 4a of the extraction region 4, caused by the FLR regions 6 j , 6 j+1 and 6 j+2 By relaxing the diode, the blocking recovery immunity of the diode element 20 can be improved.

[0040] The semiconductor device according to the embodiment has a structure in which the extraction area 4 has a greater depth than the anode area 3 and the FLR areas 6. j , 6 j+1 and 6 j+2exhibits, as described above. According to the semiconductor device belonging to the embodiment, the curvature of the outer curved part 4a of the extraction area 4 increases compared to a case in which the extraction area 4 has essentially the same depth as the FLR areas 6. j , 6 j+1 and 6 j+2 (for example, 9 µm). This further relaxes the electric field that is concentrated at the outer curved region 4a of the extraction region 4. Accordingly, the reverse recovery immunity of the diode element 20 can be further improved.

[0041] The semiconductor device according to the embodiment has a structure in which the outer edge of the ohmic contact part 12a of the anode electrode 12 is separated from the outer curved part 4a of the extraction area 4, as described above. The semiconductor device according to the embodiment can therefore dissipate the current that is concentrated at the outer edge of the ohmic contact part 12a of the anode electrode 12. Accordingly, the reverse recovery immunity of the diode element 20 can be further improved. <Aufbau des Extraktionsbereichs>

[0042] With reference to Fig. 5 to Fig. Section 7 below describes a special feature of extraction area 4.

[0043] Fig. Figure 5 is a characteristic diagram that shows a relationship between the depth d bof the extraction area 4 and the maximum value of [current×voltage] in the semiconductor device according to the embodiment of the present invention. Fig. Figure 5 also represents the parameters of the earlier semiconductor device.

[0044] The data of the semiconductor device according to the embodiment described in Fig. As shown in section 5, with reference to Fig. 4 such that the depth d b of extraction area 4 is set to 10 µm, 20 µm, and 30 µm respectively, under the conditions that the depth d a The anode area 3 is 5 µm and the width of the extraction area 4 is defined by the distance A of 100 µm and the distance B of 300 µm. The data of the earlier semiconductor device are referenced to Fig. 10 such that the depth d bb of extraction area 104 essentially the same as the depth d dj of FLR area 106 jis, for example, 9 µm, under the conditions that the depth d aa the anode area 103 is equal to 5 µm, the width of the extraction area 104 is equal to 20 µm and the distance A is equal to 300 µm.

[0045] Fig. Figure 6 is a characteristic diagram that shows a relationship between a distance A between the outer curved part 4a of the extraction area 4 and the outer edge of the ohmic contact part 12a of the anode electrode 12 (the edge 10a of the insulating film 10) and the maximum value of [current×voltage] in the semiconductor device according to the embodiment of the present invention. Fig. Figure 6 also represents the characteristics of the earlier semiconductor device.

[0046] The data of the semiconductor device according to the embodiment described in Fig. As shown in section 6, with reference to Fig. 4 such that the width of the extraction area 4 is determined by the respective set of distance A of 100 µm and distance B of 300 µm or distance A of 200 µm and distance B of 600 µm, under the conditions that the depth d a of the anode area 3 equals 5 µm and the depth d b The extraction area 4 is equal to 20 µm. The data from the previous semiconductor device are referenced to Fig. 10 such that the distance A is 100 µm, 200 µm and 300 µm respectively, under the conditions that the depth d aa the anode area 103 equals 5 µm, the width of the extraction area 104 equals 20 µm and the depth d bb of extraction area 104 essentially the same as the depth d dj of FLR area 106 j is, for example, 9 µm.

[0047] Fig. Figure 7 is a characteristic diagram representing a hole current density in the semiconductor device according to the embodiment of the present invention. Fig. Figure 7 also represents the key parameters of the earlier semiconductor device. Fig. Figure 7 also provides a comparative example.

[0048] The data D1 of the semiconductor device according to the embodiment described in Fig. As shown in section 7, with reference to Fig. 4 such that the width of the extraction area 4 is determined by the distance A of 100 µm and the distance B of 100 µm, under the conditions that the depth d a of the anode area 3 equals 5 µm and the depth d b The extraction area 4 is equal to 20 µm. The data D2 of the comparison example are taken with reference to Fig. 4 such that the width of the extraction area 4 is determined by the distance A of 100 µm and the distance B of 300 µm, under the conditions that the depth d a of the anode area 3 equals 5 µm and the depth d b The extraction area 4 is equal to 20 µm. The data D3 of the earlier semiconductor device are referred to Fig. 10 such that the distance A is equal to 300 µm, under the conditions that the depth d aa the anode area 103 equals 5 µm, the width of the extraction area 104 equals 20 µm and the depth d bb of extraction area 104 essentially the same as the depth d dj of the FLR range 106j, which is, for example, 9 µm.

[0049] The hole current density that is in Fig. Figure 7 is equal to the data measured on the surface of the semiconductor substrate at the time of blocking recovery. Point P1 for data D1 of the semiconductor device according to the embodiment and point P2 for data D2 of the comparison example each correspond to the position at the outer edge of the ohmic contact part 12a of the anode electrode 12 (the edge 10a of the insulating film 10), as shown in Fig. Figure 4 shows that point P3 at data D3 of the earlier semiconductor device corresponds to the position at the outer edge of the ohmic contact part 112a of the anode electrode 112 (the edge 110a of the insulating film 110), as shown in Fig. 10 is shown. The data width D wa the data D1 and the data width D wb The data D2 each correspond to a distance A of 100 µm, and the data width D wc Data D3 corresponds to the distance A of 300 µm.

[0050] As in Fig. As shown in section 5, the semiconductor device according to the embodiment of the present invention achieves in each of the cases d b =30 µm, d b =20 µm and d b =10 µm exhibits a higher maximum value of [current×voltage] and higher reverse recovery immunity than the previous semiconductor device. In this respect, the semiconductor device according to the embodiment of the present invention preferably has a depth of d b of extraction area 4 in the range of 10 µm to 30 µm.

[0051] As in Fig. As shown in Figure 6, the semiconductor device according to the embodiment of the present invention achieves a higher maximum value of [current × voltage] and higher reverse recovery immunity than the previous semiconductor device in both cases of a distance A of 100 µm and a distance A of 200 µm. The semiconductor device according to the embodiment of the present invention can achieve the higher reverse recovery immunity even when the distance A between the outer curved part 4a of the extraction area 4 and the outer edge of the ohmic contact part 12a of the anode electrode 12 (the edge 10a of the insulating film 10) is reduced to one-third compared to the previous semiconductor device. Reducing the distance A results in a reduction of the chip size. Accordingly, the yield per semiconductor wafer can be increased to obtain a larger number of chips.Therefore, with the semiconductor device according to the embodiment of the present invention, both a reduction in costs and an improvement in the reverse recovery immunity of the diode component 20 can be achieved.

[0052] With regard to Fig. 7. It is preferable that the semiconductor device according to the embodiment of the present invention satisfy the relationship represented by Eq. (2). By satisfying Eq. (2), the hole current density multiplied by three corresponds to that of the earlier semiconductor device, as shown in Fig. 7 is shown.

[0053] With the semiconductor device according to the embodiment, a smooth recovery can be maintained at the time of the lock recovery if the depth d a the anode area 3 lies in the range of 5 µm to 25 µm.

[0054] As in Fig. As shown in Figure 3, the edge 10a of the insulating film 10 lies between the extraction area 4 and the ohmic contact part 12a of the anode electrode 12. As in Fig. As shown in Figure 2, the edge 10a of the insulating film 10 has been formed into the shape of a square, flat structure having four arcuate corners 10ax. As shown in Fig. As shown in Figure 2, the extraction area 4 is formed by a frame-like flat structure that has four arc-shaped corners 4x.

[0055] As in Fig. As shown in Figure 8, the corner 10ax of the edge 10a of the insulating film 10 is formed by an arc having a radius of curvature 10r originating from the center of curvature 10rp. As shown in Fig. As shown in Figure 8, the outer edge 4x1 at the corner 4x of the extraction area 4 is formed by an arc having a radius of curvature 4r1 originating from the center of curvature 4rp1. The outer edge 4x1 corresponds to the outer curved part 4a, which is shown in Fig. 3 is shown. As in Fig. As shown in Figure 8, the inner boundary 4x2 at the corner 4x of the extraction area 4 is formed by an arc having a radius of curvature 4r2 originating from the center of curvature 4rp2. The inner boundary 4x2 corresponds to the inner curved part 4b, which is shown in Fig. 3 is shown.

[0056] As in Fig. As shown in Figure 8, the center 4rp1 of the radius of curvature 4r1 and the center 4rp2 of the radius of curvature 4r2 are located further towards the center compared to the center 10rp of the radius of curvature 10r. Specifically, the center 4rp1 and the center 4rp2 are located further towards the center of the active component arrangement area 21 than the center 10rp. The outer edge 4x1 has been formed into an arc with radius of curvature 4r1 at the corner 4x of the extraction area 4. The center 4rp1 of the outer edge 4x1 lies on the inner side (closer to the center of the active component arrangement area 21) compared to the center 10rp of the radius of curvature 10r at the corner 10ax of the edge 10a of the insulating film 10. The radius of curvature 4r1 of the outer edge 4x1 at the corner 4x of the extraction area 4 is larger than the radius of curvature 10r at the corner 10ax. The outer edge 4x1 lies on the outer side of the corner 10ax.

[0057] Compared to a topology in which the corner is formed by an arc having a center located at the same position as the center 10rp of the radius of curvature 10r at the corner 10ax of the edge 10a of the insulating film 10, the curvature of the outer edge 4x1 in the plane direction at the corner 4x of the extraction area 4 is increased. The semiconductor device according to the embodiment can therefore relax the electric field that is concentrated on the outer edge 4x1 at the corner 4x of the extraction area 4, namely on the outer curved part 4a at the corner 4x of the extraction area 4. Accordingly, the reverse recovery immunity of the diode device 20 can be further improved.

[0058] The inner edge 4x2 at corner 4x of the extraction area 4 is formed by an arc with a radius of curvature 4r2. The center 4rp2 of the inner edge 4x2 lies on the inner side, compared to the center 10rp of the radius of curvature 10r at corner 10ax of edge 10a of the isolation film 10. The radius of curvature 4r2 of the inner edge 4x2 is larger than the radius of curvature 10r at corner 10ax of edge 10.

[0059] The semiconductor device according to the embodiment therefore exhibits, compared to a topology in which the inner edge 4x2 is configured at corner 4x as an arc having a center of curvature located at the same position as the center 10rp of the radius of curvature 10r at corner 10ax of the edge 10a of the insulating film 10, an increased curvature of the inner edge 4x2 in the plane direction at corner 4x of the extraction area 4. Thus, compared to the straight area of ​​the edge 10a, the length B between the inner curved part 4b of the extraction area 4 and the edge 10a can be greater than the length A between the edge 10a and the outer curved part 4a at corner 10ax. This can relieve the compression of the current on the inner edge 4x2 at the corner 4x of the extraction area 4, specifically on the outer edge of the ohmic contact part 12a of the anode electrode 12.Accordingly, the blocking recovery immunity of the diode component 20 can be improved.

[0060] The semiconductor device according to the embodiment can also be obtained by irradiating the boundary between the active component arrangement area (active region) 21 and the contour termination region (region for improving the breakdown voltage) 22 with helium (He) ions. In particular, as indicated by the dashed line in Fig. As shown schematically in Figure 9, an irradiation zone 8 is created at the boundary (pn junction) between the extraction zone 4 and the drift layer 1, which is irradiated with helium ions. The helium-irradiated irradiation zone 8 lies within 80% to 120% of the depth of the extraction zone 4 and within 90% to 110% of the length of the extraction zone 4 (the length being the sum of the distances A and B between the outer curved part 4a and the inner curved part 4b). Specifically, the helium-irradiated irradiation zone 8 is located at the boundary (pn junction) between the drift layer 1 and the extraction zone 4, encompassing a portion of the outer curved part 4a, the bottom, and a portion of the inner curved part 4b.

[0061] By providing irradiation area 8, which was irradiated with He ions, as in Fig.As shown in Figure 9, the flow of holes (current) to the anode electrode 12 during the blocking recovery period can be prevented, thus relieving the current crowding at the pn junction between the extraction area 4 and the drift layer 1 and improving blocking recovery immunity. Hole injection can also be reduced to promote a smooth transition and avoid impulse voltage. The dose of He ions injected during the formation of the irradiation area 8 is 5 × 10 11 / cm 2 or smaller. With the dose of He ions, which is 5×10 11 / cm 2 If the current is set lower, the current discharge can be reduced to less than 25 µA.

[0062] As described above, the semiconductor device according to the embodiment of the present invention can ensure improved reverse recovery immunity of the diode device 20.

[0063] Although, for example, the active component arrangement area 21 is provided with an anode area 3 in the embodiment, several anode areas 3 can be distributed within the active component arrangement area 21. Although the extraction area 4 extends from the ohmic contact part 12a to the extension part 12b of the anode electrode 12, the extraction area 4 can optionally be provided directly below the extension part 12b of the anode electrode 12. LIST OF REFERENCE NUMBERS 1 drift layer 3 Anode area 4 Extraction area 4a outer curved part 4b inner curved part 4x corner 4x1 outer edge 4x2 inner border 4r1, 4r2 radius of curvature 4rp1, 4rp2 Center 6 j , 6 j+1 , 6 j+2 FLR area 7 pot area 8 Irradiation area irradiated with He ions 10 Insulation film 10a Rand 10ax corner 10r radius of curvature 10rp Center 11 Contact hole 11 j , 11 j+1 , 11 j+2 FLR contact hole 12 Anode electrode 12a ohmic contact part 12b Extension Part 13 j , 13 j+1 , 13 j+2 FLR electrode 14 Pot electrode 15 Cathode area 16 Cathode electrode

Claims

[1] Semiconductor device comprising: a drift layer (1) of a first conductivity type, an anode region (3) of a second conductivity type, which is provided in an upper part of the drift layer (1), an extraction area (4) of the second conductivity type in contact with and surrounding the anode area (3) and a field boundary ring area (6 j , 6 j+1 , 6 j+2 ) of the second conductivity type, which surrounds and is separated from the extraction area (4) in the upper part of the drift layer (1), wherein the extraction area (4) has a greater depth than the anode area (3) and the field limiting ring area (6) j , 6 j+1 , 6 j+2 ) has; wherein the semiconductor device further comprises: an insulating film (10) provided on the drift layer (1), and an anode electrode (12) having an ohmic contact part (12a) which is in ohmic contact with the anode region (3) through a contact hole (11) which passes through the insulating film (10), and which has an extension part (12b) which extends from the ohmic contact part (12a) onto the insulating film (10), wherein the extraction area (4) extends from the ohmic contact part (12a) to the extension part (12b) and is connected to the ohmic contact part (12a); i) wherein a relationship given by B>A is satisfied with a distance A from an outer curved part of the extraction area (4) and an outer edge of the ohmic contact part (12a) and a distance B between the outer edge of the ohmic contact part (12a) and an inner curved part of the extraction area (4); or ii) wherein: an edge of the insulating film (10) between the extraction area (4) and the anode electrode (12) is formed by a square flat structure having arc-shaped corners, the extraction area (4) is formed by a frame-shaped flat structure having corners, and an outer edge at each corner of the extraction area (4) is formed by an arc having a radius of curvature, the center of which is on an inner side compared with the center of a radius of curvature at each corner of the edge of the insulating film (10). [2] Semiconductor device according to claim 1, further comprising a cathode region (15) provided at a lower part of the drift layer (1). [3] Semiconductor device according to claim 1 or 2, wherein the extraction area (4) is arranged directly below the extension part (12b) of the anode electrode (12). [4] Semiconductor device according to claim 1, wherein the depth of the extraction area (4) is in a range of 10 µm to 30 µm. [5] Semiconductor device according to claim 1, wherein a distance A from an outer curved part of the extraction area (4) and an outer edge of the ohmic contact part (12a) and a distance B between the outer edge of the ohmic contact part (12a) and an inner curved part of the extraction area (4) satisfies a relationship given by B>A; wherein a relationship given by B≥A×3 is satisfied. [6] Semiconductor device according to claim 1, wherein: an edge of the insulating film (10) between the extraction area (4) and the anode electrode (12) is formed by a square flat structure having arc-shaped corners, the extraction area (4) is formed by a frame-shaped flat structure having corners, and an outer edge at each corner of the extraction area (4) is formed by an arc having a radius of curvature, the center of which is located on an inner side compared to the center of a radius of curvature at each corner of the edge of the insulating film (10); wherein the radius of curvature of the outer edge at each corner of the extraction area (4) is larger than the radius of curvature at each corner of the edge of the insulating film (10). [7] Semiconductor device according to claim 1, wherein: an edge of the insulating film (10) between the extraction area (4) and the anode electrode (12) is formed by a square flat structure having arc-shaped corners, the extraction area (4) is formed by a frame-shaped flat structure having corners, and an outer edge at each corner of the extraction area (4) is formed by an arc having a radius of curvature, the center of which is located on an inner side compared to the center of a radius of curvature at each corner of the edge of the insulating film (10); wherein an inner edge at each corner of the extraction area (4) is formed by an arc having a radius of curvature, the center of which is located on an inner side compared to the center of a radius of curvature at each corner of the edge of the insulating film (10). [8] Semiconductor device according to claim 7, wherein the radius of curvature of the outer edge at each corner of the extraction area (4) is larger than the radius of curvature at each corner of the edge of the insulating film (10). [9] Semiconductor device according to claim 1 or 2, wherein an irradiation area (8) which is irradiated with helium ions is provided at a boundary between the extraction area (4) and the drift layer (1) such that the irradiation area (8) lies within an 80% to 120% depth of the extraction area (4). [10] Semiconductor device according to claim 9, wherein the irradiation area (8) lies within a 90% to 110% length of the extraction area (4). [11] Semiconductor device according to claim 9, wherein an irradiated dose of helium ions 5×10 11 / cm 2 or smaller.

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