Semiconductor element bonding substrate, semiconductor device and power conversion device

Abstract

Semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) comprising: - an insulating plate (1);and- a metal structure (2) bonded to a main surface of the insulating plate (1), wherein:- a main surface (6) of the metal structure (2) on a opposite side of the insulating plate (1) includes a bonding area (6a) to which a semiconductor element (4) is bonded by means of a solder metal (5),- the metal structure (2) includes at least one concave part (7) located in the main surface (6),- the at least one concave part (7) in the bonding area (6a) is located closer to an edge of the bonding area (6a) with respect to a central part of the bonding area (6a),- the at least one concave part (7) is a plurality of concave parts (7),- the plurality of concave parts (7) is located along an edge of the bonding area (6a),- a metal component (9) is formed and located in each of the plurality of concave parts (7), and- the metal component (9) is a larger exhibits a thermal conductivity higher than that of the solder metal (5).

Description

Technical FieldThe present invention relates to a semiconductor element bonding substrate, a semiconductor device, and a power conversion device.General State of the ArtAs the solder for bonding a semiconductor element and an insulating substrate, a non-eutectic solder composed mainly of a Sn-Cu-based, Sn-Ag-based, Sn-Sb-based, Sn-In-based, or Sn-Bi-based component is used to ensure high reliability. These kinds of solder have a problem that solder voids easily occur.Recently, a semiconductor element operating at a high temperature is developed intensively, and a reduction, a high tolerance and a large increase in current density of the semiconductor element are promoted. In particular, a wide band gap semiconductor such as SiC and GaN has a larger band gap than an Si semiconductor, so that a high tolerance, a decrease, a large increase in current density, and a high temperature operation of a semiconductor device are expected (see, for example, JP 2005-260 181 A). However, when a solder bubble occurs immediately below the semiconductor element, a heat radiation property at the time of occurrence of heat in the semiconductor element is reduced, and this results in a reduction in the properties. Accordingly, it is necessary to suppress the occurrence of the solder voids and ensure stable operation of the semiconductor device.US 2012 / 0 306 087 A1 relates to a semiconductor component which has a substrate with a first metal layer, a first semiconductor chip with side walls and a first solder layer which contacts the first semiconductor chip and the first metal layer. The first metal layer has a groove extending around sidewalls of the first semiconductor chip. The groove or groove is at least partially filled with excess solder from the first solder layer.US 2016 / 0 225 690 A1 discloses a semiconductor device including opposing first and second metal plates, and a plurality of semiconductor elements each disposed between the first metal plate and the second metal plate; a metal block disposed between the first metal plate and each of the semiconductor elements; a soldering element disposed between the first metal plate and the metal block and connecting the first metal plate to the metal block; and a resin molding sealing the semiconductor elements and the metal block. A surface of the first metal plate located on an opposite side to a surface of the first metal plate is connected to the metal block via the solder member and is exposed from the resin molded part. The first metal plate has a groove formed along an outer periphery of a region where the solder member is provided, the groove collectively surrounding the solder member.JP H04-087 393 A describes a printed circuit board which is designed to allow good soldering of components by a method in which a solder reservoir consisting of a through hole or a recessed part is formed on a pad for soldering. A solder reservoir consisting of a through hole is formed in the central part of a pad for soldering a circuit pattern. A creamy solder is applied to the pad beforehand by the printing process. At this time, a part of the creamy solder penetrates into the reservoir, and the amount of the creamy solder previously applied is supplemented by a margin by the amount of the solder penetrating into the reservoir. When components such as an IC or the like are attached at prescribed positions and the solder melts, excess solder is sucked into the reservoir by capillarity. If the amount of solder is rather small, the solder in the reservoir is sucked off by capillarity due to the gap between a part to be soldered and the pad. Accordingly, the amount of the solder between the part and the pad is adjusted to the proper amount by the solder in the reservoir, and the components are favorably soldered.JP 2011-054 732 A discloses a semiconductor module configured to improve heat dissipation efficiency while suppressing the formation of solder cracks. The semiconductor module includes a semiconductor element, a heat sink that dissipates heat from the semiconductor element, and an insulating substrate having wiring layers on both sides and located between the semiconductor element and the heat sink. To a wiring layer of the insulating substrate, a semiconductor element is connected via solder. To the other wiring layer of the insulating substrate, the heat sink is connected via solder. The one wiring layer and the other wiring layer each have a thick plate portion formed thicker than the surrounding portions in the central part of the insulating substrate.SummaryProblem to be Solved by the InventionA planar metal pattern for solder bonding the semiconductor element is formed on a surface of an insulating substrate of a conventional semiconductor device. At the time of solder bonding the semiconductor element to the metal pattern, a voids tend to be formed in a spun solder. When the solder pad is formed immediately below an end portion of the semiconductor element, the heat radiation property of the semiconductor element decreases, so that the solder pad causes a reduction in electrical properties and heat resistance in the semiconductor element. Consequently, it is necessary to remelt the solder to correct the voids or dispose of the semiconductor element, so that the voids cause a decrease in productivity.The present invention has therefore been made to solve problems as described above, and it is an object of the present invention to provide a semiconductor element bonding substrate, a semiconductor device, and a power conversion device that suppress occurrence of a voids at the time of bonding a semiconductor element to a substrate by means of a solder and improve a heat radiation property of the semiconductor element.Means for Solving the ProblemThe object on which the invention is based is achieved in a semiconductor element bonding substrate according to the invention having the features of claim 1, alternatively having the features of claim 2 and further alternatively having the features of claim 7, in a semiconductor device according to the invention having the features of claim 4 and alternatively having the features of claim 9, and in a power conversion device according to the invention having the features of claim 6 or 11. Advantageous refinements are the subject matter of the respective dependent claims.A semiconductor element bonding substrate according to the present invention includes, among other things, an insulating plate and a metal pattern bonded to a main surface of the insulating plate. A main surface of the metal pattern on an opposite side of the insulating plate includes a bonding region to which a semiconductor element is bonded by a solder. The metal pattern includes at least one concave portion located in the main surface. The at least one concave part is located in the bonding region closer to an edge of the bonding region with respect to a central part of the bonding region.A semiconductor element bonding substrate according to the present invention includes, among other things, an insulating plate; and a metal pattern bonded to a main surface of the insulating plate. A main surface of the metal pattern on an opposite side of the insulating plate includes a bonding portion to which a semiconductor element is bonded by a solder, and in the bonding portion, the main surface of the metal pattern has a different height between a central part of the bonding portion and a surrounding surface of the central part.Effects of the InventionIn the semiconductor element bonding substrate according to the present invention, the concave part is provided near the edge of the bonding region in the main surface of the metal pattern. The solder is supplied to an inner side of the concave part when the semiconductor element is bonded to the bonding portion with solder. When the molten solder is caused to coagulate, the solder filling the inside of the concave part shrinks, thereby reducing shrinkage of a fillet part of the solder. Consequently, it is possible to suppress a voids from occurring in the fillet part of the solder and the voids from entering a lower side of the semiconductor element. The occurrence of the voids in the solder is suppressed, so that a heat radiation property in the semiconductor device can be improved.According to the semiconductor element bonding substrate in the present embodiment, the height of the main surface of the metal pattern between the central part of the bonding portion and the surrounding surface of the central portion is made different, so that a timing of coagulation of the solder between the central part of the bonding portion and the surrounding surface of the central part can be made different. For example, the height of the central part of the bonding portion is lowered with respect to the surrounding surface of the central part, so that the solder is supplied to the recessed part at a center of the bonding portion, and the solder filling the recessed part increases a heat capacity in a portion immediately below the central portion of the semiconductor element. Accordingly, the solder located near the edge of the bonding portion can be caused to coagulate first. That is, the central part of the bonding portion is a part where the solder is finally caused to coagulate, so that occurrence of a voids in a fillet part where the solder is caused to coagulate early can be suppressed. The central part of the bonding portion has the height higher than the surrounding area of the central part, and a larger amount of solder is supplied to the surrounding area of the central portion of the bonding portion compared to the central part. Thus, when the molten solder is caused to coagulate, the solder shrinks in the surrounding area of the central portion of the bonding portion, thereby reducing shrinkage of a fillet part of the solder. Thus, occurrence of a voids in a fillet part of the solder can be suppressed. The occurrence of the voids in the solder is suppressed, so that the heat radiation property in the semiconductor device can be improved.These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.Brief Description of the Drawings[FIG. 1 ] A plan view of a semiconductor element bonding substrate according to Embodiment 1.[FIG. 2 ] A cross-sectional view of a semiconductor device according to Embodiment 1.[FIG. 3 ] A plan view of a semiconductor element bonding substrate according to Embodiment 2.[FIG. 4 ] A cross-sectional view of a semiconductor device according to Embodiment 2.[FIG. 5 ] A plan view of a semiconductor element bonding substrate according to Embodiment 3.[FIG. 6 ] A cross-sectional view of a semiconductor device according to Embodiment 3.[FIG. 7 ] A plan view of a semiconductor element bonding substrate according to Embodiment 4.[FIG. 8 ] A cross-sectional view of a semiconductor device according to Embodiment 4.[FIG. 9 ] A plan view of a semiconductor element bonding substrate according to Embodiment 5.[FIG. 10 ] A cross-sectional view of a semiconductor device according to Embodiment 5.[FIG. 11 ] A plan view of a semiconductor element bonding substrate according to Embodiment 6.[FIG. 12] A cross-sectional view of a semiconductor device according to Embodiment 6.[FIG. 13 ] A plan view of a semiconductor element bonding substrate according to Embodiment 7.[FIG. 14 ] A cross-sectional view of a semiconductor device according to Embodiment 7.[FIG. 15 ] A diagram illustrating a configuration of a power conversion device according to Embodiment 8.Description of an Embodiment(s)< 1>FIG. 1 is a plan view of a semiconductor element bonding substrate 100 according to a present embodiment 1. FIG. 2 is a cross-sectional view of a semiconductor device 101 according to the present embodiment 1. in the semiconductor device 101 illustrated in FIG. 2, a semiconductor element 4 is bonded to a bonding region 6 ain the semiconductor element bonding substrate 100 by means of a solder 5. A cross section of the semiconductor device 101 illustrated in FIG. 2 corresponds to a cross section along a line segment A-A in FIG. 1.The semiconductor element bonding substrate 100 includes an insulating plate 1 and a metal pattern 2. the metal pattern 2 is bonded to a main surface of the insulating plate 1. A main surface 6 of the metal pattern 2 on an opposite side of the insulating plate 1 includes the bonding region 6 ato which the semiconductor element 4 is bonded by the solder 5. A plurality of concave parts 7 are formed in the bonding region 6 ain the main surface 6 of the metal pattern 2. In the bonding region 6 a, the plurality of concave parts 7 are located closer to an edge of the bonding region 6 awith respect to a central part of the bonding region 6 a. As illustrated in FIG. 2, the concave part 7 is formed at a position in the metal pattern 2 that is immediately below an end portion of the semiconductor element 4.The plurality of concave parts 7 are formed in FIG. 1, and when at least one concave part 7 is formed, an effect of reducing occurrence of a voids, which will be described below, can be obtained.Plating may be performed on the main surface 6 of the metal pattern 2 to bond the metal pattern 2 and the semiconductor element 4 even more successfully. As illustrated in FIG. 2, a back surface metal pattern 3 may be bonded to a surface of the insulating plate 1 on an opposite side of the metal pattern 2.The semiconductor element 4 is a power semiconductor element including, for example, a SiC semiconductor. The semiconductor element 4 is, for example, an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET).<>The semiconductor element bonding substrate 100 in the present embodiment 1 includes the insulating plate 1 and the metal pattern 2 bonded to the main surface of the insulating plate 1. the main surface 6 of the metal pattern 2 on the opposite side of the insulating plate 1 includes the bonding region 6 ato which the semiconductor element 4 is bonded by the solder 5. The metal pattern 2 includes at least one concave part 7 located in the main surface 6.In the semiconductor element bonding substrate 100 according to the present embodiment 1, the concave part 7 is provided near the edge of the bonding region 6 ain the main surface 6 of the metal pattern 2. The solder is supplied to an inner side of the concave part 7 when the semiconductor element 4 is bonded to the bonding portion 6 awith solder. When the molten solder 5 is caused to coagulate, the solder 5 filling the inside of the concave part 7 shrinks, thereby reducing shrinkage of a fillet part 5 aof the solder 5. Consequently, it is possible to suppress a voids from occurring in the fillet part 5 aof the solder 5 and the voids from entering a lower side of the semiconductor element 4. The occurrence of the voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor device 101 can be improved.In the semiconductor element bonding substrate 100 according to the present embodiment 1, at least one concave part includes the plurality of concave parts 7, and the plurality of concave parts 7 is located along the edge of the bonding region 6 a. Accordingly, the plurality of concave parts 7 are located along the edge of the bonding region 6 a, so that occurrence of the voids over an outer periphery of the solder 5 bonding the semiconductor element 4 can be suppressed.<Ausführungsform 2>FIG. 3 is a plan view of a semiconductor element bonding substrate 200 according to a present embodiment 2. FIG. 4 is a cross-sectional view of a semiconductor device 201 according to the present embodiment 2. in the semiconductor device 201 illustrated in FIG. 4, a semiconductor element 4 is bonded to a bonding region 6 ain the semiconductor element bonding substrate 200 by means of a solder 5. A cross section of the semiconductor device 201 illustrated in FIG. 4 corresponds to a cross section along a line segment B-B in FIG. 3.The semiconductor element bonding substrate 200 includes an insulating plate 1 and a metal pattern 2. the metal pattern 2 is bonded to a main surface of the insulating plate 1. A main surface 6 of the metal pattern 2 on an opposite side of the insulating plate 1 includes the bonding region 6 ato which the semiconductor element 4 is bonded by the solder 5. In the bonding region 6 a, a continuous groove 8 is formed in the main surface of the metal pattern 2. The through groove 8 is located in the bonding portion 6 aalong an edge of the bonding portion 6 a. As illustrated in FIG. 4, the through groove 8 is formed at a position in the metal pattern 2 that is immediately below an end portion of the semiconductor element 4.A plating may be performed on the main surface 6 of the metal structure 2 in order to bond the metal structure 2 and the semiconductor element 4 more successfully. As illustrated in FIG. 4, a back surface metal pattern 3 may be bonded to a surface of the insulating plate 1 on an opposite side of the metal pattern 2.<>In the semiconductor element bonding substrate 200 according to the present embodiment 2, the concave part 7 described in Embodiment 1 is the through groove 8 located along the edge of the bonding region 6 a. Accordingly, the through groove 8 is located along the edge of the bonding region 6 a, so that a larger amount of solder 5 is supplied to an inner side of the groove 8 as compared with the case where the concave part 7 is provided as described in Embodiment 1. Thus, it is possible to more effectively suppress a voids from occurring in the fillet part 5 aof the solder 5 and the voids from entering a lower side of the semiconductor element 4.<Ausführungsform 3>FIG. 5 is a plan view of a semiconductor element bonding substrate 300 according to a present embodiment 3. FIG. 6 is a cross-sectional view of a semiconductor device 301 according to the present embodiment 3. In the semiconductor device 301 illustrated in FIG. 6, a semiconductor element 4 is bonded to a bonding region 6 ain the semiconductor element bonding substrate 300 by means of a solder 5. A cross section of the semiconductor device 300 illustrated in FIG. 6 corresponds to a cross section along a line segment C-C in FIG. 5.The semiconductor element bonding substrate 300 further includes a metal member 9 located in each of the plurality of concave parts 7 as compared with the semiconductor element bonding substrate 100 (FIG. 1 ) in Embodiment 1. The metal member 9 is made of a material having a higher thermal conductivity than the solder 5. The metal member 9 is made of, for example, Cu, Ni, Au, Ag, Ni-plated Cu, or Ni-plated Al. The semiconductor element bonding substrate 300 has the same configuration as the semiconductor element bonding substrate 100 (FIG. 1 ) except for the metal member 9, so the description will be omitted.<>The semiconductor element bonding substrate 300 according to the present embodiment 3 further includes a metal member 9 located in each of the plurality of concave parts 7 in the semiconductor element bonding substrate 100 in the embodiment 1, and the thermal conductivity of the metal member 9 is greater than that of the solder 5.In the semiconductor element bonding substrate 300 according to the present embodiment 3, the concave part 7 is provided near the edge of the bonding region 6 ain the main surface 6 of the metal pattern 2, and the metal member 9 is located in the concave part 7. When the semiconductor element 4 is bonded to the bonding portion 6 awith solder and the molten solder 5 is caused to coagulate, the solder 5 located near the edge of the bonding portion 6 awhere the metal member 9 having the high thermal conductivity is located can be caused to coagulate first. That is, a central part of the bonding portion 6 ais a part where the solder 5 is finally caused to coagulate, so that occurrence of a voids in a fillet part 5 awhere the solder 5 is caused to coagulate early can be suppressed. The occurrence of the voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor device 301 can be improved.<Ausführungsform 4>FIG. 7 is a plan view of a semiconductor element bonding substrate 400 according to a present embodiment 4. FIG. 8 is a cross-sectional view of a semiconductor device 401 according to the present embodiment 4. In the semiconductor device 401 illustrated in FIG. 8, a semiconductor element 4 is bonded to a bonding region 6 ain the semiconductor element bonding substrate 400 by means of a solder 5. A cross section of the semiconductor device 401 illustrated in FIG. 8 corresponds to a cross section along a line segment D-D in FIG. 7.The semiconductor element bonding substrate 400 further includes a metal member 10 located in a groove 8, as compared with the semiconductor element bonding substrate 200 (FIG. 3 ) in Embodiment 2. the metal member 10 is formed of a material having a higher thermal conductivity than the solder 5. The metal member 10 has a frame-like shape. The metal member 10 is made of, for example, Cu, Ni, Au, Ag, Ni-plated Cu, or Ni-plated Al. The semiconductor element bonding substrate 400 has the same configuration as the semiconductor element bonding substrate 200 (FIG. 3 ) except for the metal member 10, so the description will be omitted.<>The semiconductor element bonding substrate 400 according to the present embodiment 4 further includes the metal member 10 located in the groove 8 in the semiconductor element bonding substrate 200 in the embodiment 2, and the thermal conductivity of the metal member 10 is greater than that of the solder 5.In the semiconductor element bonding substrate 400 according to the present embodiment 4, the through groove 8 is provided along the edge of the bonding region 6 ain the main surface 6 of the metal pattern 2, and the metal member 10 is located in the groove 8. When the semiconductor element 4 is bonded to the bonding portion 6 awith solder and the molten solder 5 is caused to coagulate, the solder 5 located near the edge of the bonding portion 6 awhere the metal member 10 having the high thermal conductivity is located can be caused to coagulate first. That is, a central part of the bonding portion 6 ais a part where the solder 5 is finally caused to coagulate, so that occurrence of a voids in a fillet part 5 awhere the solder 5 is caused to coagulate early can be suppressed. The occurrence of the voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor device 401 can be improved.<Ausführungsform 5>FIG. 9 is a plan view of a semiconductor element bonding substrate 500 according to a present embodiment 5. FIG. 10 is a cross-sectional view of a semiconductor device 501 according to the present embodiment 5. A cross section of the semiconductor device 501 illustrated in FIG. 10 corresponds to a cross section along a line segment E-E in FIG. 9.The semiconductor element bonding substrate 500 includes an insulating plate 1 and a metal pattern 2. the metal pattern 2 is bonded to a main surface of the insulating plate 1. A main surface 6 of the metal pattern 2 on an opposite side of the insulating plate 1 includes a bonding region 6 ato which the semiconductor element 4 is bonded by the solder 5.In the bonding region 6 ain the main surface 6 of the metal pattern 2, the main surface 6 of the metal pattern 2 has a different height between the central part of the bonding region 6 aand a surrounding surface of the central part. In the present embodiment 5, as illustrated in FIG. 10, a recessed part 11 is formed in the main surface 6 of the metal pattern 2 so that the central part of the bonding region 6 ahas a lower height than the surrounding area of the central part.A plating may be performed on the main surface 6 of the metal structure 2 in order to bond the metal structure 2 and the semiconductor element 4 more successfully. As illustrated in FIG. 10, a back surface metal pattern 3 may be bonded to a surface of the insulating plate 1 on an opposite side of the metal pattern 2.<>The semiconductor element bonding substrate 500 in the present embodiment 5 includes the insulating plate 1 and the metal pattern 2 bonded to the main surface of the insulating plate 1. the main surface 6 of the metal pattern 2 on the opposite side of the insulating plate 1 includes the bonding region 6 ato which the semiconductor element 4 is bonded via the solder 5. The main surface 6 has the different height between the central part of the bonding region 6 aand the surrounding surface of the central part.According to the semiconductor element bonding substrate 500 in the present embodiment 5, the height of the main surface 6 of the metal pattern 2 between the central part of the bonding portion 6 aand the surrounding surface of the central part is set different, so that a timing of coagulation of the solder 5 between the central part of the bonding portion 6 aand the surrounding surface of the central part can be set different. For example, the height of the central part of the bonding portion 6 ais lower than the surrounding area of the central part, so that the solder 5 can be caused to coagulate early in the surrounding area of the central part of the bonding portion 6 a.In the bonding region 6 ain the semiconductor element bonding substrate 500 according to the present embodiment 5, the central part of the bonding region 6 ahas the lower height than the surrounding area of the central part. When the semiconductor element 4 is bonded to the bonding portion 6 awith solder and the molten solder 5 is caused to coagulate, the solder 5 is supplied to the recessed portion 11 at a center of the bonding portion 6 a, and the solder 5 filling the recessed portion 11 increases a heat capacity in a portion immediately below the central portion of the semiconductor element 4. That is, a central part of the bonding portion 6 ais a part where the solder 5 is finally caused to coagulate, so that occurrence of a voids in a fillet part 5 awhere the solder 5 is caused to coagulate early can be suppressed. The occurrence of the voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor device 501 can be improved.<Ausführungsform 6>FIG. 11 is a plan view of a semiconductor element bonding substrate 600 according to a present embodiment 6. FIG. 12 is a cross-sectional view of a semiconductor device 601 according to the present embodiment 6. A cross section of the semiconductor device 601 illustrated in FIG. 12 corresponds to a cross section along a line segment F-F in FIG. 11.The semiconductor element bonding substrate 600 further includes a metal member 12 located in a recessed part 11 in a central part of the bonding region 6 a, as compared with the semiconductor element bonding substrate 500 (FIG. 9 ) in Embodiment 5. The metal member 12 is formed of a material having a lower thermal conductivity than the solder 5. The metal member 12 is an alloy mainly containing Ni, for example. The semiconductor element bonding substrate 600 has the same configuration as the semiconductor element bonding substrate 500 (FIG. 9 ) except for the metal member 12, so the description will be omitted.<>In the semiconductor element bonding substrate 600 according to the present embodiment 6, the metal member 12 is located in the recessed part 11 in the central part of the bonding region 6 a, and the thermal conductivity of the metal member 12 is lower than that of the solder 5.The metal member 12 having the low thermal conductivity is embedded in the central part of the bonding portion 6 ato which the semiconductor element 4 is bonded, so that when the semiconductor element 4 is bonded to the bonding portion 6 awith solder and the molten solder 5 is caused to clot, the heat capacity increases in the portion immediately below the central part of the semiconductor element 4. Accordingly, the solder 5 located near the edge of the bonding portion 6a can be first caused to be coagulated. That is, the central part of the bonding portion 6 ais a part where the solder 5 is finally caused to coagulate, so that occurrence of a voids in a fillet part 5 awhere the solder 5 is caused to coagulate early can be suppressed. The occurrence of the voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor device 601 can be improved.< 7>FIG. 13 is a plan view of a semiconductor element bonding substrate 700 according to a present embodiment 7. FIG. 14 is a cross-sectional view of a semiconductor device 701 according to the present embodiment 7. in the semiconductor device 701 illustrated in FIG. 14, a semiconductor element 4 is bonded to a bonding region 6 ain the semiconductor element bonding substrate 700 by means of a solder 5. A cross section of the semiconductor device 701 illustrated in FIG. 14 corresponds to a cross section taken along a line G-G in FIG. 13.The semiconductor element bonding substrate 700 includes an insulating plate 1 and a metal pattern 2. the metal pattern 2 is bonded to a main surface of the insulating plate 1. A main surface 6 of the metal pattern 2 on an opposite side of the insulating plate 1 includes the bonding region 6 ato which the semiconductor element 4 is bonded by the solder 5.In the bonding region 6 ain the main surface 6 of the metal pattern 2, the main surface 6 of the metal pattern 2 has a different height between the central part of the bonding region 6 aand a surrounding surface of the central part. In the present embodiment 7, as illustrated in FIG. 14, a convex part 13 is formed in the main surface 6 of the metal pattern 2 such that the central part of the bonding region 6 ahas a height larger than the surrounding area of the central part.A plating may be performed on the main surface 6 of the metal structure 2 in order to bond the metal structure 2 and the semiconductor element 4 more successfully. As illustrated in FIG. 14, a back surface metal pattern 3 may be bonded to a surface of the insulating plate 1 on an opposite side of the metal pattern 2.<>In the bonding region 6 ain the semiconductor element bonding substrate 700 according to the present embodiment 7, the central part of the bonding region 6 ahas the height greater than the surrounding area of the central part. Compared with the central part, when the semiconductor element 4 is bonded to the bonding portion 6 awith solder, a larger amount of solder 5 is supplied to the surrounding area of the central part of the bonding portion 6 a. Consequently, when the molten solder 5 is caused to coagulate, the solder 5 shrinks in the surrounding area of the central part of the bonding portion 6 a, thereby reducing shrinkage of a fillet part 5 aof the solder 5. Consequently, it is possible to suppress a voids from occurring in the fillet part 5 aof the solder 5 and the voids from entering a lower side of the semiconductor element 4. The occurrence of the voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor device 701 can be improved.Plating may be performed on the surface of the bonding region 6 ain the metal pattern 2 in each of the semiconductor element bonding substrates 100, 200, 300, 400, 500, 600, and 700 described in Embodiments 1 to 7. A thin film of Ni, for example, is formed on the surface of the bonding portion 6a in the metal pattern 2, and bonding by the solder 5 can be performed more successfully.In the semiconductor devices 101, 201, 301, 401, 501, 601, and 701 described in Embodiments 1 to 7, the semiconductor element 4 includes a power semiconductor including SiC or GaN. A particularly high heat radiation property is demanded, for example, in a switching element for power conversion in which a large current and a high voltage are used and a switching operation is performed at high speed. It is particularly effective that the semiconductor device of the present invention has the configuration including the SiC or GaN-containing power semiconductor.< 8>In a present embodiment 8, the semiconductor device 101, 201, 301, 401, 501, 601 or 701 according to any one of the above-mentioned Embodiments 1 to 7 is used for a power conversion device. A power conversion device 800 that is a three-phase inverter will be described as an example of the power conversion device.FIG. 15 is a diagram illustrating a configuration of a power conversion system according to the present embodiment 8. The power conversion system 800 illustrated in FIG. 15 is connected to a power source 901 and a load 902. The power source 901, which is a DC power source, provides DC power to the power conversion device 800. The power source 901 may be configured of various kinds of components such as a DC power system, a solar battery, and a rechargeable battery. The power source 901 may be configured of, for example, a rectifier circuit connected to an AC system or an AC / DC converter. The power source 901 may also be configured of a DC / DC converter that converts a DC power output from the DC system into a predetermined power.The power conversion device 800 is a three-phase inverter connected between the power source 901 and the load 902. The power conversion device 800 converts the DC power supplied from the power source 901 into the AC power, and supplies the AC power to the load 902. As illustrated in FIG. 15, the power conversion device 800 includes a power conversion circuit 801 and a control circuit 802. The control circuit 802 outputs a control signal for controlling a switching operation of the power conversion circuit 801 to the power conversion circuit 801. The power conversion circuit 801 converts the DC power into the AC power based on the control signal and outputs the AC power.The power conversion circuit 801 is, for example, a three-phase full bridge circuit having two levels. For example, two semiconductor devices 101 connected in series correspond to a U phase, a V phase, and a W phase, respectively. In this case, the power conversion circuit 801 includes six semiconductor devices 101 in total. The semiconductor device 101 may be any of the semiconductor devices 201, 301, 401, 501, 601, and 701.The load 902 is a three-phase electric motor that is driven by the AC power supplied from the power conversion device 800. The load 902 is not for a specific purpose of use, but is the electric motor mounted on various types of electric devices. The load 902 is, for example, the electric motor for a hybrid vehicle, an electric vehicle, a rail vehicle, a lift or an air conditioning system.In the above description, the power conversion circuit 801 is a three-phase full bridge circuit, but is not limited thereto. Thus, the power conversion circuit 801 may be a circuit including at least one of the semiconductor devices 101, 201, 301, 401, 501, 601, and 701, and converts the electric power.<>The power conversion device 800 according to the present embodiment 8 includes the power conversion circuit 801 that converts the input electric power and outputs the electric power, and the control circuit 802 that outputs the control signal to the power conversion circuit 801. The power conversion circuit 801 includes at least one of the semiconductor devices 101, 201, 301, 401, 501, 601, and 701.As described in Embodiments 1 to 7, occurrence of voids in the solder 5 is suppressed, so that the heat radiation property in the semiconductor devices 101, 201, 301, 401, 501, 601, and 701 can be improved. Accordingly, the heat radiation property of the power conversion device 800 including the semiconductor device can also be improved.

Claims

A semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) comprising: - an insulating plate (1); and - a metal pattern (2) bonded to a main surface of the insulating plate (1), wherein: - a main surface (6) of the metal pattern (2) includes, on an opposite side of the insulating plate (1), a bonding region (6a) to which a semiconductor element (4) is bonded by means of a solder (5), - the metal pattern (2) includes at least one concave part (7) located in the main surface (6), - the at least one concave part (7) is located in the bonding region (6a) closer to an edge of the bonding region (6a) with respect to a central part of the bonding region (6a), - the at least one concave part (7) is a plurality of concave parts (7), the plurality of concave parts (7) is located along an edge of the bonding region (6a), a metal component (9) is formed and located in each of the plurality of concave parts (7), and the metal component (9) has a greater thermal conductivity than the solder (5).A semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) comprising: - an insulating plate (1); and - a metal pattern (2) bonded to a main surface of the insulating plate (1), wherein: - a main surface (6) of the metal pattern (2) includes, on an opposite side of the insulating plate (1), a bonding region (6a) to which a semiconductor element (4) is bonded by means of a solder (5), - the metal pattern (2) includes at least one concave part (7) located in the main surface (6), - the at least one concave part (7) is located in the bonding region (6a) closer to an edge of the bonding region (6a) with respect to a central part of the bonding region (6a), the at least one concave part (7) is a continuous groove (8) situated along the edge of the bonding region (6a), a metal component (10) is formed and situated in the groove (8), and the metal component (10) has a greater thermal conductivity than the soldering metal (5).The semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) according to any one of the preceding claims, wherein plating is performed on a surface of the bonding region (6a) in the metal pattern (2).A semiconductor device (101, 201, 301, 401, 501, 601, 701) comprising: - the semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) according to any one of the preceding claims; and - a semiconductor element (4) bonded to the bonding region (6a) in the metal pattern (2) by means of a solder (5).The semiconductor device (101, 201, 301, 401, 501, 601, 701) according to claim 4, wherein the semiconductor element (4) includes a power semiconductor including SiC or GaN.A power conversion device (800) comprising: - a power conversion circuit (801) that converts electric power that has been input and outputs the electric power; and - a control circuit (802) that outputs a control signal to the power conversion circuit, wherein the power conversion circuit (801) includes at least one semiconductor device (101, 201, 301, 401, 501, 601, 701) according to claim 4 or claim 5.A semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) comprising: - an insulating plate (1); and - a metal pattern (2) bonded to a main surface of the insulating plate (1), wherein: - a main surface (6) of the metal pattern (2) includes, on an opposite side of the insulating plate (1), a bonding region (6a) to which a semiconductor element (4) is bonded by means of a solder (5), - in the bonding region (6a), the main surface (6) of the metal pattern (2) has a different height between a central part of the bonding region (6a) and a surrounding area of the central part, - in the bonding region (6a), the central part of the bonding region (6a) has a lower height than the surrounding area of the central part, a metal member (12) is located at the central part of the bonding region (6a), and the metal member (12) has a lower thermal conductivity than the solder (5).The semiconductor element bonding substrate (100, 200, 300, 400, 500, 600, 700) according to claim 7, wherein plating is performed on a surface of the bonding region (6a) in the metal pattern (2).A semiconductor device (101, 202, 301, 401, 501, 601, 701) comprising: - the semiconductor element bonding substrate (500, 600, 700) according to any one of claims 10 to 14; and - a semiconductor element (4) bonded to the bonding region (6a) in the metal pattern (2) by means of a solder (5).The semiconductor device (101, 202, 301, 401, 501, 601, 701) according to claim 9, wherein the semiconductor element (4) includes a power semiconductor including SiC or GaN.A power conversion device (800) comprising: - a power conversion circuit (801) that converts electric power that has been input and outputs the electric power; and - a control circuit (802) that outputs a control signal to the power conversion circuit, wherein the power conversion circuit (801) includes at least one semiconductor device (101, 202, 301, 401, 501, 601, 701) according to claim 9 or claim 10.

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