SiC epitaxic wafer and method for producing it

Abstract

SiC epitaxy wafer (10), comprising: a 4H-SiC single-crystal substrate (1) having a surface with a deviating angle with respect to a c-plane as the main surface (1a) and a chamfered portion (1A) on a circumferential portion; and a SiC epitaxial film (2) formed on the 4H-SiC single crystal substrate (1) with a film thickness of 20 µm or more, where the density of an interfacial dislocation extending from an outer circumferential edge (2a) of the SiC epitaxial layer (2) is 10 lines / cm or less.

Description

TECHNICAL AREA

[0001] The present invention relates to a SiC epitaxy wafer and a method for its production. STATE OF THE ART

[0002] Silicon carbide (SiC) exhibits properties such as an electrical breakdown field that is an order of magnitude larger, a band gap that is three times larger, and a thermal conductivity that is three times higher than that of silicon (Si). Because silicon carbide possesses these properties, it is expected to be suitable for use in power devices, high-frequency devices, high-temperature operating devices, and the like. Therefore, SiC epitaxial wafers have been used in the aforementioned semiconductor devices in recent years.

[0003] To promote the practical application of a SiC device, it is essential to establish high-quality crystal growth technology and high-quality epitaxial growth technology.

[0004] A SiC device is generally manufactured using a SiC epitaxial wafer in which a SiC epitaxial layer (film), which becomes an active region of the device by chemical vapor deposition (CVD) or the like, has been grown on a SiC single-crystal substrate (in some cases simply referred to as the SiC substrate) obtained by processing from a bulk SiC single crystal grown by sublimation recrystallization or the like.

[0005] More precisely, the SiC epitaxy wafer is generally obtained by growing a 4H-SiC epitaxy layer on a SiC single crystal substrate, using a surface with a different angle from a (0001) plane in the direction <11-20> as the growth surface, namely step flow growth (growth in the transverse direction from an atomic step).

[0006] The SiC single-crystal substrate generally exhibits crystal defects known as screw dislocations (TSD), edge dislocations (TED), or basal plane dislocations (BPD), and these defects can, in some cases, degrade the device properties. These dislocations essentially propagate from the SiC single-crystal substrate to the SiC epitaxial film.

[0007] On the other hand, it is known that a dislocation, called an interface dislocation, occurs in the SiC epitaxial film. This interface dislocation is a type of basal plane dislocation and extends in a direction perpendicular to a SiC substrate dislocation direction (in a case where the substrate dislocation direction is the <11-20>, <11-100> direction) near an interface between the SiC substrate and the SiC epitaxial film.

[0008] It is assumed that the interface dislocation is elongated to reduce stress near the interface.

[0009] Furthermore, not only the step dislocation propagated by the SiC single crystal substrate, but also the step dislocation series (“TED pairs 9” in Fig. 8) are formed on the SiC epitaxial film. In particular, when two edge dislocations newly generated during epitaxial growth are paired and the dislocation direction is <11-20>, the pairs of dislocations are continuously arranged in a row in the <1-100> direction, and the edge dislocation series can be formed. As a result of the generation of the edge dislocation series, the epitaxial film exhibits a higher dislocation density than the SiC single-crystal substrate, and it can degrade the crystallinity during epitaxial growth. The pairs of edge dislocations are linked by the basal plane dislocation at their base in a half-loop configuration. List of citations from patent literature

[0010] Patent document 1: JP 2008 - 34 776 A Non-patented literature

[0011] Nicht-Patentdokument 1: ZHANG, X. [et al.]: Glide and multiplication of basal plane dislocations during 4H-SiC homoepitaxy. In: Journal of Applied Physics, Vol. 102, 2007, S. 093520-1 - 093520-8.

[0012] DE 11 2014 002 647 T5 discloses a process for producing a silicon carbide substrate, in which a silicon carbide single-crystal substrate is produced having a first main face, a second main face, and a first side-end section, wherein the second main face is opposite the first main face, the first side-end section connects the first main face and the second main face, and the first main face has a width with a maximum value of more than 100 mm. A silicon carbide epitaxial layer is formed in contact with the first side-end section, the first main face, and an interface between the first main face and the first side-end section. The silicon carbide epitaxial layer in contact with the first side-end section and the interface is removed, e.g., by polishing, to remove step sections. REVELATION OF THE INVENTION Technical Problem

[0013] A connection between the generation of the step dislocation series and the interface dislocation and the features of an X-ray topography image and a PL image, which were clarified in non-patent document 1 based on observations by X-ray topography, photoluminescence (PL) and the like, is discussed with reference to Fig. 8 described.

[0014] Fig. Figure 8 is a perspective view schematically depicting a SiC epitaxial wafer in which a SiC epitaxial film is formed on a SiC single-crystal substrate. For clarity, an A-point, a B-point, a C-point, and an AB-part and a BC-part connecting them are shown.

[0015] An L-shaped dislocation is observed in the X-ray topography image. The L-shaped dislocation is characterized by the AB part (an interface dislocation 14) and the BC part (a basal plane dislocation 15) being in Fig. 8 can be observed. The BC part traverses a SiC epiaxial film 5 while being placed on a (0001) basal plane 16 and terminates at point C on a surface of the SiC epiaxial film 5. In the L-shaped dislocation, the BC part (the basal plane dislocation 15) moves to the right during epitaxial growth. Correspondingly, the AB part (the interface dislocation 14) extends in the correct direction. In this way, as the AB part (the interface dislocation 14) extends to the right, the step dislocation series (a “TED pair 9” in Fig. 8) formed sequentially in a section of C, and an arrangement of the step dislocation series can be formed (hereinafter, a structure in which the step dislocation series are arranged in a direction perpendicular to a step flow direction is referred to as a pair arrangement (a pair arrangement 11 in Fig. 8) denoted.) Thus, the generation of the step dislocation series and the interface dislocation are closely linked.

[0016] In the X-ray topography image, the contrast becomes weaker because an image of the step dislocation series is flatter from the surface as it moves to the right.

[0017] In the X-ray topography image, the entire AB part (the interface dislocation), the BC part (the basal plane dislocation) and the step dislocation series are frequently observed.

[0018] On the other hand, in the photoluminescence (PL) image, the arrangement of the edge dislocation series is observed as an array of points, and the BC part (the basal plane dislocation) appears linear. Conversely, the AB part (the interface dislocation) is difficult to observe.

[0019] Therefore, by observing the arrangement of points and a linear pattern corresponding to the BC section (basal plane dislocation) in the PL image, the presence of the interface dislocation can be known.

[0020] The arrangement of step dislocation sequences extends perpendicular to the step flow direction, and an arrangement of step dislocation sequences and an interface dislocation resulting from the generation of the arrangement are parallel to each other. Accordingly, the presence of an interface dislocation extending perpendicular to the step flow direction can be confirmed by finding an arrangement of points. Furthermore, the BC portion (the basal plane dislocation) extends parallel to the step flow direction, and a BC portion (the basal plane dislocation) and an interface dislocation resulting from the occurrence of the BC portion are perpendicular to each other. Therefore, the presence of an interface dislocation extending perpendicular to the step flow direction can be confirmed by finding a linear pattern corresponding to one BC portion (the basal plane dislocation).

[0021] The interface dislocation known in the prior art is generated at a location on the SiC substrate where a basal plane dislocation (BPD) is present.

[0022] On the other hand, the present inventors discovered a new interfacial dislocation (hereinafter referred to as the "outer edge interfacial dislocation") that extends from an outer circumferential edge of a SiC substrate when a SiC epitaxial film grows on the SiC substrate. Through detailed investigations, the inventors found that the outer edge interfacial dislocation is generated by increasing the thickness of an epitaxial SiC film. The interfacial dislocation of the prior art originates at the location of the BPD on the SiC substrate. However, the interfacial dislocation discovered by the present inventors (the outer edge interfacial dislocation) differs from this in that the interfacial dislocation originates from an outer circumferential edge of the SiC substrate. Since the interfacial dislocation reduces the reliability of a device, as does the interfacial dislocation of the prior art, it should be reduced.

[0023] The reason why the outer edge interface dislocation has not been found so far is that a SiC epitaxial layer thick enough to create an outer edge interface dislocation is rarely used.

[0024] The present invention was made taking into account the aforementioned circumstances, and one objective is to provide a SiC epitaxial wafer with a SiC epitaxial film having a film thickness of 20 µm or more and a low density of an outer edge interface dislocation, and a method for its fabrication. Solution to the task

[0025] The present invention provides the means listed in independent claims 1 and 4 to solve the problems. Advantageous effects of the invention

[0026] According to the SiC epitaxy wafer of the present invention, it is possible to provide a SiC epitaxy wafer with a SiC epitaxial film having a film thickness of 20 µm or more and a low density of an outer edge interface dislocation. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a schematic cross-sectional view of the environment of a peripheral part of a SiC single crystal substrate. Fig. Figure 2 is a schematic sectional view of the environment of a peripheral part of a SiC epitaxy wafer. Fig. Figure 3 is a schematic diagram showing a PL image obtained from a SiC epitaxy wafer and an observation position, wherein (a) is a PL image at a position of an orientation plane, (b) is a PL image at a position on a side opposite the orientation plane, and (c) is a schematic diagram showing a relationship between the position of the orientation plane in the SiC epitaxy wafer and a step flow direction. Fig. Figure 4A is a schematic sectional view showing two stages of a SiC substrate and the growth of a SiC epiaxial film grown on it, in a case where the width of a slope part is large. Fig. Figure 4B is a schematic sectional view showing two stages of a SiC substrate and the growth of a SiC epiaxial film grown on it, in a case where the width of a slope part is small. Fig. Figure 5 is a diagram showing the results of an investigation into a relationship between the film thickness of an epitaxial film and the presence or absence of the generation of an outer edge interface dislocation. Fig. 6A is a confocal microscope image when an inclined part is 170 µm and a film thickness of a SiC epiaxial film is 28 µm, shown in Fig. 5. Fig. 6B is a PL image when an inclined part is 170 µm and the film thickness of a SiC epiaxial film is 28 µm, as shown in Fig. 5. Fig. 7A is a PL image when an inclined part is 150 µm and the film thickness of a SiC epiaxial film is 33 µm, as shown in Fig. 5. Fig. 7B is a PL image when an inclined part is 0 µm and a film thickness of a SiC epiaxial film is 33 µm, as shown in Fig. 5. Fig. Figure 8 is a perspective view schematically showing a SiC epitaxial wafer in which a SiC epitaxial film is formed on a SiC single crystal substrate to illustrate a relationship between the generation of a step dislocation series and an interface dislocation. BEST EXECUTION OF THE INVENTION

[0027] Preferred examples of the present invention are described below. In particular, a SiC epitaxy wafer and a method for its fabrication according to preferred embodiments of the present invention are described in detail with reference to drawings. In the drawings used in the following description, a feature may be enlarged and, in some cases, shown for clarity, and the dimensional ratio of each component may not correspond to that of an actual part. Furthermore, a material, a dimension, and the like are to be understood as exemplary in the following description. The present invention is not limited thereto and can be carried out with appropriate modifications within the scope that demonstrates an effect.That is to say, the present invention is not limited to the following examples, and addition, omission, substitution or modification of a position, number, shape, material, configuration and the like may take place. (SiC epitaxy wafer)

[0028] According to one embodiment of the present invention, a SiC epitaxy wafer is provided comprising: a 4H-SiC single-crystal substrate having a surface with a deviating angle with respect to a c-plane as the main surface and a chamfer portion on a circumferential portion; and a SiC epitaxy layer having a film thickness of 20 µm or more, formed on the 4H-SiC single-crystal substrate, wherein the density of an interfacial dislocation extending from an outer circumferential edge of the SiC epitaxy layer is 10 lines / cm or less.

[0029] The “boundary dislocation extending from an outer circumferential edge” can be referred to as an “outer edge boundary dislocation”.

[0030] The c-plane represents a {0001} surface. The (0001) plane in the c-plane is referred to as the (0001) Si surface.

[0031] The density of the interface dislocation extending from the outer circumferential edge can be measured, for example, from a photoluminescence (PL) image. A PL image obtained at a near-infrared (NIR) light reception wavelength using a photoluminescence detector (SICA88, manufactured by Lasertec Corporation) can be used as a PL image.

[0032] The SiC epitaxial wafer of the present invention contains a SiC epitaxial layer with a film thickness of 20 µm or more and the density of the outer edge interface dislocation can be zero lines / cm.

[0033] Furthermore, the SiC epitaxial wafer of the present invention can include a SiC epitaxial layer with a film thickness of 22 µm or more and an outer edge interface dislocation density of zero lines / cm.

[0034] Furthermore, the SiC epitaxial wafer of the present invention can include a SiC epitaxial layer with a film thickness of 24 µm or more and an outer edge interface dislocation density of zero lines / cm.

[0035] Furthermore, the SiC epitaxy wafer of the present invention can include a SiC epitaxy layer with a film thickness of 27 µm or more and an outer edge interface dislocation density of zero lines / cm.

[0036] Furthermore, the SiC epitaxy wafer of the present invention can include a SiC epitaxy layer with a film thickness of 29 µm or more and an outer edge interface dislocation density of zero lines / cm.

[0037] Fig. Figure 1 is a schematic cross-sectional view of the environment of a peripheral part of a SiC single crystal substrate.

[0038] One form of the "chamfered part", as used in the present description, is formed with Fig. 1 described. In the present description, the “chamfered portion” is a part of the circumferential part of the substrate that is chamfered to prevent the substrate from chipping or generating particles, and it is a section that is thinner than the thickness of the substrate.

[0039] A SiC single-crystal substrate 1 has a main surface (flat part) 1a and a chamfered part 1A, which includes an inclination part 1Aa and an outer circumferential edge part 1Ab surrounding it. The chamfered part 1A can also be understood according to the following formula: “chamfered part 1A” = “inclined part 1Aa” + “outer circumferential edge part 1Ab”.

[0040] The "inclined portion" is a section extending continuously from the flat portion 1a of the SiC single-crystal substrate and is a section with an inclined surface that is inclined to an outer circumference at a predetermined angle of 60° or less (an angle relative to a plane containing the main surface) with respect to the flat portion. However, the inclined surface is not limited to a single-angle inclined surface and can be an inclined surface with a variety of angles or a curved inclined surface with a curvature (smaller than the curvature of the "outer circumferential edge portion"). If the inclined surface has a curvature, an angle of the inclined surface is relative to an angle of a tangential plane.A SiC single-crystal substrate with an angle of 50° or less, 40° or less, 30° or less, 30° or less, or 20° or less as the angle of the inclined surface (an angle with respect to a plane including the main face) that includes the "inclined part" can be used. The in . Fig. The 5 data presented, which will be described later, were obtained in a case where a SiC single crystal substrate with an angle of 30° or less was used.

[0041] Furthermore, the "outer circumferential edge portion" is a section located radially on the outermost side of the SiC single-crystal substrate and is a section with a curved surface of a predetermined curvature. However, the curved surface is not limited to a surface with only one curvature and can exhibit a curved surface with a variety of curvatures or include a plane (e.g., a vertical plane) on a section that does not transition to the "incline portion" beneath the sections that constitute the "outer circumferential edge portion." Based on a conjectured mechanism for generating the outer edge interface dislocation, which will be described later, when there is a structure without an "outer circumferential edge portion" and vertically steep on an outer side of the "incline portion," there appears to be no nucleation site that could be a source of random growth, which is a positive finding.In the case of this structure, however, it is likely that a corner will be damaged. Therefore, the corner is rounded to prevent chipping, generally resulting in the "outer circumferential edge part".

[0042] Fig. Figure 2 is a schematic sectional view of the environment of a peripheral part of a SiC epitaxy wafer.

[0043] In a SiC epitaxy wafer 10, an outer circumferential edge 2a of a SiC epitaxy layer 2 refers to the outermost side in the radial direction, in the SiC epitaxy layer 2 on the main surface (the flat part) 1a of the SiC single crystal substrate 1.

[0044] (a) and (b) in Fig. Figure 3 shows PL images obtained at different positions on the SiC epitaxy wafer. (c) by Fig. Figure 3 is a schematic diagram showing a relationship between the position of an orientation plane in the SiC epitaxy wafer and a step flow direction.

[0045] (a) of Fig. 3 is a PL image at a position of the orientation plane, (b) of Fig. 3 is a PL image at a position on one side opposite the orientation plane.

[0046] Both in (a) and (b) of Fig. 3. An arrangement of points and a linear pattern can be observed that corresponds to a BC part (a basal plane dislocation). Since in (a) of Fig. 3. Since an arrangement of points and a linear pattern corresponding to the BC part (the basal plane dislocation) can be observed, it is known that there is an outer edge boundary dislocation. In (b) of Fig. 3. It is known that there are two series of points and two linear patterns that correspond to the BC part (the basal plane dislocation).

[0047] Based on the inventors' PL observations, the outer edge boundary dislocation is greatest near the orientation plane, and many outer edge boundary dislocations are present on the side opposite the orientation plane. Conversely, at a position between the orientation plane and the side opposite the orientation plane, the direction is perpendicular to the outer tangent, i.e., the inclined direction of the bevel portion is almost parallel to the step flow direction. Therefore, there is almost no outer edge boundary dislocation generation in this position. The outer edge boundary dislocation is often generated at angles of 25° to 155° and 205° to 335° with respect to the central angle to the center of the wafer.

[0048] According to a preferred embodiment of the present invention, a SiC epitaxy wafer is provided in which the chamfer part includes an inclination part extending from the main surface and an outer circumferential edge part, and the width of the inclination part is 150 µm or more.

[0049] The “width of the slope section” here refers to the length in the radial direction when the slope section is viewed from a direction perpendicular to the main surface.

[0050] The presumed mechanism for the generation of the outer edge boundary dislocation is described in Fig. 4 described.

[0051] The Fig. 4A and Fig. Figure 4B shows schematic sectional views of two phases of a SiC substrate and the growth of a SiC epitaxial film grown on it (the upper drawing shows an initial phase of growth and the lower drawing shows that the growth is complete). Fig. Figure 4A shows a case where the width of the slope section is large, and Fig. Figure 4B shows a case where the width of the slope section is small.

[0052] In the initial phase of epitaxial growth, it is assumed that a nucleus 7 is formed in the outer circumferential edge portion 1Ab, which is the starting point of random growth. The reason for this is as follows.

[0053] In the flat part 1a of the main surface, the epitaxial film 5 is formed by step flow growth, and step flow growth is also maintained in the inclined part 1Aa when the c-plane is dominant. Since it is common practice to use a SiC substrate with a different angle, it is assumed that step flow growth is maintained and the probability of forming the nucleus 7, which is the starting point of random growth, is low. On the other hand, in the outer circumferential edge part 1Ab, a surface other than the c-plane (an r-plane or an m-plane) becomes dominant. Accordingly, it can be assumed that step flow growth hardly occurs in the outer circumferential edge part 1Ab and that random growth takes place.

[0054] Based on the presumed mechanism of the generation of the outer edge boundary dislocation with reference to Fig. 4A The reason why the outer edge boundary surface dislocation has not been discovered so far can be assumed to be as follows.

[0055] Even if a polymorphic epitaxial film extends from the nucleus 7, which is formed at the outer circumferential edge portion 1Ab and is the starting point of random growth during epitaxial growth, the outer edge interface dislocation found by the present inventors is not generated if the interface dislocation does not reach the flat portion until the thickness of the epitaxial film 5 increases to a desired value. In the prior art, it is assumed that, since the desired thickness of the epitaxial film was small, this situation occurs, i.e., the interface dislocation has not reached the flat portion.

[0056] On the other hand, the present inventors, in an attempt to provide a thick epitaxial film of high quality, discovered the outer edge interface dislocation in the thick-layer epitaxial film.

[0057] On the other hand, as in Fig. Figure 4B shows that when using a substrate with a slope of small width (the distance from the outer circumferential edge part to the flat part is short), it is taken into account that even with a thin epitaxial film, the outer edge boundary dislocation is generated on the flat part.

[0058] Fig. Figure 5 shows results of an investigation into a relationship between the film thickness of an epitaxial film and the presence or absence of the generation of the outer edge boundary dislocation when the slope part has a predetermined width.

[0059] In the Fig. In Figure 5, the symbol "0" indicates that there is no outer edge dislocation, and the symbol "X" indicates that there is an outer edge dislocation. In the table, a dashed line indicates a boundary where the outer edge dislocation density is zero.

[0060] A sample from which data were obtained was taken as follows.

[0061] Using a 4 or 6 inch 4H-SiC single-crystal substrate with a 4° angle relative to the (0001) Si surface in a <11-20> direction, a known polishing step and a substrate surface cleaning step (etching) were performed. Subsequently, an epitaxial SiC growth step (growth temperature 1600°C and C / Si ratio 1.22) was carried out using silane and propane as starting gases with hydrogen as the carrier gas. In this way, a SiC epitaxial layer of a predetermined thickness was formed on a SiC single-crystal substrate to obtain a SiC epitaxial wafer.

[0062] In Fig. In point 5, “0 µm bevel section” refers to a bevel where a SiC single-crystal substrate has only been chamfered and the angle of the chamfered section exceeds 60°. Therefore, according to the above definition of the bevel section, this section is not included in the bevel section (correspondingly, the chamfer section in this SiC single-crystal substrate only includes the outer circumferential edge section).

[0063] In the case of using a SiC single-crystal substrate with a "0 µm inclination part", no outer-edge interface dislocation occurred at SiC epitaxial film thicknesses of 6 µm, 9 µm, or 18 µm. However, an outer-edge interface dislocation was generated at thicknesses of 24 µm or 33 µm. At 24 µm and 33 µm, the outer-edge interface dislocation density was 50 lines / cm or more.

[0064] In the case of using a SiC single-crystal substrate with a "60 µm inclination section" (one inclination angle of the inclination section was 25°), no outer-edge interface dislocation occurred with a SiC epitaxial film thickness of 12 µm or 16 µm, but an outer-edge interface dislocation was generated when the layer thickness was 33 µm. At 33 µm, the dislocation density of the outer-edge interface dislocation was 24 lines / cm.

[0065] Using a SiC single-crystal substrate with a "150 µm inclination section" (one inclination angle of the section was 23°), no outer-edge interface dislocation occurred at SiC epitaxial film thicknesses of 6 µm, 11 µm, 15 µm, or 18 µm. However, outer-edge interface dislocations were generated at thicknesses of 33 µm or 38 µm. In the cases of 33 µm and 38 µm, the outer-edge interface dislocation density was 20 lines / cm and 41 lines / cm, respectively.

[0066] In the case of using a SiC single-crystal substrate with a "170 µm inclination section" (one inclined angle of the inclination section was 23°), no outer-edge interface dislocation occurred with a SiC epitaxial film thickness of 28 µm. For this sample, the following results are shown: Fig. Figure 6A shows a microscope image obtained using a confocal microscope (SICA88, manufactured by Lasertec Corporation), a surface inspection instrument that employs a confocal differential optical interference system. Furthermore, it shows Fig. 6B a PL image of it.

[0067] In the case of using a SiC single-crystal substrate with a "200 µm inclination section" (one inclination angle of the inclination section was 11°), no outer-edge interface dislocation occurred at SiC epitaxial film thicknesses of 13 µm or 27.5 µm, but when the layer thickness was 32 µm, the outer-edge interface dislocation was generated. At 32 µm, the dislocation density of the outer-edge interface dislocation was 18 lines / cm.

[0068] If in Fig. 5 where a horizontal axis (X-axis) is the film thickness of the SiC epitaxial film and a vertical axis (Y-axis) is the width of the inclination part and an estimated limit of the presence or absence of generation of the outer edge interface dislocation is represented linearly, this can be expressed as Y=20X-400 (formula (1)).

[0069] Based on formula (1), when processing the width of the inclination part and selecting the film thickness of the SiC epitaxial film to satisfy the inequality Y>20X-400, a SiC epitaxial wafer without outer edge interface dislocation or with a low outer edge interface dislocation density can be obtained.

[0070] The width of the inclined section can be machined using a known method. For example, contouring or similar techniques can be used (see patent document 1).

[0071] Based on Fig. Equation 5 and formula (1) shows that, using a SiC single-crystal substrate with a tilt region width of 50 µm, a SiC epitaxial wafer without an outer-edge interface dislocation density can be obtained until the thickness of the SiC epitaxial film reaches 22 µm. Furthermore, using a SiC single-crystal substrate with a tilt region width of 100 µm, a SiC epitaxial wafer without an outer-edge interface dislocation density can be obtained until the thickness of the SiC epitaxial film reaches 24 µm. Furthermore, when using a SiC single crystal substrate where the width of the inclination part is 150 µm, a SiC epitaxial wafer without an outer edge interface dislocation density can be obtained until the thickness of the SiC epitaxial film reaches 27 µm.Furthermore, when using a SiC single crystal substrate where the width of the inclination part is 200 µm, a SiC epitaxial wafer without an outer edge interface dislocation density can be obtained until the thickness of the SiC epitaxial film reaches 29 µm.

[0072] The Fig. 7A and Fig. Figure 7B shows a PL image of a sample in a case where the inclination part is 150 µm and the film thickness of the SiC epiaxial film is 33 µm, and a PL image of a sample in a case where the inclination part is 0 µm and the film thickness of the SiC epiaxial film is 33 µm, shown in Fig. 5.

[0073] In the PL image of Fig. 7A The presence of 7 lines of interface dislocations can be confirmed by the number of L-shaped dislocations shown schematically in Fig. 8 are shown.

[0074] In the PL image of Fig. 7B The presence of 50 or more lines of interface dislocations can be confirmed by the number of L-shaped dislocations shown schematically in Fig. 8 are shown.

[0075] The 4H-SiC single-crystal substrate used for the SiC epitaxy wafer of the present invention has a deviation angle of, for example, 0.4° or more and 8° or less. Typical examples include a deviation angle of 4°. "Method for the production of a SiC epitaxy wafer".

[0076] According to a further embodiment of the present invention, a method for producing a SiC epitaxy wafer according to the invention is provided, in which a 4H-SiC single crystal substrate with a chamfer part in a circumferential part is used, wherein the chamfer part includes an inclination part extending from the main surface and an outer circumferential edge part, and the width of the inclination part is 150 µm or more.

[0077] This process can include a step for the fabrication of the H-SiC single-crystal substrate and a step for the formation of a SiC epitaxial film with a film thickness of 20 µm or more on the H-SiC single-crystal substrate. The step of forming the SiC epitaxial film with a film thickness of 20 µm or more can include a sub-step of determining the thickness of an epitaxial film satisfying formula (1) using a width of the inclination portion of the substrate to be used, and a sub-step of forming the SiC epitaxial film such that the thickness of a SiC epitaxial film to be produced is equal to or less than the thickness of the epitaxial film satisfying formula (1), which is obtained by the aforementioned formula: Y=20X−400 (in the formula, Y represents a width (µm) of the slope and X a thickness (µm) of an epitaxial film).

[0078] In the process for producing a SiC epitaxial wafer according to the present embodiment, a known step can be used, with the exception of the setup step using a predetermined 4H-SiC single-crystal substrate for the use of the aforementioned SiC wafer (SiC substrate). Furthermore, according to yet another embodiment of the present invention, a process for producing an epitaxial SiC wafer may preferably include the following: a step to select an epitaxial film thickness from a range of 20 µm or more; a step to determine a slope width which, using the selected thickness of the epitaxial film, corresponds to formula (1), Y=20X−400 (in the formula Y represents a width (µm) of the inclination and X a thickness (µm) of an epitaxial film); a step for the fabrication of a 4H-SiC single-crystal substrate with a beveled portion on a circumferential portion in which a slope width is equal to or greater than a value of the determined slope width obtained by formula (1); and a step to grow an epitaxial film of the specified thickness using the prepared 4H-SiC single crystal substrate.

[0079] In the method for producing a SiC epitaxy wafer of the present invention, the SiC epitaxy wafer of the present invention can preferably be produced. Industrial applicability

[0080] The present invention provides a SiC epitaxy wafer with a SiC epitaxial film having a film thickness of 20 µm or more and a low density of an outer edge interface dislocation. Reference character list 1 SiC single crystal substrate 1a Main area (flat section) 1A Beveled part 1Aa Inclination section 1From outer perimeter edge part 2 SiC epitaxial layer 2a Outer circumferential edge 3 Width of the incline section 4 Orientation level 5 Epitaxial film 9 TED pairs 10 SiC epitaxic wafers 11 pair row 12 Interface 13 Substrat 14 Interface 15 Basal plane dislocation 16 (0001) Basal plane A boundary where the outer edge boundary dislocation density becomes zero, Y=20X-400

Claims

[1] SiC epitaxy wafer (10), comprising: a 4H-SiC single-crystal substrate (1) having a surface with a deviating angle with respect to a c-plane as the main surface (1a) and a chamfered portion (1A) on a circumferential portion; and a SiC epitaxial film (2) formed on the 4H-SiC single crystal substrate (1) with a film thickness of 20 µm or more, where the density of an interfacial dislocation extending from an outer circumferential edge (2a) of the SiC epitaxial layer (2) is 10 lines / cm or less. [2] SiC epitaxy wafer according to claim 1, wherein the chamfered part (1A) has a slope part (1Aa) extending continuously from the main surface (1a) and an outer circumferential edge part (1Ab), and a width (3) of the inclination part is 150 µm or more. [3] SiC epitaxy wafer according to claim 1 or 2, wherein the density of the interfacial dislocation in a range of central angles of 25° to 155° and 205° to 335° with a center line in a <11-20> direction is 10 lines / cm or less. [4] Method for producing an epitaxial SiC wafer (10) according to claim 1, wherein a 4H-SiC single crystal substrate (1) is used, wherein the 4H-SiC single crystal substrate (1) has a chamfered portion (1A) in a circumferential portion, wherein the chamfered part (1A) has a slope section (1Aa) extending from the main surface (1a) and an outer circumferential edge part (1Ab), and a width (3) of the inclination part is 150 µm or more. [5] Method for producing an epitaxial SiC wafer according to claim 4, comprising: a step towards the preparation of the H-SiC single crystal substrate (1); and a step to form a SiC epitaxial film (5) with a film thickness of 20 µm or more on the H-SiC single crystal substrate (1). [6] Method for producing a SiC epitaxy wafer according to claim 5, wherein the step to form the SiC epiaxial film (5) with a film thickness of 20 µm or more a partial step to determine a thickness of an epitaxial film (5) which, using the width of the inclination part (1Aa) of the substrate to be used, satisfies formula (1), Y=20X−400 where in the formula Y represents a width (3) in µm of the inclination and X represents a thickness in µm of an epitaxial film (5), and a partial step to form a SiC epitaxial film (5) such that the thickness of the epitaxial film (5) is adjusted to be equal to or less than the determined thickness of the epitaxial film (5) satisfying formula (1) obtained by the aforementioned formula.

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