Short-circuit protection circuit for a semiconductor switching element

Abstract

A short-circuit protection circuit for a semiconductor switching element, the short-circuit protection circuit protecting a first semiconductor switching element, the first semiconductor switching element having a first gate terminal and being turned on by receiving a potential of a first power supply at the first gate terminal from a first output node of a gate driver, the short-circuit protection circuit comprising: A first gate resistor connected between the first output node of the gate driver and the first gate terminal; a first real-time control circuit that reduces a potential of the first gate terminal when the first real-time control circuit detects that a short-circuit current flows through the first semiconductor switching element, and an operation monitoring circuit, wherein the operation monitoring circuit comprises a differential voltage circuit configured to output a potential difference between a potential proportional to a potential difference across the first gate resistor and the potential of the first power supply, and to monitor, based on an output signal of the differential voltage circuit, whether the first real-time control circuit is in operation.

Description

TECHNICAL FIELD

[0001] The present invention relates to a short-circuit protection circuit for protecting a semiconductor switching element by stopping the driving of the element when a short circuit occurs during driving. STATE OF THE ART

[0002] When a short circuit occurs during the driving of a semiconductor switching element, especially a power semiconductor element for power control, it is necessary to quickly stop the driving of the element to turn it off. To achieve this, it is necessary to both detect the occurrence of a short circuit without delay and, in response to the detection, to stop the driving of the semiconductor switching element without delay.

[0003] An RTC (Real-Time Control) circuit is known as a short-circuit detection circuit. The RTC circuit monitors a current flowing through a sensor cell to extract a portion of the current in a semiconductor switching element and immediately lowers the gate voltage of the semiconductor switching element if the current through the sensor cell is too high. Patent Document 1 describes a known technology that determines whether the RTC circuit has been operated by monitoring a gate current and stops driving the semiconductor switching element accordingly.

[0004] Patent Document 2 relates to a power switching device including a plurality of semiconductor switching devices connected in parallel and a gate drive circuit for these semiconductor switching devices. The present invention also relates to a power switching device further including a protection circuit for these semiconductor switching devices. Patent Document 3 relates to a semiconductor device and a method for detecting characteristic deterioration of a semiconductor device, and more particularly, to a semiconductor device and a method for detecting characteristic deterioration of a semiconductor device that detect characteristic deterioration of a semiconductor device that is a so-called intelligent power device (IPD). STATE OF THE ART Patent Document 1: International Patent Application WO 2016 / 038 717 A1 Patent document 2: WO 2017 / 026367 A1 Patent document 3: US 2011 / 0 68 818 A1 BRIEF DESCRIPTION OF THE INVENTION Problems to be solved by the invention

[0005] As a result of examining the short-circuit protection circuit described in Patent Document 1 described above, the present inventors found that in the case of a short-circuit failure when switching a semiconductor switching element from the off state to the on state, the short circuit is detected with a delay and accordingly, a protection operation is delayed and the semiconductor switching element cannot be protected within a required period of time.

[0006] Furthermore, Patent Document 1 does not address the case of parallel-connected semiconductor switching elements. The inventors found that simply using the short-circuit protection circuit described in Patent Document 1 with parallel-connected semiconductor switching elements reduces the voltage generated in a gate resistor, which may result in delayed detection of a short circuit and delayed protection operation.

[0007] The result of the above-mentioned considerations of the inventors will be described in detail in the following detailed description of the invention. The present invention takes the above points into account, and a primary object is to provide a short-circuit protection circuit capable of promptly detecting that a short circuit has occurred and quickly protecting the semiconductor switching element. Means to solve the problems

[0008] According to one embodiment, a short-circuit protection circuit protects a first semiconductor switching element, wherein the first semiconductor switching element has a first gate terminal and is turned on by receiving the potential of a first power supply at the first gate terminal from a first output node of a gate driver. The short-circuit protection circuit consists of a first gate resistor, a first real-time control circuit, and an operation monitoring circuit. The first gate resistor is connected between the first output node of the gate driver and the first gate terminal. The first real-time control circuit operates to reduce a potential of the first gate terminal when the first real-time control circuit detects that a short-circuit current is flowing through the first semiconductor switching element.The operation monitoring circuit includes a differential voltage circuit configured to output a potential difference between a potential proportional to a potential difference across the first gate resistor and the potential of the first power supply. The operation monitoring circuit monitors, based on the output of the differential voltage circuit, whether the first real-time control circuit is operating.

[0009] According to another embodiment, the short-circuit protection circuit additionally protects a second semiconductor switching element. The second semiconductor switching element has a second gate terminal and is turned on by receiving the potential of the first power supply at the second gate terminal from the first output node of the gate driver. In this case, the short-circuit protection circuit further comprises a second gate resistor and a second real-time control circuit. The second gate resistor is connected between the first output node of the gate driver and the second gate terminal. The second real-time control circuit operates to reduce a potential of the second gate terminal when the second real-time control circuit detects that a short-circuit current is flowing through the second semiconductor switching element.The differential voltage circuit is further configured to output a potential difference between a potential proportional to a potential difference across the second gate resistor and the potential of the first power supply. Effect of the invention

[0010] According to the above-described embodiment, the operation of the differential voltage circuit is not affected by the in-phase component of the potentials at the opposite ends of a gate resistor, so there is essentially no delayed operation due to the charging / discharging of the parasitic capacitance. Thus, it is possible to detect the occurrence of a short circuit in a semiconductor switching element without delay and quickly implement a protective measure.

[0011] According to another embodiment described above, a gate resistor is provided for each semiconductor switching element, and based on a potential difference across each gate resistor, the operation of a respective associated real-time control circuit can be monitored. Thus, the semiconductor switching elements can be protected at high speed even when multiple semiconductor switching elements are connected in parallel. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram showing a configuration of a short-circuit protection circuit for a semiconductor switching element as Comparative Example 1; Fig. 2 is a circuit diagram showing a configuration of a short-circuit protection circuit for a semiconductor switching element as Comparative Example 2; Fig. 3 is a circuit diagram with a configuration according to the Fig. 2 but with semiconductor switching elements arranged in parallel; Fig. 4 is a circuit diagram illustrating a configuration of a semiconductor system in which a short-circuit protection circuit according to a first embodiment is used; Fig. 5 is a circuit diagram showing an example of an RTC circuit of Fig. 4 shows; Fig. 6 is a circuit diagram showing an example of a detailed configuration of a differential amplifier of Fig. 4 shows; Fig. 7 is a circuit diagram showing the differential voltage circuit of Fig. 4 and its surroundings; Fig. 8 represents a voltage waveform in each range of Fig. 7; Fig. 9 is a circuit diagram showing a configuration of a change in the differential voltage circuit of Fig. 7 represents; Fig. 10 represents a voltage waveform in each range of Fig. 9; Fig. 11 is a circuit diagram illustrating a configuration of a semiconductor system in which a short-circuit protection circuit according to a second embodiment is used; Fig. 12 is a circuit diagram showing a configuration of a modification of a differential voltage circuit of Fig. 11; Fig. 13 is a circuit diagram illustrating a configuration of a semiconductor system having a short-circuit protection circuit according to a third embodiment; Fig. 14 is a circuit diagram illustrating a configuration of a semiconductor system having a short-circuit protection circuit according to a fourth embodiment, and Fig. 15 is a circuit diagram showing a configuration of a semiconductor system having a short-circuit protection circuit according to a fifth embodiment. DESCRIPTION OF THE EMBODIMENTS

[0012] Each embodiment will be described in more detail below with reference to the drawings. Note that identical or equivalent components are designated identically and are not described redundantly.

[0013] The circuit diagrams of the Fig. 1 to 3 are intended as a comparative example for each embodiment of the present invention, and although they are relevant to the short-circuit protection circuit described in Patent Document 1, they are not identical to the circuit described in the document. Comparison example 1

[0014] Fig. 1 is a circuit diagram showing a configuration of a short-circuit protection circuit for a semiconductor switching element as Comparative Example 1. The circuit diagram of Fig. 1 corresponds to Fig. 7 of Patent Document 1.

[0015] With reference to Fig. 1, a driver circuit 101 outputs a drive signal DS, which is input to a gate driver 127. The gate driver 127 includes gate output transistors 102 and 103. Transistor 102 is an N-channel MOSFET (metal oxide semiconductor field-effect transistor), and its drain is connected to a positive power supply 106. Transistor 103 is a P-channel MOSFET, and its drain is connected to a negative power supply 107.

[0016] The source terminal of transistor 102 and the source terminal of transistor 103 are coupled to each other via a connection node 150. The connection node 150 is connected to a gate terminal 140 of a semiconductor switching element 109 via a gate wiring 108. The gate wiring 108 is equipped with a gate resistor 112.

[0017] The semiconductor switching element 109 has a built-in sensor cell. The sensor cell is also called a sensing electrode. A real-time control (RTC) circuit 110 is connected to the sensor cell as the first protection circuit. The RTC circuit 110 determines the magnitude of the current flowing through the sensor cell. If the RTC circuit 110 determines that the current is an overcurrent, the RTC circuit 110 operates to lower the gate voltage of the semiconductor switching element.

[0018] By rapidly lowering the gate voltage, the RTC circuit 110 prevents the destruction of the semiconductor switching element 109. Although the RTC circuit 110 limits a short-circuit current of the semiconductor switching element 109, the short-circuit current is not completely interrupted, and the semiconductor switching element 109 may eventually overheat and be destroyed. Accordingly, an interrupt circuit 116, which detects that the RTC circuit 110 is operating and interrupts the drive signal DS, and an emergency stop circuit 117, which permanently stops the driver circuit 101, are provided. The interrupt circuit 116 and the emergency stop circuit 117 must be activated immediately after the RTC circuit 110 is operated.

[0019] Generally, one type of RTC circuit 110 outputs an SC (Short Circuit) signal to notify the interrupt circuit 116 and the emergency stop circuit 117 that a short circuit has been detected. However, the SC signal is easily contaminated by noise, so a filter is required to remove the noise. In a noisy environment where the time constant of the filter needs to be increased, it takes time to determine the SC signal, and the protection operation is delayed.

[0020] To avoid the above-mentioned problem, there is a method of monitoring a gate current to detect the operation of the RTC circuit 110, and this method is described in Patent Document 1. The gate current is driven by a strong positive power supply 106 and is therefore immune to noise. As a method of monitoring the gate current, there is a method of monitoring a voltage generated in the gate resistor 112 when the semiconductor switching element 109 is turned on.

[0021] In this method, an operation monitoring circuit 111 is provided as a second protection circuit, and the gate resistor 112 is connected with its opposite terminals to the base and emitter terminals of a PNP transistor 113 in the operation monitoring circuit 111. Furthermore, a resistance element 114 with a relatively large resistance value is connected between the base and emitter of the PNP transistor 113.

[0022] More specifically, the operation monitoring circuit 111 operates as follows: Since the base potential is pulled up to the emitter potential by the resistance element 114, the PNP transistor 113 is normally off. If a short circuit occurs in the semiconductor switching element 109 and the RTC circuit 110 is operating, the gate potential of the semiconductor switching element 109 is forcibly lowered, and the gate current increases accordingly. This increased gate current increases the potential difference across the gate resistor 112. This increases the potential difference between the base and emitter of the PNP transistor 113, which is connected to the gate resistor 112, and as a result, the PNP transistor 113 is turned on. After the PNP transistor 113 is turned on, the voltage Vs of the positive power supply 106 is input to the interrupt circuit 116 and the emergency stop circuit 117 via a collector terminal 115 of the PNP transistor 113.After the interruption circuit 116 and the emergency stop circuit 117 receive the positive voltage Vs, they interrupt the drive signal DS and stop the driver circuit 101, respectively.

[0023] If the circuit of Fig. 1, when the semiconductor switching element 109 is in the off state, the transistor 103 is in the on state, and accordingly, the semiconductor switching element 109 has a gate potential lowered to the potential of the negative power supply 107, i.e., -Vs. For this reason, the gate resistor 112 thereto is at the potential of the negative power supply 107 (-Vs), and accordingly, the emitter and base terminals of the PNP transistor 113 are both equal to the potential of the negative power supply 107 (i.e., -Vs). In this case, if the potential of the collector terminal of the PNP transistor 113 is lower than the potential of the input nodes of the interrupt circuit 116 and the emergency stop circuit 117, the PNP transistor 113 is in a reverse bias state and may be destroyed.To prevent this, a diode 118 is provided between the collector terminal of the PNP transistor 113 and the input nodes of the interrupt circuit 116 and the emergency stop circuit 117.

[0024] The short-circuit protection circuit of Fig. 1, however, has a problem, namely, a delayed protection operation. This is because, as described above, when the semiconductor switching element 109 is in the OFF state, the total potential of the operation monitoring circuit 111 has dropped to the potential of the negative power supply 107, i.e., -Vs. A short-circuit fault occurs when the semiconductor switching element 109 is in the ON state, and generally, a short circuit starts from a moment of power-on, i.e., when the semiconductor switching element 109 moves from the OFF state to the ON state. In the short-circuit protection circuit of Fig. 1, at a time when the semiconductor switching element 109 is turned on, even though the emitter terminal of the PNP transistor 113 of the operation monitoring circuit 111 is connected to the positive power supply 106, the potential of the rest of the operation monitoring circuit 111 does not rise immediately due to parasitic capacitance. For this reason, it takes a long time for the operation monitoring circuit 111 to enter the normal operating state, thereby delaying the protection operation by the short-circuit protection circuit. In other words, this problem is caused by the potential of each part of the operation monitoring circuit 111 varying with an in-phase component of the potentials at the opposite ends of the gate resistor 112.

[0025] In a first embodiment described below, a configuration of a short-circuit protection circuit that can avoid the problem in Comparative Example 1 will be described. Comparison example 2

[0026] Fig. 2 is a circuit diagram showing a configuration of a short-circuit protection circuit for a semiconductor switching element as Comparative Example 2. This circuit corresponds Fig. 10 of Patent Document 1.

[0027] The circuit of Fig. 2 differs from that of Fig. 1 by using instead of the gate resistor 112 of Fig. 1 a gate resistor 104 is connected between the drain terminal of the transistor 102 and the positive power supply 106 and a gate resistor 105 is connected between the drain terminal of the transistor 103 and the negative power supply 107. Furthermore, the circuit differs from Fig. 2 from the circuit of Fig. 1 in that the PNP transistor 113 forming the operation monitoring circuit 111 has the base and emitter terminals connected to the respective opposite end terminals of the gate resistor 104.

[0028] In the case of switching Fig. 2, regardless of whether the semiconductor switching element 109 is on or off, that is, regardless of whether the transistors 102 and 103 are on or off, the potential of each part of the operation monitoring circuit 111 is substantially equal to the potential of the positive power supply 106, or + Vs. Such a delay of the protective operation, which is necessary for the circuit of Fig. 1 occurs, therefore, for the circuit of Fig. 2 does not occur, but the short-circuit protection circuit of Fig. 2, when several semiconductor switching elements 109 are connected in parallel to increase the controllable power, for delayed protection operation. A further description will be given below with reference to Fig. 3 given.

[0029] Fig. 3 is a circuit diagram with a configuration according to Fig. 2, in which two semiconductor switching elements are arranged in parallel. In Fig. 3, a semiconductor switching element 109B is arranged parallel to the semiconductor switching element 109. The semiconductor switching element 109B has a gate terminal 140B coupled to the gate terminal 140 of the semiconductor switching element 109. The semiconductor switching element 109 and the semiconductor switching element 109B are simultaneously driven by the gate driver 127.

[0030] A second RTC circuit 110B having the same configuration as the first RTC circuit 110 is provided for the semiconductor switching element 109B. The second RTC circuit 110B serves to forcibly lower the gate voltage of the semiconductor switching element 109B when the semiconductor switching element 109B is in a short-circuit state.

[0031] For parallel driver connection of Fig. 3, in order to make the speed for driving the semiconductor switching elements 109 and 109B for normal operation equal to the speed for driving the semiconductor switching element 109 in the individual control in Fig. 2, a current flowing through the gate resistor 104 must be doubled. This is because the gate current flowing through the gate terminal of the semiconductor switching elements 109 and 109B in Fig. 3 must be the same as in the case of Fig. 2. For this reason, the gate resistors 104 and 105 must each have a resistance value that is half that of Fig. 2. In case of Fig. 3 are the resistance elements with the same resistance value as in the case of Fig. 2 are arranged in parallel, so that the gate resistors 104 and 105 each have a resistance value that is half as large as in the case of Fig. 2.

[0032] Halving the resistance value of the gate resistor 104, as in Fig. 3, however, delays the detection of the operation of the RTC circuits 110 and 110B and may be a cause of a delayed short-circuit protection circuit. A specific description will be given below with reference to Fig. 3 given.

[0033] First, for illustration, a short circuit occurs simultaneously in the semiconductor switching element 109 and the semiconductor switching element 109B while they are driven. Such a simultaneous short circuit state occurs, for example, in the case where the drive signal DS is incorrectly set and the drive signal DS is output in the on state when it should not be turned on.

[0034] In such a simultaneous short-circuit condition, the RTC circuits 110 and 110B operate simultaneously. Then, the ability to lower the potential of the gate wiring 108 is reduced compared to Fig. 2. Accordingly, the current flowing through the gate resistor 104 is also doubled compared to that in Fig. 2. Even if the resistance value of the gate resistor 104 in Fig. 3 is only half as big as in Fig. 2, the gate resistor 104 is in Fig. 3 generated voltage is the same as in Fig. 2. This causes the operation monitoring circuit 111 to detect that the RTC circuits 110 and 110B operate at the same speed as in Fig. 2, and the short circuit protection circuit is carried out without delay.

[0035] However, it's a different story if a short circuit occurs only in one of the semiconductor switching elements 109 and 109B. For example, consider the case where a short circuit occurs only in the semiconductor switching element 109 and no short circuit occurs in the semiconductor switching element 109B. Such an asymmetric short circuit may occur due to overheating of the element.

[0036] When a short circuit occurs only in the semiconductor switching element 109, the RTC circuit 110 operates, while the RTC circuit 110B does not. This means that the ability to lower the potential of the gate wiring 108 is only the same as in the case of Fig. 2. Since the gate resistor 104 in Fig. 3 is half the size of the gate resistance 102 in Fig. 2, the voltage generated in the gate resistor 104 is half as large as in Fig. 2. As a result, the operation monitoring circuit 111 will operate with a delay, and the interrupt circuit 116 and the emergency stop circuit 117 will also operate with a delay. Such a delayed short-circuit protection circuit may lead to the destruction of the semiconductor switching element 109, which is a serious problem.

[0037] In a second embodiment described below, a configuration of a short-circuit protection circuit that can avoid the problem in Comparative Example 2 as described above will be described. Embodiment 1General configuration of the semiconductor system including short-circuit protection circuit

[0038] Fig. 4 is a circuit diagram illustrating a configuration of a semiconductor system having a short-circuit protection circuit according to a first embodiment.

[0039] The short-circuit protection circuit protects with reference to Fig. 4 the semiconductor switching element 9. The short-circuit protection circuit includes a real-time control circuit (RTC) 10, an operation monitoring circuit 11, an interruption circuit 16, an emergency stop circuit 17 and a gate resistor 12.

[0040] The semiconductor switching element 9 is a self-turn-off semiconductor switching element and is controlled by a driver circuit 1. The semiconductor switching element 9 is not particularly limited in its type. For example, the semiconductor switching element 9 can be an N-channel MOSFET (as shown in the figure), an IGBT (Insulated Gate Bipolar Transistor), or a bipolar transistor.

[0041] Driver circuit 1 outputs drive signal DS, which is in turn fed to a gate driver 27, which in turn controls semiconductor switching element 9. Gate driver 27 has gate output transistors 2 and 3. Transistor 2 is an N-channel MOSFET, and its drain terminal is connected to a positive power supply 6. Transistor 3 is a P-channel MOSFET, and its drain terminal is connected to a negative power supply 7.

[0042] It should be noted that transistors 2 and 3, which form the gate driver 27, do not have their channel polarity set to the Fig. 4, and both can be, for example, N-channel MOSFETs. In this case, the DS input of the drive signal to the gate terminal of one transistor is an inverted version in logic level of the DS input of the drive signal to the gate terminal of the other transistor. Transistors 2 and 3 are not limited to MOSFETs. For example, a bipolar transistor can be used instead of a MOSFET.

[0043] The source terminal of transistor 2 and the source terminal of transistor 3 are coupled to each other via a connection node (hereinafter referred to as output node 50 of gate driver 27). The output node 50 is connected to a gate terminal 40 of the semiconductor switching element 9 via a gate wiring 8. The gate wiring 8 is equipped with a gate resistor 12.

[0044] The semiconductor switching element 9 has a built-in sensor cell. The RTC circuit 10 is connected to the sensor cell. The RTC circuit 10 determines the magnitude of the current flowing through the sensor cell. If the RTC circuit 10 determines that the current is an overcurrent, the RTC circuit 10 operates to lower the gate voltage of the semiconductor switching element 9.

[0045] Fig. 5 is a circuit diagram showing an example of the RTC circuit of Fig. 4. With reference to Fig. 5, the RTC circuit 10 comprises the resistance elements 43 and 45, a detection circuit 42 which detects a short-circuit current, a diode 44 and a transistor 46.

[0046] The resistance element 43 is connected between a sensor cell 41 of the semiconductor switching element 9 and a node providing a reference potential Gnd. The resistance element 43 is used as a current measuring resistor for detecting a measuring current Is.

[0047] Diode 44, resistance element 45, and transistor 46 are connected in series between gate wiring 8 and the node providing reference potential Gnd, so that the polarity of diode 44 is forward biased. Diode 44, resistance element 45, and transistor 46 are arranged in the specified order. Transistor 46 can be, for example, a MOSFET or a bipolar transistor. Fig. Figure 4 illustrates a case where transistor 46 is an NPN bipolar transistor. Transistor 46 has a control electrode (a gate or a base) connected to detection circuit 42.

[0048] The detection circuit 42 detects a voltage across the resistive element 43 and determines whether the detected voltage exceeds a threshold value. The detection circuit 42 switches the transistor 46 from the off state to the on state when the voltage of the resistive element 43 exceeds the threshold value. This allows a gate current Ig to flow through the diode 44, the resistive element 45, and the transistor 46.

[0049] Note that the semiconductor switching element 9 is connected to the positive power supply 6 via a gate terminal 40 through the transistor 2 in the on state. Although the RTC circuit 10 can limit a short-circuit current flowing through the semiconductor switching element 9 by primarily reducing the potential of the gate terminal 40 of the semiconductor switching element 9, the RTC circuit 10 cannot completely turn off the semiconductor switching element 9.

[0050] With further reference to Fig. 4, the operation monitoring circuit 11 monitors a gate current flowing through the gate resistor 12 to determine whether the RTC circuit 10 is operating. Specifically, the operation monitoring circuit 11 detects a potential difference across the gate resistor 12 when the semiconductor switching element 9 is turned on.

[0051] As in Fig. 4, the operation monitoring circuit 11 includes a differential voltage circuit 20 and a PNP bipolar transistor (PNP transistor) 13.

[0052] The differential voltage circuit 20 extracts and outputs a potential difference across the gate resistor 12. In other words, from the potentials at the opposite ends of the gate resistor 12, an in-phase component is removed and a differential component is extracted solely therefrom. The absolute value of the differential component extracted by the differential voltage circuit 20 is output between the emitter and base terminals of the PNP transistor 13. The emitter terminal of the PNP transistor 13 is connected to the positive power supply 6, and if necessary, the differential voltage circuit 20 outputs the potential difference between a potential proportional to the potential difference across the gate resistor 12 and the potential of the positive power supply 6, or a voltage proportional to this potential difference between the emitter and base terminals of the PNP transistor 13.

[0053] The operation monitoring circuit 11 is further provided with a resistance element 14. The resistance element 14 is connected between the base and emitter terminals of the PNP transistor 13. The PNP transistor 13 has a collector terminal connected to the interrupt circuit 16 and the emergency stop circuit 17.

[0054] According to the circuit configuration of the operation monitoring circuit 11 described above, the resistance element 14 pulls up the base potential to the emitter potential (i.e., the potential of the positive power supply 6 or +Vs), and accordingly, the PNP transistor 13 is normally in the OFF state. When a short circuit occurs in the semiconductor switching element 9 and the RTC circuit 10 is operating, the gate potential of the semiconductor switching element 9 is forcibly lowered, and the gate current increases accordingly. This increased gate current increases the potential difference across the gate resistor 12. As a result, the differential voltage circuit 20 outputs an increased voltage, and accordingly, the potential difference between the base and emitter of the PNP transistor 13 also increases, thus turning on the PNP transistor 13.After the PNP transistor 13 is turned on, the potential Vs of the positive power supply 6 is fed into the interruption circuit 16 and the emergency stop circuit 17 via the collector terminal 15 of the PNP transistor 13.

[0055] As described above, the emitter terminal of the PNP transistor 13 is connected to the positive power supply 6 and not to one end of the gate resistor 12. In this respect, the operation monitoring circuit 11 differs from Fig. 4 from the operation monitoring circuit 111 of Fig. 1. Therefore, the operation monitoring circuit 11, in contrast to the Fig. 1, even when the semiconductor switching element 9 is in the off state, never has a total potential that drops to the potential of the negative power supply 7, or -Vs. For this reason, the operation monitoring circuit 11 does not cause the parasitic capacitance to charge / discharge when the semiconductor switching element 9 is turned on and off, and the operation is never delayed. Since the operation monitoring circuit 11 does not vary in its potential, it is not necessary to connect the diode 118 as in Fig. 1 on the side of the collector terminal of the PNP transistor 13.

[0056] The interrupt circuit 16 interrupts the drive signal DS when the interrupt circuit 16 receives a signal with a positive voltage +Vs from the operation monitoring circuit 11. For example, the interrupt circuit 16 fixes the potential of a wiring connecting the output node of the driver circuit 1 and the input node of the gate driver 27 to the potential of the negative power supply 7 or to -Vs.

[0057] The emergency stop circuit 17 controls the drive circuit 1 so that the drive signal DS has a logic level fixed to a low level (an L level) when the emergency stop circuit 17 receives a positive voltage signal +Vs from the operation monitoring circuit 11. Configuration of the differential voltage circuit

[0058] The configuration of the differential voltage circuit 20 is described in more detail below. As shown in Fig. 4, the differential voltage circuit 20 includes a first differential amplifier 21 and a second differential amplifier 22. The differential amplifiers 21 and 22 each have two input terminals, a positive input terminal and a negative input terminal, and output the potential difference between the terminals as an absolute value from an output terminal Out.

[0059] The differential amplifier 21 has the positive input terminal (also called the high-potential input terminal VinH) connected to a connection node between the gate resistor 12 and the gate driver 27. The differential amplifier 21 has the negative input terminal (also called the low-potential input terminal VinL) connected to the connection node between the gate resistor 12 and the gate terminal 40 of the semiconductor switching element 9. The differential amplifier 21 has an output terminal Out connected to the negative input terminal of the differential amplifier 22. The differential amplifier 22 has the positive input terminal connected to the positive power supply 6. The differential amplifier 22 has an output terminal Out connected to the base terminal of the PNP transistor 13.

[0060] Fig. 6 is a circuit diagram showing an example of a detailed configuration of the differential amplifier of Fig. 4 shows. As in Fig. 5, the differential amplifiers 21 and 22 can be Fig. 4 each with an operational amplifier OPA and the resistance elements R1, R2, R3 and R4.

[0061] As in Fig. As shown in Figure 6, the operational amplifier OPA has a positive input terminal connected to the high-potential input terminal VinH via a resistor R3 and to a reference terminal Ref via a resistor R4. The operational amplifier OPA has a negative input terminal connected to the low-potential input terminal VinL via a resistor R1 and to an output terminal of the operational amplifier OPA via a resistor R2. The operational amplifier OPA has an output terminal connected to the output terminal Out of the differential amplifier.

[0062] Here, the resistance elements R1, R2, R3, and R4 have the resistance values R1, R2, R3, and R4 for illustrative purposes, and R1 = R3 and R2 = R4. Furthermore, the high-potential input terminal VinH, the low-potential input terminal VinL, the output terminal Out, and the reference terminal Ref have the potentials VinH, VinL, Out, and Ref for illustrative purposes. Then, Out=(VinH−VinL)×R2 / R1+Ref

[0063] In particular, when R1 = R2 = R3 = R4, the output terminal Out of the differential amplifier has a potential equal to the potential of the high-potential input terminal VinH minus the potential of the low-potential input terminal VinL plus the potential of the reference terminal Ref. Operation of the operation monitoring circuit

[0064] The following describes how the operation monitoring circuit 11 works.

[0065] Fig. 7 is a circuit diagram showing the differential voltage circuit of Fig. 4 and its periphery. In Fig. 7, a reference numeral is assigned to each region on the input and output sides of the differential amplifiers 21 and 22 forming the differential voltage circuit 20.

[0066] Fig. 8 represents a voltage waveform in each range of Fig. 7. In particular, Fig. 8(A) is a diagram illustrating a positive input potential 26A of the differential amplifier 21, a negative input potential 26B of the differential amplifier 21, and an output potential 26D of the differential amplifier 21. The positive input potential 26A of the differential amplifier 21 is equal to the potential of the output node 50 of the gate driver 27. The negative input potential 26B of the differential amplifier 21 is equal to the gate potential of the semiconductor switching element 9.

[0067] Fig. Figure 8(B) shows a graph illustrating a positive input potential 26E of the differential amplifier 22, an output potential 26F of the differential amplifier 22, and a potential difference 26G between the gate and emitter of the PNP transistor 13. The positive input potential 26E of the differential amplifier 22 is equal to the potential of the positive power supply 6, or +Vs.

[0068] Regarding the Fig. 7 and Fig. 8, transistor 2 switches at time t0 in Fig. 8. If a short circuit occurs in the semiconductor switching element 9, the RTC circuit 10 operates at time t1, and the gate potential of the semiconductor switching element 9, i.e., the negative input potential 26B of the differential amplifier 21, is forcibly lowered by the RTC circuit 10. The positive input potential 26A of the differential amplifier 21 minus the negative input potential 26B of the differential amplifier 21 results in a voltage difference corresponding to the output potential 26D of the differential amplifier 21 (note that the differential amplifier 21 has a gain of 1).

[0069] The output potential 26D of the differential amplifier 21 is connected to the low-potential input terminal VinL of the differential amplifier 22. The potential of the positive power supply 6, or +Vs, i.e., the positive input potential 26E of the differential amplifier 22 minus the output potential 26D of the differential amplifier 21, results in a voltage difference corresponding to the output potential 26F of the differential amplifier 22 (note that the differential amplifier 22 has a gain of 1).

[0070] Therefore, the base-emitter voltage of the PNP transistor 13, or the potential difference 26G, is the output potential 26F of the differential amplifier 22 minus the potential Vs (equal to 26E) of the positive power supply 6. This potential difference 26G is pulled negative when the RTC circuit 10 is in operation and the PNP transistor 13 turns on. In this case, the protective measure by the interrupt circuit 16 and the emergency stop circuit 17 of Fig. 4. This protective measure is carried out without delay, since no charging or discharging of the parasitic capacitance takes place in the operation monitoring circuit 11.

[0071] In addition, the configuration of the differential voltage circuit 20 in Fig. 7 is designed so that the reference terminal Ref of each of the differential amplifiers 21 and 22 has a potential of 0 V and ensures high-precision operation of the voltage output. [Other example configuration of the differential voltage circuit]

[0072] If there is a margin for the protection speed and the potential of the reference terminal Ref of the differential amplifier 21 can be set to high voltage, the differential voltage circuit 20 can consist of a single differential amplifier.

[0073] Fig. 9 is a circuit diagram showing a configuration of a change in the differential voltage circuit of Fig. 7 represents. Fig. 9 shows a differential voltage circuit 20A which differs from the differential voltage circuit 20 of the Fig. 7 in that the former only includes the differential amplifier 21 and not the differential amplifier 22.

[0074] Furthermore, the differential voltage circuit 20A differs from Fig. 9 from the differential voltage circuit 20 of Fig. 7 by how the differential amplifier 21 is connected with its positive input terminal, the negative input terminal and the reference terminal Ref. In particular, for the differential voltage circuit 20A of Fig. 9, the differential amplifier 21 is connected with its positive input terminal to a connection node between the gate resistor 12 and the gate terminal 40 of the semiconductor switching element 9. The differential amplifier 21 is connected with its negative input terminal to a connection node between the gate resistor 12 and the gate driver 27. These connection relationships are in contrast to those in Fig. 7. Furthermore, the differential amplifier 21 has a reference terminal Ref, which is connected to the positive power supply 6.

[0075] With the above configuration, the output terminal of the differential amplifier 21 can be connected to the gate of the PNP transistor 13, and the differential amplifier 22 can be omitted, and the cost of the differential amplifier 22 can be reduced. The remainder of Fig. 9 is the same as in Fig. 7 and accordingly, identical or equivalent components are designated identically and are not described redundantly. The following describes how the Fig. The differential voltage circuit 20A shown in Figure 9 works.

[0076] Fig. 10 represents a voltage waveform in each range of Fig. 9. In particular, Fig. 10(A) is a diagram illustrating the positive input potential 26B of the differential amplifier 21, the negative input potential 26A of the differential amplifier 21, and their potential difference (i.e., 26B minus 26A). The negative input potential 26A of the differential amplifier 21 is equal to the potential of the output node 50 of the gate driver 27. The positive input potential 26B of the differential amplifier 21 is equal to the gate potential of the semiconductor switching element 9.

[0077] Fig. 10(B) is a graph showing the output potential 26D of the differential amplifier 21 and the potential difference 26G between the gate and emitter of the PNP transistor 13.

[0078] With reference to the Fig. 9 and Fig. 10, transistor 2 switches at time t0 in Fig. 10. If a short circuit occurs in the semiconductor switching element 9, the RTC circuit 10 operates at time t1, and the gate potential of the semiconductor switching element 9, i.e., the positive input potential 26B of the differential amplifier 21, is forcibly lowered by the RTC circuit 10. A voltage difference of the positive input potential 26B of the differential amplifier 21 minus the negative input potential 26A of the differential amplifier 21 (as in Fig. 10(A) shown by a broken line) plus the potential of the reference terminal Ref of the differential amplifier 21 or + Vs is output as the output potential 26D of the differential amplifier 21 (note that the differential amplifier 21 has a gain set to 1).

[0079] Therefore, the base-emitter voltage of the PNP transistor 13, or the potential difference 26G, is the output potential 26D of the differential amplifier 21 minus the potential Vs (equal to 26E) of the positive power supply 6. This potential difference 26G is pulled negative when the RTC circuit 10 is in operation and the PNP transistor 13 turns on. In this case, the protective measure by the interrupt circuit 16 and the emergency stop circuit 17 of Fig. 4 carried out. effect

[0080] Thus, with the short-circuit protection circuit of the first embodiment, unlike Comparative Example 1, the operation monitoring circuit 11 is not charged / discharged when the semiconductor switching element 9 is turned on / off, and faster protection operation can be achieved than in Comparative Example 1. Furthermore, as described in the following second embodiment, the configuration of the short-circuit protection circuit of the first embodiment also applies when the semiconductor switching elements 9 are arranged in parallel.

[0081] If a countermeasure against noise is taken, for example, instead of the PNP transistor 13, a comparator for comparing the output signal of the differential amplifier 21 with a reference voltage can be transmitted to the operation monitoring circuit 11 and the output of this comparator can be transmitted to the interruption circuit 16 and the emergency stop circuit 17. Embodiment 2

[0082] A second embodiment deals with the case where a plurality of semiconductor switching elements are connected in parallel to increase the power to be controlled. As described in Comparative Example 2, reducing the gate resistance so as not to reduce the speed of the parallel-connected semiconductor switching elements results in a delay in detecting a short circuit of the semiconductor switching elements. To avoid this problem, in the second embodiment, in contrast to Fig. 3, a gate resistor is provided between the gate driver 27 and each of the semiconductor switching elements. The second embodiment is thus an extension of the first embodiment.

[0083] The following mainly describes what is different from the first embodiment. Each part corresponding to the first embodiment is labeled identically, and no description is required. General configuration of the semiconductor system including short-circuit protection circuit

[0084] Fig. Fig. 11 is a circuit diagram showing the configuration of a semiconductor system equipped with a short-circuit protection circuit according to the second embodiment. While in Fig. 11, for the sake of simplicity, a case of two semiconductor switching elements 9 and 9B connected in parallel is treated, the case where a plurality of semiconductor switching elements are connected in parallel can also be treated in the same way.

[0085] As in the first embodiment, the semiconductor switching elements 9 and 9B are self-turn-off semiconductor switching elements and are controlled via a common driver circuit 1. The driver circuit 1 outputs the drive signal DS, which is input to a common gate driver 27. Therefore, the semiconductor switching elements 9 and 9B are simultaneously driven by receiving a common drive voltage (i.e., the potential of the positive power supply 6 or +Vs and the potential of the negative power supply 7 or -Vs) from the gate driver 27. A specific exemplary configuration of the gate driver 27 is the same as in Fig. 4 and is therefore not described redundantly.

[0086] The gate resistor 12 is connected between the output node 50 of the gate driver 27 and the gate terminal 40 of the semiconductor switching element 9, and a gate resistor 12B is arranged between the output node 50 of the gate driver 27 and a gate terminal 40B of the semiconductor switching element 9B. That is, a gate wiring extends from the output node 50 of the gate driver 27 to a branch point 52, and the gate resistor 12 is arranged in the gate wiring 8 for the semiconductor switching element 9, and the gate resistor 12B is arranged in the gate wiring 8B for the semiconductor switching element 9B. Thus, the gate resistors 12 and 12B are provided for the semiconductor switching elements 9 and 9B.

[0087] The short-circuit protection circuit includes the RTC circuit 10 for the semiconductor switching element 9, the RTC circuit 10B for the semiconductor switching element 9B, the operation monitoring circuit 11, the interruption circuit 16, the emergency stop circuit 17, the gate resistors 12 and 12B as described above, and the diodes 19 and 19B. The operation monitoring circuit 11, the interruption circuit 16, and the emergency stop circuit 17 are shared by the semiconductor switching elements 9 and 9B.

[0088] The RTC circuit 10 is connected to the sensor cell of the semiconductor switching element 9 and determines the magnitude of the current flowing through the sensor cell. When the RTC circuit 10 determines that the current is an overcurrent, the RTC circuit 10 operates to lower the gate voltage of the semiconductor switching element 9. Similarly, the RTC circuit 10B is connected to a sensor cell of the semiconductor switching element 9B and determines the magnitude of the current flowing through the sensor cell. When the RTC circuit 10B determines that the current is an overcurrent, the RTC circuit 10B operates to lower the gate voltage of the semiconductor switching element 9B. An exemplary configuration of the RTC circuits 10 and 10B is the same as in the first embodiment and will therefore not be described again.

[0089] The operation monitoring circuit 11 detects that the RTC circuit 10 is operating by monitoring the gate current through the gate resistor 12, and also detects that the RTC circuit 10B is operating by monitoring the gate current through the gate resistor 12B. Specifically, the operation monitoring circuit 11 detects a voltage generated in the gate resistor 12 when the semiconductor switching element 9 is turned on and a voltage generated in the gate resistor 12B when the semiconductor switching element 9B is turned on.

[0090] The specific exemplary configuration of the operation monitoring circuit 11 is the same as in the first embodiment. As described with reference to Fig. 4 and Fig. As described in detail in Figure 7, the operation monitoring circuit 11 includes the differential voltage circuit 20, the PNP transistor 13, and the resistance element 14. Furthermore, the differential voltage circuit 20 includes the differential amplifiers 21 and 22.

[0091] How the operation monitoring circuit 11 and the gate resistors 12 and 12B are connected differs from the cases of Fig. 4 and Fig. 7 of the first embodiment. In the case of Fig. 11, diodes 19 and 19B are provided so that operation monitoring circuit 11 can simultaneously monitor the voltages generated in gate resistors 12 and 12B. Specifically, diode 19 has a cathode terminal connected to connection node 51 between gate resistor 12 and gate terminal 40 of semiconductor switching element 9. Diode 19B has a cathode terminal connected to connection node 51B between gate resistor 12B and gate terminal 40B of semiconductor switching element 9B. Diodes 19 and 19B have their respective anode terminals connected to the negative input terminal of differential amplifier 21 via a connection node 53 located on the anode side. The differential amplifier 21 is connected to the positive input terminal between the output node 50 of the gate driver 27 and the branch 52 of the gate wiring. Operation of the operation monitoring circuit

[0092] The above-described connection between the operation monitoring circuit 11 and the gate resistors 12 and 12B enables the detection of a short circuit in each of the semiconductor switching elements 9 and 9B without mutual interference between the operation monitoring circuit 11 and the gate resistors 12 and 12B.

[0093] For example, if a short circuit occurs in the semiconductor switching element 9 and the RTC circuit 10 operates accordingly, the gate voltage of the semiconductor switching element 9 decreases, and accordingly, a gate current flows through the gate resistor 12. In this case, the potential of the connection node 51 on the cathode side of the diode 19 is reduced, and accordingly, the potential of the connection node 53 on the anode side of the diode 19 is also reduced. However, if no short circuit occurs in the semiconductor switching element 9B, the potential of the connection node 51B on the cathode side of the diode 19B is higher than the potential of the connection node 53 on the anode side, and accordingly, a potential drop of the connection node 53 is blocked by the diode 19B.Therefore, even if a short circuit occurs in the semiconductor switching element 9 and the RTC circuit 10 operates accordingly, the gate terminal 40B of the semiconductor switching element 9B never reduces its potential.

[0094] Furthermore, the operating speed in normal case and the protection speed in case of failure in the semiconductor system are Fig. 11 are the same as in the first embodiment described with reference to Fig. 4. It is assumed that the gate resistors 12 and 12B are in Fig. 11 each have a resistance value which corresponds to the resistance value of the gate resistor 12 in Fig. 4. The positive power supply 6 and negative power supply 7 in Fig. 11 have a potential (+ Vs) and a potential (- Vs) respectively, which corresponds to the size of the embodiment of Fig. 4 corresponds.

[0095] First, the operating speed in normal operation is described. Fig. 11, the current flowing through the gate resistors 12 and 12B when the semiconductor switching elements 9 and 9B are turned on is equal to the current flowing through the single gate resistor 12 in Fig. 4. Because at each of the parallel connected gate resistors 12 and 12B the same potential of the positive power supply 6 as in Fig. 4. Therefore, there is no difference in the operating speed between the case where semiconductor switching elements 9 are connected in parallel, as in Fig. 11, and the case where a single semiconductor switching element 9 is used, as shown in Fig. 4 shown.

[0096] The speed of detection of a short circuit by the short-circuit protection circuit will now be described. If a short circuit occurs in one of the semiconductor switching elements 9, e.g., if a short circuit occurs only in the semiconductor switching element 9, initially only the RTC circuit 10 operates. In this case, only the potential of the gate terminal 40 of the semiconductor switching element 9 is lowered, and the potential at the gate terminal 40B of the semiconductor switching element 9B is not lowered. For this reason, an increased gate current only passes through the gate resistor 12 and increases the potential difference across the gate resistor 12. Thus, in the case of Fig. 11 a gate current generated by the single RTC circuit 10 only through a single gate resistor 12 and lowers the gate voltage and the voltage generated in the gate resistor 12 is the same as in the case of Fig. 4 according to the first embodiment. Thus, there is no difference between the ability of the operation monitoring circuit 11 to detect a short circuit in Fig. 11, and that of the circuit in Fig. 4, and the speed at which a semiconductor switching element in Fig. 11 is the same as that with which the semiconductor switching element in Fig. 4 is protected.

[0097] Now, a case in which a short circuit occurs simultaneously in the two semiconductor switching elements 9 and 9B will be described. In this case, the RTC circuits 10 and 10B both operate, and accordingly, the RTC circuit 10 lowers the potential of the gate terminal 40 of the semiconductor switching element 9, and the RTC circuit 10B lowers the potential of the gate terminal 40B of the semiconductor switching element 9B. This increases the potential difference across each of the gate resistors 12 and 12B, and accordingly, the voltage generated in each of the gate resistors 12 and 12B is the same as in Fig. 4 according to the first embodiment. Thus, there is no difference between the capability of the operation monitoring circuit 11 in Fig. 11, to detect a short circuit, and that of the circuit in Fig. 4, and the speed at which the semiconductor switching elements in Fig. 11 is the same as that with which the semiconductor switching element in Fig. 4 is protected. Modification of the differential voltage circuit

[0098] As in Fig. As described in Figure 9, instead of the differential voltage circuit 20, a differential voltage circuit 20A with only the differential amplifier 21 can be provided. The connection for this case is described below.

[0099] Fig. 12 is a circuit diagram showing the configuration of a change in the differential voltage circuit of Fig. 11. The differential voltage circuit 20A of Fig. 12 differs from the differential voltage circuit 20 of Fig. 11 in that it has only the differential amplifier 21 and not the differential amplifier 22.

[0100] Furthermore, the differential voltage circuit 20A differs in Fig. 12 from the differential voltage circuit 20 in Fig. 11 in how the differential amplifier 21 has its positive input terminal, the negative input terminal and the reference terminal Ref connected. In particular, for the differential voltage circuit 20A of Fig. 12, the differential amplifier 21 has its positive input terminal connected to the connection node 53 on the anode side of the diodes 19 and 19B. The differential amplifier 21 is connected to its negative input terminal between the output node 50 of the gate driver 27 and the branch 52 of the gate wiring. These connection relationships are in contrast to those in Fig. 11. Furthermore, the differential amplifier 21 is connected to the positive power supply 6 with a reference terminal Ref.

[0101] With the above configuration, the output terminal of the differential amplifier 21 can be connected to the gate of the PNP transistor 13, and the differential amplifier 22 can be omitted, and the cost of the differential amplifier 22 can be eliminated. The remainder of Fig. 12 is the same as in Fig. 11 and accordingly, identical or equivalent components are designated identically and are not described redundantly.

[0102] Furthermore, the operation of the differential voltage circuit 20A of Fig. 12 as in Fig. 10, except that a voltage generated in one of the gate resistors 12 and 12B is input to the positive input terminal of the differential amplifier 21. Accordingly, it will not be described in detail. effect

[0103] As described above, according to the semiconductor system having the short-circuit protection circuit of the second embodiment, when a plurality of semiconductor switching elements are connected and driven in parallel and a short circuit occurs in one of the elements, the element can be quickly protected without delay, regardless of whether it is some of the elements or all of the elements. Embodiment 3

[0104] Fig. 13 is a circuit diagram illustrating a configuration of a semiconductor system including a short-circuit protection circuit according to a third embodiment. The short-circuit protection circuit according to the third embodiment is configured such that the resistance values of the gate resistors 12 and 12B for the semiconductor switching elements 9 and 9B vary between the turn-on and turn-off times of the semiconductor switching elements, respectively. For this reason, the short-circuit protection circuit of the third embodiment includes the gate resistors 23 and 23B in addition to the gate resistors 12 and 12B.

[0105] In particular with reference to Fig. 13, an on-gate resistor 12 and an off-gate resistor 23 are provided in parallel between the output node 50 of the gate driver 27 and the gate terminal 40 of the semiconductor switching element 9. A diode 24 is connected in series with the gate resistor 12 such that the gate terminal 40 of the semiconductor switching element 9 is on the cathode side. A diode 25 is connected in series with the gate resistor 23 such that the gate terminal 40 of the semiconductor switching element 9 is on the anode side.

[0106] Likewise, an on-gate resistor 12B and an off-gate resistor 23B are provided in parallel between the output node 50 of the gate driver 27 and the gate terminal 40B of the semiconductor switching element 9B. A diode 24B is connected in series with the gate resistor 12B so that the gate terminal 40B of the semiconductor switching element 9B is on the cathode side. Furthermore, a diode 25B is connected in series with the gate resistor 23B so that the gate terminal 40B of the semiconductor switching element 9B is on the anode side.

[0107] When the semiconductor switching elements are turned on, diodes 25 and 25B interrupt the current, and accordingly, the current flows only through the gate resistors 12 and 12B. When the semiconductor switching elements are turned off, diodes 24 and 24B interrupt the current, and accordingly, the current flows only through the gate resistors 23 and 23B.

[0108] With the above configuration, the turn-on and turn-off speeds of the semiconductor switching elements 9, 9B can be individually controlled during driving. That is, an optimal switching speed for individual turn-on and turn-off can be selected while balancing the switching loss of the semiconductor switching elements and overvoltage. This allows for a downsizing of the device and lower power consumption.

[0109] The rest of Fig. 13 is the same as in Fig. 11 and accordingly, identical or equivalent components are designated identically and are not described redundantly. Fig. 12 described circuit of the modification of the differential voltage circuit 20 also applies to the case of Fig. 13. Embodiment 4

[0110] A fourth embodiment also provides an example in which the gate resistance is changed in configuration. The short-circuit protection circuit according to the fourth embodiment includes a gate resistor 5 in addition to the gate resistors 12 and 12B.

[0111] Fig. Figure 14 is a circuit diagram illustrating the configuration of a semiconductor system having the short-circuit protection circuit according to the fourth embodiment. The following describes features of the semiconductor system according to Fig. 14 described. (i) The semiconductor system of Fig. 14 differs from the semiconductor systems of Fig. 11 and Fig. 13 in that the gate driver 27 has two output nodes 55 and 55B. The output node 55 is connected to the positive power supply 6 via transistor 2. The output node 55B is connected to the negative power supply 7 via transistor 3. (ii) The semiconductor system according to Fig. 14 differs from the semiconductor systems according to Fig. 11 and Fig. 13 in that the turn-off gate resistor 5 is provided in series with the transistor 3 and between the output node 55B and the negative power supply 7. The gate resistors 5 are provided in parallel depending on how many semiconductor switching elements 9 and 9B are arranged in parallel and are configured to be reduced in size. Therefore, when the semiconductor switching elements 9 and 9B turn off, the turn-off speed is determined by the common gate resistor 5, which is advantageous because it is not affected by resistance value fluctuations of the gate resistors. In the third in Fig. In the embodiment shown in Figure 13, however, gate resistors 23 and 23B are provided for the semiconductor switching elements 9 and 9B, and if the gate resistors differ in size depending on the manufacturing conditions, the semiconductor switching elements would also be turned off at unfavorably different speeds. Such a variation and thus difference occurs in the Fig. 14. This allows the elements to be switched off at a uniform speed, thus preventing current imbalance and thus temperature differences, fatigue damage, and the like due to uneven heat generation. (iii) In the semiconductor system according to Fig. 14, the gate driver 27 has output nodes 55 (i.e., the source terminal of the transistor 2) connected to the gate terminal 40 of the semiconductor switching element 9 via the turn-on gate resistor 12 and to the gate terminal 40B of the semiconductor switching element 9B via the turn-on gate resistor 12B. This configuration can omit the diodes connected in series with the turn-on gate resistors 12 and 12B, respectively. This means that the turn-on gate resistors 12 and 12B can have large resistance values.

[0112] More specifically, for the Fig. In the third embodiment shown in FIG. 13, unidirectional current limiting diodes 24 and 24B are connected in series with turn-on gate resistors 12 and 12B. Therefore, in order not to change the switching speeds of the elements when the elements are turned on, the resistance values of turn-on gate resistors 12 and 12B must be reduced. This is because the transient forward voltage drop of the diode has the same effect as the gate resistance, so the resistance value of the gate resistor must be reduced accordingly in advance. However, the forward voltage drop of the diode in the steady state is smaller than in the transient state, and when a turn-on operation of the semiconductor switching elements 9 and 9B ends and thereafter the RTC circuit 10 or 10B lowers the gate voltage of the semiconductor switching element 9 or 9B, the operation monitoring circuit would receive a much smaller potential difference than the transient state.This leads to delayed protection operation. In the case of the fourth embodiment in . Fig. In contrast, in 14, the diodes 24 and 24B for limiting the current in one direction are not provided, so it is not necessary to reduce the resistance values of the turn-on gate resistors 12 and 12B. Therefore, the protection operation is performed without delay.

[0113] It is pointed out that in case of Fig. 14 the differential amplifier 21, which forms the differential voltage circuit 20, is connected with the positive input terminal between a connection node 54, to which the gate resistors 12 and 12B are commonly connected, and the output node 55 of the gate driver 27. (iv) In the semiconductor system of Fig. 14, the diode 25 is provided between the output node 55B of the gate driver 27 and the gate terminal 40 of the semiconductor switching element 9 such that the gate terminal 40 is located on the anode side. Furthermore, the diode 25B is provided between the output node 55B of the gate driver 27 and the gate terminal 40B of the semiconductor switching element 9 such that the gate terminal 40B is located on the anode side.

[0114] The diodes 25 and 25B are not intended to control the current in the direction of switching the elements, but the diodes are provided in such a way that when only one of the RTC circuits 10 and 10B is operating and the potential of the corresponding one of the gate terminals is lowered, the other gate terminal is not affected.

[0115] The rest of Fig. 14 is the same as in Fig. 11 and accordingly, identical or equivalent components are designated identically and are not described redundantly. Furthermore, the Fig. 12 described circuit of the modification of the differential voltage circuit 20 of the operation monitoring circuit 11 also for the case of Fig. 14.

[0116] Thus, the semiconductor system of the fourth embodiment can quickly and accurately achieve short-circuit protection for a semiconductor switching element. In this case, short-circuit protection can be achieved without delay, regardless of whether a short circuit occurs only in some semiconductor switching elements connected in parallel or in all semiconductor switching elements simultaneously. Furthermore, the semiconductor system of the fourth embodiment can suppress current imbalance when semiconductor switching elements are turned off, thus allowing the elements to generate heat evenly. Embodiment 5

[0117] Fig. 15 is a circuit diagram showing the configuration of a semiconductor system having a short-circuit protection circuit according to a fifth embodiment.

[0118] The semiconductor system according to Fig. 15 differs from the semiconductor system according to Fig. 14 in that a turn-on gate resistor 4 is further provided in series with the transistor 2 and between the positive power supply 6 and the output node 55 of the gate driver 27. That is, in the semiconductor system according to Fig. 15, the turn-on gate resistor is divided and a portion thereof is connected to the gate terminals 40 and 40B of the semiconductor switching elements 9 and 9B as gate resistors 12 and 12B and the rest is connected to the positive power supply 6 of the gate driver as gate resistor 4.

[0119] This is done for the following reason: When there is sufficient margin in the speed of the short-circuit protection circuit, the turn-on of the gate resistance is partially unified to be shared by the semiconductor switching elements 9 and 9B, reducing the effect of gate resistance value fluctuations. Gate resistance 4, which is a unified gate resistance, makes variations uniform, and since it also functions jointly for all semiconductor switching elements, it does not cause current imbalance. This allows the gate resistances 12 and 12B to be made smaller to achieve a necessary minimum value, and the current imbalance when turning on the semiconductor switching elements can be minimized.

[0120] The rest of Fig. 15 is the same as in Fig. 14 and accordingly, identical or equivalent components are designated identically and are not described redundantly. Fig. 12 described circuit of the modification of the differential voltage circuit 20 also applies to the case of Fig. 15.

[0121] Thus, according to the semiconductor system of the fifth embodiment, in addition to the effect of the fourth embodiment, an imbalance of the currents generated when semiconductor switching elements are turned on can also be minimized.

[0122] It is to be understood that the embodiments described herein are for illustrative purposes only and are not intended to be limiting in any way. List of reference symbols 2, 3 Gate output transistor 4, 5, 12, 12B, 23, 23B Gate resistance 6 positive power supply 7 negative power supply 8, 8B Gate wiring 9, 9B, 109, 109B semiconductor switching element 10, 10B RTC circuit 11 Operation monitoring circuit 13 PNP transistor 14 resistance element 15 Collector connection 16 interruption circuit 17 Emergency stop circuit 19, 19B, 24, 24B, 25, 25B diode 20, 20A differential voltage circuit 21 first differential amplifier 22 second differential amplifier 27 gate drivers 40,40B Gate connection 41 Sensor cell 50, 55, 55B output nodes 53 connection nodes OPA operational amplifier Out output connector Ref Reference connection VinH High potential input terminal (positive input terminal) VinL Low potential input terminal (negative input terminal)

Claims

[1] A short-circuit protection circuit for a semiconductor switching element, the short-circuit protection circuit protecting a first semiconductor switching element, the first semiconductor switching element having a first gate terminal and being turned on by receiving a potential of a first power supply at the first gate terminal from a first output node of a gate driver, the short-circuit protection circuit comprising: A first gate resistor connected between the first output node of the gate driver and the first gate terminal; a first real-time control circuit that reduces a potential of the first gate terminal when the first real-time control circuit detects that a short-circuit current flows through the first semiconductor switching element, and an operation monitoring circuit, wherein the operation monitoring circuit comprises a differential voltage circuit configured to output a potential difference between a potential proportional to a potential difference across the first gate resistor and the potential of the first power supply, and to monitor, based on an output signal of the differential voltage circuit, whether the first real-time control circuit is in operation. [2] A short-circuit protection circuit for a semiconductor switching element according to claim 1, wherein the short-circuit protection circuit protects a second semiconductor switching element, the second semiconductor switching element having a second gate terminal and being turned on by receiving the potential of the first power supply at the second gate terminal from the first output node of the gate driver, the short-circuit protection circuit further comprising: A second gate resistor connected between the first output node of the gate driver and the second gate terminal; and a second real-time control circuit that reduces a potential of the second gate terminal when the second real-time control circuit detects that a short-circuit current flows through the second semiconductor switching element, wherein the differential voltage circuit is further configured to output a potential difference between a potential difference proportional to a potential difference across the second gate resistor and the potential of the first power supply. [3] A short-circuit protection circuit for a semiconductor switching element according to claim 2, further comprising: A first diode connected to the first gate terminal such that the first gate terminal is on the cathode side thereof; a second diode connected to the second gate terminal such that the second gate terminal is on the cathode side thereof; and a connection node to which the anode of the first diode and the anode of the second diode are commonly connected, wherein the differential voltage circuit is configured to output a voltage proportional to a potential difference between the first output node of the gate driver and the connection node as a potential difference to the first power supply. [4] A short-circuit protection circuit for a semiconductor switching element according to claim 3, wherein the differential voltage circuit comprises: A first differential amplifier having a positive input terminal connected to the first output node of the gate driver, a negative input terminal connected to the connection node, and an output terminal outputting a potential difference of a potential of the positive input terminal minus a potential of the negative input terminal;and a second differential amplifier having a positive input terminal connected to the first power supply, a negative input terminal connected to the output terminal of the first differential amplifier, and an output terminal that outputs a potential difference of a potential of the positive input terminal minus a potential of the negative input terminal and multiplied by a constant, wherein the operation monitoring circuit monitors, based on a potential of the output terminal of the second differential amplifier, whether the first real-time control circuit is in operation. [5] A short-circuit protection circuit for a semiconductor switching element according to claim 4, wherein the operation monitoring circuit further comprises a PNP transistor having a base terminal connected to the output terminal of the second differential amplifier and an emitter terminal connected to the first power supply, wherein a signal indicating whether the first and second real-time control circuits are in operation is output from a collector terminal of the PNP transistor. [6] A short-circuit protection circuit for a semiconductor switching element according to claim 3, wherein the differential voltage circuit comprises: a first differential amplifier having a negative input terminal connected to the first output node of the gate driver, a positive input terminal connected to the connection node, a reference terminal connected to the first power supply, and an output terminal outputting a potential difference of a potential of the positive input terminal minus a potential of the negative input terminal multiplied by a constant plus a potential of the reference terminal, and wherein the operation monitoring circuit monitors whether the first real-time control circuit is in operation based on a potential of the output terminal of the first differential amplifier. [7] Short-circuit protection circuit for a semiconductor switching element according to claim 6, wherein the operation monitoring circuit further comprises a PNP transistor having a base terminal connected to the output terminal of the first differential amplifier and an emitter terminal connected to the first power supply, wherein a signal indicating whether the first and second real-time control circuits are in operation is output from a collector terminal of the PNP transistor. [8] Short-circuit protection circuit for a semiconductor switching element according to one of claims 2 to 7, further comprising: A third gate resistor connected in parallel with the first gate resistor and connected between the first output node of the gate driver and the first gate terminal; a fourth gate resistor connected in parallel with the second gate resistor and connected between the first output node of the gate driver and the second gate terminal; a third diode connected in series with the first gate resistor and connected between the first output node of the gate driver and the first gate terminal such that the first gate terminal is on the cathode side thereof; a fourth diode connected in series with the third gate resistor and connected between the first output node of the gate driver and the first gate terminal such that the first gate terminal is on the anode side thereof; a fifth diode connected in series with the second gate resistor and connected between the first output node of the gate driver and the second gate terminal, that the second gate terminal is arranged on the cathode side thereof; and a sixth diode connected in series with the fourth gate resistor and connected between the first output node of the gate driver and the second gate terminal such that the second gate terminal is on the anode side thereof. [9] Short-circuit protection circuit for a semiconductor switching element according to a of claims 2 to 7, wherein the gate driver has the following: The first exit node; a first transistor connected between the first output node and connected to the first power supply; a second output node different from the first output node; and a second transistor connected between the second output node and a second power supply, and wherein the short-circuit protection circuit further comprises: A fifth gate resistor connected in series with the second transistor and between the second output node and the second power supply; a seventh diode connected between the first gate terminal and the second output node such that the first gate terminal is located on the anode side thereof; and an eighth diode connected between the second gate terminal and the second output node such that the second gate terminal is located on the anode side thereof. [10] A short-circuit protection circuit for a semiconductor switching element according to claim 9, further comprising: a sixth gate resistor connected in series with the first transistor and connected between the first output node and the first power supply.

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