SEMICONDUCTOR DEVICE
The semiconductor device addresses high current density at contact openings by employing a substrate design with specific conductivity types and buried regions to optimize current distribution, enhancing performance and efficiency.
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- FUJI ELECTRIC CO LTD
- Filing Date
- 2018-11-21
- Publication Date
- 2026-05-13
AI Technical Summary
Current semiconductor devices face issues with current concentration at the end section of contact openings, leading to high current density, which can impair performance and efficiency.
The semiconductor device incorporates a semiconductor substrate with specific conductivity types and buried regions, including a buried end section that extends perpendicular to the substrate surface, designed to reduce the length and distance of these regions under the dielectric interlayer film, thereby minimizing carrier concentration and enhancing current distribution.
This design effectively reduces carrier concentration at the end sections, improving the semiconductor device's performance and efficiency by minimizing electron implantation and reducing electrical resistance.
Smart Images
Figure 00000000_0000_ABST
Abstract
Description
1. TECHNICAL AREA
[0001] The present invention relates to a semiconductor device. 2. STATE OF THE ART
[0002] So far, a semiconductor device has been proposed in which an opening for contact is arranged in an insulating film on a semiconductor substrate and the semiconductor substrate and an anode electrode are connected to each other (see for example PTL 1).
[0003] PTL 1: International Publication No. WO 2014 / 156 849 A1 with corresponding US family member No. US 2015 / 0 364 613 A1
[0004] Since a current tends to concentrate in the end section of a contact opening, the current density is preferably reduced. (Article 1)
[0005] To solve the problem described above, according to one aspect of the present invention, a semiconductor device is provided which has a semiconductor substrate in which a first conductivity type is arranged in a drift region. The semiconductor device can have a second conductivity type arranged between an upper surface of the semiconductor substrate and the drift region, and in a cathode region. The first conductivity type can be arranged between a lower surface of the semiconductor substrate and the drift region and has a higher doping concentration than the drift region. The semiconductor device can have a buried region comprising the second conductivity type, which is arranged above the cathode region.The semiconductor device can have a dielectric interlayer film arranged over the top surface of the semiconductor substrate, in which a contact opening is provided for exposing a portion of the anode region. The semiconductor device can have an electrode on the side of the top surface that is in contact with the anode region at the contact opening. The buried region can have a buried end section that extends continuously from a region below the contact opening to a region below the dielectric interlayer film, while in cross-section it runs perpendicular to the top surface of the semiconductor substrate under an end section of the contact opening.The buried end section area located below the dielectric interlayer film can be shorter than the buried end section area located below the contact opening in a first direction parallel to the upper surface of the semiconductor substrate. (Article 2)
[0006] The length of the buried end section area, which is located under the dielectric interlayer film, can be 20 µm or more in the first direction. (Article 3)
[0007] The buried area can be divided in the first direction and arranged at a distance of a predetermined slot width. The length of the buried end section, which is located beneath the dielectric interlayer film, can be greater than the slot width in the first direction. (Article 4)
[0008] The anode region can extend from the area below the contact opening to the area below the dielectric interlayer film, while in cross-section it runs perpendicular to the upper surface of the semiconductor substrate below the end section of the contact opening. The buried end section, which is located below the dielectric interlayer film, can be shorter in the first direction than the anode region located below the dielectric interlayer film. (Article 5)
[0009] The cathode region can extend from the area below the contact opening to the area below the dielectric interlayer film, while in cross-section it runs perpendicular to the upper surface of the semiconductor substrate below the end section of the contact opening. The buried end section, which is located below the dielectric interlayer film, can be shorter in the first direction than the cathode region located below the dielectric interlayer film. (Article 6)
[0010] The buried end section region, which is located below the dielectric interlayer film, can be 10 µm or more shorter in the first direction than the cathode region located below the dielectric interlayer film. (Article 7)
[0011] The anode and cathode regions can extend from the area below the contact opening to the area below the dielectric interlayer film, while in cross-section they run perpendicular to the upper surface of the semiconductor substrate below the end portion of the contact opening. The cathode region located below the dielectric interlayer film can be shorter in the first direction than the anode region located below the dielectric interlayer film. (Article 8)
[0012] A length in the cathode region, which is arranged under the dielectric interlayer film, can be half or more in the first direction of a length in the anode region, which is arranged under the dielectric interlayer film. (Article 9)
[0013] A distance in the first direction between an end section of the cathode region and an end section of the anode region can be greater than a thickness of the anode region in a second direction perpendicular to the upper surface of the semiconductor substrate. (Article 10)
[0014] The distance in the first direction between the end section of the cathode region and the end section of the anode region can be greater than the thickness of the dielectric interlayer film in the second direction perpendicular to the upper surface of the semiconductor substrate. (Article 11)
[0015] The anode region can have a curved section at its end, perpendicular to the upper surface of the semiconductor substrate. A configuration can be used in which the cathode region is not located below the curved section. (Article 12)
[0016] The length of the buried end section area, which is located below the contact opening, can be equal to or greater than the thickness of the semiconductor substrate in the first direction.
[0017] The summary does not necessarily describe all necessary features of the embodiments of the present invention. The present invention may also be a subcombination of the features described above. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a drawing which shows a structure of an upper surface of a semiconductor device 100 according to an embodiment of the present invention. Fig. 2 is a drawing which shows an example in a cross-section along line AA, which is in Fig. 1 is shown, represents. Fig. Figure 3 is a cross-sectional view showing an enlarged view of the surroundings of an end section 15 of an anode area 16. Fig. Figure 4 is a drawing which shows a YZ cross-section of the semiconductor device 100 in another example. Fig. 5 is a drawing which shows a doping concentration distribution example in a cross-section along line BB, which is in Fig. 4 is shown, represents. Fig. Figure 6 is a drawing which represents a structural example of a semiconductor device 200 according to a comparative example. Fig. Figure 7 is a drawing which shows an example of forward voltage and forward current characteristics of semiconductor device 100 and semiconductor device 200. DESCRIPTION OF EXAMPLE FORMS OF EXECUTION
[0018] The present invention is described below in the form of embodiments. Furthermore, not all combinations of features described in the embodiments need be essential for the means of solving the problem according to the invention.
[0019] In accordance with the present patent specification, one side in a direction parallel to a depth direction of a semiconductor substrate is designated as a "top" side and the other side as a "bottom" side. A surface of two principal surfaces of a substrate, layer, or other component is designated as a top surface and the other surface as a bottom surface. The directions "top" and "bottom" are not limited to the direction of gravity or an orientation at the time the semiconductor device is attached to the substrate or the like.
[0020] In accordance with the present patent specification, technical issues can in some cases be described using orthogonal coordinate axes, that is, an X-axis, a Y-axis, and a Z-axis. In accordance with the present patent specification, a plane parallel to a top surface of the semiconductor substrate is defined as an XY plane, and the depth direction perpendicular to the top surface of the semiconductor substrate is defined as the Z-axis.
[0021] In accordance with the respective embodiments, examples are shown in which a first conductivity type is defined as type n and a second conductivity type as type p, although the first conductivity type can also be defined as type p and the second conductivity type as type n. In this case, the conductivity types of a substrate, layer, region, and the like are defined as opposite polarities, in accordance with the respective embodiments. Furthermore, in a case where type p+ (or type n+) is described in the present patent specification, this means that the doping concentration is higher than that of type p (or type n), and in a case where type p- (or type n-) is described, this means that the doping concentration is lower than that of type p (or type n).
[0022] The doping concentration in this patent specification refers to a concentration of impurities that are converted into donors or acceptors. In some cases, the difference between the concentrations of donors and acceptors may be defined in this patent specification as the doping concentration (also referred to as a net doping concentration or a carrier concentration). Furthermore, a peak value of a doping concentration distribution within a doping range may, in some cases, be defined as the doping concentration within that range.
[0023] Fig. Figure 1 is a drawing depicting the structure of an upper surface of a semiconductor device 100 according to an embodiment of the present invention. The semiconductor device 100 comprises a semiconductor substrate 10. The semiconductor substrate 10 can be a silicon substrate, a silicon carbide substrate, or a nitride semiconductor substrate, such as gallium nitride or the like. In this example, the semiconductor substrate 10 is a silicon substrate. In accordance with the present patent specification, an end section on an outer circumference of the semiconductor substrate 10 is defined as an outer circumferential end 140 in a top view. The top view refers to a case in which the view is parallel to the Z-axis from one side of an upper surface of the semiconductor substrate 10.
[0024] The semiconductor device 100 has an active section 120 and an edge termination section 90. The active section 120 is a region in which, when the semiconductor device 100 is controlled to be in an ON state, a main current flows between the top surface and a bottom surface of the semiconductor substrate 10. This means that the active section 120 is a region in which the current flows within the semiconductor substrate 10 in a depth direction from the top surface to the bottom surface of the semiconductor substrate 10 or from the bottom surface to the top surface. The active section 120 can also be defined as a region in which an electrode, such as an anode electrode, is located on the side of the top surface where the main current flows, as seen from the top view of the semiconductor substrate 10.Furthermore, in a case where the electrode on the top surface is separated in the top view of the semiconductor substrate 10, a region located between the areas where the two electrodes on the top surface are arranged may also be included in the active section 120. The electrode on the top surface may be in contact with the top surface of the semiconductor substrate 10 throughout the entire active section 120, or it may be in contact with the top surface of the semiconductor substrate 10 only partially.
[0025] A diode section comprising a diode device, such as a freewheeling diode (FWD), is located in the active section 120. A transistor section comprising a transistor device, such as an insulated-gate bipolar transistor (IGBT), may also be located in the active section 120. A p-anode region of the diode section and an n-emitter region of the transistor section may be connected to the common electrode on the upper surface, and an n-cathode region of the diode section and a p-collector region of the transistor section may be connected to the common electrode on the lower surface. The diode section and the transistor section may be arranged in the XY plane in a striped structure extending elongately in a Y-axis direction. The diode section and the transistor section may be arranged alternately in the XY plane in an X-axis direction.
[0026] The edge termination section 90 is located on the upper surface of the semiconductor substrate 10 between the active section 120 and the outer circumferential end 140 of the semiconductor substrate 10. The edge termination section 90 can be arranged in a ring-shaped pattern on the upper surface of the semiconductor substrate 10 to surround the active section 120. In this example, the edge termination section 90 is located along the outer circumferential end 140 of the semiconductor substrate 10. The edge termination section 90 reduces the electric field concentration on the upper surface of the semiconductor substrate 10. The edge termination section 90 may, for example, have the structure of a guard ring, a field plate, a RESURF (reduced surface field), or a combination thereof.
[0027] In a case where the transistor section is located in the active section 120, a gate metal layer can also be arranged on the upper surface of the semiconductor substrate 10 between the edge termination structure section 90 and the active section 120. The gate metal layer can be arranged such that, in the top view of the semiconductor substrate 10, it surrounds the active section 120. The gate metal layer is electrically connected to the transistor section and supplies the transistor section with a gate voltage.
[0028] Fig. 2 is a drawing which shows an example in a cross-section along line AA, which is in Fig. Figure 1 shows the cross-section AA, which is a YZ plane encompassing the active section 120 and the edge connection structure section 90. The Y-axis direction in Fig. Figure 2 is an example of a first direction, and a Z-axis direction is an example of a second direction. The semiconductor device 100 in this example has in cross-section the semiconductor substrate 10, a dielectric interlayer film 26, an anode electrode 12, and a cathode electrode 14. The anode electrode 12 is an example of the electrode on the upper surface, and the cathode electrode 14 is an example of the electrode on the lower surface.
[0029] The dielectric interlayer film 26 is arranged such that it covers a portion of the upper surface of the semiconductor substrate 10. The dielectric interlayer film 26 can be silicate glass, such as PSG or BPSG, or it can also be an oxide film, a nitride film, or the like. In this example, the dielectric interlayer film 26 covers the entire edge termination structure section 90. Furthermore, a contact opening 56 for exposing an upper surface 11 of the semiconductor substrate 10 is arranged in at least a portion of the area of the active section 120 within the dielectric interlayer film 26. In a case where the diode section and the transistor section are not located within the active section 120, the contact opening 56 can be located within the entire active area 120.In this example, the area covered with the dielectric interlayer film 26, which is arranged parallel to the outer circumferential end 140 along the outer circumferential end 140 of the semiconductor substrate 10, is defined as the edge termination structure section 90, and an area not covered with the dielectric interlayer film 26 is defined as the active section 120.
[0030] The anode electrode 12 is arranged above the upper surface 11 of the semiconductor substrate 10 and is in contact with the upper surface 11 of the semiconductor substrate 10 via the contact opening 56. In this example, the anode electrode 12 is arranged in contact with an anode region 16 such that it is exposed towards the upper surface 11 of the semiconductor substrate 10. The anode electrode 12 can also be partially arranged on the dielectric interlayer film 26.
[0031] The cathode electrode 14 is arranged on the lower surface 13 of the semiconductor substrate 10. The cathode electrode 14 can be in contact with the entire lower surface 13 of the semiconductor substrate 10. The anode electrode 12 and the cathode electrode 14 are made of a conductive material, such as a metal. In this patent specification, the direction in which the anode electrode 12 is connected to the cathode electrode 14 is referred to as a depth direction (Z-axis direction).
[0032] A type n drift region 18 is arranged in the semiconductor substrate 10. The type p anode region 16 is arranged between the drift region 18 and the upper surface 11 of the semiconductor substrate 10. The anode region 16 is located in a region that encompasses the upper surface 11 of the semiconductor substrate 10. At least a portion of the anode region 16 on the upper surface 11 of the semiconductor substrate 10 is exposed through the contact opening 56 and is in contact with the anode electrode 12. A portion of the anode region 16 may be covered by the dielectric interlayer film 26. In this example, the anode region 16 is arranged continuously from a region below the contact opening 56 to a region below the dielectric interlayer film 26, while in a YZ cross-section it runs perpendicular to the upper surface 11 of the semiconductor substrate 10 below an end section 30 of the contact opening 56.
[0033] It should be noted, however, that the anode region 16 is not located in at least part of the edge termination section 90. In this example, the end section 15 of the anode region 16 is located within the edge termination section 90 in the Y-axis direction. Beneath the guard rings located in the edge termination section 90, the end section 15 can be situated between the guard ring 28, which is located closest to the active section 120, and the end section 30 of the contact opening 56. The end section 15 of the anode region 16 can form a boundary between the anode region 16 and the type-n region in the upper surface 11 of the semiconductor substrate 10. The anode region 16 can be located either in the entire active section 120 or only in a portion thereof.
[0034] A cathode region 24 of type n+, which has a higher doping concentration than the drift region 18, is arranged between the lower surface 13 of the semiconductor substrate 10 and the drift region 18. The cathode region 24 is located in the area encompassing the lower surface 13 of the semiconductor substrate 10. The cathode region 24 is in contact with the cathode electrode 14. At least a portion of the cathode region 24 is located below the contact opening 56. The cathode region 24 is located in the XY plane throughout the entire active section 120, or may be located only in a portion thereof. A portion of the cathode region 24 is located below the dielectric interlayer film 26.In this example, the cathode region 24 is arranged continuously from the region below the contact opening 56 to the region below the dielectric interlayer film 26, while in a YZ cross-section it runs perpendicular to the upper surface 11 of the semiconductor substrate 10 below the end section 50 of the contact opening 56.
[0035] It should be noted, however, that the cathode region 24 is not located in at least part of an area of the edge termination structure section 90. In the area where the cathode region 24 is not located, the drift region 18 may be exposed towards the lower surface 13 of the semiconductor substrate, and a buffer region 20, which will be described below, may also be exposed. In this example, an end section 27 of the cathode region 24 is located within the edge termination structure section 90 in the Y-axis direction. Beneath the guard rings 28, which are located in the edge termination structure section 90, the end section 27 may be located between the guard ring 28 that is closest to the active section 120 and the end section 30 of the contact opening 56 in the Y-axis direction.The end section 27 of the cathode region 24 can be a section which corresponds to half the doping concentration with respect to a peak value of the doping concentration in the cathode region 24 at the lower surface 13 of the semiconductor substrate 10.
[0036] A buried region 22 of type p is arranged above the cathode region 24 within the semiconductor substrate 10. The buried region 22 can be arranged such that it is in contact with the cathode region 24. In this example, the buried region 22 is arranged in the Z-axis direction between the cathode region 24 and the buffer region 20 (or, in a case where the buffer region 20 is not present, the drift region 18).
[0037] At least part of the buried area 22 is located below the contact opening 56. The buried area 22 is partially located within the active area 120 in the XY plane. In this example, the buried area 22 is positioned along the Y-axis at a distance of a predetermined slot width Ys from the active section 120. Furthermore, the majority of the buried areas 22 can also be positioned along the X-axis at a distance of a predetermined slot width. The slot widths in the X-axis and Y-axis directions can be the same or different.
[0038] Among the plurality of buried regions 22, the buried region 22 which is arranged continuously from the region under the contact opening 56 to the region under the dielectric interlayer film 26, while running under the end section 30 of the contact opening, is defined in cross-section perpendicular to the upper surface 11 of the semiconductor substrate 10 as a buried end section region 22-e. The buried end section region 22-e can be the buried region 22 which is arranged closest in the Y-axis direction to the outer circumferential end 140 of the semiconductor substrate 10.
[0039] It should be noted that the buried area 22 is not in contact with the cathode electrode 14. The entire buried area 22 in this example is located at the cathode area 24. An end section 23 on one side of the outer circumferential end 140 of the end sections of the buried end section area 22-e is located in the Y-axis direction within the edge connection structure section 90. Beneath the guard rings 28, which are located in the edge connection structure section 90, the end section 23 can be located in the Y-axis direction between the guard ring 28 that is located closest to the active section 120 and the end section 30 of the contact opening 56. An end section 25 opposite the end section 23 of the end sections of the buried end section area 22-e is located in the Y-axis direction within the active section 120.
[0040] The semiconductor device 100 in this example has a type n buffer region 20 located between the drift region 18 and the lower surface 13 of the semiconductor substrate 10. The cathode region 24 in this example is located between the buffer region 20 and the lower surface 13 of the semiconductor substrate 10. The buried region 22 in this example is located between the buffer region 20 and the cathode region 24.
[0041] The buffer region 20 (or, in a case where the buffer region is not present, the drift region 18) is exposed towards the lower surface 13 of the semiconductor substrate 10 in the area where the cathode region 24 is not present. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 can act as a field-stopping layer, preventing a state in which a depletion layer extending from the side of the lower surface of the anode region 16 reaches the cathode region 24.
[0042] The edge termination structure section 90 in this example has one or more guard rings 28. Each guard ring 28 is arranged in a ring-shaped structure such that it surrounds the active region 120 in the XY plane. Each guard ring 28 can be arranged concentrically in the XY plane. The guard ring 28 in this example is a type p region extending from the top surface 11 of the semiconductor substrate 10 to a position at a predetermined depth. When the guard ring 28 is in place, the depletion layer, which extends from a region between the anode region 16 and the drift region 18, can extend to the vicinity of the outer circumferential end 140 of the semiconductor substrate 10. Consequently, the electric field concentration in an end section of the active region 120 can be reduced.
[0043] If the buried end section 22-e, which covers the cathode section 24, is arranged below the end section 30 of the contact opening 56, as in Fig. As shown in Figure 2, it is possible to suppress the implantation of electrons from the cathode region 24 below the end section 30. Carriers present in the drift region 18 or the like of the edge termination structure section 90 tend to concentrate in the end section 30 of the contact opening 56. However, if electron implantation from the region below the end section 30 is suppressed, the carrier concentration towards the end section 30 can be reduced.
[0044] It should be noted that a length Ye1 in the buried end section region 22-e, which is located below the dielectric interlayer film 26, is shorter than a length Ye2 in the buried end section region 22-e, which is located below the contact opening 56 in the Y-axis direction. This means that, in the buried end section region 22-e, a portion projecting on one side of the active section 120 in the Y-axis direction is longer than a portion projecting on one side of the edge termination structure section 90 in the Y-axis direction, when the end section 30 is defined as the reference point. Consequently, part 37 of the cathode region 24, which is exposed without being covered by the buried region 22 in the active section 120, has a greater distance from the end section of the contact opening 56 than part 35 of the cathode region 24, which is exposed without being covered by the buried region 22 in the edge connection structure section 90.
[0045] In a case where a forward voltage flows in the semiconductor device 100, electrons are more readily implanted into part 37, which points towards the anode electrode 12 from beneath the exposed portions of the cathode region 24 that are not covered by the buried region 22. If part 37 is positioned further away from the end section 30 of the contact opening 56 than part 35, the carrier concentration with respect to the end section 30 can be reduced. Furthermore, if the length Ye1 in the edge termination structure section 90 of the buried end section 22-e is reduced, it is possible to reduce the size of the semiconductor device 100 in the Y-axis direction.
[0046] The length Ye2 in the active section 120 in the buried end section region 22-e can be two or more times the length Ye1 in the edge termination structure section 90, five or more times the length Ye1, ten or more times the length Ye1, or forty or more times the length Ye1. The length Ye2 can be 100 or more times shorter than the length Ye1, 50 or more times shorter than the length Ye1, or ten or more times shorter. Furthermore, the length Ye2 can be equal to or longer than the thickness Zs of the semiconductor substrate 10 in the Z-axis direction. The length Ye2 can be twice as long or longer than the thickness Zs, or even five or more times the thickness Zs.
[0047] Furthermore, the length Ye1 in the buried end section 22-e, which is arranged in the Y-axis direction beneath the dielectric interlayer film 26, can be 20 µm or more. If the length Ye1 is set to a predetermined length or even longer, the portion 35 of the cathode region 24 can be offset from the end section 30 of the contact opening 56. Consequently, the carrier concentration at the end section 30 can be further reduced. The length Ye1 can be 30 µm or more, or even 40 µm or more. By increasing the length Ye1, it is even possible to suppress influences that impair the properties, even in cases where a manufacturing deviation occurs in the photolithography process for forming a mask used in the formation of the buried region 22.
[0048] Furthermore, the length Ye1 in the buried end section 22-e, which is arranged in the Y-axis direction beneath the dielectric interlayer film 26, can also be greater than the slot width Ys of the buried section 22 in the Y-axis direction. Consequently, the part 35 of the cathode region 24 can be arranged away from the end section 30. The length Ye1 can be 1.5 or more times the slot width Ys, two or more times the slot width Ys, or even three or more times the slot width Ys.
[0049] In a case where a length in the anode region 16, which is arranged in the Y-axis direction under the dielectric interlayer film 26, is defined as Ya, the length Ye1 can be shorter than the length Ya. This means that the buried end section region 22-e is located in a region that is intended to overlap with the anode region 16 in the edge termination structure section 90. The length Ye1 can be 20% or more of the length Ya, 30% or more of the length Ya, or 40% or more of the length Ya. The length Ye1 can be 60% or less of the length Ya, or 50% or less of the length Ya.
[0050] In a case where a length in the cathode region 24, which is arranged in the Y-axis direction under the dielectric interlayer film 26, is defined as Yk, the length Ye1 can be shorter than the length Yk. This means that the buried end section region 22-e is located in an area that is intended to overlap with the cathode region 24 in the edge connection structure section 90. Consequently, even in a case where a manufacturing deviation or the like occurs, contact between the buried end section region 22-e and the cathode electrode 14 is avoided.
[0051] The length Ye1 can be 20% or more of the length Yk, 30% or more of the length Yk, or 40% or more of the length Yk. The length Ye1 can be 80% or less of the length Yk, or 70% or less of the length Yk. Furthermore, the length Ye1 can be 10 µm or more shorter than the length Yk. The length Ye1 can be 15 µm or more shorter than the length Yk, or 20 µm or more shorter than the length Yk.
[0052] Furthermore, the length Yk in the cathode region 24 can be shorter than the length Ya of the anode region 16 beneath the dielectric interlayer film 26. This means that the cathode region 24 is located in an area that is intended to overlap with the anode region 16 in the edge termination structure section 90. The length Yk can be half or more of the length Ya, or it can be 60% or more of the length Ya. The length Yk can be 80% or less of the length Ya, or it can be 70% or less of the length Ya. If the end section 27 of the cathode region 24 is designed to be located closer to one side of the end section 30 of the contact opening 56 than the end section 15 of the anode region 16, the carrier concentration towards the end section 15 of the anode region 16 can be reduced.
[0053] Furthermore, the distance (Ya - Yk) between the end section 27 of the cathode region 24 and the end section 15 of the anode region 16 in the Y-axis direction can be greater than the thickness Za of the anode region 16 in the Z-axis direction. Consequently, the carriers implanted by the cathode region 24 are prevented from reaching the end section 15 of the anode region 16, and the carrier concentration in the end section 15 can be reduced. The distance (Ya - Yk) can be 1.2 or more times the thickness Za, 1.5 or more times the thickness Za, or even two or more times the thickness Za. It should be noted that the thickness of the anode region 16 immediately below the end section 30 of the contact opening 56 can be used as the thickness Za of the anode region 16.
[0054] Furthermore, the distance (Ya - Yk) between the end section 27 of the cathode region 24 and the end section 15 of the anode region 16 in the Y-axis direction can also be greater than the thickness Zi of the dielectric interlayer film 26 in the Z-axis direction. The distance (Ya - Yk) can be 1.2 or more times the thickness Zi, 1.5 or more times the thickness Zi, or even two or more times the thickness Zi. It should be noted that the thickness of the dielectric interlayer film 26 immediately above the end section 15 of the anode region 16 can be used as the thickness Zi of the dielectric interlayer film 26.
[0055] Fig. Figure 3 is a cross-sectional view showing an enlarged view of the area surrounding the end section 15 of the anode region 16. In the YZ cross-section, the anode region 16 has a curved section 17 in its end section 15. The curved section 17 is a region where the boundary between the anode region 16 and the drift region 18 in the YZ cross-section is a downwardly projecting curved area.
[0056] In this example, the cathode region 24 is not located beneath the curved section 17. This means that a lower end of the cathode region 24 in the YZ cross-section is positioned beneath a region which forms a straight line parallel to the upper surface 11 of the semiconductor substrate 10 in the anode region 16. In accordance with the structure described above, the carriers implanted by the cathode region 24 are prevented from reaching the curved section 17, and the carrier concentration in the curved section 17 can be reduced.
[0057] Fig. Figure 4 is a drawing that shows the YZ cross-section in another example of the semiconductor device 100. In addition to the components described in Figure 4, the semiconductor device 100 in this example also includes the following: Fig. As described in Sections 1 to 3, a semiconductor device 100 includes a lifetime control section 40. The lifetime control section 40 is a region in which the density of crystal defects is increased by locally implanting helium or the like into a predetermined area of the semiconductor substrate 10 compared to other areas. When the lifetime control section 40 is in place, recombination of carriers derived from the crystal defects is promoted, and the lifetime of the carriers can be adjusted.
[0058] The lifetime control section 40 in this example is arranged in the Z-axis direction within the buffer area 20 and is also arranged in the XY plane within the active section 120. The lifetime control section 40 can also be arranged in the XY plane in at least a part of the edge connection structure section 90.
[0059] Fig. 5 is a drawing which shows a doping concentration distribution example in a cross-section along line BB, which is in Fig. 4 is shown, represents. Fig. Figure 5 shows, in addition to the doping concentration, a peak in the concentration of crystal defects in the lifetime control section 40. In this example, the doping concentration distribution in the buffer region 20 in the Z-axis direction exhibits a plurality of peaks 42. The peak in the concentration of crystal defects in the lifetime control section 40 is preferably arranged such that it does not overlap with any of the peaks 42 in the buffer region 20 in the Z-axis direction. Consequently, excessive recovery of crystal defects in the lifetime control section 40 by protons or the like, which are implanted into the buffer region 20, can be suppressed.
[0060] It should be noted that a state in which the concentration peaks do not overlap refers to a state in which the distance X between the peaks is equal to or greater than a predetermined value. For example, the distance X could be half the width at half the maximum Y / 2 of a crystal defect concentration distribution of lifetime control section 40 or greater, it could be the entire width at half the maximum Y or greater, or it could be twice as large as or greater than the entire width at half the maximum Y.
[0061] Likewise, it is desirable that the concentration peaks of the lifetime control section 40 do not overlap with the peak of the doping concentration of the buried region 22. Consequently, the disappearance of the carriers in the buried region 22 can be suppressed by a lifetime control section 40.
[0062] Fig. Figure 6 is a drawing that presents a structural example of a semiconductor device 200 according to a comparative example. In the semiconductor device 200, the cathode region 24 and the buried region 22 are arranged below the contact opening 56 and not below the end section 30 of the contact opening 56 and the dielectric interlayer film 26. When the above-mentioned structure is used, the carriers can, in some cases, concentrate in the end section 30 of the contact opening 56. Furthermore, the end section 23 of the buried end section region 22-e and the end section 27 of the cathode region 24 are arranged in essentially the same positions, and the buried end section region 22-e is more likely to be electrically connected to the cathode electrode 14.When the buried end section region 22-e and the cathode electrode 14 are placed in a short-circuited state, electron implantation from the cathode region 24 is disturbed, and no forward current flows unless a high forward voltage is applied.
[0063] Fig. Figure 7 shows an example of the forward voltage and forward current characteristics of semiconductor device 100 and semiconductor device 200. Fig. 7 The properties of semiconductor device 100 are shown by a solid line, and the properties of semiconductor device 200 are shown by a dashed line.
[0064] As in Fig.As shown in Figure 7, according to the properties of semiconductor device 100 compared to semiconductor device 200, a current with a relatively low voltage is applied. This means that if the end section 23 of the buried end section region 22-e is positioned closer to the side of the active section 120 than the end section 27 of the cathode region 24, the electrical resistance between the buried end section region 22-e and the cathode electrode 14 can be increased, and electrons can be efficiently implanted from the cathode region 24. REFERENCE MARK LIST 10 Semiconductor substrate 11 upper surface 12 Anode electrode 13 lower surface 14 Cathode electrode 15 Final section 16 Anode area 17 curved section 18 Drift range 20 Buffer area 22 buried area 23 Final section 24 Cathode area 25 Final section 26 dielectric interlayer film 27 Final section 28 Protective ring 30 Final section Part 35 Part 37 40 Lifetime control section 42 peak 56 Contact opening 90 Edge connection structure section 100 semiconductor devices 120 active section 140 outer circumference end 200 semiconductor devices
Claims
Semiconductor device (200) comprising a semiconductor substrate (10) in which a drift region (18) having a first conductivity type is arranged, wherein the semiconductor device (200) comprises: an anode region (16) having a second conductivity type which is arranged between an upper surface (11) of the semiconductor substrate and the drift region (18); a cathode region (24) having the first conductivity type which is arranged between a lower surface (13) of the semiconductor substrate and the drift region (18) and having a higher doping concentration than the drift region (18); a buried region (22) having the second conductivity type which is arranged above the cathode region (24); a dielectric interlayer film (26) which is arranged above the upper surface (11) of the semiconductor substrate and in which a contact opening (56) for exposing a part of the anode region is arranged;and an electrode (12) on the side of the upper surface (11) in contact with the anode region (16) in the contact opening (56), wherein the buried region (22) has a buried end section region (22-e) which is arranged continuously from a region below the contact opening (56) to a region below the dielectric interlayer film (26), while in a cross-section perpendicular to the upper surface (11) of the semiconductor substrate below an end section of the contact opening (56), and wherein the buried end section region (22-e) which is arranged below the dielectric interlayer film (26) is shorter than the buried end section region (22-e) which is arranged in a first direction parallel to the upper surface (11) of the semiconductor substrate below the contact opening (56). Semiconductor device (200) according to claim 1, wherein the length of the buried end section area which is arranged under the dielectric interlayer film (26) is 20 µm or more in the first direction. Semiconductor device (200) according to claim 1 or 2, wherein: the buried area (22) is separated in the first direction and arranged at a distance of a predetermined slot width; and a length of the buried end section area, which is arranged under the dielectric interlayer film (26), is greater in the first direction than the slot width. Semiconductor device (200) according to any one of claims 1 to 3, wherein: the anode region (16) is arranged from the region under the contact opening (56) to the region under the dielectric interlayer film (26), while in cross-section it extends perpendicular to the upper surface (11) of the semiconductor substrate under the end section of the contact opening (56); and the buried end section region (22-e) which is arranged under the dielectric interlayer film (26) is shorter than the anode region (16) which is arranged in the first direction under the dielectric interlayer film (26). Semiconductor device (200) according to any one of claims 1 to 4, wherein: the cathode region (24) is arranged from the region under the contact opening (56) to the region under the dielectric interlayer film (26), while in cross-section it extends perpendicular to the upper surface (11) of the semiconductor substrate under the end section of the contact opening (56); and the buried end section region (22-e) which is arranged under the dielectric interlayer film (26) is shorter than the cathode region (24) which is arranged in the first direction under the dielectric interlayer film (26). Semiconductor device (200) according to claim 5, wherein the buried end section region (22-e) which is arranged under the dielectric interlayer film (26) is shorter in the first direction by 10 µm or more than the cathode region (24) which is arranged under the dielectric interlayer film (26). Semiconductor device (200) according to any one of claims 1 to 6, wherein: the anode region (16) and the cathode region (24) are arranged from the region below the contact opening (56) to the region below the dielectric interlayer film (26), while in cross-section they extend perpendicular to the upper surface (11) of the semiconductor substrate below the end section of the contact opening (56); and the cathode region (24) which is arranged below the dielectric interlayer film (26) is shorter in the first direction than the anode region (16) which is arranged below the dielectric interlayer film (26). Semiconductor device (200) according to claim 7, wherein a length in the cathode region (24) which is arranged under the dielectric interlayer film (26) is in the first direction half or more of a length in the anode region (16) which is arranged under the dielectric interlayer film (26). Semiconductor device (200) according to claim 7 or 8, wherein a distance in the first direction between an end section of the cathode region and an end section of the anode region is greater than a thickness of the anode region in a second direction perpendicular to the upper surface (11) of the semiconductor substrate. Semiconductor device (200) according to any one of claims 7 to 9, wherein a distance in the first direction between the end section of the cathode region and the end section of the anode region is greater than a thickness of the dielectric interlayer film in a second direction perpendicular to the upper surface (11) of the semiconductor substrate. Semiconductor device (200) according to claim 7 or 8, wherein: the anode region (16) has a curved section (17) in the end region in cross-section perpendicular to the upper surface (11) of the semiconductor substrate; and the cathode region (24) is not arranged below the curved section (17). Semiconductor device (200) according to any one of claims 1 to 11, wherein a length of the buried end section area which is arranged below the contact opening (56) is equal to or greater than a thickness of the semiconductor substrate in the first direction.