SEMICONDUCTOR DEVICE

Abstract

A semiconductor device includes a terminal, a semiconductor element, a sealing resin, and a first conductive region. The terminal includes a front surface oriented along a thickness direction. The semiconductor element includes a circuit region, a first element surface, and first electrodes on the first element surface. The first electrodes are connected to the front surface. The sealing resin partially covers the terminal and the semiconductor element. The terminal includes first terminal regions and a second terminal region oriented along a first direction that intersects the thickness direction. Each first electrode is electrically connected to the circuit region. Each first terminal region is electrically connected to the circuit region via a first electrode.The first conductive area lies between the second terminal area and the first element surface and is connected to both. The first conductive area is isolated from the circuit area.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Various configurations have been proposed for semiconductor devices including semiconductor elements. Patent Document 1 discloses an example of a conventional semiconductor device. The semiconductor device disclosed in this document includes leads, a semiconductor element, and a sealing resin. The leads have a plurality of terminal portions. The plurality of terminal portions are arranged in a direction perpendicular to the thickness direction of the leads. The sealing resin covers a portion of the leads and the semiconductor element. The sealing resin has a rectangular shape when viewed in the thickness direction.

[0003] In the semiconductor device described in Patent Document 1, a semiconductor element is mounted on leads by flip-chip mounting. The leads have a main surface facing one side in the thickness direction. The semiconductor element has a plurality of electrodes provided on the side opposite the main surface, and the plurality of electrodes are joined to the main surface of the leads via a bonding layer made of, for example, solder. A plurality of terminals arranged in a direction perpendicular to the lead thickness direction are electrically connected to an internal circuit of the semiconductor element via the plurality of electrodes.

[0004] However, in the above-described flip-chip mounted semiconductor device, the bonding portions of the electrodes and the leads cannot be directly observed, and there is no suitable means for checking the bonding condition of the bonding portions. Furthermore, in a configuration in which the terminals are arranged in a predetermined direction, the electrodes located on the outermost sides of the terminals are located closest to the corners of the package encapsulated by the resin. Generally, the internal stress is greatest at the bonding portions of the electrodes located closest to the corners of the package, and there is concern that stress fracture may occur depending on the bonding condition of the bonding portions.

[0005] Japanese Patent Application Laid-Open No. 2020-77694

[0006] An object of the present disclosure is to provide a semiconductor device that is improved over conventional semiconductor devices. In particular, in view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device that is suitable for improving the bonding reliability of a semiconductor element mounted on a lead by flip-chip bonding.

[0007] A semiconductor device according to one aspect of the present disclosure includes a lead having a main surface facing one side in a thickness direction, a semiconductor element, a sealing resin, and a first conductive portion. The semiconductor element has a circuit portion, a first element surface facing the main surface in the thickness direction, and a plurality of first electrodes provided on the first element surface. The plurality of first electrodes are connected to the main surface. The sealing resin covers a portion of the lead and the semiconductor element. The lead includes a plurality of first terminals arranged along a first direction perpendicular to the thickness direction, and a second terminal positioned closer to an end of the sealing resin in the first direction than the plurality of first terminals. Each of the plurality of first electrodes is electrically connected to the circuit portion. Each of the plurality of first terminals is electrically connected to the circuit portion via at least one of the plurality of first electrodes. The first conductive portion is interposed between the second terminal and the first element surface and connected to both the second terminal and the first element surface. The first conductive portion is insulated from the circuit portion.

[0008] According to the above-described configuration, in the semiconductor device, it is possible to improve the bonding reliability of the semiconductor element mounted by flip-chip mounting.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view (transmitted through the encapsulating resin) of the semiconductor device shown in FIG. 1. FIG. 3 is a plan view (transmitted through the semiconductor element and the encapsulating resin) of the semiconductor device shown in FIG. 1. FIG. 4 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 5 is a front view of the semiconductor device shown in FIG. 1. FIG. 6 is a rear view of the semiconductor device shown in FIG. 1. FIG. 7 is a right side view of the semiconductor device shown in FIG. 1. FIG. 8 is a left side view of the semiconductor device shown in FIG. 1. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 3. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 3. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a partially enlarged view of FIG. 11. FIG. 14 is an enlarged cross-sectional view similar to FIG. 11, showing a state in which the semiconductor element is mounted at an angle with respect to the leads. FIG. 15 is a plan view similar to FIG. 3, showing a semiconductor device according to a modified example of the first embodiment. Fig. 16 is a cross-sectional view taken along line XVI-XVI in Fig. 15. Fig. 17 is a plan view similar to Fig. 3, showing a semiconductor device according to a second embodiment of the present disclosure.

[0011] Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0012] Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not necessarily intended to dictate any ordering of their objects.

[0013] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed from a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B."

[0014] First Embodiment: A semiconductor device according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 13 . The semiconductor device A10 of this embodiment includes a lead 1, a semiconductor element 3, a sealing resin 4, and a first conductive portion 6. The lead 1 includes a main portion 10, a plurality of first terminals 21, two second terminals 22, a terminal 25, two terminals 26, a plurality of terminals 27, and a plurality of terminals 28. The sealing resin 4 is rectangular in plan view. As shown in FIG. 1 , the semiconductor device A10 is packaged in a QFN (Quad For Non-Lead Package) format. The specific configuration of the semiconductor element 3 is not particularly limited, and the semiconductor element 3 is, for example, a flip-chip LSI (Large Scale Integration). In this embodiment, the semiconductor element 3 is, for example, a flip-chip LSI incorporating a switching circuit 321 and a control circuit 322 (each of which will be described in detail later). In the semiconductor device A10, the switching circuit 321 converts DC power (voltage) into AC power (voltage). The semiconductor device A10 is used as one element constituting the circuit of a DC / DC converter, for example.

[0015] FIG. 1 is a perspective view showing the semiconductor device A10. FIG. 2 is a plan view showing the semiconductor device A10. FIG. 3 is a plan view showing the semiconductor device A10. FIG. 4 is a bottom view showing the semiconductor device A10. FIG. 5 is a front view showing the semiconductor device A10. FIG. 6 is a rear view showing the semiconductor device A10. FIG. 7 is a right side view showing the semiconductor device A10. FIG. 8 is a left side view showing the semiconductor device A10. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 3. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 3. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a partially enlarged view of FIG. 11. Note that FIG. 2 shows the semiconductor element 3 and the sealing resin 4 in a transparent manner for ease of understanding. FIG. 3 shows the semiconductor element 3 and the sealing resin 4 in a transparent manner for ease of understanding. In these figures, the semiconductor element 3 and the sealing resin 4 are shown by imaginary lines (two-dot chain lines).

[0016] In the description of the semiconductor device A10, the thickness direction of the main portion 10 is referred to as the "thickness direction z." The direction perpendicular to the thickness direction z (the up-down direction in FIG. 2 ) is referred to as the "first direction x." The direction perpendicular to both the thickness direction z and the first direction x (the left-right direction in FIG. 2 ) is referred to as the "second direction y." As shown in FIGS. 1 and 2 , the semiconductor device A10 is rectangular when viewed in the thickness direction z (plan view).

[0017] The lead 1 (main portion 10, the plurality of first terminal portions 21, the two second terminal portions 22, the terminal portion 25, the two terminal portions 26, the plurality of terminal portions 27, and the plurality of terminal portions 28) are all formed, for example, from the same lead frame. The constituent material of the lead frame is not particularly limited, and may be, for example, copper (Cu) or a copper alloy.

[0018] As shown in FIGS. 3 and 9 to 12 , the main portion 10 supports the semiconductor element 3. At least a portion of the main portion 10 is covered with the sealing resin 4. In this embodiment, the main portion 10 has a main surface 11 and a back surface 12. The main surface 11 faces one side in the thickness direction z and faces the semiconductor element 3. The back surface 12 faces the opposite side to the main surface 11 (the other side in the thickness direction z). The main surface 11 is covered with the sealing resin 4. The back surface 12 is exposed from the sealing resin 4.

[0019] In this embodiment, the main portion 10 includes a first main portion 101 , two second main portions 102 , a third main portion 103 , a plurality of fourth main portions 104 , and a plurality of fifth main portions 105 .

[0020] The above-mentioned main surface 11 has a first main surface 111, a second main surface 112, a third main surface 113, a fourth main surface 114, and a fifth main surface 115. These first main surface 111 to fifth main surface 115 belong to any of the first main portion 101 to fifth main portion 105.

[0021] The rear surface 12 has a first rear surface 121 and a second rear surface 122. The first rear surface 121 and the second rear surface 122 belong to either the first main portion 101 or the second main portion 102.

[0022] 3, the first main portion 101 is located at the center (or approximately the center) of the semiconductor device A10 in the second direction y and extends in the first direction x. The first main portion 101 is an input terminal to which DC power (voltage) to be converted in the semiconductor device A10 is input. The first main portion 101 is a positive electrode (P terminal).

[0023] 3 , 4 , and 9 , the first main portion 101 has a first main surface 111 and a first back surface 121. The semiconductor element 3 is supported by the first main surface 111. The first main portion 101 has a portion that is exposed from the sealing resin 4 to the other side in the thickness direction z, and the exposed portion includes the first back surface 121.

[0024] 3, the two second main portions 102 are located on one side of the semiconductor device A10 in the second direction y (the right side in the figure) and are spaced apart in the second direction y. The two second main portions 102 are adjacent to each other in the second direction y and each extend in the first direction x. Each of the two second main portions 102 outputs AC power (voltage) converted by a switching circuit 321 configured in the semiconductor element 3.

[0025] 3 , 4 , 9 , and 10 , the second main portion 102 has a second main surface 112 and a second back surface 122. The semiconductor element 3 is supported by the second main surface 112. The second main portion 102 has a portion that is exposed from the sealing resin 4 on the other side in the thickness direction z, and the exposed portion includes the second back surface 122.

[0026] 3, the third main portion 103 is located near one end of the semiconductor device A10 in the second direction y (the right side in the figure), and is arranged adjacent to one of the second main portions 102 on one side in the second direction y. The third main portion 103 extends in the first direction x. The third main portion 103 is an input terminal to which DC power (voltage) to be converted into power is input in the semiconductor device A10. The third main portion 103 is a negative electrode (N terminal).

[0027] 3, 9, and 11, the third main portion 103 has a third main surface 113. The semiconductor element 3 is supported by the third main surface 113.

[0028] 3, the plurality of fourth main portions 104 are located on the other side in the second direction y (to the left in the figure) of the first main portion 101. The plurality of fourth main portions 104 are arranged at intervals in the first direction x. For example, power (voltage) for driving the control circuit 322 or an electrical signal for transmission to the control circuit 322 is input to each of the plurality of fourth main portions 104.

[0029] 3 and 9, the fourth main portion 104 has a fourth main surface 114. The semiconductor element 3 is supported by the fourth main surface 114.

[0030] 3, the plurality of fifth main portions 105 are located on the other side in the second direction y (left side in the figure) of the first main portion 101. Some of the plurality of fifth main portions 105 are located on one side in the first direction x of the semiconductor device A10 (upper side in the figure). The remaining of the plurality of fifth main portions 105 are located on the other side in the first direction x of the semiconductor device A10 (lower side in the figure). An electrical signal is input to each of the plurality of fifth main portions 105 to be transmitted to, for example, the control circuit 322.

[0031] 3 and 12, the fifth main portion 105 has a fifth main surface 115. The semiconductor element 3 is supported by the fifth main surface 115.

[0032] In the main portion 10 (first main portion 101 to fifth main portion 105), the main surface 11 (first main surface 111 to fifth main surface 115) on which the semiconductor element 3 is supported may be plated with, for example, silver (Ag). Furthermore, the back surface 12 (first back surface 121 and second back surface 122) exposed from the sealing resin 4 may be plated with, for example, tin (Sn). Instead of tin plating, multiple metal platings, for example, nickel (Ni), palladium (Pd), and gold (Au) layered in this order, may be used. In FIGS. 1 and 4 to 8, the portions of the lead 1 (main portion 10, the multiple first terminals 21, the two second terminals 22, the terminal 25, the two terminals 26, the multiple terminals 27, and the multiple terminals 28) exposed from the sealing resin 4 are indicated by multiple dotted regions.

[0033] 3, the multiple first terminals 21 are arranged along the first direction x. In this embodiment, the multiple first terminals 21 are arranged at one end (the right end in the figure) of the semiconductor device A10 (sealing resin 4) in the second direction y. Each of the multiple first terminals 21 is connected to the third main portion 103. The configuration of each of the multiple first terminals 21 is the same. The configuration of one of the multiple first terminals 21 in the semiconductor device A10 will be described as a representative.

[0034] As shown in Figures 3, 4, 7, and 9, the first terminal portion 21 has a first mounting surface 211 and a first side surface 212. The first mounting surface 211 faces the other side in the thickness direction z. The first side surface 212 faces one side in the second direction y. In this embodiment, the first side surface 212 is connected to the first mounting surface 211 and is flush with it. The first mounting surface 211 and the first side surface 212 are exposed from the sealing resin 4.

[0035] In each of the plurality of first terminal portions 21, the first mounting surface 211 and the first side surface 212 exposed from the sealing resin 4 may be plated with tin, for example. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold layered in this order, may be used.

[0036] 3 , the second terminal 22 is disposed closer to the end of the sealing resin 4 in the first direction x than the plurality of first terminals 21. In this embodiment, two second terminals 22 are disposed on one side in the first direction x and the other side in the first direction x relative to the plurality of first terminals 21. The two second terminals 22 are disposed at the corners on one side in the second direction y and on both sides in the first direction x of the four corners of the rectangular sealing resin 4 as seen in the thickness direction z.

[0037] As shown in FIGS. 3 to 7 and 11 , the second terminal 22 has an extending portion 221, a second mounting surface 222, a second side surface 223, and a third side surface 224. The extending portion 221 extends inward into the sealing resin 4 beyond the ends of the sealing resin 4 in the first direction x and the second direction y. The extending portion 221 (second terminal 22) is connected to the first conductive portion 6. The second mounting surface 222 faces the other side in the thickness direction z. The second side surface 223 faces the same side as the first side surface 212 of the first terminal 21 and faces one side in the second direction y. The third side surface 224 faces either one side in the first direction x or the other side in the first direction x. In this embodiment, the second side surface 223 is connected to the second mounting surface 222 and is flush with the second mounting surface 222. The third side surface 224 is connected to and flush with both the second mounting surface 222 and the second side surface 223. The second mounting surface 222, the second side surface 223, and the third side surface 224 are exposed from the sealing resin 4.

[0038] In each of the two second terminals 22, the upper surface (the surface facing one side in the thickness direction z) of the extending portion 221 to which the first conductive portion 6 is connected may be plated with silver, for example. The second mounting surface 222, the second side surface 223, and the third side surface 224 exposed from the sealing resin 4 may be plated with tin, for example. Instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold stacked in this order, may be used.

[0039] As shown in FIG. 3 , the terminal portion 25 is disposed at one end (the upper end in the figure) of the semiconductor device A10 in the first direction x. The terminal portion 25 is connected to the first main portion 101. As shown in FIGS. 3 , 4 , and 6 , the terminal portion 25 has a mounting surface 251 and a side surface 252. The mounting surface 251 faces the other side in the thickness direction z. The side surface 252 faces one side in the first direction x. In this embodiment, the side surface 252 is connected to the mounting surface 251 and is flush with it. The mounting surface 251 and the side surface 252 are exposed from the sealing resin 4.

[0040] As shown in FIG. 3 , the two terminal portions 26 are arranged at one end (upper end in the figure) and the other end (lower end in the figure) of the semiconductor device A10 in the first direction x. The two terminal portions 26 are connected to the two second main portions 102, respectively. As shown in FIGS. 3 to 6 and 10 , the terminal portion 26 has a mounting surface 261 and a side surface 262. The mounting surface 261 faces the other side in the thickness direction z. The side surface 262 faces either one side in the first direction x or the other side in the first direction x. In this embodiment, the side surface 262 is connected to the mounting surface 261 and is flush with it. The mounting surface 261 and the side surface 262 are exposed from the sealing resin 4.

[0041] As shown in FIG. 3 , the multiple terminal portions 27 are arranged at the other end of the semiconductor device A10 in the second direction y (the left end in the figure). Each of the multiple terminal portions 27 is connected to one of the multiple fourth main portions 104. As shown in FIGS. 3 , 4 , 8 , and 9 , the terminal portion 27 has a mounting surface 271 and a side surface 272. The mounting surface 271 faces the other side in the thickness direction z. The side surface 272 faces the other side in the second direction y. In this embodiment, the side surface 272 is connected to the mounting surface 271 and is flush with it. The mounting surface 271 and the side surface 272 are exposed from the sealing resin 4.

[0042] As shown in FIG. 3 , the multiple terminals 28 are arranged at one end (upper end in the figure) of the semiconductor device A10 in the first direction x and the other end (lower end in the figure) in the first direction x. Each of the multiple terminals 27 is connected to one of the multiple fifth main portions 105. As shown in FIGS. 3 to 6 and 12 , the terminals 28 have a mounting surface 281 and a side surface 282. The mounting surface 281 faces the other side in the thickness direction z. The side surface 282 faces either one side in the first direction x or the other side in the first direction x. In this embodiment, the side surface 282 is connected to the mounting surface 281 and is flush with it. The mounting surface 281 and the side surface 282 are exposed from the sealing resin 4.

[0043] In the terminal portion 25, the two terminal portions 26, the plurality of terminal portions 27, and the plurality of terminal portions 28, portions exposed from the sealing resin 4 (mounting surfaces 251, 261, 271, 281 and side surfaces 252, 262, 272, 282), for example, tin plating may be applied. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold laminated in this order, may be employed.

[0044] The semiconductor element 3 has a semiconductor substrate 31, a semiconductor layer 32, a plurality of first electrodes 33, a plurality of electrodes 34, and a plurality of electrodes 35. As shown in Figures 9 to 12, the semiconductor substrate 31 supports the semiconductor layer 32, the plurality of first electrodes 33, the plurality of electrodes 34, and the plurality of electrodes 35 below it. The constituent material of the semiconductor substrate 31 is, for example, Si (silicon) or silicon carbide (SiC).

[0045] The semiconductor layer 32 is stacked on the semiconductor substrate 31 on a side facing the main surface 11 in the thickness direction z. The semiconductor layer 32 has a first element surface 320. The first element surface 320 faces the other side in the thickness direction z and faces the main surface 11 in the thickness direction z. The semiconductor layer 32 includes multiple types of p-type and n-type semiconductors based on differences in the amount of doped elements. The semiconductor layer 32 includes a switching circuit 321 and a control circuit 322 that is electrically connected to the switching circuit 321. The switching circuit 321 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT). In the example illustrated by the semiconductor device A10, the switching circuit 321 is divided into two regions: a high-voltage region (upper arm circuit) and a low-voltage region (lower arm circuit). Each region is configured with one n-channel MOSFET. The control circuit 322 includes a gate driver for driving the switching circuit 321 and a bootstrap circuit corresponding to the high-voltage region of the switching circuit 321, and performs control for normally driving the switching circuit 321. A wiring layer (not shown) is further formed in the semiconductor layer 32. The switching circuit 321 and the control circuit 322 are mutually conductive via the wiring layer. The switching circuit 321 and the control circuit 322 are examples of a "circuit section."

[0046] In this embodiment, the semiconductor element 3 has a first wiring 325 provided in the semiconductor layer 32 (see FIGS. 2 and 3). In FIGS. 2 and 3, the path of the first wiring 325 is simplified and indicated by a dotted line. The first wiring 325 is not electrically connected to any of the switching circuit 321, the control circuit 322, and the above-mentioned wiring layers.

[0047] 9 to 12 , the plurality of first electrodes 33, the plurality of electrodes 34, and the plurality of electrodes 35 are provided on an element first surface 320, which is the side facing the main surface 11 (the first main surface 111 to the fifth main surface 115) in the thickness direction z. The plurality of first electrodes 33, the plurality of electrodes 34, and the plurality of electrodes 35 are in contact with the semiconductor layer 32.

[0048] The multiple first electrodes 33 are electrically connected to the switching circuit 321 of the semiconductor layer 32. Each of the multiple first electrodes 33 is connected to the third main portion 103. As shown in FIGS. 3 and 11 , the multiple first electrodes 33 are arranged along the first direction x. The first electrodes 33 are connected to the third main surface 113 of the third main portion 103 via a conductive bonding layer such as solder (see bonding layer 331 in FIG. 14 ). Each of the multiple first terminals 21 is connected to the third main portion 103. As a result, each of the multiple first terminals 21 is electrically connected to the switching circuit 321 (circuit portion) via at least one of the multiple first electrodes 33.

[0049] The multiple electrodes 34 are electrically connected to the switching circuit 321 of the semiconductor layer 32. Each of the multiple electrodes 34 is connected to either the first main surface 111 of the first main portion 101 or the second main surfaces 112 of the two second main portions 102. Like the first electrode 33, the electrode 34 is connected to the first main surface 111 (second main surface 112) via a conductive bonding layer (not shown) such as solder. This allows the first main portion 101 and the two second main portions 102 to be electrically connected to the switching circuit 321.

[0050] The plurality of electrodes 35 are electrically connected to the control circuit 322 of the semiconductor layer 32. Each of the plurality of electrodes 35 is connected to either the fourth main surface 114 of the plurality of fourth main portions 104 or the fifth main surface 115 of the plurality of fifth main portions 105. Like the first electrode 33, the electrode 35 is connected to the fourth main surface 114 (fifth main surface 115) via a conductive bonding layer (not shown) such as solder. This allows the plurality of electrodes 104 and the plurality of fifth main portions 105 to be electrically connected to the control circuit 322. The constituent material of the plurality of first electrodes 33, the plurality of electrodes 34, and the plurality of electrodes 35 includes, for example, copper.

[0051] As shown in FIG. 11 , the first conductive portion 6 is interposed between the extending portion 221 of the second terminal portion 22 and the element first surface 320 of the semiconductor element 3. The first conductive portion 6 is connected to both the extending portion 221 (second terminal portion 22) and the element first surface 320. As shown in FIG. 13 , the first conductive portion 6 is connected to the upper surface (the surface facing one side in the thickness direction z) of the extending portion 221 via a conductive bonding layer 61 such as solder. In this embodiment, as shown in FIGS. 3 and 11 , two first conductive portions 6 are provided interposed between each of the two second terminal portions 22 and the element first surface 320 of the semiconductor layer 32. Each of the two first conductive portions 6 overlaps with a plurality of first electrodes 33 when viewed in the first direction x.

[0052] Each of the two first conductive portions 6 is not electrically connected to any of the switching circuit 321, the control circuit 322, and the wiring layer in the semiconductor layer 32. Therefore, the two first conductive portions 6 are insulated from the switching circuit 321 and the control circuit 322 (circuit portions). On the other hand, each of the two first conductive portions 6 is electrically connected to the first wiring 325 in the semiconductor layer 32.

[0053] 5 to 8, the sealing resin 4 has a resin main surface 41, a resin back surface 42, two first resin side surfaces 431, 432, and two second resin side surfaces 433, 434. The constituent material of the sealing resin 4 is, for example, black epoxy resin.

[0054] As shown in Figures 9 to 12, the resin main surface 41 faces the same side as the main surface 11 (first main surface 111 to fifth main surface 115) in the thickness direction z. As shown in Figures 5 to 8, the resin back surface 42 faces the opposite side to the resin main surface 41. As shown in Figures 4 and 9 to 12, the first back surface 121 of the first main portion 101, the second back surface 122 of each second main portion 102, the first mounting surface 211 of each first terminal portion 21, the second mounting surface 222 of each second terminal portion 22, the mounting surface 251 of the terminal portion 25, the mounting surface 261 of each terminal portion 26, the mounting surface 271 of each terminal portion 27, and the mounting surface 281 of each terminal portion 28 are exposed from the resin back surface 42 (sealing resin 4).

[0055] As shown in FIGS. 5 and 6 , the first resin side surface 431 is located at one end of the sealing resin 4 in the second direction y and faces one side in the second direction y. The first resin side surface 431 is connected to both the resin main surface 41 and the resin back surface 42. As shown in FIGS. 4 and 9 , in each of the multiple first terminals 21 arranged at one end of the semiconductor device A10 in the second direction y, the first side surface 212 is flush with the first resin side surface 431. As shown in FIGS. 3 and 4 , in each of the two second terminals 22 arranged at both ends of the semiconductor device A10 in the first direction x and one end of the semiconductor device A10 in the second direction y, the second side surface 223 is flush with the first resin side surface 431.

[0056] 5 and 6 , the first resin side surface 432 is located at the other end of the sealing resin 4 in the second direction y and faces the other side in the second direction y. The first resin side surface 432 is connected to both the resin main surface 41 and the resin back surface 42. As shown in FIGS. 4 and 9 , in each of the multiple terminal portions 27 arranged at the other end in the second direction y in the semiconductor device A10, the side surface 272 is flush with the first resin side surface 432.

[0057] As shown in FIGS. 7 and 8 , the second resin side surface 433 is located at one end of the sealing resin 4 in the first direction x and faces one side in the first direction x. The second resin side surface 433 is connected to both the resin main surface 41 and the resin back surface 42. As shown in FIGS. 4 , 10 , and 12 , in each of the terminals 25, 26, and multiple terminals 28 arranged at one end of the semiconductor device A10 in the first direction x, the side surface 252, the side surface 262, and the side surface 282 are flush with the second resin side surface 433. As shown in FIGS. 3 and 4 , in each of the second terminals 22 arranged at one end of the semiconductor device A10 in the first direction x and one end of the semiconductor device A10 in the second direction y, the third side surface 224 is flush with the second resin side surface 433.

[0058] As shown in FIGS. 7 and 8 , the second resin side surface 434 is located at the other end of the sealing resin 4 in the first direction x and faces the other side in the first direction x. The second resin side surface 434 is connected to both the resin main surface 41 and the resin back surface 42. As shown in FIGS. 4 and 12 , in the terminal portion 26 and each of the multiple terminal portions 28 arranged at the other end in the first direction x of the semiconductor device A10, the side surface 262 and the side surface 282 are flush with the second resin side surface 434. As shown in FIGS. 3 and 4 , in the second terminal portion 22 arranged at the other end in the first direction x and one end in the second direction y of the semiconductor device A10, the third side surface 224 is flush with the second resin side surface 434.

[0059] Next, the effects of this embodiment will be described.

[0060] In the semiconductor device A10, the lead 1 includes a plurality of first terminals 21 and a plurality of second terminals 22. The plurality of first terminals 21 are arranged along the first direction x, and the second terminals 22 are disposed closer to the end of the sealing resin 4 in the first direction x than the plurality of first terminals 21. The semiconductor element 3 has an element first surface 320 facing the main surface 11 of the lead 1 and a plurality of first electrodes 33 provided on the element first surface 320. The plurality of first electrodes 33 are connected to the third main surface 113 (main surface 11), and each of the plurality of first terminals 21 is electrically connected to a switching circuit 321 (circuit unit) of the semiconductor element 3 via at least one of the plurality of first electrodes 33. The semiconductor device A10 further includes a first conductive portion 6 interposed between the second terminal 22 and the element first surface 320, and the first conductive portion 6 is connected to both the second terminal 22 and the element first surface 320. The first conductive portion 6 is insulated from the switching circuit 321 and the control circuit 322 (circuit portion).

[0061] With this configuration, the first conductive portion 6, which is not electrically connected to the circuit portion that performs the function of the semiconductor element 3, is located closer to the corner of the package formed by the sealing resin 4 than the plurality of first electrodes 33. Therefore, the joint between the first conductive portion 6 and the second terminal 22 experiences greater internal stress than the joint between the plurality of first electrodes 33 and the third main portion 103 (third main surface 113). The first conductive portion 6 is not connected to and insulated from the switching circuit 321 (circuit portion) that performs the function of the semiconductor element 3, and does not provide an electrical conduction path for the semiconductor element 3. Therefore, by providing the first conductive portion 6 close to the corner of the sealing resin 4, the internal stress at the joint between the plurality of first electrodes 33 that are electrically connected to the switching circuit 321 (circuit portion) is reduced. As a result, the joint reliability of the semiconductor element 3 mounted by flip-chip mounting can be improved.

[0062] In the semiconductor device A10, two second terminals 22 are arranged on one side and the other side of the multiple first terminals 21 in the first direction x. Two first conductive portions 6 are also provided between each of the two second terminals 22 and the first element surface 320 of the semiconductor layer 32. This configuration can reduce internal stress at the joints of the multiple first electrodes 33 located at both ends in the arrangement direction (first direction x). This is preferable for improving the joint reliability of the semiconductor element 3.

[0063] The multiple first electrodes 33 are arranged along the first direction x. Each first conductive part 6 overlaps with multiple first electrodes 33 when viewed in the first direction x. With this configuration, internal stress at the joints between the multiple first electrodes 33 can be efficiently reduced.

[0064] As shown in FIG. 14 , when a flip-chip-mounted semiconductor element 3 is mounted at a slight angle in the first direction x relative to the leads 1, a significant change in the bonding state of the bonding layer 61 occurs in the two first conductive portions 6 arranged at both ends of the multiple first electrodes 33 in the first direction x. In this embodiment, the semiconductor layer 32 (semiconductor element 3) has a first wiring 325 that is conductive to both of the two first conductive portions 6. With this configuration, by electrically measuring the paths of the two first conductive portions 6 and the first wiring 325 using two second terminals 22 to which the two first conductive portions 6 are connected, a change in the bonding state of the bonding portion (bonding layer 61) of the first conductive portion 6 can be detected as a fluctuation in resistance value. This makes it possible to confirm the bonding state of the bonding portion of the two first conductive portions 6 and the bonding portion of the multiple first electrodes 33 arranged between these first conductive portions 6 in the first direction x. This leads to improved bonding reliability of a semiconductor device A10 including a flip-chip-mounted semiconductor element 3.

[0065] Modification of the First Embodiment: Figures 15 and 16 show a semiconductor device A11 according to a modification of the first embodiment. Figure 15 is a plan view showing the semiconductor device A11. Figure 16 is a cross-sectional view taken along line XVI-XVI in Figure 15. In Figures 15 and subsequent figures, elements that are the same as or similar to those in the semiconductor device A10 of the above embodiment are given the same reference numerals as in the above embodiment, and descriptions thereof will be omitted where appropriate. For ease of understanding, Figure 15 shows the semiconductor element 3 and the sealing resin 4 in a perspective view. In this figure, the semiconductor element 3 and the sealing resin 4 are shown in a perspective view with imaginary lines (two-dot chain lines).

[0066] In the semiconductor device A11 of this modification, second terminal portions 23 are provided instead of the second terminal portions 22 of the above embodiment, and various modifications are made accordingly. In this modification, two second terminal portions 23 are arranged close to each other on one side in the first direction x of the plurality of first terminal portions 21. In addition to the above, two second terminal portions 23 are also arranged close to each other on the other side in the first direction x of the plurality of first terminal portions 21.

[0067] As shown in FIGS. 15 and 16 , the second terminal 23 has an extending portion 231, a third mounting surface 232, and a fourth side surface 233. The extending portion 231 extends inward into the sealing resin 4 beyond the ends of the sealing resin 4 in the first direction x and the second direction y. The extending portion 231 (second terminal 23) is connected to the first conductive portion 6. The third mounting surface 232 faces the other side in the thickness direction z. The fourth side surface 233 faces either the first direction x or the second direction y. Of the two second terminals 23 arranged on one side in the first direction x with respect to the multiple first terminals 21, the fourth side surface 233 of one second terminal 23 faces one side in the first direction x, and the fourth side surface 233 of the other second terminal 23 faces one side in the second direction y. Of the two second terminals 23 arranged on the other side in the first direction x of the multiple first terminals 21, the fourth side surface 233 of one second terminal 23 faces the other side in the first direction x, and the fourth side surface 233 of the other second terminal 23 faces one side in the second direction y. In this modification, the fourth side surface 233 is connected to and flush with the third mounting surface 232. The third mounting surface 232 and the fourth side surface 233 are exposed from the sealing resin 4.

[0068] 15 and 16 , two first conductive portions 6 are provided interposed between each of two second terminal portions 22 arranged on one side in the first direction x with respect to the plurality of first terminal portions 21 and the element first surface 320 of the semiconductor layer 32. In addition, two other first conductive portions 6 are provided interposed between each of two second terminal portions 22 arranged on the other side in the first direction x with respect to the plurality of first terminal portions 21 and the element first surface 320 of the semiconductor layer 32.

[0069] 15 , in the semiconductor device A11, the semiconductor element 3 has second wiring 326 provided in the semiconductor layer 32 instead of the first wiring 325 of the above embodiment. In FIG. 15 , the path of the second wiring 326 is simplified and represented by a dotted line. The second wiring 326 is not electrically connected to any of the switching circuit 321, the control circuit 322, or the above wiring layers. In this modification, the second wiring 326 is provided at two locations, one on one side and the other on the first direction x, corresponding to two second terminals 23 arranged on one side of the plurality of first terminals 21 in the first direction x and two second terminals 23 arranged on the other side of the plurality of first terminals 21 in the first direction x.

[0070] Each first conductive portion 6 is not electrically connected to any of the switching circuit 321, the control circuit 322, or the wiring layers in the semiconductor layer 32. Therefore, each first conductive portion 6 is insulated from the switching circuit 321 and the control circuit 322 (circuit portion). On the other hand, each of the two first conductive portions 6 arranged on one side of the plurality of first electrodes 33 in the first direction x is electrically connected to one of the second wirings 326 in the semiconductor layer 32. Each of the two first conductive portions 6 arranged on the other side of the plurality of first electrodes 33 in the first direction x is electrically connected to the other of the second wirings 326 in the semiconductor layer 32.

[0071] In the semiconductor device A11 of this modification, the first conductive portion 6, which is not electrically connected to the circuit portion that performs the function of the semiconductor element 3, is located closer to the corner of the package formed by the sealing resin 4 than the plurality of first electrodes 33. Therefore, the joint between the first conductive portion 6 and the second terminal 23 experiences greater internal stress than the joint between the plurality of first electrodes 33 and the third main portion 103 (third main surface 113). The first conductive portion 6 is not connected to and insulated from the switching circuit 321 (circuit portion) that performs the function of the semiconductor element 3, and does not provide an electrical conduction path for the semiconductor element 3. Therefore, by providing the first conductive portion 6 close to the corner of the sealing resin 4, the internal stress at the joint between the plurality of first electrodes 33 that are electrically connected to the switching circuit 321 (circuit portion) is reduced. As a result, the joint reliability of the semiconductor element 3 mounted by flip-chip mounting can be improved.

[0072] In the semiconductor device A11, two second terminals 23 are arranged close to each other on one side of the multiple first terminals 21 in the first direction x. Two first conductive portions 6 are provided between each of the two second terminals 23 and the first element surface 320 of the semiconductor layer 32. The semiconductor layer 32 (semiconductor element 3) has a second wiring 326 that is conductive to both of the two first conductive portions 6. With this configuration, by electrically measuring the paths of the two first conductive portions 6 and the second wiring 326 using the two second terminals 23 to which the two first conductive portions 6 are connected, changes in the bonding state of the bonding portions of the first conductive portions 6 can be detected as fluctuations in resistance value. This makes it possible to check the bonding state of the bonding portions of the two first conductive portions 6 located at corners on one side in the first direction x and one side in the second direction y in a package made of sealing resin 4. This leads to improved bonding reliability of the semiconductor device A11 having a flip-chip-mounted semiconductor element 3.

[0073] In this modification, two second terminals 23 are arranged adjacent to the first terminals 21 on the other side in the first direction x. Two additional first conductive portions 6 are provided between each of the two second terminals 23 and the first element surface 320 of the semiconductor layer 32. The semiconductor layer 32 (semiconductor element 3) has a second wiring 326 that is conductive to both of the two first conductive portions 6. With this configuration, by electrically measuring the paths of the two first conductive portions 6 and the second wiring 326 using the two second terminals 23 to which the two first conductive portions 6 are connected, changes in the bonding state of the bonding portions of the first conductive portions 6 can be detected as fluctuations in resistance value. This makes it possible to check the bonding state of the bonding portions of the two first conductive portions 6 located at corners on the other side in the first direction x and one side in the second direction y in a package made of sealing resin 4. Additionally, within the same configuration as the semiconductor device A10 of the above embodiment, the same effects as those of the above embodiment can be achieved.

[0074] Second Embodiment: Fig. 17 shows a semiconductor device A20 according to a second embodiment of the present disclosure. Fig. 17 is a plan view showing the semiconductor device A20. For ease of understanding, Fig. 17 shows the semiconductor element 3 and the sealing resin 4 in a transparent manner. In the figure, the transparent semiconductor element 3 and the sealing resin 4 are shown by imaginary lines (two-dot chain lines).

[0075] In the semiconductor device A20 of this embodiment, a third wiring 327 is provided instead of the first wiring 325 provided in the semiconductor layer 32 (semiconductor element 3) of the above embodiment. The path of the third wiring 327 is simplified and represented by a dotted line. The third wiring 327 is electrically connected to both the first conductive portion 6 and one of the multiple first electrodes 33. In this embodiment, the third wiring 327 is provided at two locations, one on one side and the other side in the first direction x, corresponding to each of the two second terminals 22 provided on one side and the other side in the first direction x with respect to the multiple first terminals 21. The third wiring 327 provided on one side in the first direction x is electrically connected to the first conductive portion 6 arranged on one side in the first direction x and to the first electrode 33 located at the end of one side in the first direction x among the multiple first electrodes 33. The third wiring 327 provided on the other side of the first direction x is conductive to the first conductive part 6 arranged on the other side of the first direction x and the first electrode 33 located at the other end of the first direction x among the multiple first electrodes 33.

[0076] In the semiconductor device A20 of this embodiment, the first conductive portion 6 is located closer to the corners of the package formed by the sealing resin 4 than the multiple first electrodes 33. Therefore, the internal stress at the joint between the first conductive portion 6 and the second terminal portion 22 is greater than the internal stress at the joint between the multiple first electrodes 33 and the third main portion 103 (third main surface 113). Therefore, for the multiple first electrodes 33 that are electrically connected to the switching circuit 321 (circuit portion), the internal stress at the joint is reduced by providing the first conductive portion 6 close to the corners of the sealing resin 4. As a result, the joint reliability of the semiconductor element 3 mounted by flip-chip mounting can be improved.

[0077] In the semiconductor device A20, two second terminals 22 are arranged on one side and the other side of the multiple first terminals 21 in the first direction x. Two first conductive parts 6 are also provided between each of the two second terminals 22 and the first element surface 320 of the semiconductor layer 32. This configuration can reduce internal stress in the bonding portions of the first electrodes 33 located at both ends in the arrangement direction (first direction x) among the multiple first electrodes 33. This is preferable in terms of improving the bonding reliability of the semiconductor element 3.

[0078] The multiple first electrodes 33 are arranged along the first direction x. Each first conductive part 6 overlaps with the multiple first electrodes 33 when viewed in the first direction x. With this configuration, the internal stress at the joints between the multiple first electrodes 33 can be efficiently reduced.

[0079] In the semiconductor device A20, the semiconductor layer 32 (semiconductor element 3) has a third wiring 327 that is electrically connected to both the first conductive portion 6 and one of the plurality of first electrodes 33. With this configuration, the second terminal 22 to which the first conductive portion 6 is connected and the first terminal 21 that is electrically connected to the first electrode 33 are used to electrically measure the path between the first conductive portion 6, the first electrode 33, and the third wiring 327, thereby detecting changes in the bonding state of the bonding portion of the first conductive portion 6 as a fluctuation in resistance value. This makes it possible to confirm the bonding state of each of the bonding portions of the two first conductive portions 6. This leads to improved bonding reliability in the semiconductor device A20 that has a flip-chip-mounted semiconductor element 3.

[0080] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0081] In the above embodiment, the first side surface 212 of the first terminal portion 21 is flush with the first resin side surface 431. However, this is not limiting. The first terminal portion 21 (first side surface 212) may have a shape that protrudes outward from the sealing resin 4. Alternatively, a portion of the tip of the first terminal portion 21 in the second direction y and a portion of the sealing resin 4 surrounding it may be removed, so that the first side surface 212 is positioned more inward in the sealing resin 4 than the first resin side surface 431 in the thickness direction z. The same modification as that for the first side surface 212 of the first terminal portion 21 can also be applied to the second side surface 223 and the third side surface 224 of the second terminal portion 22 of the first terminal portion 21. The second terminal portion 22 (second side surface 223 and third side surface 224) may have a shape that protrudes outward from the sealing resin 4. In addition, the second side surface 223 may be configured to be located further inward in the sealing resin 4 than the first resin side surface 431 when viewed in the thickness direction z, and the third side surface 224 may be configured to be located further inward in the sealing resin 4 than the second resin side surface 433 (434) when viewed in the thickness direction z.

[0082] In the above embodiment, a configuration has been described in which the second terminal portion 22 and the first conductive portion 6 connected thereto are arranged at the corners on one side of the sealing resin 4 in the second direction y and on both sides in the first direction x, but the second terminal portion 22 and the first conductive portion 6 may also be arranged at each of the four corners of the sealing resin 4.

[0083] The present disclosure includes embodiments described in the following supplementary notes: Supplementary Note 1. A semiconductor device comprising: a lead having a main surface facing one side in a thickness direction; a circuit portion; a semiconductor element having a first element surface facing the main surface in the thickness direction; and a plurality of first electrodes provided on the first element surface, the plurality of first electrodes being connected to the main surface; a sealing resin covering a portion of the lead and the semiconductor element; and a first conductive portion, wherein the lead includes a plurality of first terminal portions arranged in a first direction orthogonal to the thickness direction and a second terminal portion disposed at a position closer to an end of the sealing resin in the first direction than the plurality of first terminal portions, each of the plurality of first electrodes being electrically connected to the circuit portion, and each of the plurality of first terminal portions being electrically connected to the circuit portion via at least one of the plurality of first electrodes, the first conductive portion being interposed between the second terminal portion and the first element surface and being connected to both the second terminal portion and the first element surface, and the first conductive portion being insulated from the circuit portion. Supplementary Note 2. The semiconductor device according to Supplementary Note 1, wherein the lead includes two second terminal portions arranged on one side and the other side in the first direction with respect to the plurality of first terminal portions, and the semiconductor device includes two first conductive portions interposed between each of the two second terminal portions and the first surface of the element. Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein the semiconductor element has a first wiring that is conductive to both of the two first conductive portions. Supplementary Note 4. The semiconductor device according to any one of Supplements 1 to 3, wherein each of the plurality of first terminal portions has a first mounting surface facing the other side in the thickness direction and a first side surface facing a second direction orthogonal to both the thickness direction and the first direction, and the first mounting surface and the first side surface are exposed from the sealing resin. Supplementary Note 5. The semiconductor device described in Appendix 4, wherein the sealing resin has a first resin side surface located at an end in the second direction and facing the second direction, and the first side surface is flush with the first resin side surface or is located more inward of the sealing resin than the first resin side surface when viewed in the thickness direction.Appendix 6. The semiconductor device according to Appendix 5, wherein the second terminal portion has a second mounting surface facing the other side in the thickness direction, a second side surface facing the second direction, and a third side surface facing the first direction, and the second mounting surface, the second side surface, and the third side surface are exposed from the sealing resin. Appendix 7. The semiconductor device according to Appendix 6, wherein the sealing resin has a second resin side surface located at an end in the first direction and facing the first direction, the second side surface is flush with the first resin side surface or located more inward of the sealing resin than the first resin side surface when viewed in the thickness direction, and the third side surface is flush with the second resin side surface or located more inward of the sealing resin than the second resin side surface when viewed in the thickness direction. Appendix 8. The semiconductor device according to any one of Appendixes 1 to 7, wherein the multiple first electrodes are arranged along the first direction. Appendix 9. The semiconductor device according to Appendix 8, wherein the first conductive portion overlaps the multiple first electrodes when viewed in the first direction. Appendix 10. The semiconductor device according to Appendix 1, wherein the lead includes two second terminal portions arranged adjacent to one side of the plurality of first terminal portions in the first direction, and the semiconductor element has two first conductive portions interposed between each of the two second terminal portions and the first surface of the element, and the semiconductor element has a second wiring conducting to both of the two first conductive portions. Appendix 11. The semiconductor device according to Appendix 10, wherein each of the plurality of first terminal portions has a first mounting surface facing the other side in the thickness direction and a first side surface facing a second direction orthogonal to both the thickness direction and the first direction, and the first mounting surface and the first side surface are exposed from the sealing resin. Appendix 12. The semiconductor device according to Appendix 11, wherein the sealing resin has a first resin side surface located at an end in the second direction and facing the second direction, and the first side surface is flush with the first resin side surface or located more inward of the sealing resin than the first resin side surface when viewed in the thickness direction. Appendix 13. the second terminal portion has a third mounting surface facing the other side in the thickness direction and a fourth side surface facing the first direction or the second direction, and the third mounting surface and the fourth side surface are exposed from the sealing resin.Appendix 14. The semiconductor device according to Appendix 13, wherein the sealing resin has a second resin side surface located at an end in the first direction and facing the first direction, and the fourth side surface is flush with the first resin side surface or the second resin side surface, or is located more inward of the sealing resin than the first resin side surface or the second resin side surface when viewed in the thickness direction. a semiconductor element having a circuit portion, a first element surface facing the main surface in the thickness direction, and a plurality of first electrodes provided on the first element surface, the plurality of first electrodes being connected to the main surface; and a sealing resin covering a portion of the lead and the semiconductor element, wherein the lead includes a plurality of first terminal portions arranged along a first direction perpendicular to the thickness direction, and a second terminal portion disposed at a position closer to an end of the sealing resin in the first direction than the plurality of first terminal portions, each of the plurality of first electrodes being electrically connected to the circuit portion, and each of the plurality of first terminal portions being electrically connected to the circuit portion via at least one of the plurality of first electrodes;

[0084] A10, A11, A20: semiconductor device 1: lead 10: main portion 101: first main portion 102: second main portion 103: third main portion 104: fourth main portion 105: fifth main portion 11: main surface 111: first main surface 112: second main surface 113: third main surface 114: fourth main surface 115: fifth main surface 12: back surface 121: first back surface 122: second back surface 21: first terminal portion 211: first mounting surface 212: first side surface 22: second terminal portion 221: extension portion 222: second mounting surface 223: second side surface 224: third side surface 23: second terminal portion 231: extension portion 232: third mounting surface 233: fourth side surface 25, 26, 27, 28: Terminal portion 251, 261, 271, 281: Mounting surface 252, 262, 272, 282: Side surface 3: Semiconductor element 31: Semiconductor substrate 32: Semiconductor layer 320: First element surface 321: Switching circuit 322: Control circuit 325: First wiring 326: Second wiring 327: Third wiring 33: First electrode 331: Bonding layer 34, 35: Electrode 4: Sealing resin 41: Resin main surface 42: Resin back surface 431, 432: First resin side surface 433, 434: Second resin side surface 43, 444: Second resin intermediate surface 451, 452: First resin inner side surface 453, 454: Second resin inner side surface 6: First conductive portion 61: Bonding layer x: First direction y: second direction z: thickness direction

Claims

1. A semiconductor device comprising: a lead having a main surface facing one side in a thickness direction; a circuit section; a semiconductor element having a first element surface facing the main surface in the thickness direction; and a plurality of first electrodes provided on the first element surface, the plurality of first electrodes being connected to the main surface; a sealing resin covering a portion of the lead and the semiconductor element; and a first conductive section, wherein the lead includes a plurality of first terminal sections arranged in a first direction perpendicular to the thickness direction, and a second terminal section arranged in a position closer to an end of the sealing resin in the first direction than the plurality of first terminal sections, each of the plurality of first electrodes being conductive to the circuit section, and each of the plurality of first terminal sections being conductive to the circuit section via at least one of the plurality of first electrodes, the first conductive section being interposed between the second terminal section and the first element surface and being connected to both the second terminal section and the first element surface, and the first conductive section being insulated from the circuit section.

2. The semiconductor device according to claim 1, wherein the lead includes two second terminal portions arranged on one side and the other side of the plurality of first terminal portions in the first direction, and two first conductive portions are provided between each of the two second terminal portions and the first surface of the element.

3. The semiconductor device according to claim 2, wherein the semiconductor element has a first wiring that is electrically connected to both of the two first conductive portions.

4. A semiconductor device according to any one of claims 1 to 3, wherein each of the plurality of first terminal portions has a first mounting surface facing the other side in the thickness direction and a first side surface facing a second direction perpendicular to both the thickness direction and the first direction, and the first mounting surface and the first side surface are exposed from the sealing resin.

5. The semiconductor device according to claim 4, wherein the sealing resin has a first resin side surface located at an end in the second direction and facing the second direction, and the first side surface is flush with the first resin side surface or is located further inward of the sealing resin than the first resin side surface when viewed in the thickness direction.

6. The semiconductor device according to claim 5, wherein the second terminal portion has a second mounting surface facing the other side in the thickness direction, a second side surface facing the second direction, and a third side surface facing the first direction, and the second mounting surface, the second side surface, and the third side surface are exposed from the sealing resin.

7. The semiconductor device described in claim 6, wherein the sealing resin has a second resin side surface located at an end in the first direction and facing the first direction, the second side surface being flush with the first resin side surface or located further inward of the sealing resin than the first resin side surface when viewed in the thickness direction, and the third side surface being flush with the second resin side surface or located further inward of the sealing resin than the second resin side surface when viewed in the thickness direction.

8. The semiconductor device according to claim 1, wherein the plurality of first electrodes are arranged in the first direction.

9. The semiconductor device according to claim 8, wherein the first conductive portion overlaps with the plurality of first electrodes when viewed in the first direction.

10. The semiconductor device described in claim 1, wherein the lead includes two second terminal portions arranged adjacent to one side of the plurality of first terminal portions in the first direction, and the lead has two first conductive portions interposed between each of the two second terminal portions and the first surface of the element, and the semiconductor element has second wiring that is conductive to both of the two first conductive portions.

11. The semiconductor device described in claim 10, wherein each of the plurality of first terminal portions has a first mounting surface facing the other side in the thickness direction and a first side surface facing a second direction perpendicular to both the thickness direction and the first direction, and the first mounting surface and the first side surface are exposed from the sealing resin.

12. The semiconductor device described in claim 11, wherein the sealing resin has a first resin side surface located at an end in the second direction and facing the second direction, and the first side surface is flush with the first resin side surface or is located further inward of the sealing resin than the first resin side surface when viewed in the thickness direction.

13. The semiconductor device described in claim 12, wherein the second terminal portion has a third mounting surface facing the other side in the thickness direction and a fourth side surface facing the first direction or the second direction, and the third mounting surface and the fourth side surface are exposed from the sealing resin.

14. The semiconductor device described in claim 13, wherein the sealing resin has a second resin side surface located at an end in the first direction and facing the first direction, and the fourth side surface is flush with the first resin side surface or the second resin side surface, or is located more inward of the sealing resin than the first resin side surface or the second resin side surface when viewed in the thickness direction.

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