High-frequency power supply device and control method therefor

Abstract

A high-frequency power supply device (10) is provided, wherein a class E inverter (30) converts direct current (DC) power into alternating current (AC) power by means of an on / off operation of a first switching element (SW1). A second switching element (SW2) switches regardless of whether DC power is supplied to the class E inverter or not. A rectifier element (D) allows current to flow from ground (GND) to the class E inverter (30) when the second switching element (SW2) is off.During an operating period, a control unit (40) causes the first switching element (SW1) to periodically perform an on / off operation and keeps the second switching element (SW2) in an ON state, during a stop period it keeps the first and the second switching element (SW1, SW2) in an OFF state, and during a transition period during the operating period, which is immediately before the stop period, it causes the first switching element (SW1) to periodically perform the on / off operation and keeps the second switching element (SW2) in the OFF state.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a high frequency power supply device and a control method thereof. STATE OF THE ART

[0002] The power transmission device of a wireless power transmission system is provided with an inverter circuit for generating a high-frequency alternating-current power (AC power) from a direct-current power supply (DC power supply).

[0003] PTL 1 (Japanese Patent No. 5670869) discloses a Class E inverter in which the above inverter circuit is configured from a Class E amplifier. Since the Class E inverter can reduce a loss that occurs during resonant switching in the circuit, increased efficiency and size reduction of the entire wireless power transmission system are expected.

[0004] In the wireless power transmission system, the output power of the inverter circuit must be controlled depending on the load condition of a power transmission destination. A method using intermittent operation is known as a method for controlling the output power of an inverter circuit. Intermittent operation provides a period during which no power is output, thereby allowing the output power of the inverter circuit to be adjusted without changing the switching frequency and duty cycle of a switching element included in the inverter circuit. LIST OF CITIONSPATENT LITERATURE

[0005] PTL 1: Japanese Patent No. 5670869 SUMMARY OF THE INVENTION TECHNICAL PROBLEM

[0006] When the Class E inverter is combined with intermittent operation, the voltage applied between the main electrodes of the switching element included in the Class E inverter increases more than a withstand voltage at the time when the Class E inverter transitions from the operating period to the stop period. It should be noted that this problem is not limited to the power transmission device of the wireless power transmission system and is common to all high-frequency power supply devices that include the Class E inverter.

[0007] The present disclosure is intended to solve the above problem, and one of the objects of the present disclosure is to prevent the overvoltage between the main electrodes of the switching element included in a Class E inverter when the intermittent operation is performed in a high frequency power supply device including the Class E inverter. SOLUTION TO THE PROBLEM

[0008] A high-frequency power supply device according to an embodiment includes a Class E inverter, the Class E inverter having a first switching element and converting direct current (DC) power into alternating current power through an on / off operation of the first switching element. The high-frequency power supply device further includes a second switching element and a rectifier element. The second switching element switches regardless of whether DC power is supplied to the Class E inverter or not. The rectifier element allows a current to flow from a ground to the Class E inverter when the second switching element is off. The control unit controls the on / off operation of the first switching element and the second switching element.During the operation period of the Class E inverter, the control unit causes the first switching element to periodically perform the on / off operation and maintains the second switching element in the on state. The control unit maintains the first switching element and the second switching element in the off state when the Class E inverter is in a stop period. In a transition period during the operation period immediately before the stop period, the control unit causes the first switching element to periodically perform the on / off operation and maintains the second switching element in the off state. ADVANTAGEOUS EFFECTS OF THE INVENTION

[0009] According to the above embodiment, in order to perform intermittent operation in the high-frequency power supply device including the Class E inverter, in the transition period during the operation period immediately before the stop period, the first switching element is caused to periodically perform the on / off operation, and the second switching element is maintained in the off state. This can prevent an overvoltage between the main electrodes of the first switching element included in the Class E inverter. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a high-frequency power supply device according to Embodiment 1. Fig. Figure 2 is a block diagram of variation 1 of a Class E inverter of Fig. 1. Fig. Figure 3 is a block diagram of variation 2 of the Class E inverter of Fig. 1. Fig. Figure 4 is a block diagram of variation 3 of the Class E inverter of Fig. 1. Fig. 5A is a diagram illustrating a current waveform of a direct current (DC) when a switching element SW2 is turned on. Fig. 5B is a diagram illustrating a current waveform of the DC current immediately after the switching element SW2 is turned off. Fig. Figure 6 is an isolated view of a resonator unit 35 used in a Class E inverter 30 of Fig. 1 is included. Fig. Figure 7 is an isolated view of a resonator unit 36 ​​used in a Class E inverter 31 of Fig. 2 is included. Fig. 8 is a diagram schematically showing an example of an on / off control signal for a switching element SW1 and a detection signal of a current detector 41. Fig. 9 is a diagram schematically showing an on / off operation signal of the switching element SW2. Fig. 10 is a timing chart showing variations of the collector-emitter voltage Vce1 of the switching element SW1 without preceding time. Fig. 11 is a timing chart showing variations of the collector-emitter voltage Vce1 of the switching element SW1 with preceding time. Fig. 12 is a flowchart illustrating a control operation of a control unit in a high-frequency power supply device according to Embodiment 2. DESCRIPTION OF EMBODIMENTS

[0010] Each embodiment is described in detail below with reference to the accompanying drawings. Note that the same or corresponding components are given the same reference numerals and may not be described repeatedly. Embodiment 1. [Configuration of the high-frequency power supply device]

[0011] Fig. 1 is a block diagram of a high-frequency power supply device according to Embodiment 1. As shown in Fig. 1, a high-frequency power supply device 10 includes a direct current (DC) power supply 20, a current detector 41, a switching element SW2, a diode D, a Class E inverter 30, a voltage detector 42, and a control unit 40. The Class E inverter 30 includes an input inductor L1, a switching element SW1, a parallel capacitor C1, a resonance inductor L2, and a resonance capacitor C2. The Class E inverter 30 is also referred to as a Class E amplifier. Fig. 1, Coss indicates the output capacitance of the switching element SW1. The switching element SW1 is also called the first switching element, and the switching element SW2 is also called the second switching element.

[0012] The connection between the above components will first be briefly described below. The Class E inverter 30 is connected between an input node N1 and an output node N3. The switching element SW2 is connected between the DC power supply 20 and the input node N1. The diode D is connected in a reverse bias direction between the input node N1 and a ground GND. A load R is connected between the output node N3 and the ground GND. The load R can be, for example, an electric motor that consumes power or a battery for power storage. Alternatively, the high-frequency power supply device 10 can be connected to a wireless power transmission system that is like the load R.

[0013] Regarding the internal connection of the Class E inverter 30, the input inductor L1 is connected between the input node N1 and an intermediate node N2. The switching element SW1 and the shunt capacitor C1 are connected in parallel between the intermediate node N2 and ground GND. The resonant capacitor C2 and the resonant inductor L2 are connected in series between the intermediate node N2 and the output node N3 in the order listed.

[0014] In the Class E inverter 30, the switching element SW1 is switched synchronously with the resonant frequency of a resonant circuit configured with a capacitor and an inductor. This allows the switching element SW1 to be turned on while the voltage between the main electrodes of the switching element SW1 (corresponding to a collector-emitter voltage Vce1 of a bipolar transistor) is 0 V (zero-voltage switching: ZVS). As a result, the power loss that occurs at the time the switching element SW1 is turned on can be reduced.

[0015] The Class E Inverter 30 may be used in a manner other than that described in Fig. 1, which is described below with reference to the Fig. 2 to 4 are briefly described.

[0016] Fig. Figure 2 is a block diagram of variation 1 of the Class E inverter of Fig. 1. A Class E inverter 31 used in a high frequency power supply device 11 made of Fig. 2 is the same as the Class E inverter 30 of the high frequency power supply device 10 of Fig. 1, except that it further includes an output capacitor C3 connected in parallel with a load R. The other aspects of Fig. 2 are the same as in Fig. 1 and the same or corresponding components are therefore given the same reference numerals and will not be described repeatedly.

[0017] Fig. Figure 3 is a block diagram of variation 2 of the Class E inverter of Fig. 1. A Class E inverter 32 used in a high frequency power supply device 12 made of Fig. 3 is the same as the Class E inverter 30 of the high frequency power supply device 10 of Fig. 1, with the exception of the switching elements SW1a and SW1b, which have a push-pull structure.

[0018] How exactly in Fig. As shown in Figure 3, the Class E inverter 32 includes input inductors L1a and L1b, switching elements SW1a and SW1b, parallel capacitors C1a and C1b, resonant capacitors C2a and C2b, and resonant inductors L2a and L2b. The Class E inverter 32 is connected between an input node N1 and first and second output nodes N3a and N3b.

[0019] Regarding an internal connection of the Class E inverter 32, the input inductor L1a is connected between the input node N1 and a first intermediate node N2a. The input inductor L1b is connected between the input node N1 and a second intermediate node N2b. The switching elements SW1a and SW1b are connected in series between the intermediate nodes N2a and N2b. An emitter of the switching element SW1a and an emitter of the switching element SW1b are connected to a connection node N4. The connection node N4 is connected to a ground GND. The shunt capacitor C1a is connected in parallel to the switching element SW1a, and the shunt capacitor C1b is connected in parallel to the switching element SW1b. The resonant capacitor C2a and the resonant inductor L2a are connected in the listed order between the first intermediate node N2a and the first output node N3a.The resonant capacitor C2b and the resonant inductor L2b are connected in the order listed between the second intermediate node N2b and the second output node N3b. A load R is connected between the first output node N3a and the second output node N3b.

[0020] Fig. Figure 4 is a block diagram of variation 3 of the Class E inverter of Fig. 1. A Class E inverter 33 used in a high frequency power supply device 13 made of Fig. 4 is a variation of the Class E inverter 32 of the high frequency power supply device 12 of Fig. 3. Specifically, the Class E inverter 33 differs from Fig. 4 from the Class E inverter 32 Fig. 3 in that the Class E inverter 33 further includes output capacitors C3a and C3b. The output capacitor C3a is connected between the first output node N3a and ground GND. The output capacitor C3b is connected between the second output node N3b and ground GND.

[0021] As other variations, the Class E inverter may be a circuit including a Class E amplifier circuit having an improved basic circuit structure.

[0022] With further reference to Fig. 1, the DC power supply 20 is a circuit that outputs DC power. The DC power supply 20 may, for example, include a circuit such as a DC-DC converter or may be a circuit that rectifies alternating current (AC) power from a power system and outputs DC power.

[0023] Input inductor L1 acts as an input filter to allow only DC current to pass through. This allows input inductor L1 to suppress the ripple current generated by the on / off operation of switching element SW1.

[0024] While Fig. While Figure 1 shows NPN bipolar transistors as the switching elements SW1 and SW2, the present disclosure is not limited thereto. For example, the switching elements SW1 and SW2 may be metal oxide semiconductor field-effect transistors (MOSFETs) or insulated gate bipolar transistors (IGBTs).

[0025] The switching elements SW1 and SW2 switch between on and off based on a control signal supplied from the control unit 40. The switching element SW2 switches between on and off in synchronization with an intermittent operation of the Class E inverter 30, as described below. The switching element SW1 repeats the on / off operation according to a control signal having a certain duty cycle, which is, for example, 50% at a fundamental frequency f0. The Q value is represented by Q = ω * L2 / R, where L2 is the inductance of the resonant inductor L2, R is the resistance of the load R, and ω = 2π * f0. The inductance L2 and the resistance R are designed to have a sufficiently large Q value at the fundamental frequency f0 of the Class E inverter 30.

[0026] The function of diode D depends on whether the switching element SW2 is on or off. Fig. Figure 5A is a diagram illustrating a waveform of the DC current when the switching element SW2 is turned on. As shown in Fig. As shown in Figure 5A, the diode D prevents the current from flowing from the collector of the switching element SW2 to the ground when the switching element SW2 is turned on.

[0027] In contrast, Fig. 5B is a diagram illustrating a DC current waveform immediately after the switching element SW2 turns off. The current flowing through the input inductor L1 is caused to flow through the switching element SW2 from the ground GND via the diode D.

[0028] With further reference to Fig. 1, a switching element SW3 configured, for example, from a MOSFET, a bipolar transistor, or an IGBT (referred to as a synchronous rectification element) may be used instead of the diode D. When the switching element SW3 is used, an on / off timing of the switching element SW3 and an on / off timing of the switching element SW2 are reversed. In the present disclosure, the synchronous rectification switching element SW3 and the diode D are collectively referred to as a rectification element.

[0029] Next, a design method for each component of a resonator unit used in the Class E inverter 30 of Fig. 1 is described in more detail.

[0030] Fig. Figure 6 is an isolated view of a resonator unit 35 used in the Class E inverter 30 of Fig. 1 is included. In Fig. 6 Coss is the output capacitance of the switching element SW1, C1 is the capacitance of the parallel capacitor C1, C2 is the capacitance of the resonance capacitor C2 and L2 is the inductance of the resonance inductor L2.

[0031] In Fig. 6, a resonant frequency f1 of the resonator unit 35 is determined. Specifically, the parallel combined capacitance of the output capacitance Coss and the parallel capacitor C1 is C1 + Coss. The series combined capacitance of the parallel combined capacitance and the resonant capacitor C2 is 1 / [1 / (C1 + Coss) + 1 / C2]. f1 is defined as the resonant frequency of the series combined capacitance and the resonant inductor L2. In this case, the capacitance of the parallel capacitor C1, the capacitance of the resonant capacitor C2, and the inductance of the resonant inductor L2 are designed so that the resonant frequency f1 satisfies f1 ≥ f0 relative to the fundamental frequency f0.

[0032] In addition, the capacitance of the resonant capacitor C2 and the inductance of the resonant inductor L2 are designed to achieve a resonant frequency f2 relative to the fundamental frequency f0, where f2 ≤ f0, where f2 is the resonant frequency between the resonant capacitor C2 and the resonant inductor L2. In this case, the Q value (= ω* L2 / R) is sufficiently large, as described above.

[0033] Fig. Figure 7 is an isolated view of a resonator unit 36 ​​used in the Class E inverter 31 of Fig. 2. A capacitor C3 and the load R from the output Fig. 2 is equivalently converted into a series circuit consisting of an output capacitor C3' and a resistance R' of the load in Fig. 7. The resistance R' of the load and the capacitance C3' of the output capacitor C3 after impedance conversion are given as follows: R'=R / (1+(ω∗C3∗R)2) C3'=R2 / (1+(ω∗C3∗R)2) where ω=2π∗f0.

[0034] Similar to the case of Fig. 6, f1 is a resonance frequency of the resonator unit 36, and f2 is a resonance frequency of the resonance capacitor C2, the resonance inductor L2, and the output capacitor C3'. The respective capacitances of the parallel capacitor C1, the resonance capacitor C2, and the output capacitor C3, and the inductance of the resonance inductor L2 are designed so that f0 ≤ f1 and f0 ≥ f2 are satisfied, and the Q value (= ω* L2 / R') is sufficiently large.

[0035] By fulfilling the requirements set out above with reference to the Fig. 6 and Fig. The design conditions described in Figure 7 allow the voltage between the main electrodes of the switching element SW1 (the collector-emitter voltage Vce1 when the switching element SW1 is a bipolar transistor) to be 0 V before the switching element SW1 turns on. In addition, the switching element SW1 turns on before the collector-emitter voltage Vce1 rises from 0 V (ZVS). This can reduce the power loss that occurs at the time the switching element SW1 turns on.

[0036] With further reference to Fig. 1, the current detector 41 detects an input current Iin supplied from the DC power supply 20 to the switching element SW2. The current detector 41 inputs a detection signal representing the value of the detected input current Iin to the control unit 40. For example, the current detector 41 may be a sensor for detecting DC current, such as a Hall element or a Rogowski coil. Alternatively, the current detector 41 may be configured as a detector for detecting the voltage across a shunt resistor using a shunt resistor inserted into a DC line.

[0037] The voltage detector 42 detects a voltage of the intermediate node N2, that is, the voltage between the main electrodes of the switching element SW1 (the collector-emitter voltage Vce1 when the switching element SW1 is a bipolar transistor). The voltage detector 42 inputs a detection signal representing the value of the detected voltage to the control unit 40.

[0038] The control unit 40 may be configured based on a computer including a central processing unit (CPU) running programs; and a memory configured by a field-programmable gate array (FPGA) or configured by a dedicated circuit. Alternatively, the control unit 40 may be configured from a combination of these, and its hardware configuration is not specifically limited. [Control operation of the control unit]

[0039] Next, a control operation of the control unit 40 will be described. The control unit 40 receives the signal representing the value of the input current Iin detected by the current detector 41. The control unit 40 further outputs a control signal for controlling the on / off of each of the switching elements SW1 and SW2.

[0040] Fig. 8 is a diagram schematically showing an example of the on / off control signal for the switching element SW1 and a detection signal of the current detector 41.

[0041] With reference to Fig. 8, the control unit 40 outputs the on / off signal having the fundamental frequency f0 to the switching element SW1. For example, the control unit 40 further performs control to repeat a period in which the switching element SW1 is caused to perform the on / off operation at a frequency fx (corresponding to a period Tx) less than or equal to one-tenth of the fundamental frequency f0, and a period in which the on / off operation of the switching element SW1 is stopped. In the present disclosure, this switching operation at the frequency fx is referred to as an intermittent operation.

[0042] In the Fig. In the example shown in Figure 8, from time t1 to time t3 is the on / off operation period of the switching element SW1, and from time t3 to time t4 is the period during which the on / off operation is stopped. The period from time t1 to time t4 corresponds to the intermittent operation period Tx.

[0043] The control unit 40 also acquires and accumulates current detection values ​​from the current detector 41 at regular intervals. The control unit 40 accumulates the current detection values ​​for a number of times and divides the accumulated values ​​by the number of accumulation times to obtain an average input current. The control unit 40 further changes the duty cycle d of the intermittent operation so that the average current value is closer to a target current value.

[0044] Here, the duty cycle d is a ratio of the period in which the switching element SW1 performs the on / off operation at the frequency f0 to the total period Tx of the intermittent operation. As in Fig. As shown in Figure 8, the on / off operation period (also simply referred to as the "operation period") is represented by a product (d × Tx) of the duty cycle d and the intermittent operation period Tx. The average current is represented by I × d, where I is the value of the input current value during the on / off operation period of the switching element SW1.

[0045] Fig. Figure 9 is a diagram schematically showing an on / off operation signal for the switching element SW2. In Fig. 9, the solid line indicates the on / off operation signal for the switching element SW1 and the dashed line indicates the on / off operation signal for the switching element SW2.

[0046] With reference to Fig. 9, the control unit 40 outputs to the switching element SW2 an on / off signal having the frequency fx (the period Tx) in synchronization with the intermittent operation of the switching element SW1. Here, the time at which the switching element SW2 turns on coincides with the time at which the on / off operation period of the switching element SW1 begins. In contrast, the time at which the switching element SW2 turns off is earlier by a time toff (hereinafter referred to as “previous time toff”) than the time at which the on / off operation of the switching element SW1 stops. The following describes the effects of the previous time toff with reference to Fig. 10 and Fig. 11. Note that a period corresponding to the preceding time toff is referred to as a transition period in the following description. The transition period is part of the on / off operation period of the switching element SW1 in which the switching element SW2 is controlled to the off state and which immediately precedes the stop period of the on / off operation of the switching element SW1.

[0047] Fig. 10 is a timing chart showing variations of the collector-emitter voltage Vce1 of the switching element SW1 without preceding time. Fig. Figure 10 shows, from top to bottom, the on / off signal for the switching element SW1 (solid line), the on / off signal for the switching element SW2 (dashed line), the collector-emitter voltage Vce1 of the switching element SW1, and the input current Iin.

[0048] As in Fig. As shown in Figure 10, since the preceding time toff is 0, the switching element SW2 transitions from on to off at time t3, when the on / off operation period of the switching element SW1 (also simply referred to as the "operation period") changes to an on / off operation stop period (also simply referred to as the "stop period"). In this case, the collector-emitter voltage Vce1 increases at a time (immediately after time t3) when the on / off operation period of the switching element SW1 changes to the on / off operation stop period, causing the collector-emitter voltage Vce1 to ultimately exceed an upper limit Vth, which is a predetermined allowable limit. As a result, a voltage greater than or equal to an element breakdown voltage can be applied to the switching element SW1. Fig. 10, the input current Iin has the same waveform as the case Fig. 8 and is therefore not described repeatedly.

[0049] Fig. 11 is a timing chart showing variations of the collector-emitter voltage Vce1 of the switching element SW1 with preceding time. Fig. Figure 10 shows, from top to bottom, the on / off signal (the solid line) for the switching element SW1, the on / off signal (the dashed line) for the switching element SW2, the collector-emitter voltage Vce1 of the switching element SW1, and the input current Iin.

[0050] As in Fig. As shown in Figure 11, the switching element SW2 turns off at a time t2 which is earlier by the preceding time toff than the time t3 at which the on / off operation period of the switching element SW1 changes to the on / off operation stop period. This allows the peak value of the collector-emitter voltage Vce1 to be lowered compared to Fig. 10, in which the previous time toff = 0, is reduced below the upper limit value Vth.

[0051] In Fig. 11, the average value of the input current Iin is given by I × (d × Tx - toff) / Tx. When the previous time toff = 0, the average current value is I × d, as in Fig. 10 shown.

[0052] The value of the preceding time toff is determined, for example, through circuit analysis, so that the peak value of the collector-emitter voltage Vce1 does not exceed the predetermined upper limit Vth at the time when the on / off operation period of the switching element SW1 transitions to the on / off operation stop period. The upper limit Vth is set, for example, to a voltage value that is 80% or less than the element breakdown voltage for the switching element.

[0053] The following method can be used as another method for determining the previous time toff. Initially, the control unit 40 sets the initial value of the previous time toff to a value from zero to d × Tx. Next, the control unit 40 drives the high-frequency power supply device 10 and detects the value of the collector-emitter voltage Vce1 through the voltage detector 42. After the switching element SW2 switches from on to off, if the peak value of the collector-emitter voltage Vce1 exceeds the predetermined upper limit Vth, the control unit 40 increases the value of the previous time toff by one clock period. After the switching element SW2 switches from on to off, if the peak value of the collector-emitter voltage Vce1 does not exceed the upper limit Vth, the control unit 40 decreases the value of the previous time toff by one clock period.However, if the previous time toff is zero or less, the previous time toff is set to zero.

[0054] As the control related to changing the duty ratio d for the intermittent operation and the control related to changing the previous time toff, the control for fixing the previous time toff and changing the duty ratio d for the intermittent operation may be performed first, and then the control for fixing the duty ratio d and changing the previous time toff may be performed, or vice versa, or a control for simultaneously changing the duty ratio d and the previous time toff may be performed. The same design method described above can be used to change the duty ratio d and the previous time toff in the Class E inverters 32 and 33 having the push-pull structure described with reference to Fig. 3 and Fig. 4. [Advantages and Effects of Embodiment 1]

[0055] As described above, according to the high-frequency power supply devices 10 to 13 of Embodiment 1, the switching element SW2 is switched from the ON state to the OFF state by the preceding time toff earlier than the time at which the on / off operation period of the switching element SW1 changes to the on / off operation stop period. This can prevent the collector-emitter voltage Vce1 from rising at the time at which the on / off operation period of the switching element SW1 changes to the on / off operation stop period, thereby preventing an overvoltage equal to or greater than the element breakdown voltage from being applied to the switching element SW1.

[0056] In addition, the control is performed in which the preceding time toff is increased when the peak value of the collector-emitter voltage Vce1 of the switching element SW1 exceeds the upper limit Vth, and the preceding time toff is reduced when the peak value of the collector-emitter voltage Vce1 does not exceed the upper limit Vth, thereby eliminating the need to previously determine an appropriate preceding time toff through circuit analysis or the like. Accordingly, the overvoltage can be prevented from being applied to the switching element SW1 when the operations of the high-frequency power supply devices 10 to 13 change due to, for example, load fluctuations or element failure. Embodiment 2.

[0057] In Embodiment 2, the above-described preceding time toff is not set in advance. Instead, a control unit 40 performs control in which, upon detecting that a collector-emitter voltage Vce1 exceeds a predetermined upper limit Vth, a switching element SW1 continues an on / off operation and only a switching element SW2 is turned off (ie, enters a transition period). Hereinafter, such control is referred to as a protection mode. The protection mode prevents an overvoltage greater than or equal to an element breakdown voltage from being applied to the switching element SW1.

[0058] A high-frequency power supply device according to Embodiment 2 has the same basic configuration as the high-frequency power supply devices 10 to 13 described in Embodiment 1. Similar to Embodiment 1, the control unit 40 performs control to change a duty ratio d of an intermittent operation so that an average input current Iin is closer to a target current value. [Control operation of the control unit]

[0059] Fig. 12 is a flowchart illustrating a control operation of the control unit in the high-frequency power supply device according to Embodiment 2.

[0060] The control unit 40 performs the control as shown in Fig.12, per period of a clock signal. The voltage detector 42 detects the collector-emitter voltage Vce1 of the switching element SW1, and the control unit 40 acquires detection values ​​of the collector-emitter voltage Vce1 from the voltage detector 42 at regular intervals. The control unit 40 adds the acquired voltage detection values ​​and divides a resulting value by the number of additions to obtain an average value of the collector-emitter voltage Vce1.

[0061] It is assumed that time t is 0 and the protection mode is off in the initial state (step ST10). The control unit 40 adds 1 to time t per clock period (NO in step ST90). When time t reaches an intermittent operation period Tx (YES in step ST90), the control unit 40 initializes time t to zero and, if the protection mode is on, turns the protection mode off again.

[0062] If the protection mode is off (NO in step ST20), the control unit 40 proceeds to step S30. If the protection mode is on (YES in step ST20), the control unit 40 proceeds to step ST70.

[0063] In step ST30, the control unit 40 determines whether the peak value of the collector-emitter voltage Vce1 of the switching element SW1 is greater than the upper limit Vth. If the peak value of the collector-emitter voltage Vce1 of the switching element SW1 is greater than the upper limit Vth (YES in step ST30), the control unit 40 turns on the protection mode and proceeds to step ST70 (i.e., proceeds to the transition period).

[0064] When the protection mode is enabled, the control unit 40 determines in step ST70 whether the average value of the collector-emitter voltage Vce1 of the switching element SW1 is less than a reference value near 0 V. The reference value is set, for example, to one-tenth of the upper limit Vth. If the average value of the collector-emitter voltage Vce1 of the switching element SW1 is greater than or equal to the reference value (NO in step ST70), the control unit 40 maintains the on / off operation of the switching element SW1 at the fundamental frequency f0 and controls the switching element SW2 to be off (step ST80). In other words, the transition period continues.Conversely, when the average value of the collector-emitter voltage Vce1 of the switching element SW1 is less than the reference value (YES in step ST70), the control unit 40 stops the on / off operation of the switching element SW1 and keeps the switching element SW1 in the OFF state and keeps the switching element SW2 off (step ST60). In other words, the transition period changes to the stop period. This turns off the protection mode. However, the control unit 40 can control to continue the on / off operation of the switching element SW1 and maintain the protection mode (i.e., the transition period) regardless of the average value of the collector-emitter voltage Vce1 of the switching element SW1.

[0065] When the protection mode is off (NO in step ST20) and the peak value of the collector-emitter voltage Vce1 of the switching element SW1 is less than the upper limit Vth (NO in step ST30), the control unit 40 performs the same control as that when the previous time toff is zero in Embodiment 1. Specifically, when the time t is less than d × Tx (NO in step ST40), that is, during the on / off operation period of the switching element SW1, the control unit 40 repeatedly turns the switching element SW1 on / off at the fundamental frequency f0 and controls the switching element SW2 to be in the ON state (step ST50). In contrast, when the time t is greater than or equal to d × Tx and less than Tx (YES in step ST40), that is, during the stop period of the on / off operation of the switching element SW1, the control unit 40 controls both switching elements SW1 and SW2 to be kept in the OFF state (step ST60). [Advantages and Effects of Embodiment 2]

[0066] As described above, according to the high-frequency power supply device of Embodiment 2, when the voltage (the collector-emitter voltage Vce1) between the main electrodes of the switching element SW1 exceeds the predetermined upper limit Vth, control is performed to cause the switching element SW1 to continue the on / off operation and only the switching element SW2 to be turned off. This can prevent an overvoltage greater than or equal to the element breakdown voltage from being applied to the switching element SW1.

[0067] In the above control, control is performed to cause the switching element SW1 to continue the on / off operation and only the switching element SW2 to be brought into the off state during a period in which the on / off operation of the switching element SW1 is initially stopped by the intermittent operation. Then, as the average value of the collector-emitter voltage Vce1 of the switching element SW1 approaches the reference value near 0 V, the on / off operation of the switching element SW1 is stopped. This allows the switching element SW2 to be controlled to the off state earlier than the time at which the on / off operation period of the switching element SW1 changes to the on / off operation stop period, without the need to preset the preceding time toff according to Embodiment 1.As a result, the collector-emitter voltage Vce1 of the switching element SW1 can be prevented from rising at the time when the on / off operation period of the switching element SW1 changes to the on / off operation stop period. Thus, an overvoltage greater than or equal to the element breakdown voltage can be prevented from being applied to the switching element SW1.

[0068] To cause the switching element SW1 to perform the on / off operation, in addition to the power input from the main DC power supply 20, the power for a gate drive signal is required. In the present embodiment, the switching element SW2 is controlled to the OFF state, and the on / off operation of the switching element SW1 is stopped once the average value of the collector-emitter voltage Vce1 of the switching element SW1 approaches 0 V. Thus, the on / off operation period of the switching element SW1 can be reduced. As a result, the power of the gate drive signal required for the on / off operation of the switching element SW1 can be reduced.

[0069] The presently disclosed embodiments should be considered in all aspects as illustrative and not restrictive. The scope of the present application is defined by the content of the claims, not by the embodiments described above, and is intended to include any modifications that fall within the scope of the claims and the meaning equivalent to their content. LIST OF REFERENCE SYMBOLS

[0070] 10 to 13 High frequency power supply device; 20 DC power supply; 30 to 33 Class E inverter; 35, 36 Resonator unit; 40 Control unit; 41 Current detector; 42 Voltage detector; C1 Parallel capacitor; C2 Resonance capacitor; C3 Output capacitor; Coss Output capacitance of switching element SW1; D Diode; GND Ground; L1 Input inductor; L2 Resonance inductor; N1 Input node; N2 Intermediate node; N3 Output node; N4 Connection node; R Load; SW1, SW2 Switching element; Tx Intermittent control period, Vce1 Collector-emitter voltage; Vth Upper limit; d Duty cycle; f0 Fundamental frequency; f1, f2 Resonance frequency; and toff Previous time. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP 5670869 [0003, 0005]

Claims

[1] High frequency power supply device comprising: a Class E inverter having a first switching element for converting direct current (DC) power into alternating current (AC) power by an on / off operation of the first switching element; a second switching element for switching independently of whether the DC power is supplied to the Class E inverter or not; a rectifying element for allowing a current to flow from a ground to the Class E inverter when the second switching element is turned off; and a control unit for controlling the switching on / off of the first switching element and the second switching element, wherein in an operating period of the Class E inverter, the control unit causes the first switching element to perform the on / off operation periodically and keeps the second switching element in an ON state, in a stop period of the Class E inverter, the control unit keeps the first switching element and the second switching element in an OFF state, and in a transition period during the operation period immediately before the stop period, the control unit causes the first switching element to periodically perform the on / off operation and keeps the second switching element in the off state. [2] A high frequency power supply device according to claim 1, further comprising: a current detector for detecting a DC input current input to the Class E inverter via the second switching element, wherein the control unit controls a ratio between a length of the operating period and a length of the stopping period such that an average value of the detected input current is equal to a target value. [3] The high-frequency power supply device according to claim 1 or 2, wherein a length of the transition period is set such that a peak value of a voltage applied between main electrodes of the first switching element does not exceed a predetermined upper limit upon switching from the operation period to the stop period. [4] A high frequency power supply device according to claim 3, further comprising: a voltage detector for detecting the voltage applied between the main electrodes of the first switching element, wherein the control unit sets an initial value for the length of the transition period, if the peak value of the detected voltage exceeds the upper limit, the control unit increases the length of the transition period from a currently set value and if the peak value of the detected voltage does not exceed the upper limit, the control unit reduces the length of the transition period from the currently set value. [5] A high-frequency power supply device according to claim 1 or 2, further comprising: a voltage detector for detecting a voltage applied between main electrodes of the first switching element, wherein if a peak value of the detected voltage is greater than or equal to a predetermined upper limit, the control unit transitions to the transition period. [6] High frequency power supply device according to claim 5, wherein in the transition period, the control unit causes the first switching element to continue to perform the on / off operation periodically until an average value of the detected voltage is less than or equal to a reference value, and if the average value of the detected voltage is less than or equal to the reference value, the control unit goes to the stop period. [7] A control method of a high-frequency power supply device, the high-frequency power supply device including: a Class E inverter having a first switching element for converting direct current (DC) power into alternating current (AC) power by an on / off operation of the first switching element; a second switching element for switching independently of whether the DC power is supplied to the Class E inverter or not; and a rectifying element for allowing a current to flow from a ground to the Class E inverter when the second switching element is turned off; the control method comprising: in an operation period of the Class E inverter, causing the first switching element to perform the on / off operation periodically and maintaining the second switching element in an ON state; in a stop period of the Class E inverter, keeping the first switching element and the second switching element in an OFF state; and in a transition period, during the operation period immediately before the stop period, causing the first switching element to periodically perform the on / off operation, and maintaining the second switching element in the off state. [8] A control method of the high frequency power supply device according to claim 7, further comprising: Detecting a DC input current input to the Class E inverter via the second switching element; and Controlling a ratio between a length of the operation period and a length of the stop period such that an average value of the detected input current is equal to a target value. [9] The control method of the high-frequency power supply device according to claim 7 or 8, wherein a length of the transition period is set such that a peak value of a voltage applied between main electrodes of the first switching element does not exceed a predetermined upper limit upon switching from the operation period to the stop period. [10] A control method of the high-frequency power supply device according to claim 9, further comprising: Detecting the voltage applied between the main electrodes of the first switching element; Setting an initial value for the length of the transition period; Increasing the length of the transition period from a currently set value if the peak value of the detected voltage exceeds the upper limit; and Reduce the length of the transition period from the currently set value if the peak value of the detected voltage does not exceed the upper limit. [11] A control method of the high-frequency power supply device according to claim 7 or 8, further comprising: Detecting a voltage applied between main electrodes of the first switching element; and Transition to the transition period when a peak value of the detected voltage is greater than or equal to a predetermined upper limit. [12] The control method of the high frequency power supply device according to claim 11, further comprising: Causing, in the transition period, the first switching element to continue to perform the on / off operation periodically until an average value of the detected voltage is less than or equal to a reference value; and Go to the stop period when the average value of the detected voltage is less than or equal to the reference value.

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