Semiconductor device and method for manufacturing a semiconductor device

Abstract

A semiconductor device is provided that is capable of mitigating a problem caused by differences in the thickness of a heat sink at respective points on the heat sink in one direction in the plane.The semiconductor device comprises: a heat sink; an insulating substrate; a bonding material; and a semiconductor element, wherein the insulating substrate is bonded to an upper surface of the heat sink by the bonding material, the semiconductor element is bonded to an upper surface of the insulating substrate, the thickness of the heat sink varies in the direction in the plane depending on the location of the heat sink, supports are arranged on the upper surface of the heat sink in a region where the insulating substrate is bonded to the heat sink, and each of the supports is in contact with the insulating substrate, and the upper surface of the heat sink is not parallel to the upper surface of the insulating substrate in a region which overlaps in plan view with the region where the insulating substrate is bonded to the heat sink.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a semiconductor device and a method of manufacturing the semiconductor device. BACKGROUND TECHNOLOGY

[0002] Patent Document 1 proposes an apparatus including a mechanism for correcting an inclination of an object to be bonded in tape bonding of a semiconductor element that is not fixed horizontally. DOCUMENT ACCORDING TO THE PRIOR ART PATENT DOCUMENT

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2007-250571 SUMMARY PROBLEM TO BE SOLVED BY THE INVENTION

[0004] In conventional semiconductor devices each including an insulating substrate bonded to a heat sink, if the thickness of the heat sink varies depending on the position of the heat sink in an in-plane direction, the manufacturing process is difficult. For example, when the heat sink is fixed to a surface plate of an ultrasonic bonding device, the insulating substrate is tilted, reflecting differences in the thickness of the heat sink at respective positions of the heat sink in the in-plane direction. This causes uneven contact between the tilted insulating substrate and a terminal pressed vertically against the surface plate of the ultrasonic bonding device, and creates a problem in that the terminal cannot be pressed with uniform pressure.

[0005] The present disclosure has been conceived to solve the problem and aims to provide a semiconductor device including an insulating substrate bonded to a heat sink, which can mitigate a problem caused by differences in the thickness of the heat sink at respective locations of the heat sink in the in-plane direction. MEANS TO SOLVE THE PROBLEM

[0006] A semiconductor device according to the present disclosure comprises: a heat sink; an insulating substrate; a bonding material; and a semiconductor element, wherein the insulating substrate is bonded to an upper surface of the heat sink through the bonding material, the semiconductor element is bonded to an upper surface of the insulating substrate, a thickness of the heat sink varies depending on the location of the heat sink in an in-plane direction, a plurality of supporters are arranged on the upper surface of the heat sink in a region where the insulating substrate is bonded to the heat sink, each of the supports is in contact with the insulating substrate, and the upper surface of the heat sink is not parallel to the upper surface of the insulating substrate in a region that overlaps, in plan view, with the region where the insulating substrate is bonded to the heat sink. EFFECTS OF THE INVENTION

[0007] The present disclosure provides a semiconductor device having an insulating substrate bonded to a heat sink, and which can mitigate a problem caused by differences in the thickness of the heat sink at respective locations of the heat sink in the in-plane direction.

[0008] The objects, features, aspects, and advantages related to the technology disclosed in the DESCRIPTION will become more apparent from the following detailed description and the accompanying drawings. SHORT DESCRIPTION OF DRAWINGS Fig. 1 illustrates a semiconductor device according to an embodiment 1. Fig. 2 illustrates a state in the course of manufacturing the semiconductor device according to Embodiment 1. Fig. 3 is an enlarged view of a part of the semiconductor device in Fig. 1 according to embodiment 1. Fig. 4 is an enlarged view of a part of a semiconductor device according to Embodiment 2. Fig. 5 is an enlarged view of a part of a semiconductor device according to Embodiment 3. Fig. 6 is a flowchart illustrating a method for manufacturing the semiconductor device according to Embodiment 1. DESCRIPTION OF THE EMBODIMENTS [A. Embodiment 1] [A-1. Structure]

[0009] Fig. 1 illustrates a semiconductor device 10 according to an embodiment 1.

[0010] As in Fig. 1, the semiconductor device 10 includes a terminal 11, insulating substrates 21, a heat sink 31, a bonding material 35, semiconductor elements 41, a bonding material 42, a wire 43, and a plurality of carriers 50.

[0011] Each of the insulating substrates 21 includes an insulating layer 22 and conductor patterns or structures 23 and 24.

[0012] The conductor structure 23 is arranged on an upper surface of the insulating layer 22. The conductor structure 24 is arranged on a lower surface of the insulating layer 22.

[0013] A material of the insulating layer 22 is, for example, silicon nitride, aluminum nitride or aluminum oxide.

[0014] Each material of the conductor structures 23 and 24 is, for example, copper, aluminum, a copper alloy or an aluminum alloy.

[0015] The insulating substrate 21 is bonded to the heat sink 31 by the bonding material 35. A lower surface 241 of the conductor structure 24 is bonded to an upper surface 34 of the heat sink 31 by the bonding material 35. The bonding material 35 is, for example, solder or a sintered material.

[0016] Each of the semiconductor elements 41 is bonded to an upper surface of the conductor structure 23 by the bonding material 42. The bonding material 42 is, for example, solder or a sintered material.

[0017] Terminal 11 is bonded to conductor structure 23. Power is supplied to semiconductor element 41 from outside semiconductor device 10 via terminal 11.

[0018] The heat sink 31 has screw holes 32. The screw holes 32 are screw holes for fastening the heat sink 31 to, for example, fins or a surface plate.

[0019] A material of the heat sink 31 is, for example, copper, aluminum, a copper alloy, or an aluminum alloy. The material of the heat sink 31 can be a composite material. The composite material is, for example, AlSiC or MgSiC.

[0020] The thickness of the heat sink 31 varies depending on the location of the heat sink 31 in the in-plane direction.

[0021] The thickness of the heat sink 31 is, for example, in a range of 3 mm to 8 mm.

[0022] For example, in plan view, the center of the heat sink 31 is the thickest. The following is described assuming this case.

[0023] For example, the heat sink 31 becomes thinner from the center of the heat sink 31 in the circumferential direction at a rate of 0.1 mm to 0.5 mm per 100 mm.

[0024] The upper surface 34 of the heat sink 31 is, for example, a plane in a state where the heat sink 31 is not fixed to, for example, fins or a surface plate and a lower surface 33 of the heat sink 31 is not pressed against another member (hereinafter referred to as “unfixed state”).

[0025] In the unattached state, the lower surface 33 of the heat sink 31 is, for example, a downwardly projecting curved surface.

[0026] In the unattached state, a central portion of the heat sink 31 lies in the lower surface 33 of the heat sink 31 below a periphery of the heat sink 31.

[0027] For example, in the unattached state, in the lower surface 33 of the heat sink 31, the center of the heat sink 31 is at its lowest point in plan view.

[0028] In the unattached state, when viewed from the center of the heat sink 31 in the circumferential direction, the lower surface 33 of the heat sink 31 is offset upward at a rate of, for example, 0.1 mm to 0.5 mm per 100 mm. In other words, the lower surface 33 of the heat sink 31 has an inclination ranging approximately from 0.06° to 0.3°, for example.

[0029] The lower surface 33 of the heat sink 31 has a shape formed by partially extracting or adopting a spherical surface, for example.

[0030] For example, when the semiconductor device 10 is mounted on the cooling fins of an inverter, pressing the bottom surface 33, which is a downwardly projecting curved surface, against the cooling fins can distribute grease between the heat sink 31 and the cooling fins, making the grease, for example, as thin as approximately several tens of µm. The thermal conductivity of the grease is, for example, only approximately several W / mK. Thus, making the grease thin in this way improves heat dissipation.

[0031] Instead of the heat sink 31, it is conceivable to use a heat sink obtained by deforming a flat plate, that is, a plate with a constant thickness in an in-plane direction, to have a downwardly projecting curved bottom surface. However, the heat sink 31 can distribute grease more thinly with a higher pressure and increase heat dissipation more than the heat sink obtained by deforming the flat plate.

[0032] Each of the supports 50 is arranged in a region where the insulating substrate 21 is bonded to the upper surface 34 of the heat sink 31 through the bonding material 35. Each of the supports 50 in Embodiment 1 is a spacer 44. The spacer 44 is formed of, for example, an aluminum wire as a material.

[0033] Each of the supports 50 is in contact with the heat sink 31 and the insulating substrate 21. Thus, an inclination of the insulating substrate 21 with respect to the heat sink 31 is defined by a height of each of the supports 50.

[0034] Fig. 3 is an enlarged view of a part of the semiconductor device 10 in Fig. 1.

[0035] Assume that T1 denotes a thickness of the heat sink 31 at a position on the beam 50 located closest to the center of the heat sink 31 in plan view (hereinafter referred to as beam 50a), and D denotes a height of the beam 50a. A height of each of the remaining beams 50 is expressed by, for example, D + H, where a difference between the thickness T1 and a thickness T2 of the heat sink 31 at a position on the beam 50 is assumed to be H (H = T1 - T2). This makes the distances from the bottom surface 33 of the heat sink 31 at the respective positions of the beams 50 to the upper ends of the beams 50 equal to each other. When the lower surface 33 of the heat sink 31 is pressed against a mounting surface of a surface plate to deform the heat sink 31 and make the lower surface 33 flat, the mounting surface of the surface plate becomes parallel to an upper surface 231 of the insulating substrate 21.The upper surface 231 of the insulating substrate 21 is here the upper surface of the conductor structure 23.

[0036] For example, a height of each of the beams 50 except the beam 50a is higher than or equal to D + 0.9 × H and lower than or equal to D + 1.1 × H, where the difference between the thickness T1 and the thickness T2 of the heat sink 31 at a location of the beam 50 is assumed to be H (H = T1 - T2).

[0037] By increasing the height of a first support, which is the support 50 arranged at a position where the heat sink 31 is thinner, more than that of a second support, which is the support 50 arranged at a position where the heat sink 31 is thicker, the influence of the differences in the thickness of the heat sink 31 at the respective positions of the heat sink 31 in the in-plane direction is weakened.

[0038] Since the thickness of the heat sink 31 differs in the in-plane direction depending on the location of the heat sink 31, in the absence of the supports 50, the lower surface 33 of the heat sink 31 is not parallel to the upper surface 231 of the insulating substrate 21. Thus, in the absence of the supports 50 and when the heat sink 31 is attached to, for example, fins or a surface plate, that is, when the lower surface 33 of the heat sink 31 is pressed against a mounting surface of a table, which is a plane, the upper surface 231 of the insulating substrate 21 is not parallel to the mounting surface of the table.

[0039] Since the semiconductor device 10 according to Embodiment 1 includes the plurality of supports 50, the upper surface 34 of the heat sink 31 is not parallel to the upper surface 231 of the insulating substrate 21 in a region that overlaps, in plan view, with a region where the insulating substrate 21 is bonded to the heat sink 31. The plurality of supports 50 are arranged such that, in the region that overlaps, in plan view, with the region where the insulating substrate 21 is bonded to the heat sink 31, the lower surface 33 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are closer to parallelism than the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21.Thus, when the lower surface 33 of the heat sink 31 is pressed against a mounting surface of a table that is a plane, such as a mounting surface of a surface plate, the upper surface 231 of the insulating substrate 21 and the plane are closer to parallelism than those in the absence of the supports 50. Consequently, when the terminal 11 is bonded to the conductor pattern 23 of the insulating substrate 21, for example, when the terminal 11 is bonded to the conductor pattern 23 of the insulating substrate 21 by ultrasonic bonding, the vertical force to be applied to the terminal 11 is more evenly transmitted to a contact surface between the terminal 11 and the conductor pattern 23, which improves the bonding quality of the terminal 11 to the conductor pattern 23. For example, a bonding surface 12 of the terminal 11 is completely and firmly bonded to the upper surface 231 of the insulating substrate 21.Thus, the semiconductor device 10 is a semiconductor device capable of mitigating a problem caused by differences in the thickness of the heat sink at respective locations of the heat sink in the in-plane direction.

[0040] When the insulating substrate 21 is tilted, it is conceivable to correct a direction of the force applied to the terminal 11 according to the tilt using a sensor that measures the tilt of the insulating substrate 21. However, if a foreign matter such as metal powder adheres to a portion to be measured by the sensor, a problem may arise in that the correction function may not be properly performed. When the semiconductor device according to Embodiment 1 is manufactured, the problem caused by the tilt of the insulating substrate 21 can be reduced without using the sensor that measures the tilt of the insulating substrate 21.However, it is particularly noteworthy that when the semiconductor device according to Embodiment 1 is manufactured, the correction based on the measurement of the inclination of the insulating substrate 21 using the sensor that measures the inclination of the insulating substrate 21 can further reduce the influence of the inclination of the insulating substrate 21 as a whole. [A-2. Manufacturing process]

[0041] Fig. 6 is a flowchart illustrating a method for manufacturing the semiconductor device according to Embodiment 1. The method for manufacturing the semiconductor device according to Embodiment 1 includes steps S1 to S5.

[0042] First, in step S1, the carriers 50 are arranged on the upper surface 34 of the heat sink 31.

[0043] Next, in step S2, the insulating substrates 21 are bonded to the upper surface 34 of the heat sink 31 by the bonding material 35.

[0044] Next, in step S3, the semiconductor elements 41 are bonded to the insulating substrates 21 through the bonding material 42. Next, in step S4, the wire 43 is laid (see FIG. 2).

[0045] In step S5, the next step is Fig. 2, the terminal 11 is bonded to the upper surface 231 of the insulating substrate 21 by means of ultrasonics. This results in the semiconductor device 10 in Fig. 1. In step S5, the heat sink 31 is firmly attached to a surface plate of an ultrasonic bonding device by screws. The ultrasonic bonding device performs ultrasonic bonding, pressing the bottom surface 33 of the heat sink 31 against the mounting surface of the surface plate, which is a plane. The ultrasonic bonding device performs ultrasonic bonding, pressing an ultrasonic bonding tool against a surface 13 of the terminal 11 for pressing with an ultrasonic bonding tool. [B. Embodiment 2]

[0046] Fig. Fig. 4 is an enlarged view of a part of a semiconductor device 10b according to an embodiment 2, and is a view corresponding to Fig. 3 according to embodiment 1.

[0047] In the semiconductor device 10b, at least a portion of the plurality of supports 50 each includes a spacer 44 and a protrusion 51 formed integrally with the heat sink 31 on the upper surface of the heat sink 31. The semiconductor device 10b is otherwise identical to the semiconductor device 10.

[0048] Since the semiconductor device 10b also includes the plurality of supports 50 similarly to the semiconductor device 10 according to Embodiment 1, the upper surface 34 of the heat sink 31 is not parallel to the upper surface 231 of the insulating substrate 21 in a region that overlaps, in plan view, with a region where the insulating substrate 21 is bonded to the heat sink 31. The plurality of supports 50 are arranged such that, in the region that overlaps, in plan view, with the region where the insulating substrate 21 is bonded to the heat sink 31, the lower surface 33 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are closer to parallelism than the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21.

[0049] Although the support 50 arranged closest to the center of the heat sink 31 in plan view (hereinafter referred to as support 50a) is, for example, the spacer 44 without any elevation, as shown in Fig. 4, the carrier 50a may include the spacer 44 and the protrusion 51 formed on the upper surface of the heat sink 31 integrally with the heat sink 31.

[0050] Assume that T1 denotes a thickness of the heat sink 31 at a location on the support 50a, and D denotes a height of the support 50a. For example, the protrusion 51 having a height of a difference H between the thickness T1 and the thickness T2 of the heat sink 31 is formed at a location on each of the remaining supports 50 (H = T1 - T2) at the location of the support 50. The support 50 includes this protrusion 51 and the spacer 44 having a height D disposed on the protrusion 51. When the lower surface 33 of the heat sink 31 is pressed against a mounting surface of a surface plate to deform the heat sink 31 and flatten the lower surface 33, the mounting surface of the surface plate becomes parallel to an upper surface of the insulating substrate 21.Thus, changing the height of each of the protrusions 51 according to the location of the carrier 50 in the semiconductor device 10b enables the use of spacers 44 with the same height in the carriers 50. Consequently, the cost of the spacers 44 can be reduced. Here, the use of spacers 44 with the same height in the carriers 50 means that the height of the highest spacer 44 is 1.05 times that of the lowest spacer 44 among the spacers 44 to be used in the plurality of carriers 50.

[0051] The heights of the spacers 44 contained in the supports 50 may differ from one another.

[0052] The elevations 51 are formed, for example, by press processing. [C. Embodiment 3]

[0053] Fig. 5 is an enlarged view of a part of a semiconductor device 10c according to an embodiment 3, and is a view corresponding to Fig. 3 according to embodiment 1.

[0054] In the semiconductor device 10c, the plurality of supports 50 are the projections 51 formed on the upper surface of the heat sink 31 integrally with the heat sink 31. The semiconductor device 10c is otherwise identical to the semiconductor device 10.

[0055] Since the semiconductor device 10c also includes the plurality of supports 50 similarly to the semiconductor device 10 according to Embodiment 1, the upper surface 34 of the heat sink 31 is not parallel to the upper surface 231 of the insulating substrate 21 in a region that overlaps, in plan view, with a region where the insulating substrate 21 is bonded to the heat sink 31. The plurality of supports 50 are arranged such that the lower surface 33 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 are closer to parallelism than the upper surface 34 of the heat sink 31 and the upper surface 231 of the insulating substrate 21 in the region that overlaps, in plan view, with the region where the insulating substrate 21 is bonded to the heat sink 31.

[0056] In the semiconductor device 10c, the height of each of the supports 50 is defined, for example, in the following manner. Assuming that, for example, T1 denotes a thickness of the heat sink 31 at a position of the support 50 located closest to the center of the heat sink 31 in plan view (hereinafter referred to as the support 50a), D denotes a height of the support 50a, and H (H = T1 - T2) denotes a difference between the thickness T1 and the thickness T2 of the heat sink 31 at the position of each of the remaining supports 50, the protrusion 51 having a height D + H as the support 50 is formed at a position of the remaining supports 50. Embodiment 3 does not require a process for arranging spacers.

[0057] Embodiments may be freely combined and appropriately modified or omitted. EXPLANATION OF REFERENCE SYMBOLS

[0058] 10, 10b, 10c semiconductor device, 11 terminal, 12 bonding surface, 13 surface for pressing by means of a tool for ultrasonic bonding, 21 insulating substrate, 22 insulating layer, 23, 24 conductor pattern, 31 heat sink, 32 screw hole, 33, 241 lower surface, 34, 231 upper surface, 35 bonding material, 41 semiconductor element, 42 bonding material, 43 wire, 44 spacer, 50 carrier, 51 bump.

Claims

[1] A semiconductor device comprising: a heat sink; an insulating substrate; a bonding material; and a semiconductor element, wherein the insulating substrate is bonded to an upper surface of the heat sink by the bonding material, the semiconductor element is bonded to an upper surface of the insulating substrate, a thickness of the heat sink varies depending on the location of the heat sink in one direction in the plane, a plurality of supports are arranged on the upper surface of the heat sink in a region where the insulating substrate is bonded to the heat sink, each of the carriers is in contact with the insulating substrate and the upper surface of the heat sink is not parallel to the upper surface of the insulating substrate in a region which, in plan view, overlaps the region in which the insulating substrate is bonded to the heat sink. [2] The semiconductor device according to claim 1, wherein a lower surface of the heat sink and the upper surface of the insulating substrate are closer to parallelism in the region overlapping, in plan view, with the region where the insulating substrate is bonded to the heat sink than the upper surface of the heat sink and the upper surface of the insulating substrate. [3] The semiconductor device according to claim 1 or 2, wherein a lower surface of the heat sink is located below a periphery of the heat sink in a central portion of the heat sink. [4] The semiconductor device according to any one of claims 1 to 3, wherein a lower surface of the heat sink is a downwardly projecting curved surface. [5] A semiconductor device according to any one of claims 1 to 4, wherein the heat sink is thinner at a location where a first carrier of the plurality of carriers is arranged than the heat sink at a location where a second carrier of the plurality of carriers is arranged, and the first beam is higher than the second beam. [6] A semiconductor device according to any one of claims 1 to 5, wherein each of the supports is a spacer on the upper surface of the heat sink and in contact with the upper surface of the heat sink. [7] The semiconductor device according to any one of claims 1 to 5, wherein each of the supports is a support which is a spacer on the upper surface of the heat sink and in contact with the upper surface of the heat sink, or a support which includes a bump formed on the upper surface of the heat sink integrally with the heat sink and a spacer on the bump. [8] A semiconductor device according to claim 7, wherein the spacers included in the carriers have the same height. [9] A semiconductor device according to any one of claims 1 to 5, wherein each of the supports is a protrusion formed on the upper surface of the heat sink integrally with the heat sink. [10] A semiconductor device according to any one of claims 1 to 9, further comprising a connection, wherein the terminal is ultrasonically bonded to the upper surface of the insulating substrate. [11] A method of manufacturing the semiconductor device according to any one of claims 1 to 10, wherein the semiconductor device further comprises a terminal, wherein the method comprises Bonding the insulating substrate to the heat sink, then fixing the heat sink to a surface plate of an ultrasonic bonding device and bonding, by ultrasonic means, the terminal to the upper surface of the insulating substrate.

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