SEALED SURFACE-MOUNTABLE ENCLOSURE WITH FLAT PROFILE
Patent Information
- Application Number
- DE112022007176
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-08-08
- Filing Date
- 2022-11-03
- Publication Date
- 2025-02-27
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
RELATED APPLICATION
[0001] This application claims priority over the jointly owned preliminary US patent application No. 63 / 339,405, filed on May 6, 2022, the entire contents of which are hereby incorporated by reference for all purposes. TECHNICAL AREA
[0002] The present disclosure relates to flat, sealed surface-mounted packages for electronic power semiconductor devices and in particular to a hermetically sealed, mechanically robust and thermally efficient surface-mounted package structure for use under extreme temperature, power and environmental conditions to provide improved power and thermal performance under extreme physical stress, such as in space applications. BACKGROUND
[0003] Power components (transistors, metal-oxide-semiconductor field-effect transistors (MOSFETs), and other devices) can be exposed to extreme environmental conditions. Certain applications, such as power components for space programs, require high current handling and hermetic sealing. MOSFETs, diodes, and capacitors should be certified for the high temperatures (300°C) required to minimize heat dissipation and radiative mass that will occur during scientific missions and human space exploration. Both scientific and human space exploration missions require radiation-hardened components and interconnects for extreme temperatures. The capabilities specified for NASA missions focus on radiation-hardened, high-voltage (1200 V) components designed for extreme temperatures.NASA space missions utilize electric propulsion, with high voltage controlling the current for the high-performance electric thrusters. Electric propulsion applications require a significant increase in voltage tolerance (to >1,200 V). Additional requirements may exist to support rapid temperature cycling and power supply levels, as specified in product safety levels JANS, JANTXV, JANTX, and JAN.
[0004] Semiconductor packages suitable for use in environments such as space feature high current handling capabilities in the hundreds of amperes range, hermetic sealing according to JANS specifications, low inductance, low impedance, high thermal conductivity, high flexibility in terms of heat sink properties including multiple points for thermal contacts, high insulation voltage properties for space applications (high altitude and near-perfect vacuum environment), low weight compared to commercially available copper-based packages, the ability to meet JANS HiRel space-level screening and long-term reliability tests, the ability to support electronics in a high-radiation and harsh environment, physical robustness to withstand the harsh conditions in launch vehicles, and scalability and flexibility in dimensions.to accommodate various electronic devices such as silicon, silicon carbide and gallium nitride without restriction.
[0005] In the extreme environments of space applications, the devices may also be radiation-hardened and hermetically sealed in a ceramic or metal housing to prevent radiation from interfering with the operation of the device.
[0006] Devices housing power components in these extreme environments can be subjected to extreme physical stresses due to the differing coefficients of thermal expansion (CTE) of the various materials. For example, stresses can occur between the printed circuit board (PCB) and the hermetically sealed enclosure, between the hermetically sealed enclosure and the substrate materials, and between the substrate materials and the semiconductor chip. Components that are mounted or attached to one another and made of different materials with differing coefficients of thermal expansion can be subjected to extreme physical stresses when ambient temperatures change drastically.
[0007] Regardless of applications in extreme environments, size constraint design parameters can be important. Low-profile MOSFET packages should adhere to size constraint design parameters.
[0008] There is a need for a flat, sealed, surface-mountable enclosure that is mechanically robust and offers improved power and thermal performance for use in extreme temperature, power, and environmental conditions that result in extreme physical stresses. SUMMARY
[0009] According to one aspect, a housing is provided which has a side wall structure with a first opening and a second opening; a lid attached to the side wall structure to hermetically seal the first opening; a support material attached to the side wall structure to hermetically seal the second opening, the support material having a first, a second and a third opening; a first knob attached to the support material to hermetically seal the first opening; a second knob attached to the support material to hermetically seal the second opening; and a third knob attached to the support material to hermetically seal the third opening.
[0010] Another aspect is a method that includes: attaching a lead for an electronic component to a first button; attaching a first lead to a second button; attaching a second lead to a third button; attaching the first, second, and third buttons to a first, second, and third opening in a carrier material, respectively; closing the carrier material with a first opening of a side wall structure; and closing a lid with a second opening of the side wall structure.
[0011] According to another aspect, a system is provided that has a hermetically sealed enclosure, wherein the enclosure comprises: a side wall structure with a first opening and a second opening; a lid attached to the side wall structure to hermetically seal the first opening; a support material attached to the side wall structure to hermetically seal the second opening, the support material having a first, a second, and a third opening; a first button attached to the support material to hermetically seal the first opening; a second button attached to the support material to hermetically seal the second opening; and a third button attached to the support material to hermetically seal the third opening; a semiconductor chip arranged in an interior of the hermetically sealed enclosure;a first line attached to the second button on the outside of the hermetically sealed housing; and a second line attached to the third button on the outside of the hermetically sealed housing. BRIEF DESCRIPTION OF THE FIGURES
[0012] The figures illustrate flat, sealed, surface-mounted enclosures with improved power and heat dissipation and improved performance under extreme loads. Fig. Figure 1 shows a perspective exploded view of a flat, sealed surface-mounted enclosure. Fig. Figure 2 shows a perspective top view of a flat, sealed surface-mount package containing a MOSFET. Fig. Figure 3A shows a side cross-sectional view of a flat, sealed surface-mount enclosure along the in Fig. Line 3A-3A shown in 2. Fig. Figure 3B shows a side cross-sectional view of a flat, sealed surface-mount enclosure along line 3B-3B in Fig. 2. Fig. Figure 4 shows a perspective top view of a flat, closed surface-mount housing with a lid attached. Fig. Figure 5 shows a flat, sealed surface-mounted package with vias in a perspective top view. Fig. Figure 6 shows a flowchart for a process for manufacturing a flat, sealed housing for surface mounting.
[0013] The reference signs for each illustrated element that appears in several different figures have the same meaning in all figures, and the mention or discussion of an illustrated element in connection with one particular figure also applies to any other figure in which the same illustrated element is shown. DESCRIPTION
[0014] Fig. Figure 1 shows one of several examples of a flat, sealed surface-mount package. A hermetically sealed lid 50 can be attached to the top opening of the sidewall structure 9 to create a hermetic seal. Attaching the lid 50 to the top opening of the sidewall structure 9 may involve, but is not limited to, a soldering or brazing process, a tack welding process, or the application of an epoxy or other suitable adhesive. The sidewall structure 9 may be made of a metal alloy, including, but not limited to, a nickel-cobalt-iron alloy, or of a ceramic material. A semiconductor chip 10 may be located within the sidewall structure 9. The semiconductor chip 10 may be a MOSFET device, a gallium nitride device, a gallium arsenide device, or any other semiconductor device incorporating a semiconductor material.The semiconductor chip 10 can function as a power transistor, a processor, or some other type of electronic component. The semiconductor chip 10 can be mounted on the button 2 by an assembly layer 11 between the top of the button 2 and the bottom of the semiconductor chip 10. The assembly layer 11 can provide a thermal and electrical connection between the semiconductor chip 10 and the button 2. The assembly layer 11 can include a solder and connect the semiconductor chip 10 and the button 2 using a reflow soldering process. In some examples, the assembly layer 11 can include a brazing alloy and connect the semiconductor chip 10 and the button 2 using a brazing process. The button 2 can be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling the button 2 to the assembly layer 11.
[0015] This surface-mount device (SMD) package can be mounted directly onto the printed circuit board (PCB). The package can utilize a mounting bracket for PCB installation.
[0016] Button 2 can be a flanged plug structure, as in Fig. Figure 1 shows the knob 2 having a flange 2F and a plug 2P. The plug 2P of the knob 2 has a geometric shape corresponding to the opening 12 in the carrier material 3 and is slightly smaller than the opening 12, allowing the plug 2P to be inserted into the opening 12. The flange 2F is larger than both the plug 2P and the opening 12, so that when the plug 2P is inserted into the opening 12, the flange 2F rests against the underside of the carrier material 3. The knob 2 can be secured in an opening 12 in a carrier material 3 by means of the mounting layer 112, the mounting layer 112 being positioned between the flange 2F and the carrier material 3. The knob 2 can be attached to the opening 12 by means of a brazing process, a soldering process, or another process for securing the knob 2 to the opening 12 using the mounting layer 112.
[0017] The underside of the button 2 can be attached to the top side of the drain contact 13 by means of a mounting layer 14. The drain contact 13 can be made of oxygen-free, highly conductive copper or a copper alloy, or any other material capable of thermally and electrically coupling the mounting layer 14 between the top side of the drain contact 13 and the underside of the button 2. The button 2 can be made of a tungsten-copper alloy or any other material capable of thermally and electrically coupling the button 2 to the mounting layer 14. The mounting layer 14 can be made of a brazing alloy, including, but not limited to, alloys of aluminum-silicon, copper-phosphorus, silver, copper, copper-zinc, magnesium, nickel, or cobalt.
[0018] A button 6 can be a flanged plug structure, as in Fig. Figure 1 shows the knob 6 having a flange 6F and a plug 6P. The plug 6P of the knob 6 has a geometric shape that corresponds to the opening 7 in the carrier material 3 and is slightly smaller than the opening 7, so that the plug 6P can be inserted into the opening 7. The flange 6F is larger than both the plug 6P and the opening 7, so that the flange 6F rests against the underside of the carrier material 3 when the plug 6P is inserted into the opening 7. The knob 6 can be secured in the opening 7 of the carrier material 3 by means of the mounting layer 107, which is arranged between the flange 6F and the carrier material 3. The knob 6 can be attached to the opening 7 using the mounting layer 107 by brazing, soldering, or another method of fastening the knob 6 to the opening 7.The underside of the button 6 can be connected to the top side of a portion of the conductor structure 1, with the mounting layer 16 located between them. The conductor structure 1 can comprise oxygen-free, highly conductive copper or a copper alloy, or another material capable of thermally and electrically coupling with the mounting layer 16. The button 6 can comprise a tungsten-copper alloy or another material capable of thermally and electrically coupling the button 6 with the mounting layer 16. The mounting layer 16 can comprise a brazing alloy, including, but not limited to, alloys of aluminum-silicon, copper-phosphorus, silver, copper, copper-zinc, magnesium, nickel, or cobalt.
[0019] A button 5 can be a flanged plug structure, as in Fig. Figure 1 shows the knob 5 having a flange 5F and a plug 5P. The plug 5P of the knob 5 has a geometric shape that corresponds to the opening 4 in the carrier material 3 and is slightly smaller than the opening 4, so that the plug 5P can be inserted into the opening 4. The flange 5F is larger than both the plug 5P and the opening 4, so that the flange 5F rests against the underside of the carrier material 3 when the plug 5P is inserted into the opening 4. The knob 5 can be inserted into the opening 4 of the carrier material 3 using the mounting layer 104, which is positioned between the flange 5F and the carrier material 3. The knob 5 can be attached to the opening 4 using the mounting layer 104 by brazing, soldering, or another method of fastening the knob 5 to the opening 4.The underside of the button 5 can be connected to the top side of a portion of the conductor structure 20 by inserting a mounting layer 15 between them. The conductor structure 20 can be made of oxygen-free, highly conductive copper or a copper alloy, or another material capable of thermally and electrically coupling with the mounting layer 15. The button 5 can be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling the button 5 with the mounting layer 15. The mounting layer 15 can be a brazing alloy, including, but not limited to, alloys of aluminum-silicon, copper-phosphorus, silver, copper, copper-zinc, magnesium, nickel, or cobalt.
[0020] The carrier material 3 can comprise an insulating material made of zirconium oxide. The carrier material 3 can comprise silicon nitride ceramic or other materials not listed here, which can provide thermal and electrical insulation between the multitude of button structures. The example in Fig. 1 includes three openings, but different examples of the carrier material 3 can have more openings than those in Fig. The number of openings shown may be less than the number shown in the diagram. Fig. 1. Number of openings shown.
[0021] The drain contact 13, the conductor structure 1 and the conductor structure 20 can provide multiple contact points between the housing and the printed circuit board substrate, enabling efficient heat transfer from the housing and improving overall thermal conductivity.
[0022] The mounting layer 8 can contain a brazing material. The mounting layer 8 can be used in a brazing process to braze the carrier material 3 to the base of the side wall structure 9, thus creating a hermetic seal. The mounting layers 14, 15, and 16 can each contain brazing alloys and thermally and electrically couple the button 2 to the drain contact 13, the button 6 to the conductor structure 1, and the button 5 to the conductor structure 20, respectively, using a brazing technique.
[0023] The mounting layers 14, 15 and 16 can alternatively also have hard solder metals and thermally and electrically couple the button 2 with the drain contact 13, the button 6 with the conductor structure 1 and the button 5 with the conductor structure 20.
[0024] The structure of Fig. 1 can form a flat, enclosed housing for surface mounting.
[0025] In operation, the flat, sealed, surface-mounted housing of Fig. 1. Expand when the heat increases and contract when the heat decreases. The different materials of the enclosure can have different coefficients of thermal expansion (CTE). The composition of materials in the enclosure of different examples can provide a gradual change in CTE across the various components of the enclosure, reducing the stress caused by thermal expansion and contraction.
[0026] Fig. Figure 2 shows a perspective side view of the flat, sealed surface-mounted enclosure. Fig. 2 is shown with the housing cover removed for easier viewing. The semiconductor chip 10 can be coupled to the button 2 by means of a holder 11 (not shown). The button 2 can be made of a conductive material that is thermally and electrically coupled to the semiconductor chip 10 via the mounting layer 11. The button 2 can be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling the mounting layer 11 of the button 2.
[0027] Button 5 can consist of a conductive material coupled to the conductor 20, with the mounting layer 15 (not shown) in between. Button 5 can be a tungsten-copper alloy or another material capable of thermally and electrically coupling to the mounting layer 15. A bond wire 25 can electrically couple button 5 to the semiconductor chip 10. The example in Fig. Figure 2 shows a single bond wire 25, but in various examples more than one bond wire can electrically couple the button 5 to the semiconductor chip 10.
[0028] Button 6 can consist of a conductive material coupled to conductor 1 with an assembly layer 16 (not shown) in between. Button 6 can be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling the conductor structure 1 to the assembly layer 16. A bond wire 26 can electrically couple button 6 to the semiconductor chip 10. The example in Fig. Figure 2 shows a single bond wire 26, but in various examples more than one bond wire can electrically couple the button 6 to the semiconductor chip 10.
[0029] In various examples, the conductor structure 1 can be electrically connected to a gate terminal of a MOSFET device on the semiconductor chip 10 via a wire connection 26, the conductor structure 20 can be electrically connected to a source terminal of a transistor device on the semiconductor chip 10 via a wire connection 25 to connect the source of the MOSFET to the button 5.
[0030] Fig. Figure 3A shows one of several examples of the flat, sealed, surface-mounted enclosure in a side cross-sectional view. The cross-section is shown along the in Fig. 2 with axis marked 3A-3A. Button 2 can be made of a conductive material that is thermally and electrically coupled to the semiconductor chip 10, with the mounting layer 11 in between. Button 5 can be made of a conductive material that is coupled to the lead 20, with the mounting layer 15 in between. The lead 20 can extend laterally from the mounting section 30 to the first base section 31, then to the curved section 32, and terminate in the base section 33. The top of the mounting section 30 can be electrically and thermally coupled to the mounting layer 15, as described above. Button 2 can be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling the drain contact 13 to the mounting layer 14. The knob 5 may be made of a tungsten-copper alloy or another material that thermally and electrically couples the knob 5 to the mounting layer 15.The drain contact 13 can comprise oxygen-free, highly conductive copper or a copper alloy or other material that thermally and electrically couples the drain contact 13 to the mounting layer 14.
[0031] The conduit 20 may have a mounting section 30, a first base section 31, a curved section 32, and a second base section 33. The identification of the mounting section 30, the first base section 31, the curved section 32, and the second base section 33 is for descriptive purposes only and is not intended to restrict the structure or composition of the conduit 20. In various examples, the mounting section 30, the first base section 31, the curved section 32, and the second base section 33 may consist of a single material that extends laterally from the mounting section 30 through the first base section 31 and the curved section 32, terminating in the second base section 33. The top surface of the mounting section 30 may be electrically and thermally coupled to the mounting layer 15, as described above.In various examples, the curved section 32 can rise above a baseline 38 to a higher height above the first base section 31 and the second base section 33 than that shown in . Fig. Height shown in Figure 3A. In various examples, the curved section 32 above the baseline 38 can rise to a lower height above the first base section 31 and the second base section 33 than that shown in Figure 3A. Fig. Height shown in Figure 3A. The curved section 32 can improve the load tolerance of the housing. The curved section 32 can provide additional stress relief and allows the terminals to deform in a favorable position and absorb stress.
[0032] The bond wire 25 can couple the button 5 to the semiconductor chip 10. The example in Fig. Figure 3A shows a single bond wire 25, but in different examples more than one bond wire can couple the button 5 to the semiconductor chip 10.
[0033] Fig. Figure 3B shows one of several examples of the flat, sealed, surface-mounted enclosure in a side cross-sectional view. The cross-sectional view is shown along the in Fig. 2 with axis marked 3B-3B. Button 2 can be made of a conductive material that is thermally and electrically coupled to the semiconductor chip 10, with the mounting layer 11 in between. Button 6 can be made of a conductive material that is coupled to the lead 1, with a mounting layer 16 in between. Lead 1 can extend laterally from the mounting section 130 to the first base section 131, then to the curved section 132, and terminate in the base section 133. The top of the mounting section 130 can be electrically and thermally coupled to the mounting layer 16, as described above. Button 2 can be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling to the mounting layer 11. The knob 6 may be made of a tungsten-copper alloy or another material capable of thermally and electrically coupling the knob 6 to the mounting layer 16.The drain contact 13 can comprise oxygen-free, highly conductive copper or a copper alloy or other material that thermally and electrically couples the drain contact 13 to the mounting layer 14.
[0034] The conduit 1 may have an assembly section 130, a first base section 131, a curved section 132, and a second base section 133. The identification of the assembly section 130, the first base section 131, the curved section 132, and the second base section 133 is for descriptive purposes only and is not intended to restrict the structure or composition of the conduit 1. In various examples, the assembly section 130, the first base section 131, the curved section 132, and the second base section 133 may consist of a single piece of material with a single composition. In various examples, the curved section 132 may rise above the baseline 38 to a greater height above the first base section 131 and the second base section 133 than that specified in Fig. Height shown in 3B. In various examples, the curved section 132 above the baseline 38 can rise to a lower height above the first base section 131 and the second base section 133 than that shown in Fig. Height shown in Figure 3B. The curved section 132 can improve the load tolerance of the enclosure. The curved section 132 can provide additional stress relief and allows the terminals to deform in a favorable position and absorb stresses.
[0035] The bond wire 26 can couple the button 6 to the semiconductor chip 10. The example in Fig. Figure 3B shows a single bond wire 26, but in different examples more than one bond wire can couple the button 6 to the semiconductor chip 10.
[0036] Fig. Figure 4 shows one of several examples of the housing that includes the cover 50. The cover 50 can be attached to an upper opening of the side wall structure 9 to form a hermetic seal. The mounting layer 8 can form a hermetic seal between the support material 3 and a lower opening of the side wall structure 9. The in Fig. The square-cubic enclosure shape shown in Figure 4 is not intended to restrict other enclosure shapes. An enclosure may have a rectangular cubic structure, a cylindrical structure, or any other shape not explicitly specified.
[0037] Fig. Figure 5 shows an example of a housing from a top view. The housing lid has been removed for better viewing. A bottom opening of the side wall structure 9 can be connected to the substrate 3 via mounting layer 8. The knob 6 can be thermally and electrically coupled to line 1. The knob 5 can be thermally and electrically coupled to line 20. For the purposes of this description, the term "knob" refers to a conductive structure that is not limited to a round shape. The shape of a knob can be, but is not limited to, a circle, oval, ellipse, square, rectangle, or any other shape not expressly mentioned. A variety of vias 40 can provide an electrical connection through the substrate to a drain structure (not shown).These vias can provide the connection between the internal and external drain structure on the hermetic housing.
[0038] In operation, a semiconductor chip can be mounted on the inside of the housing, and vias ~40 can provide an electrical and thermal connection from the semiconductor chip to the outside of the housing.
[0039] This design allows the use of ceramics with higher thermal conductivity and higher strength / toughness compared to other ceramics, enabling functionality in a smaller housing.
[0040] Fig. Figure 6 illustrates a flowchart of a process for manufacturing a hermetically sealed package for semiconductor chips. The process includes the following: Attaching 610 a drain 13 (see Fig. 2) for a semiconductor chip 10 on a button 2; attaching 620 of a conductor structure 1 to a button 6; attaching 630 of a conductor structure 20 to a button 5; attaching 640 of buttons 2, 6 and 5 to openings 12, 7 and 4 respectively in a carrier material 3; closing 650 of the carrier material 3 with a first opening of a side wall structure 9; closing 660 of a cover 50 with a second opening of the side wall structure 9. First, the drain 13 for a semiconductor chip 10 can be attached to the button 2 by a mounting layer 14. See Fig.2. Second, the knob 6 can be attached to the conduit structure 1 with a mounting layer 16 in between. Third, the knob 5 can be attached to the conduit structure 20 with a mounting layer 630. Fourth, the drain 13, the knob 2, and the knob 6 can be attached to the opening 12, the opening 4, and the opening 7, respectively, using a brazing process, a soldering process, or another method to attach the drain and the knobs to the openings in the carrier material 3. Fifth, the carrier material 3 can be closed at the lower opening of the side wall structure 9. This can be a hermetic seal. Sixth, a cover 50 can be closed with the top of the side wall structure 9 to achieve a hermetic seal. QUOTES INCLUDED IN THE DESCRIPTION
[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature
[0000] US 63 / 339,405
[0001]
Claims
[1] Housing that has: a sidewall structure having a first and a second opening; a lid attached to the top of the side wall structure to hermetically close the first opening; a carrier material attached to the underside of the sidewall structure to hermetically seal the second opening, the carrier material having a first, a second and a third opening; a first button attached to the substrate to hermetically close the first opening; a second button attached to the carrier material to hermetically close the second opening; and a third button attached to the carrier material to hermetically seal the third opening. [2] The housing of claim 1, wherein the sidewall structure comprises a nickel-cobalt-iron alloy. [3] A housing according to any one of claims 1 to 2, wherein the cover is connected to the side wall structure via a brazed connection to thereby hermetically close the first opening. [4] Housing according to one of claims 1 to 3, wherein the carrier material comprises silicon nitride ceramic. [5] Housing according to one of claims 1 to 4, wherein the carrier material comprises zirconium oxide. [6] A housing according to any one of claims 1 to 5, wherein the substrate material is brazed to the sidewall structure to thereby hermetically seal the second opening. [7] Housing according to one of claims 1 to 6, wherein the first, second and third buttons are connected to the carrier material via a corresponding brazed connection. [8] A housing according to any one of claims 1 to 7, wherein the first, second and third buttons comprise a copper-tungsten alloy. [9] A housing according to any one of claims 1 to 8, comprising a drain attached to the first button. [10] The package of claim 9, wherein the drain comprises an oxygen-free copper with high thermal conductivity or an oxygen-free copper alloy with high thermal conductivity. [11] A housing according to any one of claims 1 to 10, comprising a first lead attached to the second button and a second lead attached to the third button. [12] The housing of claim 11, wherein the first and second leads comprise an oxygen-free copper with high thermal conductivity or an oxygen-free copper alloy with high thermal conductivity. [13] The housing according to claim 12, wherein the first and second leads each have a mounting portion formed with a first base portion, the first base portion formed with a curved portion, the curved portion formed with a second base portion. [14] Method comprising: Attaching a drain for an electronic component to a first button; Attaching a first lead to a second button; Attaching a second wire to a third button; Attaching the first, second and third buttons to a first, second and third opening in a substrate, respectively; Closing the carrier material at a first opening of a sidewall structure; and Closing a lid at a second opening of the side wall structure. [15] The method of claim 14, wherein attaching the drain for the electronic component to the first button comprises brazing the drain for the electronic component to the first button using a brazing metal. [16] The method of any one of claims 14 to 15, wherein attaching the first lead to the second button comprises brazing the first lead to the second button using a brazing metal, and attaching the second lead to the third button comprises brazing the second lead to the third button using the brazing metal. [17] The method of any one of claims 14 to 16, wherein attaching the first, second, and third buttons to a first, second, and third opening of the substrate comprises brazing the first, second, and third buttons to the first, second, and third openings of the substrate using a brazing metal. [18] The method of any one of claims 14 to 17, wherein closing the substrate material at the first opening of the sidewall structure comprises brazing the sidewall structure to the substrate material using a brazing metal. [19] The method of any one of claims 14 to 18, wherein closing the lid to the second opening of the sidewall structure comprises brazing the lid to the second opening of the sidewall structure using a brazing metal. [20] System that has: a hermetically sealed housing comprising: a sidewall structure having a first opening and a second opening; a lid attached to the side wall structure to hermetically close the first opening; a carrier material attached to the sidewall structure to hermetically seal the second opening, the carrier material having a first, a second and a third opening; a first button attached to the substrate to hermetically close the first opening; a second button attached to the carrier material to hermetically close the second opening; and a third button attached to the carrier material to hermetically close the third opening; a semiconductor chip arranged inside the hermetically sealed housing; a first lead attached to the second button on the outside of the hermetically sealed housing; and a second lead attached to the third button on the outside of the hermetically sealed housing. [21] The system of claim 20, comprising a first wire connection connected between the second button and the semiconductor chip inside the hermetically sealed package; and a second wire connection connected between the third button and the semiconductor chip inside the hermetically sealed package. [22] The system of any one of claims 20 to 21, wherein the first conduit comprises a respective mounting portion formed with a respective first base portion, the first base portion of the first conduit being formed with a respective curved portion, the curved portion of the first conduit being formed with a respective second base portion, and the second conduit comprises a respective mounting portion formed with a first base portion, the first base portion being formed with a curved portion, the curved portion being formed with a second base portion.
Citation Information
Patent Citations
63/339,405