Power converter unit

Abstract

This power converter assembly comprises the following: a series capacitor circuit (2a, 2b); an inverter circuit (3) in which legs having series-connected switching elements (3a to 3f) are connected in parallel; and a circuit (4) having switching elements (4a to 4f), one end of which is connected to a connection point of the series capacitor circuit (2a, 2b) and the other ends of which are connected to connection points of the switching elements (3a to 3f) of the inverter circuit (3). The inverter circuit (3) is capable of performing two-level operation by switching off the switching elements (4a to 4f) of the circuit (4) and of performing three-level operation by switching on / off the switching elements (4a to 4f) of the circuit (4).To perform the switching of an operating level between the 2-level operation and the 3-level operation, a control circuit (8) changes the switching speeds of the switching elements (3a to 3f) and (4a to 4f).

Description

Technical area

[0001] The present invention relates to a power converter device. State of the art

[0002] A conventional power conversion device includes first and second DC power supplies connected in series, and a power converter that converts DC power from each DC power supply into AC power. The power converter is configured as follows: At least two switching elements formed from semiconductor elements are connected in series to form a branch. At least three such branches are connected in parallel. An AC switch having at least two switching elements connected in series, each formed from a semiconductor element and a diode connected in antiparallel to the semiconductor element, is connected between a mutual connection point of the switching elements in each branch and a mutual connection point of the DC power supplies.Each AC switch is turned on or off, so that the power converter can perform 3-level operation or 2-level operation (see Patent Document 1 below). BibliographyPatent document

[0003] Patent document 1: WO 2012 / 025978 A1 Summary of the inventionProblem to be solved by the invention

[0004] In the power converter device described above, the following applies: In 2-level operation, a power supply voltage is applied to the switching elements connected in series, and in 3-level operation, a voltage that is half the power supply voltage is applied to the switching elements connected in series.

[0005] In a state where the gate resistance value for turn-off is optimally set in a range where the surge voltage occurring during switching is not greater than the allowable surge voltage of the switching elements, thus reducing losses in 3-level operation, the following applies: If the operation is switched to 2-level operation, the voltage applied to the switching elements connected in series is doubled compared to that in 3-level operation. As a result, the surge voltage occurring during switching may exceed the allowable surge voltage of the switching elements, thus creating a risk of switching elements failure.

[0006] The present invention has been conceived to solve the above problem, and it is an object of the present invention to provide a power conversion device capable of performing switching of the operation level between the 2-level operation and the 3-level operation without the risk of causing malfunction of the switching elements even when switching the operation level. Ways to solve the problem

[0007] A power conversion device according to the present invention comprises: a capacitor series circuit having a plurality of capacitors connected in series and both ends of which are connected to both ends of a DC power source; an inverter circuit having a plurality of legs, each having a plurality of switching elements connected in series, connected in parallel, and having DC input ends connected to both ends of the capacitor series circuit and AC output ends connected to a load; a switching circuit.A switching circuit having a plurality of switching elements, one end of which is connected to a connection point between the plurality of capacitors and the other end of which is connected to a plurality of connection points between the switching elements of the inverter circuit; and a control circuit that controls the inverter circuit and the switching circuit.

[0008] The inverter circuit is capable of performing 2-level operation by turning off the switching elements included in the circuit, and performing 3-level operation by turning on / off the switching elements included in the circuit. When switching an operating level between 2-level operation and 3-level operation is performed, the control circuit changes the switching speeds of the switching elements of the inverter circuit and the switching circuit. Effect of the invention

[0009] The power converter device according to the present invention makes it possible to provide a power converter device that does not cause a risk of malfunction of the switching elements, even when switching the operating level. Short description of the drawings Fig. 1 is a configuration diagram showing a power converter device according to Embodiment 1. Fig. 2 is a configuration diagram showing a gate input unit of the power conversion device according to Embodiment 1. Fig. 3 shows the load current and switching voltage in 2-level operation and in 3-level operation. Fig. Figure 4 shows schematically the details of the losses in the power converter device in 2-level operation and in 3-level operation. Fig. Figure 5 shows time series data of a WLTC mode driving pattern. Fig. Figure 6 schematically shows the relationship between the current value for level operation switching and the losses during WLTC mode driving. Fig. Figure 7 schematically shows the relationship between the current value for level operation switching and the volume of the power converter device. Fig. 8 is an operational conceptual diagram showing features for controlling the power converter device according to Embodiment 1. Fig. 9 is a specific control flowchart in the power converter device according to Embodiment 1. Fig. 10 is a specific control flowchart in the power converter device according to Embodiment 1. Fig. 11 is a specific control flowchart in the power converter device according to Embodiment 1. Fig. 12 schematically shows the switching of the operating level according to a motor operating point in Embodiment 1, wherein the relationship between the carrier frequency and the 2-level operation and the 3-level operation is mapped to the speed and torque characteristics of a motor. Fig. Fig. 13 shows a configuration of the power converter device according to Embodiment 1, which is different from that in Fig. 1. Fig. 14 is an operational conceptual diagram showing features for controlling the power converter device according to Embodiment 2. Fig. 15 shows a configuration of a buffer circuit of the gate input unit of the power converter device according to Embodiment 1. Fig. 16 shows a hardware configuration of a control circuit of the power conversion device according to each of Embodiments 1 and 2. Description of embodimentsEmbodiment 1

[0010] A power converter device according to Embodiment 1 of the present invention will be described with reference to the drawings. Configuration of the power converter device

[0011] Fig. 1 is a configuration diagram showing the power converter device according to Embodiment 1.

[0012] The converter device, which is Fig. 1 is connected between a DC voltage source 1 and a motor 7 as a load. The power converter device converts DC power from the DC voltage source 1 into AC power and outputs the AC power to the motor (load) 7, thereby driving the motor (load) 7.

[0013] The power converter device comprises the following: a capacitor series circuit 2 in which a plurality of capacitors 2a, 2b are connected in series, an inverter circuit 3 having a plurality of switching elements 3a, 3b, 3c, 3d, 3e, 3f, a switching circuit 4 having a plurality of switching elements 4a, 4b, 4c, 4d, 4e, 4f, gate input units 5a, 5b, 5c, 5d, 5e, 5f for the switching elements 3a, 3b, 3c, 3d, 3e, 3f, gate input units 6a, 6b, 6c, 6d, 6e, 6f for the switching elements 4a, 4b, 4c, 4d, 4e, 4f, and a control circuit 8 which controls the inverter circuit 3 and controls circuit 4.

[0014] In the present embodiment, a three-phase inverter device is shown as an example of the power converter device. However, the power converter device does not necessarily need to be a three-phase inverter device, and it may also be an inverter device for a single phase or for four or more phases. Although the motor 7 is shown as an example of a load, other load devices may also be used.

[0015] Capacitor 2a and capacitor 2b are connected in series to form capacitor series circuit 2. Here, the connection point between capacitor 2a and capacitor 2b is defined as a first connection point. Both ends of capacitor series circuit 2 are connected to both ends of DC power source 1 and DC input ends of inverter circuit 3, as described later. Although capacitor series circuit 2 is shown here as being formed by two capacitors connected in series, capacitor series circuit 2 is not limited to this, and it may also be formed by three or more capacitors connected together.

[0016] The inverter circuit 3 has a configuration in which three legs, each formed of two series-connected switching elements, are connected in parallel, and both ends of each leg are connected to both ends of the capacitor series circuit 2 and both ends of the DC voltage source 1. In the example shown in Fig. 1, a branch of the switching element 3a and a branch of the switching element 3b are connected in series to form a leg for the U phase, a branch of the switching element 3c and a branch of the switching element 3d are connected in series to form a leg for the V phase, and a branch of the switching element 3e and a branch of the switching element 3f are connected in series to form a leg for the W phase.

[0017] Here, the connection points between switching elements 3a and 3b, between switching elements 3c and 3d, and between switching elements 3e and 3f are defined as the second, third, and fourth connection points, respectively. The second, third, and fourth connection points serve as the AC output ends of inverter circuit 3. Motor 7 is connected to the second, third, and fourth connection points, and inverter circuit 3 supplies AC power to motor 7 via the second, third, and fourth connection points.

[0018] For the switching elements 3a to 3f used in the inverter circuit 3, a metal-oxide-semiconductor field-effect transistor (MOSFET) with an antiparallel diode between the source and drain is used. The MOSFET can be formed of SiC or Si, and the antiparallel diode can be a diode included in the MOSFET or a diode provided externally. Alternatively, an element such as a gallium nitride high-mobility transistor (GaN-HEMT) or an insulated-gate bipolar transistor (IGBT) with a diode connected in antiparallel can be used.

[0019] The switching circuit 4 has a plurality of switching elements 4a to 4f, and the 2-level operation and the 3-level operation, which will be described later, can be switched by controlling the switching elements 4a to 4f. The switching circuit 4, which is shown in Fig. 1 is arranged between the second to fourth connection points of the inverter circuit 3 and the first connection point of the capacitors 2a, 2b, and is formed using metal oxide semiconductor field effect transistors (MOSFETs) each having an anti-parallel diode between its source and drain.

[0020] Here, too, the MOSFET can be made of SiC or Si, and the antiparallel diode can be a diode present in the MOSFET or a diode provided externally. Alternatively, an element such as a gallium nitride high-mobility transistor (GaN HEMT) or an insulated-gate bipolar transistor (IGBT) can be used, with a diode connected in antiparallel.

[0021] In circuit 4, the switching elements 4a and 4b, the switching elements 4c and 4d, and the switching elements 4e and 4f are connected in series in opposite directions. Source terminals of the switching elements 4a, 4c, and 4e are connected to the first connection point of the capacitor series circuit 2, and source terminals of the switching elements 4b, 4d, and 4f are connected to the second through fourth connection points, respectively. In the opposite-direction series circuit configuration, the switching elements 4a and 4b, the switching elements 4c and 4d, and the switching elements 4e and 4f are connected via their drain terminals.

[0022] With the configuration of circuit 4, when switching element 4a is turned on, a current can flow from the second connection point to the first connection point, and when switching element 4b is turned on, a current can flow from the first connection point to the second connection point. Furthermore, when switching element 4c is turned on, a current can flow from the third connection point to the first connection point, and when switching element 4d is turned on, a current can flow from the first connection point to the third connection point.

[0023] Furthermore, when the switching element 4e is turned on, a current can flow from the fourth connection point to the first connection point, and when the switching element 4f is turned on, a current can flow from the first connection point to the fourth connection point. The circuit 4 is not limited to the Fig. 1, and it may have any configuration as long as the direction in which the current flows can be controlled by turning one of the switching elements on or off.

[0024] The gate input units 5a to 5f turn on / off the respective switching elements 3a to 3f of the inverter circuit 3 based on pulse width modulation (PWM) signals output from the control circuit 8, and set a gate resistance value Rgoff for turning off the switching elements 3a to 3f of the inverter circuit 3 based on a gate resistance selection signal (Rg selection signal). The gate input units 6a to 6f switch the respective

[0025] Switching elements 4a to 4f of the switching circuit 4 on / off based on PWM signals output from the control circuit 8, and set a gate resistance value Rgoff for turning off the switching elements 4a to 4f of the switching circuit 4 based on a gate resistance selection signal (Rg selection signal). Gate input units of the power converter device

[0026] Fig. 2 is a configuration diagram showing each gate input unit of the power converter device according to Embodiment 1. In Fig. 2, in particular, a configuration diagram is shown that focuses on the connection relationship between the control circuit 8 and the gate input unit 5a corresponding to the switching element 3a.

[0027] As in Fig. As shown in Figure 2, a PWM signal P5a output from the control circuit 8 to the gate input unit 5a is input to a totem pole type buffer circuit 11 formed, for example, of a PNP transistor and an NPN transistor. When the PWM signal P5a indicates ON, a current flows from a turn-on power supply 12 through a gate resistor Rgon to turn on, and then through the buffer circuit 11 to the switching element 3a, so that the switching element 3a is turned on.

[0028] In a case where the PWM signal P5a indicates OFF, a current flows from the switching element 3a to a turn-off power supply 15 through a gate resistance switching circuit 10 with the gate resistance value Rgoff for turning off, so that the switching element 3a is turned off. Consequently, an on / off operation of the switching element 3a is performed.

[0029] Also, the PWM signals P5b, P5c, P5d, P5e, P5f and the PWM signals P6a, P6b, P6c, P6d, P6e, P6f output from the control circuit 8 to the gate input units 5b to 5f and the gate input units 4a to 4f operate in the same manner as described above, so that the on / off operations of the switching elements 3b to 3f and the switching elements 4a to 4f are performed.

[0030] An Rg selection signal R5a output from the control circuit 8 performs a switching operation for the switches SW2, SW3, SW4, SW5 to adjust or set the gate resistance value Rgoff of the gate resistance switching circuit 10.

[0031] That is, the Rg selection signal R5a is a signal that indicates in time division duplex whether each of the switches SW2, SW3, SW4, SW5 should be turned on or off, and when the signal is input to a gate resistance determination unit 9, the gate resistance determination unit 9 divides the signal into signals for turning on or off the switches SW2 to SW5 and inputs these signals to the switches SW2 to SW5, so that it performs the turning on / off operations for the switches SW2 to SW5 with an arbitrary combination.

[0032] Then, the gate resistance switching circuit 10 sets the gate resistance value Rgoff for turning off the switching element 3a to a combined resistance value of the resistance values ​​of a resistor Rg1 and the resistors Rg2, Rg3, Rg4, Rg5 when they are turned on.

[0033] In Fig. 1, as shown by “Rg selection signal × 1”, the Rg selection signals R5a, R5b, R5c, R5d, R5e, R5f, R6a, R6b, R6c, R6d, R6e, R6f are adopted as one kind (common) to simplify the control. Here, since only the voltage (Vdc / 2) which is half the voltage (Vdc) of the DC power source 1 is applied to the switching elements 4a to 4f, the maximum surge voltage is low compared with that in the switching elements 3a to 3f, and in order to utilize a reserve for the surge voltage for loss reduction, it is conceivable that the gate resistance values ​​for turn-off in the gate input units 6a to 6f for the switching elements 4a to 4f are set to be smaller than the gate resistance values ​​for turn-off in the gate input units 5a to 5f for the switching elements 3a to 3f.

[0034] In this case, in particular Fig. 2 The following: Regarding the common Rg selection signals R5a to R5f and R6a to R6f transmitted to the gate input units 5a to 5f and the gate input units 6a to 6f, the resistance values ​​of the resistors Rg1 to Rg5 of the gate input units 5a to 5f and the resistors Rg1 to Rg5 of the gate input units 6a to 6f are changed, so that the above requirement is realized. Converter device and motor

[0035] The motor 7 is connected to the AC output ends of the inverter circuit 3 and operates with AC energy output from the inverter circuit 3. The motor 7 can be of any type. Fig. 1, a control device (not shown) calculates a torque command and a speed command, and the control circuit 8 controls the switching elements 3a to 3f and the switching elements 4a to 4f of the power converter device based on the torque command and the speed command, thus performing drive control for the motor 7. The control circuit 8 can also serve as the control device for generating the torque command and the speed command.

[0036] The control circuit 8 controls the switching elements 3a to 3f of the inverter circuit 3 and the switching elements 4a to 4f of the switching circuit 4. That is, the control circuit 8 controls the AC power to be output to the motor 7 based on the operating state information regarding the power converter device including the inverter circuit 3 and the switching circuit 4, the operating state information regarding the motor 7, and the command value information for the power converter device and the motor 7.

[0037] For example, the control circuit 8 detects the voltage of the DC power source 1, the voltages and currents of the capacitors 2a, 2b, and the temperatures of the inverter circuit 3 and the switching circuit 4, and detects the phase currents of the motor 7, rotation position information, and torque command speed command information (NT characteristics) from the motor 7. Based on the above information, the control circuit 8 controls the inverter circuit 3 and the switching circuit 4.

[0038] In addition, depending on the operating state information and the command value information regarding the motor 7 or the power conversion device (inverter circuit 3, switching circuit 4) that are predetermined in advance, the control circuit 8 appropriately sets the carrier frequency for the inverter circuit 3, the operating state, which is the 2-level operation or the 3-level operation, and the selection of the gate resistance value Rgoff in the gate resistance switching circuit 10, for example, by using an operating map defined based on the NT characteristics of the motor 7. The details will be described later. 2-level operation and 3-level operation of the power converter device

[0039] With reference to Fig. 3A and Fig. 3B describes the 2-level operation and the 3-level operation of the power converter device.

[0040] Fig. 3A and Fig. 3B schematically show the motor current for one phase, in a case where the converter device is operated with 2 levels, and in a case where the converter device is operated with 3 levels.

[0041] First, the 2-level operation is described with reference to Fig. 3A. In the 2-level operation of the power converter device described in the present embodiment, Fig. 1, the switching elements 4a to 4f of the switching circuit 4 are turned off, and the switching elements 3a to 3f of the inverter circuit 3 are turned on / off, so that in each phase, a positive voltage value and a negative voltage value of the total voltage of the capacitors 2a and 2b can be output to the motor 7.

[0042] By controlling the time ratio of the positive voltage and the negative voltage, three-phase sinusoidal voltages can be supplied to the motor 7. The 2-level operation is a general operation of a three-phase inverter device, and its detailed description is omitted.

[0043] Next, the 3-level operation is described with reference to Fig. 3B. Here, the operation of one phase is described. The operations for the remaining two phases are the same as those for the one phase, and therefore their repeated description is omitted.

[0044] First, a state will be described as an example in which the current flows from the power converter device to the motor 7. The description will start from a state in which the switching elements 3a, 3b and the switching elements 4a, 4b are turned off and a current flows through the diode connected in antiparallel to the switching element 3b and through the motor 7 in Fig. 1 rotates. From this state, the switching element 4b is turned on, while the switching elements 3a, 3b and the switching element 4a remain turned off, so that the current flows to the motor 7 through the switching element 4b and the diode connected antiparallel to the switching element 4a, namely through the voltage of the capacitor 2b.

[0045] While switching element 4b remains on, switching element 3a is turned on next (switching element 3b and switching element 4a remain off). Since switching element 4a blocks reverse current, no current flows through switching elements 4a, 4b, and the current flowing through motor 7 increases by the voltage of capacitors 2a and 2b connected in series.

[0046] In a case where the current to the motor 7 is reduced, the operation is performed by a procedure opposite to the above procedure, that is, while the switching element 4b remains on, the switching elements 3a, 3b, and the switching element 4a are turned off, and the current flows to the motor 7 by the voltage of the capacitor 2b, so that the current decreases. Finally, all the switching elements are turned off.

[0047] With the inverter circuit 3 and the switching circuit 4 operated as described above, the voltage of each switching element becomes the voltage of the capacitors 2a, 2b, that is, a voltage (Vdc / 2) that is half the voltage of the DC voltage source 1. Consequently, switching losses are reduced, and since the voltage for controlling the current is small, the current distortion becomes small.

[0048] Next, the case where a current flows from the motor 7 to the inverter circuit 3 is described.

[0049] First, switching element 4a is turned on, switching element 3b is turned on, and switching element 4b is turned off. Since switching element 4a blocks the current in the reverse direction, no current flows through capacitor 2b, and a current flows from motor 7 to switching element 3b and recirculates to motor 7.

[0050] Next, when the switching element 3b is turned off (the switching element 3a and the switching element 4b remain off), the current of the motor 7 flows to the capacitor 2b through the switching element 4a and the diode connected in antiparallel to the switching element 4b.

[0051] Next, when switching element 4a is turned off, the current of motor 7 flows through the diode connected in antiparallel to switching element 3a and then flows to capacitors 2a and 2b. After that, switching is performed using a procedure opposite to the above procedure, so that the operation is performed to reduce the current of motor 7. In the above example, the operation is described for one phase, but the same applies to the remaining phases, except that the phases are different.

[0052] When comparing the current waveforms of the motor phase currents in 2-level operation, shown in Fig. 3A, and in 3-level operation, shown in Fig. 3B, the current waveform in 2-level operation is distorted compared to the current waveform in 3-level operation. This is because the voltage used to generate the current is doubled when used in 2-level operation to control the current compared to that in 3-level operation.

[0053] Since current distortion increases in 2-level operation, there is the disadvantage that the harmonic iron losses of the motor increase. Furthermore, in 2-level operation, since the voltage is doubled during switching, there is the disadvantage that the switching losses in inverter circuit 3 increase.

[0054] Fig. Figure 4 shows schematically the details of the losses in the power converter device in 2-level operation and 3-level operation.

[0055] Here, in the circuit 4, the switching elements 4a and 4b which are connected in series, the switching elements 4c and 4d which are connected in series, and the switching elements 4e and 4f which are connected in series are called branches of the circuit 4.

[0056] Each branch (e.g., the branch consisting of switching elements 4a and 4b) of circuit 4 is formed by two switching elements connected in series. Therefore, when a current flows through circuit 4, conduction losses occur in the switching element that is switched on (e.g., switching element 4a) and conduction losses occur in the diode connected in antiparallel to the other switching element (e.g., switching element 4b).

[0057] Consequently, the conduction losses in the power converter device become larger in the 3-level operation using the switching circuit 4. However, as described above, the following applies: Compared with the 2-level operation, in the 3-level operation, the voltage applied to the inverter circuit 3 is halved, so that switching losses and recovery losses are significantly reduced, resulting in a reduction in the overall losses of the power converter device.

[0058] Meanwhile, in the power converter device capable of 3-level operation, it is necessary to add the circuit 4 and increase the capacitor capacitance (series connection of the two capacitors 2a, 2b), so that the volume of the power converter device increases.

[0059] In order to maximize the loss of the power converter device while minimizing the volume increase of the power converter device capable of 3-level operation, the 2-level operation and the 3-level operation are switched according to the current value of the power converter device. That is, the 3-level operation is used in a frequently used range not greater than a current threshold, and the 2-level operation is used in a current range greater than the current threshold. Consequently, since only a current not greater than the predetermined current threshold flows through the switching circuit 4, the sizes of the switching elements 4a to 4f, which are generally determined by the current value, are reduced, so that a significant volume increase in the power converter device can be suppressed.

[0060] In fact, in the case of application to an electric vehicle, the loss value is specified by the fuel consumption in a Worldwide Harmonized Light Vehicle Test Cycle (WLTC) mode (a mode in which driving modes such as urban, suburban, and highway are distributed with an average usage time ratio), which is an international test procedure. Most of the times specified in the WLTC mode use a range where the torque is sufficiently lower than the motor's performance limit torque.

[0061] That is, in order to maximally reduce the fuel consumption in WLTC mode (the losses) while minimizing the volume increase in the power converter device, the level operation is switched so that the 3-level operation is only performed in a current range that prevails at most of the times specified in WLTC mode.

[0062] More precisely: Fig. Figure 5 shows time series data, where the vertical axis of the WLTC mode driving pattern is replaced by the current value for simplicity, and the horizontal axis indicates time. Fig. 5, a minimum value, a value A, a value B and a maximum value (minimum value < value A < value B < maximum value) are shown as current values ​​for the switching level operation.

[0063] Fig. Figure 6 shows an example of the total losses when the WLTC mode driving has been completed while the current value for level operation switching is changed, as the entire range, value A and value B in Fig. 5.

[0064] Fig. Figure 7 shows an example in which the volume of the power converter device is expressed while the current value for level operation switching is changed, as the entire area, value A and value B in Fig. 5, as in Fig. 6.

[0065] In Fig. 6 and Fig. 7, condition 1 is the case where the 2-level operation is carried out over the entire current range. In this condition, the losses in the converter device, which are Fig. 6 is large, but since the circuit 4 is not needed, the volume of the converter device shown in Fig. 7 is shown, small.

[0066] Condition 2 is the case where the 3-level operation is performed in a range where the current is 0 to the value A (where the value A is the upper limit of the current range that prevails most of the times in the WLTC mode driving pattern and is greater than 0), and the 2-level operation is performed in a range where the current is not less than the value A. In this condition, the following applies: Compared with Condition 1, the 3-level operation is performed most of the time, and therefore the losses in the power converter device used in Fig. 6, and the volume of the converter device, which is shown in Fig. 7, increases as a result of the added circuit 4.

[0067] Condition 3 is the case where the 3-level operation is performed in a range where the current is 0 to the value B (A < B), and the 2-level operation is performed in a range where the current is not less than the value B. In this condition, the time during which the 3-level operation is performed is not much different from that in Condition 2, and therefore the losses in the power converter device used in Fig. 6 is slightly reduced compared to condition 2. However, due to the increase in the current value flowing in the circuit 4, the size of the circuit 4 increases, so that the volume of the power converter device increases, which in Fig. 7 is shown.

[0068] Condition 4 is the case where the 3-level operation is carried out over the entire current range. In this condition, the effect of reducing the losses in the power converter device, which is Fig. 6, but the loss reduction compared to condition 2 is only small. Meanwhile, the maximum current corresponding to the maximum torque of the motor 7 flows through the circuit 4. Therefore, the size of the circuit 4 increases, so that the volume of the power converter device used in Fig. 7, increases maximally.

[0069] As described above, considering the relationship between the amount of loss reduction in the power converter device and the amount of volume increase in the power converter device, the current threshold for switching the level operation is set to, for example, the value A, as in Condition 2. Alternatively, an upper limit current value (level switching threshold) for the 3-level operation may be determined according to the volume of the switching elements of the switching circuit 4. The control circuit 8 performs switching between the 2-level operation and the 3-level operation based on the current value determined in advance as described above.

[0070] Since the ratio of switching losses, conduction losses, and recovery losses in the losses (inverter losses) of the power converter device changes according to the speed of the motor 7, the switching of the operating level can also be determined according to the motor operating point instead of the current value.

[0071] That is, from a torque command, a speed command, and the voltage of the DC power source, the losses in the converter and motor in 2-level operation and 3-level operation, as well as the volume of the converter, are calculated, so that the threshold for operating level switching is determined on a speed-torque map (NT map) that indicates the speed and torque characteristics of the motor. The calculation method for the losses can be any method.

[0072] For example, a formula for calculating the losses in the inverter circuit in each of the 2-level operation and the 3-level operation from a torque command or a speed command (where the gate resistance value Rgoff for turning off is selected so that the surge voltage between both level operations becomes the same) may be used, or an operation table prepared in advance based on the actually measured data or the like may be used.

[0073] In a case where the inverter losses are calculated, a motor phase current, a modulation factor for switching the inverter circuit 3, a carrier frequency, and a power factor are calculated from a torque command and a speed command for the motor, and then the inverter losses in each of the 2-level operation and the 3-level operation can be calculated from the above calculated values, the switching loss (single pulse) data for each gate resistance value Rgoff for turning off, and the detected voltage of the DC power source.

[0074] Alternatively, the switching circuit 4 may be designed with a volume (size) corresponding to the maximum current in the motor specifications, and focusing solely on loss reduction, the control circuit 8 may switch the level operation so as to select, at any time, one of the 2-level operation and the 3-level operation exhibiting the smaller total losses, based on the total losses in the inverter circuit 3 in each of the 2-level operation and the 3-level operation calculated as described above. Change in the switching speed of the power converter device

[0075] In the present embodiment, in addition to switching the operating level as described above, the switching speeds of the switching elements are changed to further reduce losses. Specifically, the gate resistance Rgoff for turning off the switching element is switched to reduce losses.

[0076] By setting the gate resistance value Rgoff for turning off in a range where the surge voltage that occurs when the switching element is turned off does not exceed the withstand voltage of the switching element, the switching speed is increased so that the switching loss can be reduced.

[0077] Typically, in a system where an input / output operating condition (current, voltage, temperature, etc.) varies from time to time, a gate resistance value is set so that the surge voltage does not exceed the allowable voltage in the worst case operating range.

[0078] In the present embodiment, even in an environment where an input / output operating condition varies, switching of the gate resistance value for turning off is performed to minimize the loss while monitoring the surge voltage.

[0079] More specifically, in each fundamental period of the AC output of the power converter device, the maximum surge voltage in the period is detected, and it is confirmed whether the maximum surge voltage is within a range (VY to VX) between an allowable upper surge limit voltage VY, which is determined by considering design factors such as the switching element withstand voltage, fluctuations, and voltage detection accuracy, and an allowable lower surge limit voltage VX, which is set within a certain maximum surge voltage target range from the allowable upper surge limit voltage VY.

[0080] In a case where the maximum surge voltage is in the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY, it is determined that an optimal gate resistance value Rgoff for turn-off has been selected, and the gate resistance value Rgoff for turn-off is not changed.

[0081] In a case where the maximum surge voltage is smaller than the allowable lower surge limit voltage VX, it is determined that there is room for further loss reduction, and consequently, the gate resistance value Rgoff for turn-off is set to be 1 step smaller, that is, the switching speed is set to be 1 step faster.

[0082] In a case where the maximum surge voltage is not less than the allowable upper surge limit voltage VY, there is a risk of the switching element failing because the allowable upper surge limit voltage VY is exceeded. Therefore, the gate resistance value Rgoff for turn-off is set to be 1 level higher, that is, the switching speed is set to be 1 level slower.

[0083] To reliably eliminate the risk of switching element malfunction, the gate resistance value Rgoff for turn-off can be set to a maximum value within a preset range, rather than changing it in one step. To eliminate the risk more quickly, a determination of whether or not the maximum surge voltage is equal to or greater than the allowable upper surge limit voltage VY can be made in a control loop with a shorter cycle or period, rather than every fundamental period of the AC output.

[0084] Here, the gate resistance Rgoff for switching off can be implemented by the circuit shown in Fig. 2, as described above. Although it is described that the gate resistance value Rgoff for turn-off is changed based on 1 step, the following applies: For example, if the maximum surge voltage is significantly lower than the allowable lower surge limit voltage VX, the gate resistance value Rgoff for turn-off can also be changed in 2 steps or 3 steps according to the separation width between the two values. Furthermore, the gate resistance value Rgoff for turn-off can be specified by calculating it from the input voltage or load operating point, taking into account the switching element characteristics or a required switching speed (di / dt).

[0085] Changing the switching speed to minimize switching losses as described above can be implemented by changing the gate voltage, changing a buffer capacitance (current supply value), or the like, instead of changing the gate resistance value Rgoff for turning off.

[0086] To change the gate voltage, the turn-off power supply 15, which is located in Fig. 2, is configured to allow a change in the power supply voltage. When the surge voltage generated across the switching element or across a plurality of capacitors shows a margin with respect to the allowable surge voltage, the voltage of the turn-off power supply 15 is changed toward the higher voltage side. As a method for changing the turn-off power supply 15, the desired power supply voltage can be selected by a switch from a plurality of different prepared power supply voltages, for example, based on command information from the control circuit 8.

[0087] To change the buffer capacity (current supply value), for example, the buffer circuit 11 in Fig. 2 is configured to allow a change in the number of stages thereof, and when the surge voltage generated across the switching element or across a plurality of capacitors shows a margin with respect to the allowable surge voltage, the number of stages of the buffer circuit 11 is increased.

[0088] For example - as in Fig. 15, the buffer circuit 11 is formed by a plurality of stages of buffer circuits 11a, 11b, 11c, ..., 11N, and is configured so that a switch a or a switch b of each of the switches SW1, SW2, SW3, ... of the buffer circuits 11a, 11b, 11c, ... is turned on / off. Then, based on command information from the control circuit 8, the switch a or the switch b described above is turned on / off, so that the number of stages of the buffer circuit can be switched to a desired number.

[0089] For example, in the case of Fig. 15 The following: When switch a is off and switch b is on for all switches SW1, SW2, SW3, ..., the buffer circuit 11N is selected in one stage. When switch a is on and switch b is off for all switches SW1, SW2, SW3, ..., the buffer circuits 11a, 11b, 11c, ..., 11N are selected in the maximum number of stages.

[0090] Here, as a method for monitoring the maximum surge voltage in one period, for example, high-speed sampling and sample-and-hold function by an A / D converter provided on a microcomputer can be used.

[0091] Alternatively, the maximum surge voltage can be obtained by charging a separately arranged control capacitor with a control voltage corresponding to a voltage detected by the capacitors 2a, 2b in an analog manner (the control capacitor is discharged after being used for detecting the maximum surge voltage and selecting the gate resistance value Rgoff).

[0092] A determination time for calculating the maximum surge voltage in one period can be determined based on the phase of the phase current or a current detection value.

[0093] In a state where the switching speed is increased (the gate resistance Rgoff is set to a small value), until the maximum surge voltage generated across the switching element falls within the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY, in order to minimize losses in 3-level operation, the following applies: When the operation is switched to 2-level operation, the voltage applied to the switching element is doubled. Consequently, the maximum surge voltage generated across the switching element exceeds the allowable upper surge limit voltage VY, and therefore there is a risk of the switching element failing.

[0094] Accordingly, in the present embodiment, the gate resistance value for turning off is changed to a large value before switching from the 3-level operation to the 2-level operation, so that the surge voltage generated across the switching element is suppressed and consequently a malfunction of the switching element due to the surge voltage is prevented while minimizing the loss in the power conversion device. Control of the power converter device

[0095] Fig. 8 is an operational conceptual diagram showing features for controlling the power conversion device according to the present embodiment.

[0096] With reference to Fig. 8 describes the operation for implementing switching of the operating level of the power converter device and switching of the gate resistance value Rgoff for turning off.

[0097] In the present embodiment, the switching of the operating level and the switching of the gate resistance value Rgoff are performed in a control interval that is the fundamental period of the output current of the power converter device. Fig. 8, A1 shows the U-phase current Iu of the inverter circuit 3, and the switching of the operating level and the switching of the gate resistance value Rgoff are performed in a peak value range of the U-phase current Iu.

[0098] In Fig. 8, the switching of the operating level and the switching of the gate resistance value Rgoff are described for the U-phase current Iu of the power conversion device, but the same also applies to the V-phase current Iv and the W-phase current Iw of the power conversion device, and their description is omitted.

[0099] In Fig. 8, A2 shows a graph for explaining the switching between 3-level operation and 2-level operation.

[0100] In A2 in Fig. 8, a level switching threshold for switching from 3-level operation to 2-level operation is denoted by Lvth3-2, and a level switching threshold for switching from 2-level operation to 3-level operation is denoted by Lvth2-3.

[0101] As in A2 in Fig. 8, a current command value (effective value) Iu(rms)* is present for the power converter device, and when the 3-level operation is currently performed, it is determined whether the power converter device should be operated in the 2-level operation or in the 3-level operation from the present 3-level operation by a comparison between the current command value Iu(rms)* and a predetermined level switching threshold value Lvth3-2.

[0102] When the 2-level operation is currently being performed, it is determined whether the power converter device should be operated in the 3-level operation or in the 2-level operation from the present 2-level operation by a comparison between the current command value Iu(rms)* and a predetermined level switching threshold value Lvth2-3.

[0103] In the example according to A2 in Fig. 8 shows the case where the 3-level operation is currently performed and the power converter device is switched from the 3-level operation to the 2-level operation based on a comparison between the current command value Iu(rms)* and the level switching threshold value Lvth3-2.

[0104] As per A2 in Fig. 8, when the current command value Iu(rms)* crosses the level switching threshold Lvth3-2, it is determined that the operation should be switched from the 3-level operation to the 2-level operation (an upward-pointing arrow shown with the solid line D represents the switching from the 3-level operation to the 2-level operation, and in the solid line D, “low” indicates the 3-level operation, and “high” indicates the 2-level operation).

[0105] If it is determined that the operation should be switched from 3-level operation to 2-level operation, then first the gate resistance value for turning off (in Fig. 8 the gate resistance value Rgoff16), which has been used in 3-level operation and is comparatively small, to the largest value (in Fig. 8 the gate resistance value Rgoff1) is changed within a preset range, as in A4 in Fig. 8 shown.

[0106] More precisely: In the gate resistance switching circuit 10, which is Fig. As shown in Figure 2, the gate resistance for turn-off is changed from the gate resistance Rgoff16, which is realized by turning on all switches SW2 to SW5, to the gate resistance Rgoff1, which is realized by turning off all switches SW2 to SW5. Here, Rgoff1 >> Rgoff16 is satisfied.

[0107] After the gate resistance value Rgoff is set to the largest value (in Fig. 8: Gate resistance value Rgoff1) has been changed, next, a reduction in the slope of the gate voltage when the switching element is turned off, a decrease in the gate current value, or a reduction in the surge voltage is monitored, so that it is confirmed that the gate resistance value Rgoff for turning off has indeed changed to a large value.

[0108] After the change according to the result of changing the gate resistance value Rgoff to turn off the switching element to the largest value (change such as a reduction in the slope of the gate voltage) is confirmed, the operation level of the power converter device is changed from 3-level operation to 2-level operation by a period E as shown in A3 in Fig. 8 shown.

[0109] In this way, the gate resistance value Rgoff is changed from a small value to a large value for turning off, before switching the operating level from 3-level operation to 2-level operation.

[0110] That is, in a state where - in 3-level operation - the gate resistance value for switching off is chosen to be a comparatively small value (Rgoff16 in Fig. 8), which is set so that the maximum surge voltage essentially assumes the allowable surge voltage, the following applies: When the operation is switched to 2-level operation, the voltage across the switching element of the inverter circuit 3 doubles, so that the allowable surge voltage for the voltage of the switching element is exceeded (with a dotted line H in A5 in Fig. 8), resulting in a risk of the switching element failing. However, by performing control as described in the present embodiment, it is possible to prevent a malfunction or failure of the switching element and minimize losses.

[0111] Here a thin solid line in A5 in Fig. 8 indicates the voltage (instantaneous value) Va of the switching element 3a, and a thick solid line indicates the voltage maximum value (branch voltage maximum value) Vmaxa, which is a held maximum value of the voltage Va of the switching element 3a.

[0112] Similarly, a thin solid line in A6 gives Fig. 8 indicates the voltage (instantaneous value) Vb of the switching element 3b, and a thick solid line indicates the voltage maximum value (branch voltage maximum value) Vmaxb, which is a held maximum value of the voltage Vb of the switching element 3b.

[0113] The branch voltage maximum values ​​Vmaxa, Vmaxb can be obtained, for example, by a configuration in which the maximum values ​​of the voltages (instantaneous values) Va, Vb are held using software in the control circuit 8, or a configuration in which a capacitor (hardware) is used and charged with the maximum voltages of the voltages (instantaneous values) Va, Vb. The branch voltage maximum values ​​Vmaxa, Vmaxb are reset to zero at the same time as the operating level switching.

[0114] A7 in Fig. 8 shows switching on / off operations of the switching elements 3a, 3b, 4a, 4b.

[0115] In the representation according to Fig. 8, the determination for switching the operating level is based on the current command value Iu(rms)*. However, instead of the current command value Iu(rms)*, a determination criterion calculated from a pre-prepared table can also be used, along with the motor speed or required torque. Furthermore, the determination can be made based on a loss calculation result in 2-level operation and 3-level operation according to the motor speed or torque.

[0116] In the present embodiment, in the 3-level operation, it is determined whether or not the switching of the operation level is performed by comparison between the current command value Iu(rms)* and the level switching threshold value Lvth3-2, and in the 2-level operation, it is determined whether or not the switching of the operation level is performed by comparison between Iu(rms)* and the level switching threshold value Lvth2-3.

[0117] In this case, these level switching thresholds satisfy the following inequality: (Level switching threshold Lvth3-2) > (Level switching threshold Lvth2-3). Consequently, a hysteresis is present between the level switching thresholds Lvth3-2 and Lvth2-3 according to the existing operating level, so that frequent operating level changes can be avoided.

[0118] In the above description, in order to reduce the volume (size) of the power converter device as much as possible according to the current value, a current smaller than the level switching threshold is specified in 3-level operation, and a current not smaller than the level switching threshold is specified in 2-level operation. However, in a case where the volume (size) of the power converter device is not considered, a current smaller than the level switching threshold can also be specified in 2-level operation, and a current not smaller than the level switching threshold can be specified in 3-level operation. Consequently, the surge voltage can be suppressed in a current peak range of a sine wave where the surge voltage becomes large, so that the gate resistance for turning off can be reduced in a wide current range, resulting in further loss reduction. Specific control flow chart in power converter device

[0119] Fig. 9, Fig. 10 and Fig. 11 shows specific examples of control flowcharts in the power converter device of the present embodiment, and the control flowcharts are described below. Here, the control of the power converter device capable of two-level switching between two-level operation and three-level operation is described as an example, and the control flowcharts are performed in each fundamental period of the AC output of the power converter device.

[0120] In Fig. 9, the control flow is executed from START. In step S1, it is determined whether the current operating level is 2-level operation or 3-level operation based on the operating condition described above. Furthermore, in step S1, a surge voltage maximum value is detected in the fundamental period of the AC output. That is, the branch voltage maximum values ​​Vmaxa, Vmaxb, which are indicated by the thick solid lines in A5 and A6 in Fig. 8 are detected.

[0121] In step S2, to confirm whether or not the time has come to change the operating level from 3-level operation to 2-level operation, it is first determined whether or not the previous operating level was 3-level operation. If the previous operating level was 3-level operation (YES), step S3 is executed, and if the previous operating level was 2-level operation (NO), step S4 is executed. Fig. 11 executed.

[0122] In step S4 in Fig. 11: Since the previous operating level was 2-level operation, there is no risk that the surge voltage will exceed the allowable upper surge limit voltage VY when the operating level is changed, and the gate resistance value optimization control for turn-off continues. That is, in step S4, it is confirmed whether or not the maximum surge voltage value is within the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY.

[0123] If the maximum surge voltage value is within the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY (YES), an optimal gate resistance value Rgoff for turn-off is selected, and therefore the current gate resistance value Rgoff for turn-off is maintained (step S19). Then, the operation is performed at the current operation level determined in step S1 (step S20), and thus the current cycle or period ends.

[0124] On the other hand, in step S4, if the surge voltage maximum value is not in the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY (NO), it is determined whether the surge voltage maximum value is smaller than the allowable lower surge limit voltage VX or larger than the allowable upper surge limit voltage VY.

[0125] That is, in step S21, it is confirmed whether the maximum surge voltage is less than the allowable lower surge limit voltage VX. If the maximum surge voltage is less than the allowable lower surge limit voltage VX (YES), it is determined that there is room for further loss reduction, and the gate resistance value Rgoff for turn-off is reduced. If the gate resistance value Rgoff for turn-off is already set to the minimum value, the gate resistance value Rgoff for turn-off cannot be further minimized.

[0126] Therefore, in step S22, it is confirmed whether or not the current gate resistance value Rgoff for turn-off has been set to the minimum value. If the gate resistance value Rgoff for turn-off is not minimum in step S22 (YES), the gate resistance value Rgoff for turn-off is decreased by one step (step S23), and the operation is performed at the current operation level determined in step S1 (step S20). Thus, the current cycle ends.

[0127] Again, if the gate resistance value Rgoff for turn-off is the minimum value in step S22 (NO), the gate resistance value Rgoff for turn-off cannot be further decreased. Therefore, the gate resistance value Rgoff for turn-off is set to the minimum value, which is the same as the current value (step S24), and the operation is performed at the current operation level determined in step S1 (step S20). Thus, the current cycle ends.

[0128] If NO in step S21, the maximum surge voltage is greater than the allowable upper surge limit voltage VY, and consequently, there is a risk of malfunction of the switching element. Therefore, the gate resistance value Rgoff for turn-off is set to be large. Here, if the gate resistance value Rgoff for turn-off is already set to the maximum value, the gate resistance value Rgoff for turn-off cannot be further maximized.

[0129] Therefore, in step S25, it is confirmed whether or not the current gate resistance value Rgoff for turn-off has been set to the maximum value. If the gate resistance value Rgoff for turn-off is not maximum in step S25 (YES), the gate resistance value Rgoff for turn-off is increased by one step (step S26), and the operation is performed at the current operation level determined in step S1 (step S20). Thus, the current cycle ends.

[0130] Again, if the turn-off gate resistance Rgoff is maximum in step S25 (NO), the turn-off gate resistance Rgoff cannot be increased any further. Therefore, the turn-off gate resistance Rgoff is set to the maximum value, which is the same as the current value (step S27), and the operation is performed at the current operation level determined in step S1 (step S20). Thus, the current cycle ends.

[0131] At this time, the gate resistance value Rgoff for turn-off has already reached its maximum value, and the allowable upper surge limit voltage VY is exceeded. Therefore, to prevent malfunction or failure of the switching element, measures such as transmitting the current state to a host system or limiting the output power (current) can be taken.

[0132] With further reference to Fig. 9, the following applies here in step S3: Since the previous operating level was the 3-level operation (step S2), it is necessary to confirm whether or not the current operating level is the 2-level operation in order to confirm whether or not the time to switch from the 3-level operation to the 2-level operation has arrived. That is, if the current operating level is the 2-level operation in step S3 (YES), step S5 is executed, and if the current operating level is the 3-level operation (NO), step S9 is executed in Fig. 10 executed.

[0133] In step S9 in Fig. 10, since both the previous operating level and the current operating level are 3-level operation, there is no risk of malfunction or failure of the switching element due to a surge voltage during operating level switching, and the optimization control for the gate resistance value for turn-off continues. That is, in step S9, it is confirmed whether or not the maximum surge voltage value is within the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY.

[0134] If the maximum surge voltage value is within the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY (YES), an optimal gate resistance value Rgoff for turn-off is selected, and therefore the current gate resistance value Rgoff for turn-off is maintained (step S10). Then, the 3-level operation is also performed at this time as determined in step S1 (step S11), thus ending the current cycle.

[0135] On the other hand, if the maximum surge voltage value is not within the range between the allowable lower surge limit voltage VX and the allowable upper surge limit voltage VY in step S9 (NO), it is determined in step S12 whether the maximum surge voltage value is less than the allowable lower surge limit voltage VX or greater than the allowable upper surge limit voltage VY. That is, in step S12, it is confirmed whether or not the maximum surge voltage value is less than the allowable lower surge limit voltage VX.

[0136] If the maximum surge voltage is less than the allowable lower surge limit voltage VX (YES), it is determined that there is room for further loss reduction, and the gate resistance value Rgoff for turn-off is reduced. If the gate resistance value Rgoff for turn-off is already set to the minimum value, the gate resistance value Rgoff for turn-off cannot be further minimized. Therefore, in step S13, it is confirmed whether or not the current gate resistance value Rgoff for turn-off has not been set to the minimum value.

[0137] If the gate resistance value Rgoff for turn-off is not minimum in step S13 (YES), the gate resistance value Rgoff for turn-off is decreased in one step (step S14). Then, the 3-level operation continues (step S11), thus ending the current cycle.

[0138] Again, if the gate resistance value Rgoff for turning off is the minimum value in step S13 (NO), the gate resistance value Rgoff cannot be further decreased. Therefore, the gate resistance value Rgoff is set to the minimum value, which is the same as the current value (step S15), and the 3-level operation continues (step S11). Thus, the current cycle ends.

[0139] In step S12, if the maximum surge voltage value is greater than the allowable upper surge voltage limit VY (NO), there is a risk of malfunction of the switching element, and therefore the gate resistance value Rgoff for turn-off is set to a large value. If the gate resistance value Rgoff for turn-off is already set to the maximum value, the gate resistance value Rgoff for turn-off cannot be further maximized.

[0140] Therefore, in step S16, it is confirmed whether or not the current gate resistance value Rgoff for turn-off has not been set to the maximum value. If the gate resistance value Rgoff for turn-off is not the maximum value in step S16 (YES), the gate resistance value Rgoff for turn-off is increased by one step (step S17). Then, the 3-level operation continues (step S11), and thus the current cycle ends.

[0141] Again, if the gate resistance value Rgoff for turn-off is the maximum value in step S16 (NO), the gate resistance value Rgoff for turn-off cannot be increased any further. Therefore, the gate resistance value Rgoff for turn-off is set to the maximum value, which is the same as the current value (step S18). Then, the operation is performed at the current operation level determined in step S1 (step S11), and thus the current cycle or period ends.

[0142] At this time, the gate resistance value Rgoff for turn-off has already reached its maximum value, and the allowable upper surge limit voltage VY is exceeded. Therefore, to prevent malfunction or failure of the switching element, measures such as transmitting the current state to a host system or limiting the output power (current) can be taken.

[0143] With further reference to Fig. 9, in step S5, since the previous operating level was 3-level operation (step S2) and the current operating level is 2-level operation (YES in step S3), if the 2-level operation is performed using the gate resistance value Rgoff optimally set in 3-level operation, there is a risk of excessive surge voltage occurring across the switching element. Therefore, in step S5, the gate resistance value Rgoff for turn-off is set to the maximum value.

[0144] If switching to 2-level operation occurs at the same time as the gate resistance value Rgoff is changed to turn off, a 2-level switching operation will be performed before the gate resistance value Rgoff is fully switched. Consequently, an excessive surge voltage will occur at the switching element, posing a risk of switching element failure.

[0145] Therefore, switching to 2-level operation is not performed until the switching of the gate resistance value Rgoff is completed.

[0146] In step S6, taking into account the switching speed of the switches SW of the gate resistance switching circuit 10, the process waits until a period of time (e.g., 1 µs) sufficient to complete the switching has elapsed, and then proceeds to step S7.

[0147] In step S7, the switching speed at the previous turn-off and the switching speed at the current turn-off after the gate resistance value Rgoff has been maximized are compared to confirm whether or not the switching speed has been reduced by a certain value or more.

[0148] If the switching speed has been reduced by a certain value or more in step S7 (YES), it is determined that the change of the gate resistance Rgoff to the maximum value is complete. Then, the process proceeds to step S8, and switching to the 2-level operation is performed.

[0149] In turn, if the switching speed has not been reduced by a certain value or more in step S7 (NO), it is determined that the gate resistance value Rgoff has not yet been changed to the maximum value, and therefore a certain delay in step S6 and then the determination in step S7 are continued until the gate resistance value Rgoff becomes the maximum value.

[0150] If the gate resistance value Rgoff for turn-off was already at its maximum during the previous switching, the gate resistance value Rgoff cannot be increased any further. Therefore, a comparison of the switching speeds during turn-off is not performed, and the process proceeds to step S8, switching to 2-level operation.

[0151] In step S7, the completion of switching the gate resistance value Rgoff for turn-off is determined based on the change in the switching speed during turn-off. However, another method may be used as long as it can be confirmed that the gate resistance value Rgoff has been completely switched.

[0152] For example, complete switching may be determined based on the fact that, following a switching speed change instruction, the slope of the gate voltage applied to the gate terminal of the switching element has changed by a certain value or more, or the gate current of the switching element has changed by a certain value or more, or the maximum value of the surge voltage generated across the switching element or across a plurality of capacitors has changed by a certain value or more.

[0153] By performing the switching of the operating level and the switching of the gate resistance value for turning off by the above control procedure, it is possible to perform control for minimizing the losses within a range where the maximum surge voltage does not exceed the allowable surge voltage.

[0154] In the above description, the method is described in which the control circuit 8 performs switching between 2-level operation and 3-level operation and also performs switching of the gate resistance value for turn-off, so that the losses in the power converter device are minimized. However, the switching between 2-level operation and 3-level operation and the switching of the gate resistance value for turn-off can also be performed in such a way that the total losses, including the losses in the power converter device and the losses in the motor, are minimized.

[0155] In addition to switching between 2-level and 3-level operation and switching the gate resistance value for turn-off, control can be performed to change the carrier frequency to control the operation of the inverter circuit. As described above, in 3-level operation, current distortion is reduced, thus reducing motor iron losses. As the carrier frequency is reduced, current distortion increases, and therefore motor iron losses also increase, but losses in the power converter device are reduced. Consequently, depending on the condition, total losses can be reduced. Therefore, in a case where the speed command is equal, the

[0156] The carrier frequency in 3-level operation must be specified so that it is not higher than the carrier frequency in 2-level operation. This means that if the carrier frequency in 2-level operation is designated fx_2lv and the carrier frequency in 3-level operation is designated fx_3lv, the carrier frequencies are specified so that they satisfy the following: fx_2lv≥fx_3lv.

[0157] Fig. Figure 12 is a graph schematically mapping the 2-level operation and 3-level operation of the power converter device (inverter circuit) and the carrier frequency to the speed and torque characteristics of the motor. In a case where the motor speed command is the same, the following applies: When the torque command (or current command) is not less than a predetermined threshold, the control circuit 8 switches to 2-level operation, and when the torque command (or current command) is less than the predetermined threshold, the control circuit 8 switches to 3-level operation.

[0158] Here, the predetermined threshold value is a threshold value that is set in advance, for example, based on calculation results of the loss value and the volume value in the power converter device as described above. In the example shown in Fig. 12, one threshold is provided. However, a plurality of thresholds may be provided for hysteresis control so that the operation is stabilized. For example, as the threshold for performing switching between the 2-level operation and the 3-level operation according to the torque command, different thresholds are provided for the case of increasing the torque command and the case of decreasing the torque command.

[0159] In addition, if the threshold value in a case of increasing is set to be larger than the threshold value in a case of decreasing, it is possible to prevent the switching between the 2-level operation and the 3-level operation from being performed unnecessarily, and thus the operation is stabilized.

[0160] In the operating map, which is Fig. As shown in Figure 12, the carrier frequency is also changed according to the motor speed command. Regarding the carrier frequency setting, in 3-level operation, the motor current distortion is reduced, and therefore, harmonic iron losses are reduced compared to 2-level operation. Since the switching losses and switching frequency in the inverter circuit are proportional, lowering the frequency enables use with reduced inverter losses, although this has a trade-off with the high-frequency iron losses of the motor. Consequently, the carrier frequency is a parameter that causes a contradiction between the inverter circuit and the motor, and it is necessary to perform the setting in such a way as to minimize the total losses of the inverter circuit and the motor while ensuring controllability.

[0161] Typically, in a region where the speed is high, the harmonic iron losses of the motor dominate the losses in the motor system. Therefore, the carrier frequency can be increased as the speed decreases. In the Fig. Therefore, in the example shown in Figure 10, the carrier frequency is changed in three steps according to the rotational speed, and the following is satisfied: fl_3lv < f2_3lv < f3_31v.

[0162] Not only the torque command or the speed command, but also another parameter can be used to calculate the losses in the inverter circuit and the motor in 2-level operation and 3-level operation. For example, in addition to the torque command or the speed command, the voltage of the DC power source and the temperature of the power converter device can be used. An operation table associated with at least one of the DC power source voltage and the temperature of the power converter device can be stored, and the losses of the power converter device and the motor can be calculated based on the operation table. Configuration of the other converter device

[0163] In the converter device, which is in Fig. As shown in Figure 1, a circuit 4 for performing the 3-level operation is formed using a metal-oxide-semiconductor field-effect transistor (MOSFET) with an antiparallel diode between source and drain. As shown in Fig. 13, however, a circuit 4B formed using a reverse blocking type insulated gate bipolar transistor (IGBT) may also be used.

[0164] The circuit 4B of the power converter device, which is Fig. 13, includes switching elements 14a, 14b, 14c, 14d, 14e, and 14f, which are reverse-blocking IGBTs. Switching element 14a and switching element 14b, switching element 14c and switching element 14d, and switching element 14e and switching element 14f are connected in parallel in opposite directions.

[0165] One end of the switching circuit 4B is connected to the first connection point of the capacitor series circuit 2, and the remaining ends are connected to the second, third, and fourth connection points. Here, 16a, 16b, 16c, 16d, 16e, and 16f denote gate input units for the switching elements 14a, 14b, 14c, 14d, 14e, and 14f. The remaining configurations are the same as in the power converter device shown in Fig. 1 is shown.

[0166] The converter device, which, as in Fig. 13, also shows the same operations and effects as in the converter device shown in Fig. 1 is shown. Effects of Embodiment 1

[0167] As described above, according to Embodiment 1, the power converter device comprises: a capacitor series circuit comprising a plurality of capacitors connected in series and having both ends connected to both ends of a DC voltage source; an inverter circuit in which a plurality of legs, each having a plurality of switching elements connected in series, are connected in parallel, and whose DC input ends are connected to the two ends of the capacitor series circuit and whose AC output ends are connected to a load; a switching circuit having a plurality of switching elements and one end of which is connected to a connection point between the plurality of capacitors and the other ends of which are connected to a plurality of connection points between the switching elements of the inverter circuit; and a control circuit that controls the inverter circuit and the switching circuit, wherein the inverter circuit is capable of performing a 2-level operation by turning off the switching elements included in the circuit and of performing a 3-level operation by turning on / off the switching elements included in the circuit, and in a case where switching of an operating level between the 2-level operation and the 3-level operation is performed, the control circuit changes the switching speeds of the switching elements of the inverter circuit and the switching circuit.

[0168] Consequently, it is possible to provide a power conversion device that does not pose a risk of malfunction of the switching elements, even when switching the operating level.

[0169] When switching from 3-level operation to 2-level operation, the control circuit reduces the switching speeds of the switching elements. Consequently, the surge voltage can be kept within the allowable range, eliminating the risk of malfunction of the switching elements.

[0170] Before switching the operating level between 3-level operation and 2-level operation, the control circuit changes the switching speeds of the switching elements. Consequently, the surge voltage can be safely kept within the allowable range, eliminating the risk of malfunction of the switching elements.

[0171] After a change in the switching speed of the switching elements is instructed, the control circuit waits for a certain period of time and then switches the operating level between 3-level operation and 2-level operation. Consequently, the surge voltage can be safely kept within the allowable range, eliminating the risk of malfunction of the switching elements.

[0172] After a change instruction for the switching speeds of the switching elements is issued, the control circuit confirms the change processing for the switching speeds based on the changes in the switching speeds of the switching elements. Consequently, it is possible to safely keep the surge voltage within the allowable range.

[0173] After a change instruction for the switching speeds of the switching elements is issued, the control circuit confirms the switching speed change processing based on the fact that the slope of the gate voltage applied to a gate terminal of each switching element has changed. Consequently, it is possible to safely keep the surge voltage within the allowable range.

[0174] After a change instruction for the switching speeds of the switching elements is issued, the control circuit confirms the change processing for the switching speeds based on the fact that the gate current of each switching element has changed. Consequently, it is possible to safely keep the surge voltage within the allowable range.

[0175] After a change instruction for the switching speeds of the switching elements is issued, the control circuit confirms the change processing for the switching speeds based on the fact that the surge voltage generated across each switching element or the capacitor series circuit has changed. Consequently, it is possible to safely keep the surge voltage within the allowable range.

[0176] A level switching threshold for switching from 2-level operation to 3-level operation and a level switching threshold for switching from 3-level operation to 2-level operation are different from each other, so hysteresis is present. Consequently, it is possible to avoid frequent changes in the operating level.

[0177] The control circuit changes the switching speeds of the switching elements based on a detected value of the surge voltage generated across each switching element or across the capacitor series circuit. Consequently, it is possible to keep the surge voltage safely within the allowable range.

[0178] The control circuit changes the switching speeds of the switching elements so that the maximum detected value of the surge voltage generated across each switching element or across the capacitor series circuit is kept within a permissible target voltage range. Consequently, it is possible to safely keep the surge voltage within the permissible range.

[0179] The control circuit changes the switching speeds based on the detected values ​​of the surge voltage, which are obtained a plurality of consecutive times. Consequently, it is possible to keep the surge voltage safely within the allowable range.

[0180] The control circuit performs switching between 2-level operation and 3-level operation based on a comparison between an AC output current value of the power converter device and a predetermined current threshold. Consequently, it is possible to perform the switching of the operating level appropriately.

[0181] The control circuit performs switching of the operating level and changing of the switching speeds in each fundamental period of the AC output current of the power converter device. Consequently, it is possible to perform switching of the operating level and changing of the switching speeds appropriately.

[0182] A level switching threshold for performing switching between 2-level operation and 3-level operation is determined according to the volume of the switching elements of the circuit. Consequently, it is possible to perform switching of the operating level appropriately.

[0183] A motor is connected as a load, and the control circuit determines the switching of the operating level and the switching speeds from a pre-prepared table or a calculation result based on command information for the motor and the power converter, as well as detection information from the motor and the power converter. Consequently, it is possible to perform the switching of the operating level and the change of the switching speeds appropriately.

[0184] Here, "command information for the motor and the power converter" refers to information such as "a torque command or a speed command for the motor and a phase current command (Iu(rms)*, Iu*, etc.) for the power converter." "Detection information about the motor and the power converter" refers to information such as "the speed of the motor phase current (Iu, etc.) of the power converter, a switching modulation factor of the switching element, the gate voltage of the switching element, the bus voltage of the power converter, the surge voltage, and the temperature."

[0185] The control circuit implements a change in the switching speeds of the switching elements by changing the gate resistance values ​​at the time of turning off the switching elements. Consequently, a change in the switching speeds of the switching elements is appropriately implemented. Embodiment 2

[0186] Next, a power converter device according to Embodiment 2 will be described. A circuit block diagram of the power converter device according to Embodiment 2 is the same as the circuit block diagrams of the power converter devices shown in Fig. 1, Fig. 13, etc., in Embodiment 1. However, in the present Embodiment 2, the control operation by the control circuit of the power conversion device is different from that in Embodiment 1.

[0187] Fig. 14 shows the operation of the control circuit of the power converter device according to the present embodiment 2. The difference from the embodiment 1 will be described below by comparing with the control operation ( Fig. 8) in Embodiment 1. What is not specifically described below is the same as in Embodiment 1.

[0188] In Embodiment 1, the switching of the operating level and the switching of the gate resistance value for turning off are performed in each fundamental period of the AC output of the power converter device, whereas in Embodiment 2, the switching of the operating level and the switching of the gate resistance value for turning off are performed in a time interval shorter than the fundamental period of the AC output of the power converter device.

[0189] That is, in Embodiment 1, the determination for the operating level is performed by comparing the AC output current command value (effective value) Iu(rms)* and the level switching threshold value, whereas in Embodiment 2, the determination is performed by comparing an AC output current command value (instantaneous value) Iu* and the level switching threshold values ​​Lvth3-2, Lvth2-3 as shown in B1 and B2 in Fig. 14 shown.

[0190] The determination can also be performed by comparing a detected current value Iu (the average of a plurality of consecutive detected values) and the level switching threshold, instead of comparing the AC output current command value (instantaneous value) Iu* and the level switching threshold. The detected current value Iu (the average of a plurality of consecutive detected values) can be obtained, for example, by comparing a detected current value (e.g., the U-phase current Iu in Fig. 1) flowing through the switching element, storing the detected value for each acquisition cycle, and then averaging the most recent ten stored values.

[0191] Regarding the selection of the operating level, here, in Embodiment 1, in a case where the current command value (effective value) Iu(rms)* of the AC output is greater than the level switching threshold, the 2-level operation is performed over the entire range of the AC output (sine wave). However, in Embodiment 2, since the determination is performed by comparing the current command value (instantaneous value) Iu* of the AC output with the level switching threshold, the 3-level operation is performed in a low-current range of the AC output (sine wave), and thus, further loss reduction in the power converter device is achieved.

[0192] Furthermore, regarding the selection of the gate resistance value for turn-off in Embodiment 1, a determination is made so that surge voltage constraints are met at the maximum current value of the AC output (sine wave). Therefore, there is a surge voltage margin in a current range other than near the maximum current value, that is, there is room for further loss reduction.

[0193] In contrast, in Embodiment 2, the gate resistance value for turn-off is changed at all times so that the surge voltage constraints are met across the entire AC output (sine wave) range. Therefore, there is no surge current reserve, even in a current range other than near the maximum current value, thus achieving further loss reduction. Here, satisfying the surge voltage constraints means that the surge voltage does not exceed the module withstand voltage of the switching elements.

[0194] With reference to Fig. 14, the operation for realizing the switching of the operating level and switching of the gate resistance value for turning off according to Embodiment 2 will be described.

[0195] As in Fig. 14, in a case where the 3-level operation is currently performed, it is determined whether or not to perform the 2-level operation or the 3-level operation by comparing between the current command value (instantaneous value) Iu* of the power conversion device and the predetermined level switching threshold value Lvth3-2.

[0196] That is, as with B2 in Fig. 14, when the current command value (instantaneous value) Iu* crosses the level switching threshold Lvth3-2, it is determined that the operation should be changed from the 3-level operation to the 2-level operation (an upward arrow shown with a solid line D represents the switching from the 3-level operation to the 2-level operation, and in the solid line D, “low” indicates the 3-level operation, and “high” indicates the 2-level operation).

[0197] If it is determined that the operation should be switched from the 3-level operation to the 2-level operation, then first the gate resistance value for turning off (the gate resistance value Rgoff14), which has been used in the 3-level operation and is comparatively small, is set to the largest value (in Fig. 14 the gate resistance value Rgoff1) is changed within a preset range, as in B4 in Fig. 14 shown.

[0198] After the gate resistance value has been changed to the largest value for switching off (in Fig. 14 the gate resistance value Rgoff1), next, a decrease in the slope of the gate voltage when the switching element is turned off, a decrease in the gate current value or a decrease in the surge voltage is monitored, so that it is confirmed that the gate resistance value Rgoff for turning off has indeed changed to a large value.

[0199] After the change according to the result of changing the gate resistance value Rgoff to turn off the switching element to the largest value (change such as a reduction in the slope of the gate voltage) is confirmed, the operation level is changed from 3-level operation to 2-level operation as shown in B3 in Fig. 14. shown.

[0200] In this way, the gate resistance value Rgoff is changed from a small value to a large value for turning off, before switching the operating level from 3-level operation to 2-level operation.

[0201] Then, in Embodiment 2, regarding the maximum surge voltage detection, for selecting the gate resistance value for turning off, a determination is made using consecutive detected values ​​of the surge voltage. That is, as in B5 in Fig. 14, in a case where the detected surge voltage value (branch voltage maximum value) Vmax is smaller than the allowable surge voltage VX, a surge voltage detection counter value (CNT) is incremented by + 1, and then every time the surge voltage detection counter value has reached a predetermined Rgoff switching threshold value RZ, the gate resistance value Rgoff is sequentially changed to turn off.

[0202] That is, in Fig. 14, each time the surge voltage detection counter value reaches the Rgoff switching threshold RZ, the gate resistance value is sequentially changed to, for example, Rgoff1, Rgoff2, Rgoff3, Rgoff4, Rgoff5, Rgoff6, ...

[0203] Here the following is fulfilled: Rgoff1>Rgoff2>Rgoff3>Rgoff4>…>Rgoff14>Rgoff15>Rgoff16.

[0204] In this way, by changing the gate resistance value Rgoff for turning off when the surge voltage detection counter value has reached the predetermined Rgoff switching threshold value RZ, the gate resistance value for turning off can be prevented from being changed frequently, so that it becomes possible to suppress unstable fluctuation of the gate resistance value.

[0205] The remaining control in Embodiment 2 is the same as that in Embodiment 1, and therefore, the description thereof will be omitted.

[0206] In Embodiment 2, based on the detection information (phase current, phase current (torque) command value, detected speed value, modulation factor, gate voltage value, surge voltage value, temperature, etc.) of the motor and the power converter device, a combination of operating level and gate resistance for turning off that minimizes the loss while keeping the surge voltage within the allowable range can be calculated in each control cycle and determined from a table prepared in advance or by loss calculation.

[0207] In particular, in Embodiment 2, since the switching of the operating level and the switching of the gate resistance value for turning off are performed at a comparatively high speed, a large effect for loss reduction can be achieved.

[0208] In Embodiment 2, for example, the switching of the operation level and the switching of the gate resistance value for turning off are performed in each AC output current detection cycle for controlling the AC output current, which is shorter than the fundamental period, so that the switching between the 2-level operation and the 3-level operation and the switching of the gate resistance value for turning off can also be performed in the same cycle, and thus it is possible to achieve a large loss reduction while ensuring safety. Effects of Embodiment 2

[0209] As described above, according to Embodiment 2, the same effects as those of Embodiment 1 can be achieved, and the following effects are also achieved.

[0210] That is, the control circuit performs switching of the operating level and a change of the switching speed at a time interval shorter than one fundamental period of the AC output current of the power converter device. Consequently, it is possible to perform switching of the operating level and a change of the switching speed even more reliably and appropriately. Hardware configuration of the control circuit

[0211] The control circuit 8 in each of Embodiments 1 and 2 is formed of a processor 100 and a memory device 101 as shown in a hardware example in Fig. 16. The memory device 101 is provided with a volatile memory device such as a random access memory and a non-volatile auxiliary memory device such as a flash memory, which are not shown.

[0212] Instead of the flash memory, a hard disk can also be used. The processor 100 executes a program input from the storage device 101. In this case, the program is input from the auxiliary storage device to the processor 100 via the volatile storage device. The processor 100 can output data, such as a calculation result, to the volatile storage device of the storage device 101, or it can store such data in the auxiliary storage device via the volatile storage device. Other embodiments

[0213] Although the invention has been described above in terms of various exemplary embodiments and implementations, it should be understood that the various features, aspects, and functionalities described in one or more of the individual embodiments are not limited in their applicability to the individual embodiment in which they are described, but instead may be applied - alone or in various combinations - to one or more embodiments of the invention.

[0214] It is therefore understood that numerous modifications not described by way of example may be used without departing from the scope of the present invention. For example, at least one of the components may be modified, added, or omitted. At least one of the components explained in at least one of the preferred embodiments may be selected and combined with the components mentioned in another preferred embodiment. List of reference symbols 1 DC voltage source 2 capacitor series circuit 2a, 2b capacitor 3 Inverter circuit 3a, 3b, 3c, 3d, 3e, 3f Switching element (inverter circuit) 4, 4B circuit 4a, 4b, 4c, 4d, 4e, 4f switching element (circuit) 14a, 14b, 14c, 14d, 14e, 14f switching element (circuit) 5a, 5b, 5c, 5d, 5e, 5f Gate input unit (inverter circuit) 6a, 6b, 6c, 6d, 6e, 6f Gate input unit (circuit) 16a, 16b, 16c, 16d, 16e, 16f Gate input unit (circuit) 7 Motor (load) 8 Control circuit 9 Gate resistance determination unit 10 Gate resistance switching circuit 11 Buffer circuit 12 Switch-on power supply 15 Switch-off power supply QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] WO 2012 / 025978 A1

[0003]

Claims

[1] Power converter device comprising: a capacitor series circuit comprising a plurality of capacitors connected in series and having both ends connected to both ends of a DC voltage source; an inverter circuit in which a plurality of legs, each having a plurality of switching elements connected in series, are connected in parallel, and whose DC input ends are connected to the two ends of the capacitor series circuit and whose AC output ends are connected to a load; a switching circuit having a plurality of switching elements and one end of which is connected to a connection point between the plurality of capacitors and the other ends of which are connected to a plurality of connection points between the switching elements of the inverter circuit; and a control circuit that controls the inverter circuit and the switching circuit, where the inverter circuit is capable of performing a 2-level operation by turning off the switching elements included in the circuit and of performing a 3-level operation by turning on / off the switching elements included in the circuit, and in a case where switching of an operating level between the 2-level operation and the 3-level operation is performed, the control circuit changes the switching speeds of the switching elements of the inverter circuit and the switching circuit. [2] The power converter device according to claim 1, wherein in a case of changing from the 3-level operation to the 2-level operation, the control circuit reduces the switching speeds of the switching elements. [3] A power converter device according to claim 1 or 2, wherein before switching the operating level between the 3-level operation and the 2-level operation, the control circuit changes the switching speeds of the switching elements. [4] A power converter device according to any one of claims 1 to 3, wherein, after a change instruction for the switching speeds of the switching elements is given, the control circuit waits for a certain period of time and then performs the switching of the operation level between the 3-level operation and the 2-level operation. [5] The power converter device according to any one of claims 1 to 3, wherein, after a change instruction for the switching speeds of the switching elements is given, the control circuit confirms the change processing for the switching speeds based on the changes in the switching speeds of the switching elements. [6] A power conversion device according to any one of claims 1 to 3, wherein, after a change instruction for the switching speeds of the switching elements is given, the control circuit confirms the change processing for the switching speeds on the basis of the fact that the slope of the gate voltage applied to a gate terminal of each switching element has changed. [7] The power conversion device according to any one of claims 1 to 3, wherein, after a change instruction for the switching speeds of the switching elements is given, the control circuit confirms the change processing for the switching speeds based on the fact that the gate current of each switching element has changed. [8] A power conversion device according to any one of claims 1 to 3, wherein, after a change instruction for the switching speeds of the switching elements is given, the control circuit confirms the change processing for the switching speeds based on the fact that the surge voltage generated across each switching element or the capacitor series circuit has changed. [9] Power converter device according to one of claims 1 to 8, wherein a level switching threshold for changing from the 2-level operation to the 3-level operation and a level switching threshold for changing from the 3-level operation to the 2-level operation are different from each other. [10] A power converter device according to any one of claims 1 to 9, wherein the control circuit changes the switching speeds of the switching elements based on a detected value of the surge voltage generated across each switching element or across the capacitor series circuit. [11] A power converter device according to claim 10, wherein the control circuit changes the switching speeds of the switching elements so that the maximum value of the detected value of the surge voltage generated across each switching element or across the capacitor series circuit is kept within an allowable target voltage range. [12] A power converter device according to claim 10 or 11, wherein the control circuit changes the switching speeds based on the detected values ​​of the surge voltage obtained a plurality of consecutive times. [13] The power converter device according to any one of claims 1 to 12, wherein the control circuit performs the switching between the 2-level operation and the 3-level operation based on a comparison between an AC output current value of the power converter device and a predetermined current threshold value. [14] A power converter device according to any one of claims 1 to 13, wherein the control circuit performs switching of the operation level and change of the switching speeds in each fundamental period of the AC output current of the power converter device. [15] A power conversion device according to any one of claims 1 to 13, wherein the control circuit performs switching of the operation level and change of the switching speeds with a time interval shorter than a fundamental period of the AC output current of the power conversion device. [16] A power converter device according to any one of claims 1 to 15, wherein a level switching threshold for performing switching between the 2-level operation and the 3-level operation is determined according to the volume of the switching elements of the switching circuit. [17] Power converter device according to one of claims 1 to 16, where a motor is connected as the load, and the control circuit determines the switching of the operating level and the switching speeds from a pre-prepared table or a calculation result, based on command information for the motor and the power converter device, and detection information about the motor and the power converter device. [18] A power converter device according to any one of claims 1 to 17, wherein the control circuit realizes a change in the switching speeds of the switching elements by changing the gate resistance values ​​at the time of turning off the switching elements.

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