Printed circuit board and soldering process
The printed circuit board design with staggered solders and a resin layer effectively manages heat dissipation in integrated circuits, addressing the challenge of thermal management in miniaturized circuits while maintaining cost-effectiveness.
Patent Information
- Application Number
- DE112022007725
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2022-10-05
- Publication Date
- 2025-06-18
AI Technical Summary
Existing printed circuit boards face challenges in heat dissipation due to increased power consumption in miniaturized and high-integration integrated circuits, leading to higher temperatures and the need for effective thermal management without increasing system size or cost.
A printed circuit board design with staggered placement of solders on a substrate using a metal mask, combined with a heat transfer metal layer and a resin layer to block outside air intrusion, enhances heat dissipation performance by minimizing solder thickness and preventing void formation.
The design achieves improved heat dissipation performance at minimal cost by reducing solder thickness and preventing voids, ensuring stable operation of integrated circuits.
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Abstract
Description
Technical FieldThe present disclosure relates to a circuit board that can improve heat dissipation performance and a method of soldering the same.Prior ArtIn general, an integrated circuit may have an operating temperature range in which a normal function is maintained, a normal operation is performed according to specified specifications, and characteristics of the integrated circuit may change as the temperature changes.For example, an integrated circuit may lose its functions because a plurality of electrons and holes are generated in a semiconductor crystal when a maximum temperature range in which the semiconductor operates is exceeded.Recently, integrated circuits have been continuously advanced toward miniaturization and high integration as well as high functionality at a faster data processing speed.However, these technological advances lead to a marked increase in the power consumption in the integrated circuit and thus to an increasing development of heat.Thermal management is required to ensure stable operation of a system, but as technology level increases, the importance of thermal management increases.As a method of heat dissipation in the integrated circuit, a method of mounting a heat sink made of a metal having good thermal conductivity on a printed circuit board (PCB) or a method of adding a heat transfer medium prepared by mixing a non-conductor with a material having good thermal conductivity has already been used. However, there have been problems such as an additional cost and an increase in the overall size of the system.Therefore, development of the circuit board capable of maximizing the heat dissipation performance at a minimum cost is required in the future.Disclosure of the InventionTechnical ProblemAn object of the present disclosure is to solve the above and other problems.An object of the present disclosure is to provide a circuit board in which a plurality of solders are arranged to be offset in a minimum amount on a region of a substrate on which a heat conductive pad of an integrated circuit is mounted using a metal mask, thereby forming a solder having a smaller thickness at the minimum amount to maximally improve heat dissipation performance at a minimum cost.Technical SolutionA circuit board according to an embodiment of the present disclosure includes a substrate, a solder disposed on a predetermined region of the substrate, and a heat transfer metal layer disposed between the substrate and the solder, the solder being printed by a metal mask so that a plurality of solders are disposed on a region of the substrate to which a thermal pad of an integrated circuit, IC, is attached, the plurality of solders disposed on the thermal pad attachment region of the substrate being disposed so that adjacent solders are offset in at least one direction of an X-axis direction and a Y-axis direction.A method of soldering a circuit board according to an embodiment of the present disclosure includes preparing a substrate having a plurality of through holes, forming a heat transfer metal layer on the substrate, positioning a metal mask having a plurality of open areas on an upper portion of the substrate, forming a solder on the substrate through the open areas of the metal mask so that adjacent solders are offset in at least one direction from an X-axis direction and a Y-axis direction, removing the metal mask, and applying a resin layer to block intrusion of external air at a lower inlet of each of the through holes of the substrate.Advantageous EffectsAccording to the embodiment of the present disclosure, the plurality of solders may be arranged to be offset in the minimum amount on the region of the substrate on which the thermal pad of the integrated circuit is fixed using the metal mask, thereby forming a solder having the low thermal conductivity and the smaller thickness in the minimum amount to maximally improve the heat dissipation performance at the minimum cost.Moreover, in the present disclosure, the resin layer may be applied to the inlet of the through hole of the substrate to block the entrance of the outside air into the solder, thereby preventing the void from being generated in the solder to improve the heat dissipation performance.Brief Description of the DrawingsFIG. 1 is a cross-sectional structural view for explaining a circuit board according to an embodiment of the present disclosure. FIG. 2 is a cross-sectional structural view for explaining a circuit board according to another embodiment of the present disclosure. FIG. 3 is a structural cross-sectional view for explaining a heat dissipation path of the circuit board according to an embodiment of the present disclosure. FIG. 4 is a structural cross-sectional view illustrating a heat transfer metal layer of the circuit board according to an embodiment of the present disclosure. FIG. 5 is a view for explaining overvoltage of a through hole of the circuit board according to an embodiment of the present disclosure. FIG. 6 is a view for explaining an overvoltage range of the circuit board according to an embodiment of the present disclosure. FIG. 7 is a view for explaining formation of a solder of the circuit board according to an embodiment of the present disclosure. FIG. 8 is a view for explaining a pattern of an open region of a metal mask corresponding to a thermal pad of an integrated circuit according to an embodiment of the present disclosure. FIGS. 9 and 10 are views for explaining a shape of the pattern of the open region of the metal mask according to an embodiment of the present disclosure. FIGS. 11 and 12 are views for explaining a pattern of an arrangement of solders disposed on a thermal pad mounting portion according to an embodiment of the present disclosure. FIG. 13 is a view for explaining a cavity defined in the solder of the circuit board according to an embodiment of the present disclosure. FIG. 14 is a diagram comparing a temperature of the integrated circuit according to an open area ratio of the metal mask according to an embodiment of the present disclosure. FIG. 15 is a flowchart for explaining a soldering method for a circuit board according to an embodiment of the present disclosure.MODE FOR CARRYING OUT THE INVENTIONHereinafter, the embodiments disclosed in this specification will be described with reference to the accompanying drawings, and the same or corresponding components will be given the same drawing number regardless of the reference number, and duplicated description thereof will be omitted. The suffixes "module" and "unit" for components used in the description are assigned or mixed for convenience, and do not have a different meaning or function by themselves. Detailed descriptions of known functions or configurations are omitted so as not to unnecessarily obscure the subject matter of the present disclosure. However, this does not limit the present disclosure to particular embodiments, and it is understood that the present disclosure covers all modifications, equivalents, and substitutions within the concept and technical scope of the present disclosure.It should be understood that although ordinal numbers such as "first" and "second" are used herein to describe various elements, these elements should not be limited by these numbers. The terms are used only to distinguish one component from other components.It will also be understood that when an element is referred to as being "connected" or "engaging" with another element, it may be directly connected to the other element or intervening elements may also be present. It will also be understood that when an element is referred to as being "directly connected" to another element, there are no intervening elements present.FIG. 1 is a cross-sectional structural view for explaining a circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 1, a circuit board of the present disclosure may include a substrate 100, a solder 300 disposed on a predetermined region of the substrate 100, and a heat transfer metal layer 200 disposed between the substrate 100 and the solder 300.Here, the substrate 100 may have a plurality of through holes 600 defined to pass through an upper portion to which an integrated circuit package 500 is fixed and a lower portion exposed to the outside.In some cases, a resin layer may be applied to a lower inlet of each of the through holes 600 to block invasion of outside air.Here, the reason for applying the overvoltage is to block the outside air from entering the solder 300 through the through holes 600 because a cavity is defined in the solder 300 that deteriorates the heat dissipation performance when the outside air enters the solder 300 through the through holes 600.In addition, a conductive metal may be disposed on an inner surface of the through hole 600 of the substrate 100.Here, the conductive metal may be connected to the heat transfer metal layer 200 disposed between the substrate 100 and the solder 300 to release heat of the heat transfer metal layer 200 from an upper portion to a lower portion of the substrate 100.Moreover, the conductive metal 300 may extend from the inner surface of the through hole 600 to a land area around the inlet of the through hole 600.For example, the conductive metal may be made of the same material as the heat transfer metal layer 200.This is because the heat of the heat transfer metal layer 200 is quickly dissipated from the upper portion to the lower portion of the substrate 100 when the conductive metal is made of the same material as the heat transfer metal layer 200.For example, the conductive metal may include copper, but is not limited to an embodiment.Moreover, a thickness of the conductive metal may be less than that of the thermally conductive metal layer.The reason for this is to define a space inside the through hole to increase the surface area in contact with the air.Moreover, the plurality of through holes 600 defined in a region of the substrate to which the thermal pad 400 is attached may be arranged in a matrix shape.Here, the plurality of through holes 600 arranged in the matrix shape may have the same diameter and be arranged at the same intervals.Moreover, the resin layer for blocking the invasion of the outside air may be disposed at the lower inlet of the through hole 600 defined only in the thermal pad mounting area of the substrate 100, among the plurality of through holes 600.This is because of preventing the generation of voids in the solder 600 on the region of the substrate 100 on which the thermal pad 400 of an integrated circuit is mounted.That is, when the outside air enters through the through hole 600 and the cavity in the solder 600 is defined on the region of the substrate 100 on which the thermal pad 400 of the integrated circuit is mounted, a heat dissipation performance of the integrated circuit may deteriorate due to the cavity.Next, the heat transfer metal layer 200 may include a first heat transfer metal layer disposed on the upper portion of the substrate 100 to which the integrated circuit is attached and which is in contact with the solder 300 and a second heat transfer metal layer disposed on the lower portion exposed to the outside.Here, a thickness of the first heat transfer metal layer may be the same as a thickness of the second heat transfer metal layer.In some cases, the thickness of the first heat transfer metal layer may be less than the thickness of the second heat transfer metal layer.The reason for this is that when the thickness of the second heat transfer metal layer disposed at the lower portion of the substrate 100 is larger than the thickness of the first heat transfer metal layer, the surface area increases to transfer heat more quickly and smoothly from the upper portion to the lower portion of the substrate 100.Next, the solder 300 may be applied in a plurality on the region of the substrate 100 to which the thermal pad 400 of the integrated circuit (IC) package 500 is attached by being printed through the metal mask.Here, the plurality of solders 300 disposed on the region of the substrate 100 on which the thermal pad 400 is mounted may be disposed such that the adjacent solders 300 are offset in at least one direction from the X-axis direction and the Y-axis direction.For example, the plurality of solders 300 disposed in the region of the substrate 100 to which the thermal pad 400 is attached may include a plurality of first solders each having a first length and a plurality of second solders disposed at a predetermined distance from the first solders each having a second length longer than the first length.Here, the first solders and the second solders may be alternately arranged in the X-axis direction.In some cases, the first solders may be placed at edge portions of the second solders.In another case, the first solder may be provided multiple times to be arranged in the Y-axis direction, and the second solder may be provided single times to be arranged in the Y-axis direction.Here, the total area of the plurality of solders arranged in the Y-axis direction may be the same as the area of a single solder arranged in the Y-axis direction, but this is only an example and is therefore not limited thereto.Moreover, the first solder may be provided in a plurality that are parallel to each other along a line parallel to the Y axis.In another case, the first solder may be provided plural times in the Y-axis direction so as to face a center of the region of the substrate 100 to which the thermal pad 400 is fixed.Moreover, an amount of solder 300 disposed on the portion of the substrate 100 to which the thermal pad 400 is attached may be an amount of solder 300 passing through the open portion of the metal mask having a surface area of 5% to 24% of the total area of the thermal pad 400.Here, the open area of the metal mask having the surface area of 5% to 24% may be an area corresponding to the thermal pad 400.Moreover, the amount of solder 300 disposed on the region of the substrate 100 to which the thermal pad 400 is attached may be determined according to the surface area of the open region of the metal mask corresponding to the region of the substrate 100 to which the thermal pad 400 is attached.Moreover, the open area of the metal mask may be aligned with the surface area of 5% to 24% to correspond to the area of the substrate 100 to which the thermal pad is attached when the metal mask is positioned on the upper portion of the substrate 100 for performing the soldering.In this case, the open region of the metal mask having a surface region of 5% to 24% may be provided with a plurality of hole patterns.For example, the plurality of hole patterns may be arranged such that adjacent hole patterns are offset in at least one direction from the X-axis direction and the Y-axis direction.The adjacent hole patterns may have the same width and different lengths.For example, the plurality of hole patterns may include a plurality of first hole patterns each having a first length and a plurality of second hole patterns each disposed at a predetermined interval from each of the first hole patterns and having a second length longer than the first length.Here, the first hole patterns and the second hole patterns may be alternately arranged in the X-axis direction.Moreover, the first hole patterns may be disposed at edge portions of the second hole patterns.Moreover, the first hole pattern may be provided in plural in the Y-axis direction, and the second hole pattern may be provided in single in the Y-axis direction.For example, the total area of the plurality of first hole patterns arranged in the Y-axis direction may be equal to a surface area of a second hole pattern arranged in the Y-axis direction.Here, the first hole pattern may be provided in a plurality that are parallel to each other along a line parallel to the Y-axis direction.In some cases, the first hole pattern may be provided plural times in the Y-axis direction toward a central portion of the metal mask.As described above, in the present disclosure, the plurality of solders may be arranged to be offset at a minimum interval on the region of the substrate on which the thermal pad of the integrated circuit is fixed using the metal mask, thereby providing the solder having low thermal conductivity and a smaller thickness in the minimum amount to maximally improve the heat dissipation performance at a minimum cost.Moreover, in the present disclosure, the inlet of the through hole of the substrate may be spanned with the resin layer to block the entrance of the outside air into the solder, thereby preventing the generation of the void in the solder, thereby improving the heat dissipation performance.FIG. 2 is a cross-sectional structural view for explaining a circuit board according to another embodiment of the present disclosure.As illustrated in FIG. 2, a circuit board of the present disclosure may include a substrate 100, a solder 300 disposed on a predetermined region of the substrate 100, and a heat transfer metal layer 200 disposed between the substrate 100 and the solder 300.Here, the substrate 100 may include a multiple substrate on which a plurality of layers 110, 120, and 130 are laminated.Moreover, a conductive metal layer 102 may be disposed between the plurality of laminated layers 110, 120, and 130.Next, the substrate 100 may have a plurality of through holes 600 defined to pass through an upper portion to which an integrated circuit package 500 is fixed and a lower portion exposed to the outside.The circuit board of FIG. 2 has the same configuration as the circuit board of FIG. 1, except for the multiple substrate on which the plurality of layers 110, 120, and 130 are laminated, and thus will not be described in detail.FIG. 3 is a structural cross-sectional view for explaining a heat dissipation path of the circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 3, in the circuit board of the present disclosure, a plurality of solders may be arranged to be offset in a minimum amount on a region of a substrate on which a heat conductive pad of an integrated circuit is mounted using a metal mask having an open region with a certain pattern, thereby providing a solder having low thermal conductivity and a smaller thickness in a minimum amount to maximally improve the heat dissipation performance at a minimum cost.Therefore, in the present disclosure, as illustrated in FIG. 3, the largest amount of heat can be discharged through one path of the through hole 600, and heat can also be discharged through all other paths.FIG. 4 is a structural cross-sectional view illustrating the heat transfer metal layer of the circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 4, the heat transfer metal layer 200 may include a first heat transfer metal layer 210 disposed on an upper portion of the substrate 100 to which the integrated circuit is attached and in contact with solder, and a second heat transfer metal layer 220 disposed on a lower portion exposed to the outside.Herein, a thickness t 2 of the first heat transfer metal layer 210 may be equal to a thickness t 3 of the second heat transfer metal layer 220.In some cases, the thickness t 2 of the first heat transfer metal layer 210 may be less than the thickness t 3 of the second heat transfer metal layer 220.This is because, when the thickness t 3 of the second heat transfer metal layer 220 disposed in the lower portion of the substrate 100 is larger than the thickness t 2 of the first heat transfer metal layer 210, a surface area increases to transfer heat quickly and smoothly from the upper portion to the lower portion of the substrate 100.In addition, a conductive metal 230 may be disposed on an inner surface of the through hole 600 of the substrate 100.Here, the conductive metal 230 may be connected to the first heat transfer metal layer 210 disposed on the upper portion of the substrate 100 and the second heat transfer metal layer 220 disposed on the upper portion of the substrate 100 to release the heat of the integrated circuit from the upper portion to the lower portion of the substrate 100.Moreover, the conductive metal 230 may extend from the inner surface of the through hole 600 to a land area around an inlet of the through hole 600.For example, the conductive metal 230 may be made of the same material as the heat transfer metal layer 200.This is because, when the conductive metal 230 is made of the same material as the heat transfer metal layer 200, the heat of the integrated circuit is quickly dissipated from the upper portion to the lower portion of the substrate 100 between the first heat transfer metal layer 210 and the second heat transfer metal layer 220.For example, the conductive metal may include copper, but is not limited to an embodiment.Moreover, a thickness t 1 of the conductive metal 230 may be less than each of a thickness t 2 of the first thermally conductive metal layer 210 and a thickness t 3 of the second thermally conductive metal layer 220.The reason for this is to define a space inside the through hole to increase the surface area in contact with the air.FIG. 5 is a view for explaining overvoltage of a through hole of the circuit board according to an embodiment of the present disclosure, i.e., a view illustrating a cross section of the circuit board and a plane corresponding to the cross section.As illustrated in FIG. 5, the substrate 100 may include a plurality of through holes 600 defined to pass through an upper portion to which an integrated circuit package is attached and a lower portion exposed to the outside.Moreover, a resin layer 700 may be applied to a lower inlet of each through hole 600 to block the invasion of outside air.Here, the reason for the overvoltage of the resin layer 700 is to prevent external air from entering a solder disposed on the upper portion of the substrate 100 through the through holes 600, because this causes the heat dissipation performance of the solder to be deteriorated due to a cavity formed in the solder when the external air enters the solder disposed on the upper portion of the substrate through the through holes 600.Therefore, in the present disclosure, the inlet of the through hole of the substrate may be spanned with the resin layer to block the entrance of outside air into the solder, thereby preventing the generation of the void in the solder to improve the heat dissipation performance.FIG. 6 is a view for explaining an overvoltage range of the circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 6, the plurality of through holes 600 may be arranged in a matrix shape in a region of the integrated circuit package 500 of the substrate 100 to which the thermal pad 400 is attached.Here, the plurality of through holes 600 arranged in a matrix form may have the same diameter and be arranged at equal intervals.Moreover, the resin layer 700 for blocking the invasion of the outside air may be disposed in the entire through holes 600 of the substrate 100.Moreover, as shown in FIG. 6, the resin layer 700 for blocking the inflow of the outside air may be disposed at the lower inlet of the through hole 600, which is defined only in the region 105 of the substrate 100 to which the thermal pad 400 is attached, in the plurality of through holes 600.This is because, when the outside air enters through the through hole 600 and the cavity in the solder 600 is defined on the region of the substrate 100 on which the thermal pad 400 of the integrated circuit is mounted, the heat dissipation performance of the integrated circuit may be impaired due to the cavity.Thus, in the present disclosure, the resin layer 700 for blocking the intrusion of the outside air into the lower inlet of the through hole 600 defined only in the region 105 of the substrate to which the heat conductive pad 400 is attached may be provided to prevent the generation of the void in the solder 600 on the region of the substrate 100 to which the heat conductive pad 400 of the integrated circuit package 500 is attached and to generate the void only in the region 105 of the substrate to which the heat conductive pad 400 is attached, thereby minimizing costs.Moreover, the through hole 600 can be opened as it is without spanning over the resin layer 700 except for the portion of the substrate 100 to which the heat conductive pad 400 is fixed, to improve the heat dissipation performance efficiently.FIG. 7 is a view for explaining formation of the solder of the circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 7, the solder 300 of the present disclosure may be provided multiple times on the substrate 100 by being printed through an open region 910 of a metal mask 900.Here, the plurality of solders 300 disposed on a thermal pad mounting region 350 of the substrate 100 may be disposed such that the adjacent solders 300 are offset in at least one direction from the X-axis direction and the Y-axis direction.For example, the plurality of solders 300 disposed in the thermal pad mounting region 350 of the substrate 100 may include a plurality of first solders each having a first length and a plurality of second solders disposed at a predetermined distance from the first solders each having a second length longer than the first length.Here, the first solders and the second solders may be alternately arranged in the X-axis direction.In some cases, the first solders may be placed at the edge portions of the second solders.Moreover, an amount of solder 300 disposed on the thermal pad attachment region 350 of the substrate 100 may be an amount of solder 300 passing through the open region 910 of the metal mask 900 having a surface area of 5% to 24% of the total area of the thermal pad.Here, the open region 910 of the metal mask 900 having a surface area of 5% to 24% may be a region corresponding to the thermal pad of the integrated circuit.As described above, the amount of solder 300 disposed on the thermal pad mounting region 350 of the substrate 100 may be determined according to the surface area of the open region 910 of the metal mask 900 corresponding to the thermal pad mounting region 350 of the substrate 100.In the present disclosure, the surface area of the opening portion 910 of the metal mask 900 may be adjusted to adjust the amount of solder 300 printed by the metal mask 900, thereby reliably connecting the integrated circuit by the solder 300 and minimizing the amount of low thermal conductivity solder 300 to improve the heat dissipation performance.FIG. 8 is a view for explaining a pattern of the open region of the metal mask corresponding to a thermal conductive pad of an integrated circuit according to an embodiment of the present disclosure, i.e., a view illustrating a plane of the thermal conductive pad of the integrated circuit and the metal mask.As shown in FIG. 8, the open region 910 of the metal mask 900 may include a first open region 912 corresponding to the thermal pad 400 of the integrated circuit package 500 and a second open region 914 corresponding to a terminal pin 510 of the integrated circuit package 500.Herein, the metal mask 900 may be manufactured such that the surface area of the open areas 912 disposed in a central area 920 corresponding to the thermal conductive pad 400 has a surface area of 5% to 24% of the total area of the thermal conductive pad 400.The reason for this is that the surface area of the first open area 912 of the metal mask 900 is set to a minimum amount to minimize the amount of solder on the area on which the thermal pad 400 printed by the metal mask 900 is mounted. Thereby, the heat dissipation performance is improved by minimizing the amount of low thermal conductivity solder.That is, the first open area 912 of the metal mask 900 having a surface area of 5% to 24% of the total area of the thermal pad 400 may be aligned to correspond to the surface of the substrate to which the thermal pad 400 is attached when the metal mask 900 is disposed on the upper portion of the substrate for soldering.Here, the first open region 912 of the metal mask 900 having a surface area of 5% to 24% of the total area of the heat conduction pad 400 may include a plurality of hole patterns.FIGS. 9 and 10 are views for explaining a shape of the pattern of the open region of the metal mask according to an embodiment of the present disclosure.As shown in FIGS. 9 and 10, the open region 910 of the metal mask 900 may include a first open region 912 corresponding to the thermal pad of the integrated circuit package and a second open region 914 corresponding to a terminal pin of the integrated circuit package.Moreover, the first open regions 912 disposed on the central region 920 corresponding to the heat conductive pad may have a surface area of 5% to 24% of the total area of the heat conductive pad in the total area of the metal mask 900.Here, the first open region 912 of the metal mask 900 may include a plurality of hole patterns.As illustrated in FIGS. 9 and 10, the plurality of hole patterns may be arranged such that adjacent hole patterns are offset in at least one direction from the X-axis direction and the Y-axis direction.The adjacent hole patterns may have the same width and different lengths.For example, the plurality of hole patterns may include a plurality of first hole patterns 912 aeach having a first length L 1 and a plurality of second hole patterns 912 beach disposed at a predetermined distance from each of the first hole patterns 912 aand having a second length L 2 longer than the first length L 1.Moreover, a first width W 1 of the first hole pattern 912 aand a second width W 2 of the second hole pattern 912 bmay be equal to each other.Here, the first hole patterns 912 aand the second hole patterns 912 bmay be alternately arranged in the X-axis direction.Moreover, the first hole patterns 912 amay be disposed at edge portions of the second hole patterns 912 b.Moreover, as illustrated in FIG. 9, the first hole pattern 912 amay be provided in plural in the Y-axis direction, and the second hole pattern 912 bmay be provided in single in the Y-axis direction.For example, the total area of the plurality of first hole patterns 912 aarranged in the Y-axis direction may be equal to a surface area of a second hole pattern 912 barranged in the Y-axis direction.Here, the first hole pattern 912 amay be provided in a plurality that are parallel to each other along a line parallel to the Y-axis direction.In some cases, as illustrated in FIG. 10, the first hole pattern 912 amay be provided multiple times in the Y-axis direction toward the central portion of the metal mask 900.As described above, in the present disclosure, the hole patterns of the metal mask may be provided such that the adjacent hole patterns are arranged offset in at least one direction from the X-axis direction and the Y-axis direction. Thus, when a volatile component of a solvent or resin is generated during a process of melting the solder paste, the volatile component can easily escape through the hole patterns alternately arranged to enable stable soldering.FIGS. 11 and 12 are views for explaining a pattern of an arrangement of solders disposed on a thermal pad mounting region according to an embodiment of the present disclosure. FIG. 11 is a view illustrating a pattern of an arrangement of solders provided using the metal mask having the hole pattern of FIG. 9, and FIG. 12 shows a pattern of an arrangement of solders provided using the metal mask having the hole pattern of FIG. 10.As illustrated in FIGS. 11 and 12, the solder 300 of the present disclosure may be printed through the open area of the metal mask to be provided on the substrate 100 a plurality of times.Here, the plurality of solders 300 disposed on a thermal pad mounting region 350 of the substrate 100 may be disposed such that the adjacent solders 300 are offset in at least one direction from the X-axis direction and the Y-axis direction.As shown in FIG. 11, a plurality of solders 300 formed in the thermal pad mounting region 350 of the substrate 100 may include a plurality of first solders 310 each having a first length L 1 and a plurality of second solders 320 each disposed at a predetermined distance from each of the first solders 310 and having a second length L 2 longer than the first length L 1.Here, the first solders 310 and the second solders 320 may be alternately arranged in the X-axis direction.In some cases, the first solders 310 may be disposed on edge portions of the second solders 320.Moreover, the first solder 310 may be provided in plural in the Y-axis direction, and the second solder 320 may be provided in single in the Y-axis direction.Here, the total area of the plurality of solders 310 arranged in the Y-axis direction may be equal to an area of a second solder 320 arranged in the Y-axis direction, but this is only an example and thus is not limited thereto.Moreover, as illustrated in FIG. 11, the plurality of first solders 310 may be provided in a plurality that are parallel to each other along a line parallel to the Y axis.In another case, as illustrated in FIG. 12, the first solder 310 may be provided multiple times in the Y-axis direction so as to face a center of the region 350 of the substrate 100 to which the thermal pad 400 is fixed.Moreover, an amount of solders 310 and 320 disposed on the region 350 of the substrate 100 to which the thermal pad 400 is attached may be an amount of solders passing through the open region of the metal mask having a surface area of 5% to 24% of the total area of the thermal pad 400.As described above, the amount of solders 310 and 320 disposed on the region 350 of the substrate 100 to which the thermal pad 400 is attached may be determined according to the surface area of the open region of the metal mask corresponding to the region 350 of the substrate 100 to which the thermal pad 400 is attached.FIG. 13 is a view for explaining a cavity defined in the solder of the circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 13, the solder 300 may have lower thermal conductivity than other metals, resulting in poor heat dissipation performance, and when a solder paste is melted during a reflow process and connected between the integrated circuit (IC) and the printed circuit board (PCB), voids 370 may occur because volatile components of a solvent or resin cannot escape and the solder thus solidifies.Therefore, as the amount of the solder 300 increases, the number of the voids 370 also increases, which deteriorates the heat dissipation performance.Therefore, in the present disclosure, the hole patterns of the metal mask may be arranged such that the adjacent hole patterns are arranged offset in at least one direction from the X-axis direction or the Y-axis direction. Thereby, a volatile component of a solvent or resin generated when the solder paste melts can easily escape through the hole patterns alternately arranged to allow stable soldering.Moreover, in the present disclosure, the soldering may be performed through the open area of the metal mask having a surface area of 5% to 24% of the total area of the heat conductive pad to minimize the amount of solder and thereby improve the heat dissipation performance.Moreover, in the present disclosure, the inlet of the through hole of the substrate may be spanned with the resin layer to block the entrance of the outside air into the solder, thereby preventing the generation of the void in the solder to improve the heat dissipation performance.FIG. 14 is a diagram comparing a temperature of the integrated circuit according to an open area ratio of the metal mask according to an embodiment of the present disclosure.As illustrated in FIG. 14, the temperature of the integrated circuit may be about 101.1 degrees when the soldering is performed through the open area of the metal mask having a surface area of about 30% of the total area of the heat conductive pad, and a temperature of the integrated circuit may be about 99.2 degrees when the soldering is performed through the open area of the metal mask having a surface area of about 25% of the total area of the heat conductive pad.However, as in the present disclosure, when the soldering is performed through the open area of the metal mask having a surface area of about 20% of the total area of the heat conductive pad, a temperature of the integrated circuit may be about 98.3° C., and when the soldering is performed through the open area of the metal mask having a surface area of about 15% of the total area of the heat conductive pad, a temperature of the integrated circuit may be lowered to about 97.8° C.As described above, in the present disclosure, the soldering may be performed through the open area of the metal mask having the surface area of 5% to 24% of the total area of the heat conductive pad to minimize the amount of solder and thereby improve the heat dissipation performance.FIG. 15 is a flowchart for explaining a soldering method for a circuit board according to an embodiment of the present disclosure.As illustrated in FIG. 15, in the present disclosure, a substrate having a plurality of through holes formed therein may be prepared.Moreover, in the present disclosure, a heat transfer metal layer may be formed on the substrate (S 10).Next, in the present disclosure, a metal mask having a plurality of open regions may be placed on an upper portion of the substrate (S 20).Here, in the present disclosure, the metal mask in which an open region corresponding to a heat conductive pad mounting region of the substrate has a surface area of 5% to 24% of the total area of the heat conductive pad on the entire open region of the metal mask may be disposed.For example, the open portion of the metal mask corresponding to the thermal pad mounting portion of the substrate may include a plurality of hole patterns, and the plurality of hole patterns may be disposed to be offset in at least one direction from an X-axis direction or a Y-axis direction.Next, in the present disclosure, a solder may be formed through the open area of the metal mask on the substrate so that adjacent solders are arranged offset in at least one of the X-axis direction or the Y-axis direction (S 30).Here, in the present disclosure, the solder may be formed such that the amount of solder formed on the thermal pad mounting region of the substrate is limited to an amount of solder passing through the open region of the metal mask having a surface area of 5% to 24% of the total area of the thermal pad.Moreover, in the present disclosure, the metal mask may be removed (S 40).Next, in the present disclosure, a resin layer may be applied to block the entrance of outside air into a lower inlet of the through hole of the substrate (S 50).As described above, in the present disclosure, the plurality of solders may be arranged to be offset in the minimum amount on the region of the substrate on which the thermal pad of the integrated circuit is fixed using the metal mask, thereby providing the solder having low thermal conductivity and the lower thickness in the minimum amount to maximally improve the heat dissipation performance at the minimum cost.Moreover, in the present disclosure, the inlet of the through hole of the substrate may be spanned with the resin layer to block the entrance of outside air into the solder, thereby preventing the generation of the void in the solder to improve the heat dissipation performance.Industrial applicabilityThe circuit board according to the present disclosure has remarkable industrial applicability because it has an effect of improving heat dissipation performance at a minimum cost by forming the thin solder with the minimum amount.
Claims
A circuit board comprising: a substrate; a solder disposed on a predetermined region of the substrate; and a heat transfer metal layer disposed between the substrate and the solder, wherein the solder is printed by a metal mask so that a plurality of solders are disposed on a region of the substrate to which a thermal pad of an integrated circuit, IC, is attached, wherein the plurality of solders disposed on the thermal pad attachment region of the substrate are disposed so that adjacent solders are offset in at least one direction of an X-axis direction or a Y-axis direction.The circuit board according to claim 1, wherein the substrate has a plurality of through holes passing through an upper portion to which the integrated circuit is mounted and a lower portion exposed to the outside, a resin layer being applied to a lower inlet of each of the through holes to block invasion of outside air.The circuit board of claim 2, wherein the through hole of the substrate has a conductive metal on its inner surface, the conductive metal being connected to a heat transfer metal layer disposed between the substrate and the solder to release heat of the heat transfer metal layer from an upper portion to a lower portion of the substrate.The circuit board according to claim 1, wherein the heat transfer metal layer comprises: a first heat transfer metal layer disposed on an upper portion to which the integrated circuit is mounted and in contact with the solder; and a second heat transfer metal layer disposed on a lower portion exposed to the outside.The circuit board of claim 1, wherein an amount of solder disposed on the thermal pad mounting area of the substrate is an amount of solder passing through an open area of the metal mask having a range of 5% to 24% of the total area of the thermal pad, wherein the open area of the metal mask having the range of 5% to 24% is an area corresponding to the thermal pad.The circuit board according to claim 5, wherein an amount of solder disposed on the thermal pad mounting area of the substrate is determined corresponding to the area of the open area of the metal mask corresponding to the thermal pad mounting area of the substrate.The circuit board of claim 5, wherein the open area of the metal mask is aligned with the range of 5% to 24% to correspond to the thermal pad mounting area of the substrate when the metal mask is disposed on an upper portion of the substrate for performing soldering.The circuit board according to claim 5, wherein the open area of the metal mask having the range of 5% to 24% has a plurality of hole patterns, the plurality of hole patterns being arranged to be offset in at least one direction from an X-axis direction or the Y-axis direction.The circuit board of claim 1, wherein the plurality of solders disposed on the thermal pad mounting region of the substrate comprises: a plurality of first solders each having a first length; and a plurality of second solders each disposed to be spaced apart from each of the first solders by a predetermined distance and having a second length longer than the first length, wherein the first solders and the second solders are alternately disposed in the X-axis direction.The circuit board of claim 9, wherein the first solders are disposed at edge portions of the second solders.The circuit board according to claim 9, wherein the first solder is provided in the Y-axis direction multiple times, and the second solder is provided in the Y-axis direction single times.A method of soldering a circuit board, the method comprising: preparing a substrate having a plurality of through holes; forming a heat transfer metal layer on the substrate; positioning a metal mask having a plurality of open areas on an upper portion of the substrate; forming a solder on the substrate through the open areas of the metal mask so that adjacent solders are arranged offset in at least one direction from an X-axis direction or a Y-axis direction; removing the metal mask; and applying a resin layer to block invasion of outside air at a lower inlet of each of the through holes of the substrate.The method of claim 12, wherein positioning the metal mask comprises positioning the metal mask in which the open area corresponding to a thermal pad attachment area of the substrate has a range of 5% to 24% of the total area of the thermal pad over the entire open area of the metal mask.The method of claim 13, wherein the open portion of the metal mask corresponding to the thermal pad mounting portion of the substrate includes a plurality of hole patterns, the plurality of hole patterns being arranged to be offset in at least one direction from the X-axis direction or the Y-axis direction.The method of claim 12, wherein forming the solder on the substrate comprises forming the solder such that an amount of solder formed on the thermal pad attachment region of the substrate is limited to an amount of solder passing through the open region of the metal mask with a range of 5% to 24% of the total area of the thermal pad.