Method and device for detecting radio frequency power signals

DE112023002249T5Pending Publication Date: 2025-03-27SHENZHEN CSL VACUUM SCI & TECH CO LTD
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Patent Information

Application Number
DE112023002249
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-08-08
Filing Date
2023-08-02
Publication Date
2025-03-27

AI Technical Summary

Technical Problem

In the existing technology, the voltage and current signals collected by the radio frequency power supply in the power on and off and PULSE modes will have a slope phenomenon, resulting in inaccurate voltage and current values ​​read, thereby affecting the accuracy of the power value and impedance value.

Method used

Determine the rising edge interval and falling edge interval in the current pulse cycle through the power change amount of continuous sampling points and the preset judgment threshold, identify and process abnormal data bits, set them to 0, empty signal value or low signal value, or in the data output Abnormal data is skipped to ensure data accuracy.

Benefits of technology

It achieves the accuracy of collecting signals from the RF power supply in on-off and PULSE modes, ensuring the accuracy of the final calculated power value and impedance value.

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Abstract

The present application discloses a method and a device for detecting radio frequency power signals, wherein the method comprises: determining a rising edge interval and a falling edge interval in a current pulse cycle based on a power change amount at successive sampling points and a preset determination threshold; determining the abnormal data bits in the sampling array that correspond to the rising edge interval for the pulse ramp determination module and the falling edge interval for the pulse ramp determination module;Setting the abnormal data bits to 0, empty signal value or low signal level value, or skipping the data output of the abnormal data bits for the pulse ramp determination module when outputting sampled data, thus solving the prior art problem that the radio frequency power supply is continuously sampled and the ramp signal generated in on / off mode and PULSE mode cannot be accurately read.
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Description

A method and device for collecting radio frequency power supply signals Technical Field

[0001] The present invention relates to the technical field of radio frequency power supply signal acquisition, and in particular to a radio frequency power supply signal acquisition method and device. Background Art

[0002] Current acquisition boards in RF power supplies collect voltage and current signals through continuous sampling. In power-on / off and PULSE modes, the collected voltage and current signals exhibit a ramping phenomenon, which is unavoidable. Inaccurate voltage and current readings during this ramping phase lead to inaccurate power and impedance calculations. The voltage and current signals collected in power-on / off and PULSE modes exhibit a ramping phenomenon, which leads to inaccurate power and impedance calculations. With existing technology, it is unavoidable to avoid the ramping phenomenon in power-on / off and PULSE modes.

[0003] Summary of the Invention

[0004] Therefore, the technical problem to be solved by the present invention is to overcome the defect in the prior art that the ramp signal generated by continuous sampling of the RF power supply in the power on / off and PULSE modes cannot be accurately read, thereby providing a RF power supply signal acquisition method and device.

[0005] To solve the above technical problems, the disclosed embodiments of the present invention at least provide a method and device for collecting radio frequency power supply signals.

[0006] In a first aspect, an embodiment of the present invention provides a method for collecting radio frequency power supply signals, the method comprising:

[0007] Determine the rising edge interval and falling edge interval within the current pulse cycle according to the power change of continuous sampling points and the preset judgment threshold;

[0008] Determine abnormal data bits corresponding to the rising edge interval and the falling edge interval in the sampling array;

[0009] The abnormal data bit is set to 0, a null signal value or a signal low bit value, or, when outputting sampled data, the data output of the abnormal data bit is skipped.

[0010] Optionally, determining the rising edge interval and the falling edge interval within the current pulse cycle based on the power variation of consecutive sampling points and a preset determination threshold includes: continuously acquiring RF power signals of at least three sampling points in chronological order; determining the power of each of the sampling points based on the RF power signals; sequentially subtracting the power values ​​obtained for each of the sampling points to obtain the power variation of at least two arbitrary adjacent sampling points; and determining the rising edge interval and the falling edge interval within the current pulse cycle based on the power variation and the preset determination threshold.

[0011] Optionally, determining the rising edge interval and the falling edge interval within the current pulse period based on the power change and the preset judgment threshold includes: determining the changing law of the power change; if at least one of the power change exceeds the preset judgment threshold upward or downward, determining that the current sampling point is within the rising edge interval or the falling edge interval; otherwise, determining that the current sampling point is not within the rising edge interval or the falling edge interval.

[0012] Optionally, determining that the current sampling point is not within the rising edge interval or the falling edge interval includes: if two consecutive power changes are in opposite directions and both do not exceed the preset determination threshold, determining that the current sampling point signal is in a fluctuating state.

[0013] Optionally, the preset judgment threshold is Δth, 0<Δth, the power changes of at least two arbitrary adjacent sampling points include Δ1 and Δ2, and at least one of the power changes exceeds the preset judgment threshold upward or downward, including: at least one of the formulas +Δth≦|Δ1| and +Δth≦|Δ2| holds true.

[0014] Optionally, the two consecutive power changes are in opposite directions and neither exceeds the preset judgment threshold, including: the formulas 0≦Δ1<Δth and -Δth<Δ2≦0 are simultaneously established, or the formulas -Δth<Δ1≦0 and 0≦Δ2<Δth are simultaneously established.

[0015] Optionally, the case where at least one of the formulas +Δth≦|Δ1| and +Δth≦|Δ2| holds true, when the formulas +Δth≦|Δ1| and +Δth≦|Δ2| hold true at the same time, includes: when the power change continuously increases, the formulas +Δth≦Δ1 and +Δth≦Δ2 hold true at the same time; when the power change continuously decreases, the formulas Δ1≦-Δth and Δ2≦-Δth hold true at the same time.

[0016] Optionally, outside the rising edge interval and the falling edge interval, the sampling array reads and outputs the sampling data in sequence.

[0017] In a second aspect, the disclosed embodiments of the present invention further provide a radio frequency power supply signal acquisition device, comprising:

[0018] A pulse slope determination module, configured to determine a rising edge interval and a falling edge interval within a current pulse cycle based on the power variation at consecutive sampling points and the preset determination threshold;

[0019] An abnormal data bit determination module is used to determine the abnormal data bits corresponding to the rising edge interval and the falling edge interval in the sampling array;

[0020] The abnormal data bit processing module is used to set the abnormal data bit to 0, a null signal value or a signal low bit value, or, when outputting sampled data, skip the data output of the abnormal data bit.

[0021] In a third aspect, an embodiment disclosed in the present invention further provides a computer device, comprising: a processor, a memory, and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the computer device is running, the processor and the memory communicate via the bus, and when the machine-readable instructions are executed by the processor, the steps of the above-mentioned first aspect, or any possible implementation of the first aspect, are performed.

[0022] In a fourth aspect, the disclosed embodiments of the present invention further provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, executes the steps of the above-mentioned first aspect or any possible implementation of the first aspect.

[0023] The technical solutions provided by the embodiments of the present invention can have the following beneficial effects:

[0024] By detecting the slope of the feedback signal, the ramp interval is determined to determine whether the collected data is accurate. If it is determined to be accurate, the collected data is retained; otherwise, the abnormal data bit is set to 0, an empty signal value, or a signal low-bit value, or the abnormal data is skipped when the data is output. The accuracy of the collected data is determined based on the slope of the collected signal, and the inaccurate ramp signals collected by the RF power supply in the power on / off and PULSE modes are calibrated, so that the final calculated power and impedance values ​​are accurate.

[0025] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0027] FIG1 shows a flow chart of a method for collecting radio frequency power supply signals provided by an embodiment of the present invention;

[0028] FIG2 and FIG3 show a flow chart of another RF power signal acquisition method provided by an embodiment of the present invention;

[0029] FIG4 shows a schematic diagram of a pulse signal structure in an embodiment of the present invention;

[0030] FIG5 shows another schematic diagram of a pulse signal structure in an embodiment of the present invention;

[0031] FIG6 shows a schematic structural diagram of a radio frequency power supply signal acquisition device provided by an embodiment of the present invention;

[0032] FIG7 shows a schematic structural diagram of a computer device provided by an embodiment disclosed in the present invention. DETAILED DESCRIPTION

[0033] Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. In the following description, when referring to the drawings, like numbers in different figures represent like or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present invention, as detailed in the appended claims.

[0034] Example 1

[0035] As shown in FIG1 , a flow chart of a method for collecting radio frequency power supply signals provided by an embodiment of the present invention is provided. The method includes:

[0036] S11: Determine the rising edge interval and the falling edge interval within the current pulse period according to the power variation of the continuous sampling points and the preset judgment threshold;

[0037] S12: Determine the abnormal data bits corresponding to the rising edge interval and the falling edge interval in the sampling array;

[0038] S13: setting the abnormal data bit to 0, the null signal value or the signal low bit value, or, when outputting the sampled data, skipping the data output of the abnormal data bit;

[0039] S14: Outside the rising edge interval and the falling edge interval, the sampling array reads and outputs the sampling data in sequence.

[0040] It can be understood that the technical solution provided in this embodiment determines the ramp interval by detecting the slope of the feedback signal, and then determines whether the collected data is accurate. If it is determined to be accurate, the collected data is retained; otherwise, the abnormal data bit is set to 0, an empty signal value or a signal low-bit value, or the abnormal data is skipped when the data is output, so as to determine whether the collected data is accurate based on the slope of the collected signal, and then calibrate the inaccurate ramp signal collected by the RF power supply in the power on / off and PULSE modes, so that the final calculated power value and impedance value are accurate.

[0041] Example 2

[0042] As shown in FIG2 , a flow chart of another method for collecting radio frequency power supply signals provided by an embodiment of the present invention is provided. In conjunction with FIG3 , the method includes:

[0043] S21: Determine the rising edge interval and the falling edge interval within the current pulse period according to the power variation of the continuous sampling points and the preset judgment threshold;

[0044] S22: Determine the abnormal data bits corresponding to the rising edge interval and the falling edge interval in the sampling array;

[0045] S23: setting the abnormal data bit to 0, an empty signal value, or a signal low-order value, or, when outputting sampled data, skipping the data output of the abnormal data bit;

[0046] S24: Outside the rising edge interval and the falling edge interval, the sampling array reads and outputs the sampling data in sequence.

[0047] In some optional embodiments, as shown by the dotted line in FIG2 , S21 includes:

[0048] S211: continuously collecting radio frequency power signals at at least three sampling points in chronological order;

[0049] S212: Determine the power value of each sampling point according to the RF power signal;

[0050] S213: Subtract the power values ​​of each sampling point obtained in sequence to obtain power changes of at least two arbitrary adjacent sampling points;

[0051] S214: Determine the rising edge interval and the falling edge interval within the current pulse cycle according to the power variation and a preset determination threshold.

[0052] In some optional embodiments, S214 includes:

[0053] Determine the changing pattern of power variation;

[0054] If at least one of the power variation exceeds the preset threshold value upward or downward, it is determined that the current sampling point is within the rising edge interval or the falling edge interval;

[0055] Otherwise, it is determined that the current sampling point is not within the rising edge interval or the falling edge interval. Specifically, in some optional embodiments, if two consecutive power changes are in opposite directions and neither exceeds a preset determination threshold, it is determined that the signal at the current sampling point is in a fluctuating state.

[0056] In some optional embodiments, the preset judgment threshold is Δth, 0<Δth, and the power changes of at least two arbitrary adjacent sampling points include Δ1 and Δ2. In the above process, the power change continuously exceeds the preset judgment threshold upward or continuously exceeds the preset judgment threshold, including: the formulas +Δth≦|Δ1| and +Δth≦|Δ2| are simultaneously established.

[0057] It should be noted that if both 0≦Δ1<+Δth and +Δth≦Δ2 hold true, or if both +Δth≦Δ1 and 0≦Δ2<+Δth hold true, the signal at the current sampling point may be fluctuating or at the beginning of a rising edge range, resulting in incorrect data. In this case, all collected data will be discarded. If both Δ1≦-Δth and 0≦Δ2<+Δth hold true, or if both 0≦Δ1<+Δth and Δ2≦-Δth hold true, the signal at the current sampling point may be fluctuating or at the beginning of a falling edge range, resulting in incorrect data. In this case, all collected data will be discarded.

[0058] In some optional embodiments, two consecutive power changes show opposite change directions and neither exceeds the preset judgment threshold, including: the formulas 0≦Δ1<Δth and -Δth<Δ2≦0 are simultaneously established, or the formulas -Δth<Δ1≦0 and 0≦Δ2<Δth are simultaneously established.

[0059] In some optional embodiments, the case where at least one of the above formulas +Δth≦|Δ1| and +Δth≦|Δ2| holds true, when the formulas +Δth≦|Δ1| and +Δth≦|Δ2| hold true at the same time, includes:

[0060] When the power variation is continuously upward, the formulas +Δth≦Δ1 and +Δth≦Δ2 are simultaneously valid;

[0061] When the power variation is continuously downward, the formulas Δ1≦-Δth and Δ2≦-Δth are simultaneously established.

[0062] In some optional embodiments, as shown in Figure 4, the RF power supply generates a ramp in both power-on and power-off modes and in PULSE mode. The low-power data collected from the start to point A is accurate; the data collected from point A to point B is inaccurate due to the rising ramp; the high-power data collected from point B to point C is accurate; the data collected from point C to point D is inaccurate due to the falling ramp; and the low-power data collected from point D to point E is accurate. The time sequence of the power values ​​collected at three consecutive points, P1, P2, and P3, is shown in Figure 4. P1 is the latest data collected, followed by P2, and P3 is the earliest data collected.

[0063] As shown in Figure 3, this is a flow chart of the present invention for determining whether the collected data is accurate. The collected power values ​​are sequentially subtracted to obtain the variation Δ1=P1-P2, Δ2=P2-P3; Δth is greater than 0, which is the threshold for determining whether the collected data is accurate. When the absolute values ​​of the two variations are both less than the judgment threshold Δth, the collected data is accurate. At this time, the corresponding collected data must be retained, otherwise the abnormal data bit is set to 0, an empty signal value, or a low-bit value of the signal, or, when outputting the sampled data, the data output of the abnormal data bit is skipped, that is, if the absolute value of at least one of Δ1 and Δ2 is greater than or equal to +Δth, the data is incorrect, and in this case, all the collected data will be discarded.

[0064] As shown in FIG5 , after calibration using the slope determination method proposed in the present invention, the slope of the feedback signal is eliminated.

[0065] It should be noted that the above-mentioned RF power signal acquisition method can be particularly used to solve the problem of inaccurate signal acquisition in the ramp interval within a pulse cycle during power on / off and PULSE modes.

[0066] To facilitate the reader's understanding, the implementation process of the above-mentioned RF power signal acquisition is described below with reference to FIG4 and FIG5 through a specific example:

[0067] Example 1 - Determining and handling rising edge related situations:

[0068] In one pulse cycle, the power values ​​of the acquisition points are calculated in sequence. When the power values ​​change, the rising edge determination results and processing methods are as follows. Assume Δth = 1.5W:

[0069] Case 1: There exists an absolute value of the change amount ≥ the preset determination threshold Δth.

[0070] 1-1, for example, the power values ​​of three sampling points are obtained successively: P1=11W, P2=9W, and P3=8W. The obtained power values ​​are subtracted in sequence to obtain power changes: Δ1=P1-P2=2>+Δth, Δ2=P2-P3=1W<+Δth, where Δ1>+Δth, that is, there is an absolute value of the change ≥ the preset judgment threshold Δth, then the collected data is inaccurate, at this time discard the data of the sampling points P1, P2, P3 or the sampling points P1, P2, that is, the data of the sampling points P1, P2, P3 or the sampling points P1, P2 are set to 0, a null signal value, or a signal low-order value. If the power change Δ1>+Δth appears for the first time in this pulse period and the power change Δ2<+Δth, then P2 is determined to be the starting point of the rising edge in this pulse period.

[0071] 1-2, for example, the power values ​​of three sampling points are obtained continuously: P1=20W, P2=20W and P3=17W, and the power changes obtained by subtracting the obtained power values ​​are: Δ1=P1-P2=0<+Δth, Δ2=P2-P3=3W>+Δth, among which Δ2>+Δth, that is, there is an absolute value of the change ≥ the preset judgment threshold Δth, then the collected data is inaccurate, at this time discard the data of the sampling points P1, P2, P3 or the sampling points P2, P3, that is, set the data of the sampling points P1, P2, P3 or the sampling points P2, P3 to 0, the null signal value or the signal low value. If the power change Δ1<+Δth appears for the first time in this pulse period and the power change Δ2>+Δth, then P2 is determined to be the rising edge end point in this pulse period.

[0072] In case 2, the absolute values ​​of two changes do not satisfy the requirement of being greater than or equal to 0 and less than the preset judgment threshold Δth. For example, the power values ​​of three consecutive sampling points are: P1=16W, P2=12W, and P3=11W. The power changes obtained by subtracting the obtained power values ​​are: Δ1=P1-P2=4>+Δth, Δ2=P2-P3=2W>+Δth, where Δ1>+Δth and Δ2>+Δth, that is, the absolute values ​​of two power changes are ≥ the preset judgment threshold Δth, and the collected data is inaccurate. At this time, the data of the P1, P2, and P3 sampling points are discarded, that is, the data of the P1, P2, and P3 sampling points are set to 0, a null signal value, or a signal low-order value. If the power change Δ1>+Δth and the power change Δ2>+Δth, it is determined that the current sampling point is within the rising edge interval and the power change is continuously upward.

[0073] Example 2 - Determining and handling situations related to falling edges:

[0074] In one pulse cycle, the power values ​​of the acquisition points are calculated in sequence. When the power values ​​change, the falling edge determination results and processing methods are as follows. Assume Δth = 1.5W:

[0075] In case 1, there is an absolute value of a change that is ≥ the preset judgment threshold Δth. 2-1, for example, the power values ​​of three consecutive sampling points are: P1 = 17W, P2 = 19W, and P3 = 20W. The power changes obtained by subtracting the obtained power values ​​are: Δ1 = P1-P2 = -2, Δ2 = P2-P3 = -1W, where Δ1 < -Δth, 0 > Δ2 > -Δth. This means that there is an absolute value of a change that is ≥ the preset judgment threshold Δth, and the collected data is inaccurate. In this case, the data of sampling points P1, P2, and P3, or P1 and P2, is discarded. That is, the data of sampling points P1, P2, and P3, or P1 and P2, is set to 0, a null signal value, or a signal low-order value. If the power change Δ1 < -Δth and 0 > Δ2 > -Δth occurs for the first time in this pulse cycle, P2 is determined to be the starting point of the falling edge in this pulse cycle.

[0076] 2-2. For example, the power values ​​of three sampling points are obtained successively: P1=8W, P2=9W, and P3=11W. The obtained power values ​​are subtracted in sequence to obtain power changes: Δ1=P1-P2=-1W, Δ2=P2-P3=-2W, where 0>Δ1>-Δth and Δ2<-Δth, that is, there is an absolute value of the change ≥ the preset judgment threshold Δth, and the collected data is inaccurate. In this case, the data of the sampling points P1, P2, and P3 or the sampling points P2 and P3 are discarded, that is, the data of the sampling points P1, P2, and P3 or the sampling points P2 and P3 are set to 0, a null signal value, or a signal low-order value. If the power change 0>Δ1>-Δth and Δ2<-Δth appears for the first time in this pulse period, it is determined that P2 is the end point of the falling edge in this pulse period.

[0077] In case 2, there are two absolute values ​​of the change that are not greater than or equal to 0 and less than the preset judgment threshold Δth. For example, the power values ​​of three consecutive sampling points are: P1 = 8W, P2 = 10W, and P3 = 14W. The power changes obtained by subtracting the obtained power values ​​are: Δ1 = P1-P2 = -2 < -Δth, Δ2 = P2-P3 = -4W < -Δth, where Δ1 < -Δth and Δ2 < -Δth. That is, there are two absolute values ​​of the change that are ≥ the preset judgment threshold Δth, and the collected data is inaccurate. At this time, the data of the sampling points P1, P2, and P3 are discarded, that is, the data of the sampling points P1, P2, and P3 are set to 0, a null signal value, or a signal low-order value. If the power change Δ1 is less than -Δth and the power change Δ2 is less than -Δth, it is determined that the current sampling point is within the falling edge interval and the power change is continuously decreasing.

[0078] It can be understood that the technical solution provided in this embodiment determines the ramp interval by detecting the slope of the feedback signal, and then determines whether the collected data is accurate. If it is determined to be accurate, the collected data is retained; otherwise, the abnormal data bit is set to 0, an empty signal value or a signal low-bit value, or the abnormal data is skipped when the data is output, so as to determine whether the collected data is accurate based on the slope of the collected signal, and then calibrate the inaccurate ramp signal collected by the RF power supply in the power on / off and PULSE modes, so that the final calculated power value and impedance value are accurate.

[0079] Example 3

[0080] As shown in FIG6 , an embodiment of the present invention further provides a radio frequency power supply signal acquisition device, comprising:

[0081] A pulse slope determination module 61 is configured to determine a rising edge interval and a falling edge interval within a current pulse cycle based on power changes at consecutive sampling points and a preset determination threshold;

[0082] An abnormal data bit determination module 62 is used to determine abnormal data bits corresponding to rising edge intervals and falling edge intervals in the sampling array;

[0083] The abnormal data bit processing module 63 is used to set the abnormal data bit to 0, a null signal value or a signal low bit value, or, when outputting sampled data, skip outputting the data of the abnormal data bit.

[0084] The sampling data output module 64 is used for reading the sampling data from the sampling array and outputting the sampling data in sequence outside the rising edge interval and the falling edge interval.

[0085] In some optional embodiments, as shown by the dashed line in FIG6 , the pulse slope determination module 61 includes:

[0086] The signal acquisition submodule 611 is configured to continuously acquire radio frequency power signals of at least three sampling points in chronological order;

[0087] A power determination submodule 612 is configured to determine the power of each sampling point according to the radio frequency power signal;

[0088] The power variation acquisition submodule 613 is configured to sequentially subtract the power values ​​of each sampling point obtained to obtain power variations of at least two arbitrary adjacent sampling points;

[0089] The slope determination submodule 614 is configured to determine a rising edge interval and a falling edge interval within the current pulse cycle according to the power variation and a preset determination threshold.

[0090] In some optional embodiments, the slope determination submodule 614 includes:

[0091] A law determination unit, used to determine a change law of the power change amount;

[0092] The slope determination unit is configured to determine whether the current sampling point is within a rising edge interval or a falling edge interval if at least one of the power variation amounts exceeds a preset determination threshold value upward or downward. Specifically, in some embodiments, if two consecutive power variation amounts change in opposite directions and neither exceeds the preset determination threshold value, it is determined that the signal at the current sampling point is in a fluctuating state; otherwise, it is determined that the current sampling point is not within the rising edge interval or the falling edge interval.

[0093] In some optional embodiments, the preset judgment threshold is Δth, 0<Δth, and the power changes of at least two arbitrary adjacent sampling points include Δ1 and Δ2, wherein the power change continuously exceeds the preset judgment threshold upward or continuously downward includes: when the power change continuously increases, the formulas +Δth≦Δ1 and +Δth≦Δ2 are simultaneously established; when the power change continuously decreases, the formulas Δ1≦-Δth and Δ2≦-Δth are simultaneously established.

[0094] Two consecutive power changes are in opposite directions and neither exceeds the preset judgment threshold, including: the formulas 0≦Δ1<Δth and -Δth<Δ2≦0 are simultaneously established, or the formulas -Δth<Δ1≦0 and 0≦Δ2<Δth are simultaneously established.

[0095] In some optional embodiments, as shown in the dotted line portion of FIG6 , the apparatus further includes:

[0096] The array output module 64 is used to read the sampling array and output the sampling data in sequence outside the rising edge interval and the falling edge interval.

[0097] It can be understood that the technical solution provided in this embodiment determines the ramp interval by detecting the slope of the feedback signal, and then determines whether the collected data is accurate. If it is determined to be accurate, the collected data is retained; otherwise, the abnormal data bit is set to 0, an empty signal value or a signal low-bit value, or the abnormal data is skipped when the data is output, so as to determine whether the collected data is accurate based on the slope of the collected signal, and then calibrate the inaccurate ramp signal collected by the RF power supply in the power on / off and PULSE modes, so that the final calculated power value and impedance value are accurate.

[0098] Example 4

[0099] Based on the same technical concept, an embodiment of the present application also provides a computer device, including a memory 1 and a processor 2. As shown in FIG7 , the memory 1 stores a computer program, and the processor 2 implements any of the above-mentioned RF power signal acquisition methods when executing the computer program.

[0100] Among them, the memory 1 includes at least one type of readable storage medium, and the readable storage medium includes a flash memory, a hard disk, a multimedia card, a card-type memory (for example, an SD or DX memory, etc.), a magnetic memory, a disk, an optical disk, etc. In some embodiments, the memory 1 can be an internal storage unit of the OTT video service monitoring system, such as a hard disk. In other embodiments, the memory 1 can also be an external storage device of the OTT video service monitoring system, such as a plug-in hard disk, a smart memory card (SmartMedia Card, SMC), a secure digital (Secure Digital, SD) card, a flash card, etc. Furthermore, the memory 1 can also include both an internal storage unit and an external storage device of the OTT video service monitoring system. The memory 1 can not only be used to store application software and various types of data installed in the OTT video service monitoring system, such as the code of the OTT video service monitoring program, but can also be used to temporarily store data that has been output or is to be output.

[0101] In some embodiments, the processor 2 can be a central processing unit (CPU), a controller, a microcontroller, a microprocessor or other data processing chip, used to run the program code stored in the memory 1 or process data, such as executing an OTT video service monitoring program.

[0102] It can be understood that the technical solution provided in this embodiment determines the ramp interval by detecting the slope of the feedback signal, and then determines whether the collected data is accurate. If it is determined to be accurate, the collected data is retained; otherwise, the abnormal data bit is set to 0, an empty signal value or a signal low-bit value, or the abnormal data is skipped when the data is output, so as to determine whether the collected data is accurate based on the slope of the collected signal, and then calibrate the inaccurate ramp signal collected by the RF power supply in the power on / off and PULSE modes, so that the final calculated power value and impedance value are accurate.

[0103] The disclosed embodiments of the present invention further provide a computer-readable storage medium having a computer program stored thereon. When executed by a processor, the computer program executes the steps of the RF power signal acquisition method described in the above method embodiment. The storage medium may be a volatile or non-volatile computer-readable storage medium.

[0104] The computer program product of the RF power signal acquisition method provided in the embodiments of the present invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the steps of the RF power signal acquisition method in the above method embodiment. For details, please refer to the above method embodiment and will not be repeated here.

[0105] The disclosed embodiments of the present invention further provide a computer program that, when executed by a processor, implements any of the methods of the aforementioned embodiments. The computer program product can be implemented in hardware, software, or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium. In another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK).

[0106] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

[0107] It should be noted that, in the description of the present invention, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" is at least two.

[0108] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention pertain.

[0109] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0110] Those skilled in the art will appreciate that all or part of the steps in the method for implementing the above-mentioned embodiment can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.

[0111] Furthermore, the functional units in the various embodiments of the present invention may be integrated into a single processing module, each unit may exist physically separately, or two or more units may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or software functional modules. If the integrated modules are implemented in the form of software functional modules and sold or used as independent products, they may also be stored in a computer-readable storage medium.

[0112] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0113] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0114] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A method for collecting radio frequency power supply signals, characterized in that: The method comprises: Determine the rising edge interval and falling edge interval within the current pulse cycle according to the power change of continuous sampling points and the preset judgment threshold; Determine abnormal data bits corresponding to the rising edge interval and the falling edge interval in the sampling array; The abnormal data bit is set to 0, a null signal value or a signal low bit value, or, when outputting sampled data, the data output of the abnormal data bit is skipped.

2. The radio frequency power supply signal acquisition method according to claim 1, characterized in that: The step of determining the rising edge interval and the falling edge interval within the current pulse period according to the power variation of the continuous sampling points and the preset determination threshold comprises: Continuously collect radio frequency power signals at at least three sampling points in chronological order; Determine the power of each sampling point according to the radio frequency power signal; Subtracting the power values ​​of each sampling point obtained in sequence to obtain power changes of at least two arbitrary adjacent sampling points; The rising edge interval and the falling edge interval in the current pulse cycle are determined according to the power variation and the preset determination threshold.

3. The radio frequency power supply signal acquisition method according to claim 2, characterized in that: Determining the rising edge interval and the falling edge interval within the current pulse period according to the power variation and the preset determination threshold comprises: Determining a variation pattern of the power variation; If at least one of the power variation exceeds the preset threshold, then Determine whether the current sampling point is within the rising edge interval or the falling edge interval; Otherwise, it is determined that the current sampling point is not within the rising edge interval or the falling edge interval.

4. The radio frequency power supply signal acquisition method according to claim 3, characterized in that: Determining whether the current sampling point is within the rising edge interval or the falling edge interval includes: If two consecutive power changes are in opposite directions and both do not exceed the preset determination threshold, it is determined that the signal at the current sampling point is in a fluctuating state.

5. The radio frequency power supply signal acquisition method according to claim 3, characterized in that: The preset judgment threshold is Δth, 0<Δth, the power changes of at least two arbitrary adjacent sampling points include Δ1 and Δ2, and at least one of the power changes exceeds the preset judgment threshold upward or downward, including: at least one of the formulas +Δth≦|Δ1| and +Δth≦|Δ2| holds true.

6. The radio frequency power signal acquisition method according to claim 4, characterized in that: The two consecutive power changes are in opposite directions and neither exceeds the preset judgment threshold, which includes: the formulas 0≦Δ1<Δth and -Δth<Δ2≦0 are simultaneously established, or the formulas -Δth<Δ1≦0 and 0≦Δ2<Δth are simultaneously established.

7. The radio frequency power supply signal acquisition method according to claim 5, characterized in that: The case where at least one of the formulas +Δth≦|Δ1| and +Δth≦|Δ2| holds true, when the formulas +Δth≦|Δ1| and +Δth≦|Δ2| hold true at the same time, includes: When the power variation is continuously upward, the formulas +Δth≦Δ1 and +Δth≦Δ2 are simultaneously established; When the power variation is continuously downward, the formulas Δ1≦-Δth and Δ2≦-Δth are simultaneously established.

8. The radio frequency power supply signal acquisition method according to any one of claims 1 to 7, characterized in that: Also includes: Outside the rising edge interval and the falling edge interval, the sampling array reads and outputs sampling data in sequence.

9. A radio frequency power signal acquisition device, characterized in that: include: A pulse slope determination module is used to determine the rising edge interval and the falling edge interval within the current pulse cycle based on the power change of continuous sampling points and a preset judgment threshold; An abnormal data bit determination module is used to determine the abnormal data bits corresponding to the rising edge interval and the falling edge interval in the sampling array; The abnormal data bit processing module is used to set the abnormal data bit to 0, a null signal value or a signal low bit value, or, when outputting sampled data, skip the data output of the abnormal data bit.

10. A computer device, characterized in that: include: A processor, a memory, and a bus, wherein the memory stores machine-readable instructions executable by the processor. When the computer device is running, the processor and the memory communicate via the bus. When the machine-readable instructions are executed by the processor, the radio frequency power signal acquisition method according to any one of claims 1 to 8 is executed.

11. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for collecting radio frequency power signals according to any one of claims 1 to 8 is executed.