POWER SWITCH WITH A SINGLE SEMICONDUCTOR

Abstract

The present invention relates to an embodiment of a semiconductor power switch in which different types of current sensors are connected in series, wherein these different types of current sensors detect the same electric current, and wherein, depending on the inflow state of the electric current, the presence or absence of a fault is assessed on the basis of the detection results of the different types of current sensors.

Description

Field of invention

[0001] The present invention relates to a power switch, in particular a semiconductor power switch, e.g. solid-state circuit breaker (SSCB), which uses a power semiconductor switch. State of the art

[0002] When a fault occurs in a power grid supplying electrical energy, abnormal currents, such as overcurrent or accidental current, can flow through the grid into a load. These abnormal currents could damage the load. Therefore, to prevent such abnormal currents from flowing into the load in the event of a fault in the power grid, a circuit breaker or residual current device (RCD) can be used to disconnect the load from the power grid, thus blocking the flow of electrical current into the load.

[0003] The problem with conventional mechanical circuit breakers was that it took a relatively long time, several tens of milliseconds, for the circuit to be switched off, during which time abnormal currents would flow into the load. Therefore, semiconductor circuit breakers (e.g., solid-state circuit breakers) are used today. These have a semiconductor switch made of power semiconductors capable of conducting large electrical currents and operating at a high switching frequency, allowing the semiconductor circuit breakers to interrupt the electrical current quickly.

[0004] With these semiconductor power switches, the time to detect the electric current is very short compared to power switches such as encapsulated power switches (MCCBs; Molded Case Circuit Breakers), so they have the advantage of being able to interrupt a circuit at high speed.

[0005] On the other hand, abnormal currents, such as noise-induced overcurrents or inrush currents that suddenly rise but quickly return to normal, do not cause damage, or it is unlikely that they will. If the circuit is interrupted as a result, the loss caused by such an interruption may even be greater.

[0006] However, with semiconductor power switches, as described above, the very short current sensing time presents a problem: the circuit is interrupted even if an electrical current occurs, such as the aforementioned noise-induced overcurrent or inrush current, which should not be interrupted. Furthermore, another problem arises: normal load operation cannot be maintained because unnecessary circuit interruptions occur repeatedly, potentially leading to losses. Disclosure of the invention. Technical problem

[0007] The present invention is based on the objective of improving the limits of the prior art, as described above.

[0008] Accordingly, this description should provide an embodiment in which a misjudgment of a fault current and an unnecessary circuit interruption can be prevented.

[0009] Furthermore, another embodiment is to be provided in which a fault current can be assessed accurately and quickly.

[0010] Furthermore, another embodiment is to be provided in which it can be detected whether a semiconductor switch is abnormal or not. Solutions to the technical problem

[0011] The present invention, which aims to solve the problem described above, uses as a means of solving the problem an evaluation process in which the presence or absence of a fault is assessed on the basis of the detection results of an electric current detected by the various types of current sensors.

[0012] In particular, the technical feature of the invention consists in the fact that the different types of current sensors are connected in series, wherein these different types of current sensors detect the same electric current, and wherein, depending on the current state of the electric current flow, the presence or absence of a fault is assessed on the basis of the detection results of the different types of current sensors.

[0013] One embodiment of a semiconductor power switch of the present invention, which uses the above-mentioned technical features as a means of solving the problem, is that semiconductor power switch, e.g. solid-state power switch, which is arranged between a power supply unit and a supply target unit and has the following features: a semiconductor switching unit comprising several semiconductor switches in which a maximum magnitude of an electric current supplied from the power supply unit to the supply target unit is determined according to a gate voltage applied at the gate terminal; multiple gate drivers, each of which applies the gate voltage to each of the multiple semiconductor switches; one or more first current sensors, which are provided at one or more points from a first point representing a front end of the semiconductor switch unit, a second point located between the multiple semiconductor switches and a third point representing a rear end of the semiconductor switch unit, and thus detect an electrical inflow current (hereinafter also referred to as inflow current) flowing into the semiconductor switch unit; one or more second current sensors, which are provided at one or more points from the first point, the second point and the third point and thus detect the electrical inflow current, and which are of a different type than the first current sensors; and a control unit that uses the first measurement results from the first current sensors and the second measurement results from the second current sensors to assess whether the inflow current is a fault current or not, and thus controls the multiple gate drivers according to the resulting assessment result.

[0014] In one embodiment, it may be provided that one of the first current sensor and the second current sensor is a sensor that performs a measurement using the Hall effect.

[0015] In one embodiment, it may be provided that one of the first current sensor and the second current sensor is a Hall sensor.

[0016] In one embodiment, it may be provided that one of the first current sensor and the second current sensor is a sensor that performs a measurement in a magnetoresistive manner.

[0017] In one embodiment, it may be provided that one of the first current sensor and the second current sensor is a giant magnetoresistive (GMR) sensor.

[0018] In one embodiment, it can be provided that the sensor, which performs a measurement in a magnetoresistive manner, is provided at the second point, wherein the electrical inflow current between the multiple semiconductor switches is detected in a magnetoresistive manner.

[0019] In one embodiment, it may be provided that the first current sensor and the second current sensor are located at different points.

[0020] In one embodiment, it may be provided that the first current sensor and the second current sensor are located at the same point.

[0021] In one embodiment, it may be provided that, if the first current sensor consists of several current sensors, these several first current sensors are provided at different points.

[0022] In one embodiment, it may be provided that, if the first current sensor consists of several current sensors, two or more of these several first current sensors are provided at the same point.

[0023] In one embodiment, it may be provided that, if the second current sensor consists of several current sensors, these several second current sensors are provided at different points.

[0024] In one embodiment, it may be provided that, if the second current sensor consists of several current sensors, two or more of these several second current sensors are provided at the same point.

[0025] In one embodiment, it may be provided that, if the first current sensor or the second current sensor each consists of several current sensors, the several current sensors of one are provided at the same point as the several first and the several second current sensors, while the several current sensors of the other are provided at remaining points.

[0026] In one embodiment, it may be provided that, if the first current sensor or the second current sensor each consist of several current sensors, one or more of the several first current sensors and one or more of the several second current sensors are provided at the same point.

[0027] In one embodiment, the above control unit may assess whether the fault current is present or not by changing the assessment basis for the presence or absence of the fault current according to the section in accordance with the inflow time of the electrical inflow current.

[0028] In one embodiment, it may be provided that the above control unit assesses the presence or absence of the fault current based on the one detection result of the first and the second detection result during a first time interval from a first time point to a second time point after the inflow of the inflow current.

[0029] In one embodiment, it may be provided that the above control unit assesses the presence or absence of the fault current based on the other detection result of the first and the second detection result during a second time interval from a second time point to a third time point after the first time interval.

[0030] In one embodiment, it may be provided that the above control unit, based on the first detection result and the second detection result, recognizes the rate of change of the inflow current and thus assesses the presence or absence of the fault current by changing the basis for assessing the presence or absence of the fault current according to the resulting detection result.

[0031] In one embodiment, it may be provided that, if the rate of change corresponds to a certain change criterion, the above control unit assesses the presence or absence of the fault current based on the one detection result of the first and the second detection result.

[0032] In one embodiment, it may be provided that, if the rate of change does not correspond to the specified change criterion, the above control unit assesses the presence or absence of the fault current based on the other detection result of the first and the second detection result.

[0033] In one embodiment, the control unit above may compare the first and second detection results with one or more of a first reference current and a second reference current that is larger than the first reference current, and thus assess the presence or absence of the fault current based on the resulting comparison result.

[0034] In one embodiment, it may be provided that if the first detection result and the second detection result are greater than or equal to the first reference current based on the above comparison result, then the above control unit assesses that the inflow current belongs to the fault current.

[0035] In one embodiment, it may be provided that if the first detection result and the second detection result are smaller than the first reference current based on the above comparison result, then the above control unit assesses that the inflow current does not belong to the fault current.

[0036] In one embodiment, it may be provided that if the first detection result is less than the first reference current based on the above comparison result, while the second detection result is greater than or equal to the second reference current, then the above control unit assesses that the inflow current belongs to the fault current.

[0037] In one embodiment, it may be provided that if the first detection result based on the above comparison result is greater than or equal to the first reference current, while the second detection result is less than the first reference current, then the above control unit assesses that the inflow current does not belong to the fault current.

[0038] In one embodiment, it may be provided that if the above control unit judges, based on a resulting assessment, that the inflow current belongs to the fault current, then it controls the multiple gate drivers in such a way that the inflow current is interrupted.

[0039] In one embodiment, it may be provided that, if one or more of the first and second current sensors are provided at the first and third points respectively, the above control unit recognizes, based on the detection result at the first point and the detection result at the third point, whether the semiconductor switching unit is abnormal or not, and thus controls the multiple gate drivers according to the resulting detection result.

[0040] In one embodiment, it may be provided that if the difference between the detection result at the first point and the detection result at the third point is greater than or equal to a reference difference, then the above control unit recognizes that an anomaly has occurred in the semiconductor switch unit.

[0041] In one embodiment, it may be provided that if the above control unit detects, based on the resulting detection result, that an anomaly has occurred in the semiconductor switching unit, then it controls the multiple gate drivers in such a way that the inflow current is interrupted.

[0042] In one embodiment, it may be provided that, if one or more of the first current sensor and the second current sensor are each provided at at least two of the first to third points, the above control unit monitors a residual electrical current at each of the at least two points based on the detection results at each of the at least two points while the inflow current is interrupted, and thus recognizes, based on the resulting monitoring results, whether the semiconductor switching unit is abnormal or not.

[0043] In one embodiment, it may be provided that if one or more of the residual currents at each of the at least two points is greater than or equal to a reference residual current, then the above control unit recognizes that an anomaly has occurred in a semiconductor switch connected to the corresponding point.

[0044] In one embodiment, it may be provided that if the difference between any two residual currents at each of the at least two points is greater than or equal to a reference current difference, then the above control unit recognizes that an anomaly has occurred in a semiconductor switch arranged between the corresponding points.

[0045] The embodiments of the semiconductor power switch described above are not limited to the embodiments described above and may also include the embodiments described in the specific description to be mentioned later or derived from this specific description. Effects of the invention

[0046] According to an embodiment of a semiconductor power switch of the present invention, a fault current can be assessed based on the multiple detection results of the different types of current sensors, so that an effect is achieved in which the fault current can be accurately assessed.

[0047] Accordingly, a further effect is achieved: a misjudgment of a fault current and an unnecessary circuit interruption can be prevented.

[0048] Furthermore, multiple detection results are used at both ends of a semiconductor switch unit, thus achieving the additional effect of being able to detect whether a semiconductor switch is abnormal or not.

[0049] The effects according to the embodiments of the semiconductor power switch described above are not limited to the effects described above and may also include the effects described in or derived from the specific explanations to be mentioned later. Brief description of the drawings

[0050] They show: Fig. 1 a circuit diagram of a semiconductor power switch according to one embodiment; Fig. 2a to 2d specific examples a to d of the in Fig. 1 semiconductor power switch shown; Fig. 3 a diagram illustrating a concept for assessing a fault current for each section of the semiconductor circuit breaker according to the embodiment; and Fig. 4 a diagram to illustrate an example of the assessment of a fault current of the semiconductor power switch according to the embodiment. Preferred embodiments of the invention

[0051] It should be noted that the technical terms used in this description serve only to explain specific embodiments and are not intended to limit the present invention. Furthermore, singular expressions used in this description also include plural expressions unless the context clearly indicates otherwise. Additionally, the suffixes "module" and "unit" for the components used in the following explanations are specified or used interchangeably only for the sake of simplicity in preparing this description and do not in themselves have different meanings or roles.

[0052] In this description, the terms “consist of” or “comprise” and “include” should not be interpreted as necessarily including all the various components or steps described in this description, but rather as meaning that some of the components or steps may not be included, or that additional components or steps may be included.

[0053] Furthermore, if, in explaining the technology disclosed in this description, it is determined that a detailed explanation of a related, known technology could confuse the main point of the technology disclosed in this description, the detailed explanation will be omitted.

[0054] Furthermore, the accompanying drawings serve only to facilitate understanding of the embodiments disclosed in this description. It should be understood that the technical idea disclosed in this description is not limited by the accompanying drawings and also includes all modifications, equivalents, and substitutes that are contained within the spirit and technical scope of the present invention. Moreover, not only the respective embodiments described below, but also combinations of these embodiments represent the modifications, equivalents, and substitutes that are contained within the spirit and technical scope of the present invention and may, of course, be included within its spirit and technical scope.

[0055] To facilitate a complete understanding of the present invention, the basic principle will first be described. According to the invention, an electrical output voltage of a gate driver of a semiconductor, which determines a holding current output by the semiconductor switch, is limited, thus reducing the maximum electrical current that can flow through the semiconductor switch. This, in turn, can limit the maximum electrical current applied from the mains to the load. Therefore, if a noise-induced overcurrent or inrush current occurs, the overcurrent is suppressed so that an electrical current below the permissible current of the semiconductor power switch can flow, thus preventing the semiconductor power switch from interrupting the circuit even when the noise-induced overcurrent or inrush current occurs.

[0056] Fig. Figure 1 shows a circuit diagram of a circuit structure of a semiconductor power switch 10 according to an embodiment.

[0057] As in Fig. As shown in Figure 1, the semiconductor power switch 10 is arranged between a power supply unit G and a supply target unit S.

[0058] The semiconductor power switch 10 is provided to have a semiconductor switch unit 110 comprising several semiconductor switches 111 and 112 that can be switched on / off and are connected in series; several gate drivers 121 and 122; one or more first current sensors 131; one or more second current sensors 132; and a control unit 140.

[0059] In this way, the semiconductor power switch 10, which includes the semiconductor switch unit 110; the multiple gate drivers 121 and 122; the one or more first current sensors 131; the one or more second current sensors 132; and the control unit 140; can additionally include a break switch 150 and an overvoltage protection unit 160.

[0060] The power supply unit G and the supply target unit S can be different power grids.

[0061] Alternatively, one can be a power grid consisting of the power supply unit G and the supply target unit S, and the other can be a load.

[0062] Furthermore, both the power supply unit G and the supply target unit S can be power grids.

[0063] For example, the power supply unit G and the supply target unit S could be different microgrids.

[0064] These two units, i.e. the power supply unit G and the supply target unit S, are connected to the semiconductor power switch 10, so that a bidirectional electrical current flow can form both from the power supply unit G to the supply target unit S and from the supply target unit S to the power supply unit G.

[0065] Furthermore, the electric current flow from the power supply unit G to the supply target unit S, the electric current flow from the supply target unit S to the power supply unit G and the bidirectional electric current flow between the power supply unit G and the supply target unit S can be interrupted by the semiconductor power switch 10.

[0066] For this bidirectional interruption, the first semiconductor switch 111 and the second semiconductor switch 112 can be designed such that the circuit can be interrupted not only when the current flows from the power supply unit G to the supply target unit S, but also when the current flows from the supply target unit S to the power supply unit G.

[0067] As an example, the first semiconductor switch 111 and the second semiconductor switch 112 can each represent the semiconductor switch which consists of N-channel MOSFET elements in which the source and the drain are arranged in opposite directions.

[0068] The semiconductor switch unit 110 has several semiconductor switches 111 and 112, the maximum size of which of an electrical current supplied by the power supply unit G to the supply target unit S is determined according to an electrical voltage applied to the gate terminal.

[0069] The multiple semiconductor switches 111 and 112 can include the first semiconductor switch 111 and the second semiconductor switch 112.

[0070] Furthermore, the first semiconductor switch 111 and the second semiconductor switch 112 can each additionally have a first and a second diode 111D and 112D, wherein these two diodes are arranged in opposite directions of current flow in order to prevent damage to the MOSFET elements by a reverse voltage when the circuit is interrupted due to an accidental current.

[0071] In this case, the respective anodes or cathodes of the first diode 111D and the second diode 112D can be connected to a source terminal or a drain terminal of each of the MOSFET elements 111 and 112.

[0072] Accordingly, the first diode 111D can be connected in parallel to the MOSFET element of the first semiconductor switch 111 and thus arranged in a direction opposite to the electrical current flowing from the power supply unit G to the supply target unit S.

[0073] Furthermore, the second diode 112D can be connected in parallel to the MOSFET element of the second semiconductor switch 112 and thus arranged in a direction opposite to the electrical current flowing from the supply target unit S to the power supply unit G.

[0074] The semiconductor power switch 10 has the first semiconductor switch 111 and the second semiconductor switch 112, which are both designed in a complementary symmetrical form, and can be designed to interrupt all accident currents flowing in both directions.

[0075] For the sake of simplicity, the following explanation assumes that the power supply unit G is a power grid and the supply target unit S is a load. However, as described above, the semiconductor circuit breaker 10, according to one embodiment of the present invention, is designed to interrupt all accidental currents flowing in both directions, although the present invention is not limited to this.

[0076] The above multiple gate drivers 121 and 122 comprise a plurality of gate drivers 121 and 122, each of which applies an electrical gate voltage to each of the above multiple semiconductor switches 111 and 112.

[0077] The above multiple gate drivers 121 and 122 can each include the first gate driver 121 and the second gate driver 122.

[0078] Furthermore, the first and second gate drivers 121 and 122 can each apply the electrical gate voltage to the first 111 and the second semiconductor switch 112 according to the control of the control unit 140.

[0079] If, in this case, an electrical gate voltage is applied that exceeds a threshold voltage of each of the first 111 and the second semiconductor switch 112, the resistance values ​​at the output terminals of the first 111 and the second semiconductor switch 112 become smaller than those at the input terminals of the two semiconductor switches. Accordingly, electrical conduction occurs between the respective input and output terminals of the first 111 and the second semiconductor switch 112, so that a circuit can be formed between the power supply unit G and the supply destination unit S.

[0080] In this case, the resistance values ​​at the output terminals of the first 111 and the second semiconductor switch 112 can then become smaller when the applied gate voltage increases.

[0081] If the resistance values ​​at the output terminals of the first 111 and the second semiconductor switch 112 are controlled by regulating the electrical gate voltage, the electric current can therefore flow more easily, so that the electric current value that is permissible at the first 111 and second semiconductor switch 112, i.e. the permissible holding current, can become larger.

[0082] Therefore, a larger electrical current can be delivered from the power supply unit G to the target supply unit S.

[0083] On the other hand, if an electrical gate voltage is applied which is lower than a threshold voltage of each of the first 111 and the second semiconductor switch 112, or if the electrical gate voltage is not applied, the resistance values ​​at the output terminals of the first 111 and the second semiconductor switch 112 may be equal to or greater than the resistance values ​​at the input terminals of the two semiconductor switches.

[0084] Accordingly, no electrical connection can be made between the input and output terminals of the first 111 and the second semiconductor switch 112, whereby the power supply unit G and the power supply target unit S can be electrically separated (isolated) from each other, so that the circuit connection can be interrupted.

[0085] In this way, in the case of the first 111 and the second semiconductor switch 112, the resistance values ​​at the output terminals of the first 111 and the second semiconductor switch 112 can vary according to the electrical voltage applied to the gate terminal via the multiple gate drivers 121 and 122, i.e., the output voltage of the multiple gate drivers 121 and 122.

[0086] Furthermore, the magnitude of the electrical drain current, i.e., the magnitude of the electrical current that can be supplied via the first 111 and the second semiconductor switch 112, can be determined depending on the resistance values ​​at the output terminals of the first 111 and the second semiconductor switch 112.

[0087] Therefore, the permissible holding currents of the first 111 and the second semiconductor switch 112 are determined depending on the output voltage of the multiple gate drivers 121 and 122. Accordingly, the magnitude of the electrical current supplied from the power supply unit G to the supply target unit S can also be determined.

[0088] The first current sensor 131 consists of one or more current sensors and is provided at one or more points: a first point P1 representing a front end of the semiconductor switch unit 110, a second point P2 located between the several semiconductor switches 111 and 112, and a third point P3 representing a rear end of the semiconductor switch unit 110, so that it detects an inflow current flowing into the semiconductor switch unit 110.

[0089] The second current sensor 132 also consists of one or more current sensors, but is of a different type than the first current sensor 131, and is also provided at one or more of the first point P1, the second point P2 and the third point P3, so that it detects the inflow current.

[0090] That is, each of the one or more first current sensors 131 and of the one or more second current sensors 132 can each be provided at one or more of the first point P1, the second point P2 and the third point P3.

[0091] For example, as in Fig. Figure 1 shows the first current sensor 131 being located at the first point P1, and the second current sensor 132 being located at the second point P2.

[0092] One of the first current sensor 131 and the second current sensor 132 can represent the sensor which performs a measurement of an electric current using the Hall effect.

[0093] For example, one current sensor could be a Hall sensor.

[0094] Furthermore, one of the first current sensor 131 and the second current sensor 132 can represent the sensor which performs a measurement of an electric current in a magnetoresistive manner.

[0095] For example, one current sensor could be a giant magnetoresistive sensor (GMR sensor).

[0096] The Hall sensor is robust against noise but has a slower detection speed than the GMR sensor, while the GMR sensor is sensitive to noise but has a faster detection speed. Therefore, if the GMR sensor detects an electric current in a low-speed range with low current amplitude and rise time, and high noise levels, the accuracy of its detection will be reduced compared to the Hall sensor due to the noise.However, if the Hall sensor detects an electric current in a high-speed range where the strength and rise time of the electric current are high, then rapid detection cannot be achieved, thus reducing the accuracy of the detection result of the Hall sensor compared to the GMR sensor.

[0097] If the electric current in the low-speed range, where the magnitude and rise time of the electric current are low, is detected by the Hall sensor, while in the high-speed range, where the magnitude and rise time of the electric current are high, it is detected by the GMR sensor, then correspondingly accurate current detection can be achieved.

[0098] Regarding the first 131 and the second current sensor 132, the first current sensor 131 can be a Hall sensor and the second current sensor 132 can be a GMR sensor.

[0099] This means that the semiconductor circuit breaker 10 can assess whether a fault current is present or not, based on the detection results of the inflow current by the different types of current sensors.

[0100] Accordingly, the semiconductor circuit breaker 10 can assess whether the fault current is present or not based on the various detection results acquired by the different types of current sensors, so that a more accurate and appropriate assessment of the fault current can be carried out.

[0101] If one of the first current sensor 131 and the second current sensor 132 represents the sensor which performs the measurement in a magnetoresistive manner, i.e. a magnetoresistive measuring sensor, the magnetoresistive measuring sensor is provided at the second point P2, so that the inflow current between the several semiconductor switches 111 and 112 can be detected in the magnetoresistive measuring manner.

[0102] If the second current sensor 132 is, for example, the GMR sensor, the second current sensor 132 is provided at the second point so that the inflow current between the several semiconductor switches 111 and 112 can be detected in a magnetoresistive measuring manner.

[0103] If the GMR sensor is provided in this way at the second point P2 between the multiple semiconductor switches 111 and 112, then the inflow current flowing between the multiple semiconductor switches 111 and 112 can be detected faster than with the Hall sensor.

[0104] Furthermore, if the inflow current flows between the multiple semiconductor switches 111 and 112, then the fluctuation of the inflow current through these multiple semiconductor switches 111 and 112 increases, whereby, if the GMR sensor, which detects the change in the relative electric current velocity in the magnetoresistive measuring manner, is provided at the second point P2, then the fluctuation of the inflow current can be detected quickly.

[0105] Accordingly, in response to rapid and large changes in current, such as an accidental current, a rapid assessment of the presence or absence of a fault current and a rapid countermeasure can be carried out.

[0106] Furthermore, the first current sensor 131 and the second current sensor 132 can be located at different points.

[0107] For example, as in Fig. As shown in Figure 1, the first current sensor 131 is located at the first point P1 and the second current sensor 132 is located at the second point P2.

[0108] On the other hand, the first current sensor 131 and the second current sensor 132 can also be located at the same point.

[0109] For example, as in Fig. As shown in Figure 2a, the first current sensor 131 and the second current sensor 132 are both located at the second point P2.

[0110] If, on the other hand, the first current sensor 131 consists of several current sensors, these several first current sensors 131 can be provided at different points.

[0111] For example, as in Fig. As shown in Figure 2b, a first-first current sensor 131a is provided at the first point P1 and a first-second current sensor 131b is provided at the third point P3.

[0112] If the second current sensor 132 also consists of several current sensors, these several second current sensors 132 can be provided at different points.

[0113] For example, as in Fig. As shown in Figure 2b, a second-first current sensor 132a is provided at the second point P2 and a second-second current sensor 132b is provided at the third point P3.

[0114] If the first current sensor 131 consists of several current sensors, then two or more of the several first current sensors 131 can also be provided at the same point.

[0115] For example, as in Fig. As shown in Figure 2c, the first current sensor 131a and the first current sensor 131b are all located at the first point P1.

[0116] If the second current sensor 131 also consists of several current sensors, then two or more of the several second current sensors 132 can be provided at the same point.

[0117] If the first current sensor 131 and the second current sensor 132 each consist of several current sensors, several sensors of one can be provided at the same point by the several first current sensor 131 and the several second current sensors 132, while several sensors of the other can be provided at remaining points.

[0118] For example, the first current sensor 131 can be designed such that the first-first current sensor 131a and the first-second current sensor 131b are provided at the first point P1, while the second current sensor 132 can be designed such that the second-first current sensor 132a is provided at the second point P2 and the second-second current sensor 132b is provided at the third point P3.

[0119] If the first current sensor 131 and the second current sensor 132 each consist of several current sensors, one or more of the several first current sensors 131 and one or more of the several second current sensors can be provided at the same point.

[0120] For example, as in Fig. As shown in Figure 2d, the first current sensor 131 may be designed such that the first-first current sensor 131a is provided at the first point P1 and the first-second current sensor 131b at the second point P2, while the second current sensor 132 may be designed such that the second-first current sensor 132a is provided at the second point P1 and the second-second current sensor 132b at the third point P3.

[0121] The first current sensor 131 and the second current sensor 132 can detect the inflow current flowing into the semiconductor switch unit 110 and then transmit a resulting detection result to the control unit 140.

[0122] Based on a first detection result from the first current sensor 131 and a second detection result from the second current sensor 132, the control unit 140 assesses the presence or absence of a fault current in the inflow current and thus controls the several gate drivers 121 and 122 based on a resulting assessment result.

[0123] The control unit 140 can assess whether the fault current is present or not by changing the assessment basis for the presence or absence of the fault current according to the section and the inflow time of the electrical inflow current.

[0124] For example, the section is as in Fig. Figure 3 shows that the system is essentially divided into several sections according to the inflow time of the electrical inflow current, namely a zero section S1, a first section S2 and a third section S3, whereby the assessment basis for the presence or absence of the fault current is varied for the zero section S1, the first section S2 and the third section S3, so that the presence or absence of the fault current can be assessed.

[0125] It may be provided that the zero section S1 represents an initial section into which the inflow flows, that the first section S2 represents the one in which the rate of increase of the inflow after the zero section S1 is faster than a certain rate of increase, and that the second section S3 represents the one in which the rate of increase of the inflow after the first section S2 is slower than the certain rate of increase.

[0126] The control unit 140 can be based on a DESAT (desaturation) voltage detection result of the semiconductor switch unit 110 during the zero section S1 up to the first time t off_1 After the inflow of the inflow current, assess the presence or absence of a fault current.

[0127] Furthermore, the control unit 140 can, based on the one acquisition result from the first acquisition result and the second acquisition result during the first section S2 from the first time t off_1 until the second time point t off_2 After the inflow of the inflow current, assess the presence or absence of a fault current.

[0128] This means that the control unit 140 can, based on one of the first acquisition results and the second acquisition results, within a period from the first time t off_1 until the second time point t off_2 , during which the rate of increase of the inflow current is faster than the specified rate of increase, assess the presence or absence of a fault current.

[0129] Furthermore, the control unit 140 can, based on a detection result corresponding to the GMR sensor, from the first detection result and the second detection result during the first section S2 from the first time t off_1 until the second time point t off_2 Assess the presence or absence of a fault current.

[0130] For example, if the first current sensor 131 is a Hall sensor, while the second current sensor 132 is a GMR sensor, then the presence or absence of the fault current during the first section S2 can be assessed based on the detection result of the second current sensor 132.

[0131] This means that if it is the first section S2 where the rate of increase of the inflow current is faster than the specified rate of increase, the control unit 140 can assess the presence or absence of a fault current based on the detection result of the GMR sensor.

[0132] Accordingly, the presence or absence of the fault current during the first section S2, in which the rate of increase of the inflow current is faster than the specified rate of increase, is assessed based on the detection result of the GMR sensor, which has a fast rate of increase of the inflow current, so that the presence or absence of a fault current can also be quickly assessed in the section in which the inflow current increases rapidly.

[0133] Furthermore, the control unit 140 can, based on the other acquisition result, from the first acquisition result and the second acquisition result during the second section S3 from the second time t off_2 up to the third time point after the first section S2, assess the presence or absence of a fault current.

[0134] This means that the control unit 140 can be used from the second time t onwards. off_2 , where the rate of increase of the inflow current is slower than the specified rate of increase, assess the presence or absence of a fault current based on a detection result that differs from the detection result used during the first section S2.

[0135] Furthermore, the control unit 140 can, based on a Hall sensor-corresponding detection result, from the first detection result and the second detection result during the second section S3 from the second time t off_2 up to the third time point after the first section S2, assess the presence or absence of a fault current.

[0136] For example, if the first current sensor 131 is a Hall sensor and the second current sensor 132 is a GMR sensor, so that the presence or absence of the fault current during the first section S2 is assessed based on the detection result of the first current sensor 131, then the presence or absence of the fault current during the second section S3 can be assessed based on the detection result of the first current sensor 131.

[0137] This means that if it is the second section S3, in which the rate of increase of the inflow current is slower than the specified rate of increase, the control unit 140 can assess the presence or absence of a fault current based on the detection result of the Hall sensor.

[0138] Accordingly, the presence or absence of the fault current during the second section S2, in which the rate of increase of the inflow current is slower than the specified rate of increase, is assessed based on the detection result of the Hall sensor, which is robust against the noise of the inflow current, so that the presence or absence of a fault current can be accurately assessed even in the section where there is a lot of noise.

[0139] As in Fig. As shown in Figure 3, the control unit 140 can thus assess the presence or absence of the fault current based on the DESAT voltage detection result during the zero section S1, the detection result of the GMR sensor during the first section S2, or the detection result of the Hall sensor during the second section S3.

[0140] On the other hand, the control unit 140 can also recognize the rate of change of the inflow current based on the first and second detection results and thus assess the presence or absence of the fault current by changing the basis for assessing the presence or absence of the fault current according to the resulting detection result.

[0141] Furthermore, based on the first and second measurement results, the control unit 140 can recognize the rate of change and compare this rate of change with a specific change criterion, so that it can assess the presence or absence of the fault current by changing the basis for assessing the presence or absence of the fault current according to the resulting comparison result.

[0142] If the rate of change corresponds to a specific change criterion, then the control unit 140 can assess the presence or absence of the fault current based on the one measurement result from the first and the second measurement result.

[0143] For example, if the rate of change essentially corresponds to the specified change criterion, then the control unit 140 can assess the presence or absence of the fault current based on the detection result corresponding to the GMR sensor from the first and second detection results.

[0144] This means that if the rate of change corresponds to the specified change criterion and also changes rapidly, then the control unit 140 can assess the presence or absence of the fault current based on the detection result of the GMR sensor, which easily performs high-speed detection.

[0145] For example, if the first current sensor 131 is the Hall sensor and the second current sensor 132 is the GMR sensor, the presence or absence of the fault current can then be assessed based on the second detection result if the rate of change corresponds to the specified change criterion.

[0146] However, if the rate of change does not correspond to the specified change criterion, then the control unit 140 can assess the presence or absence of the fault current based on the other of the first and second recording results.

[0147] If the rate of change does not correspond to the specified change criterion, then the control unit 140 can still assess the presence or absence of the fault current based on the Hall sensor's corresponding measurement result from the first measurement result and the second measurement result.

[0148] This means that if the rate of change does not correspond to the specified change criterion and thus changes slowly, then the control unit 140 can assess the presence or absence of the fault current based on the detection result of the Hall sensor, which easily performs low-speed detection.

[0149] For example, if the first current sensor 131 is the Hall sensor and the second current sensor 132 is the GMR sensor, the presence or absence of the fault current can then be assessed based on the first detection result if the rate of change does not meet the specified change criterion.

[0150] As in Fig. As shown in Figure 4, it is provided that if the rate of change corresponds to the specified change criterion, then the control unit 140 can assess the presence or absence of the fault current based on the detection result of the GMR sensor, while if the rate of change does not correspond to the specified change criterion, then it can assess the presence or absence of the fault current based on the detection result of the Hall sensor.

[0151] Furthermore, the control unit 140 can compare the first and second detection results with one or more of a first reference current and a second reference current that is larger than the first reference current, and thus assess the presence or absence of the fault current based on the resulting comparison result.

[0152] Here, the first reference current can represent an overcurrent reference value at which the semiconductor power switch 10 can operate, while the second reference current can represent a maximum overcurrent reference value at which the semiconductor power switch 10 can be damaged.

[0153] For the sake of simplicity, it is assumed in the following that the first measurement result is a measurement result from the Hall sensor and the second measurement result is a measurement result from the GMR sensor.

[0154] If the first measurement result and the second measurement result are greater than or equal to the first reference current based on the above comparison result, then the above control unit 140 therefore judges that the inflow current belongs to the fault current.

[0155] This means that if the measurement result of the Hall sensor and the measurement result of the GMR sensor is greater than or equal to the first reference current that corresponds to the overcurrent reference value, then the control unit 140 can assess that the fault current has occurred.

[0156] If, however, the first measurement result and the second measurement result are smaller than the first reference current due to the comparison result above, then the control unit above can assess that the inflow current does not belong to the fault current.

[0157] This means that if the measurement result of the Hall sensor and the measurement result of the GMR sensor is less than the first reference current that corresponds to the overcurrent reference value, then the control unit 140 can assess that the fault current has not occurred.

[0158] If the first measurement result is less than the first reference current based on the above comparison result, while the second measurement result is also greater than or equal to the second reference current, then the above control unit can assess that the inflow current belongs to the fault current.

[0159] This means that if the measurement result of the Hall sensor is less than the first reference current corresponding to the overcurrent reference value, and the measurement result of the GMR sensor is greater than or equal to the second reference current corresponding to the maximum overcurrent reference value, then the control unit 140 can assess that the fault current has occurred, since the measurement result of the GMR sensor does not belong to the noise.

[0160] If the first measurement result is smaller than the first reference current based on the above comparison result, while the second measurement result is smaller than the second reference current, then the control unit 140 can assess that the inflow current does not belong to the fault current.

[0161] This means that if the measurement result of the Hall sensor is smaller than the first reference current corresponding to the overcurrent reference value, and the measurement result of the GMR sensor is smaller than the second reference current corresponding to the maximum overcurrent reference value, then the control unit 140 can assess that the fault current has not occurred, since the measurement result of the GMR sensor relates to the noise.

[0162] If the first measurement result is greater than or equal to the first reference current based on the above comparison result, while the second measurement result is less than the first reference current, then the control unit 140 can assess that the inflow current does not belong to the fault current.

[0163] This means that if the measurement result of the Hall sensor is greater than or equal to the first reference current corresponding to the overcurrent reference value, and the measurement result of the GMR sensor is less than the first reference current corresponding to the overcurrent reference value, then the control unit 140 can assess that the fault current has not occurred, since the measurement result of the Hall sensor corresponds to a preliminary increase.

[0164] As in Fig. As shown in Figure 4, the control unit 140 can thus assess the non-occurrence of the fault current due to the noise if the first detection result and the second detection result are less than the first reference current Ic, or if the first detection result is less than the first reference current Ic and the second detection result is greater than or equal to the first reference current Ic, or if the first detection result is greater than or equal to the first reference current Ic and the second detection result is less than the first reference current Ic.

[0165] Furthermore, the control unit 140 can assess the origin of the fault current if the first detection result and the second detection result are greater than or equal to the first reference current Ic, or if the first detection result is less than the first reference current Ic and the second detection result is greater than or equal to the second reference current Ifault.

[0166] If the control unit 140, based on a resulting assessment, determines that the inflow current belongs to the fault current, then it can control the multiple gate drivers 121 and 122 in such a way that the inflow current is interrupted.

[0167] In contrast, it may be provided that, if one or more of the first 131 and the second current sensors 132 are provided at the first point P1 and the third point P3 respectively, the control unit 140 recognizes, based on the detection result at the first point P1 and the detection result at the third point P3, whether the semiconductor switch unit 110 is abnormal or not, and thus controls the multiple gate drivers 121 and 122 according to the resulting detection result.

[0168] This means that the control unit 140 can detect, based on the detection result of the inflow current at both ends of the semiconductor switch unit 110, whether the semiconductor switch unit 110 is abnormal or not.

[0169] For example, the acquisition result at the first point P1 and the acquisition result at the third point P3 are compared so that, according to the difference between the two acquisition results, it can be determined whether the semiconductor switch unit 110 is abnormal or not.

[0170] If the difference between the measurement result at the first point P1 and the measurement result at the third point P3 is greater than or equal to a reference difference, the control unit 140 can detect that an anomaly has occurred in the semiconductor switch unit 110.

[0171] This means that if the difference between the measurement result at the first point P1 and the measurement result at the third point P3 is greater than or equal to the reference difference, then the control unit 140 judges that an anomaly has occurred in the semiconductor switch unit 110, such that the current measurement result at the first point P1 corresponding to a front end of the semiconductor switch unit 110 and the current measurement result at the third point P3 corresponding to a rear end of the semiconductor switch unit 110 are different, which consequently allows the control unit to detect the origin of the anomaly in the semiconductor switch unit 110.

[0172] If one or more of the first current sensors 131 and the second current sensors 132 are provided at the first point P1 and the third point P3 respectively, then the control unit 140 can detect whether the anomaly is present in the semiconductor switch unit 110 or not.

[0173] If the control unit 140 detects, based on a resulting detection result, that the anomaly has occurred in the semiconductor switch unit 110, it can control the multiple gate drivers 121 and 122 so that the inflow current is interrupted.

[0174] Furthermore, it may be provided that, if one or more of the first current sensor 131 and the second current sensor 132 are each provided at at least two of the first to third points P1 to P3, the control unit 140 monitors a residual electrical current at each of the at least two points based on the detection results at each of the at least two points while the inflow current is interrupted, and thus recognizes, based on the resulting monitoring results, whether the semiconductor switch unit 110 is abnormal or not.

[0175] That is, if the inflow current is interrupted in a state in which one or more of the first current sensor 131 and the second current sensor 132 are each provided at at least two of the first to third points P1 to P3, then the control unit can detect, based on the monitoring result of the residual electrical current at each of the at least two points, whether the semiconductor switching unit 110 is abnormal or not.

[0176] If the inflow current is interrupted, this means a state in which the electric current does not flow into the semiconductor power switch 10, or in which the inflow current is interrupted after flowing.

[0177] That is, the residual current can be understood as the current that remains at the at least two points before or after the inflow current flows into the semiconductor power switch 10.

[0178] By providing a current sensor in this way at at least two of the first to third points P1 to P3, an anomaly in each of the multiple semiconductor switches 111 and 112 can be detected by monitoring the residual current at each of the at least two points.

[0179] Furthermore, it may be provided that if one or more of the residual currents at each of the at least two points is greater than or equal to a reference residual current, then the control unit 140 recognizes that an anomaly has occurred in a semiconductor switch connected to the corresponding point.

[0180] This means that if the residual current is greater than or equal to the reference residual current, then the control unit 140 assesses that an anomaly has occurred in the semiconductor switch connected at the corresponding point, such that the magnitude of the residual current is greater than or equal to the reference residual current, which consequently leads the control unit to recognize that the anomaly has occurred in the semiconductor switch connected at the corresponding point.

[0181] For example, it may be provided that if the magnitude of the residual current at the first point P1 is greater than or equal to the reference residual current, then it is detected that the anomaly has occurred in the first semiconductor switch 111; that if the magnitude of the residual current at the second point P2 is greater than or equal to the reference residual current, then it is detected that the anomaly has occurred in the first semiconductor switch 111 and the second semiconductor switch 112; and that if the magnitude of the residual current at the third point P3 is greater than or equal to the reference residual current, then it is detected that the anomaly has occurred in the second semiconductor switch 112.

[0182] Furthermore, it may be provided that if the difference between any two residual currents at each of the at least two points is greater than or equal to a reference current difference, then the control unit recognizes that an anomaly has occurred in a semiconductor switch arranged between the corresponding points.

[0183] That is, if the difference between any two residual currents at each of the at least two points is greater than or equal to a reference current difference, then the control unit 140 judges that an anomaly has occurred in the semiconductor switch arranged between the corresponding points, such that the difference between the electric current at one end and the electric current at the other end is greater than or equal to the reference current difference, which consequently leads the control unit to recognize that the anomaly has occurred in the semiconductor switch arranged between the corresponding points.

[0184] For example, it may be provided that if the difference between the residual current at the first point P1 and the residual current at the second point P2 is greater than or equal to the reference current difference, then it is recognized that the anomaly has occurred in the first semiconductor switch 111, while if the difference between the residual current at the second point P2 and the residual current at the second point P2 is greater than or equal to the reference current difference, then it is recognized that the anomaly has occurred in the second semiconductor switch 111.

[0185] If one or more of the first current sensor 131 and the second current sensor 132 are provided at at least two of the first to third points P1 to P3, it may be advantageous to provide one or more of the first current sensor 131 and the second current sensor 132 at each of the first to third points P1 to P3.

[0186] Accordingly, the control unit 140 can monitor the residual current at each of the first to third points P1 to P3.

[0187] Furthermore, the control unit 140 can control the multiple gate drivers 121 and 122, which each apply an electrical voltage to the gate terminals of the first and second semiconductor switches 111 and 112.

[0188] For example, the control unit 140 can control an output voltage of the multiple gate drivers 121 and 122 such that these multiple gate drivers 121 and 122 apply an electrical voltage greater than the threshold voltage to the gate terminals of the first and second semiconductor switches 111 and 112.

[0189] Since the resistance values ​​at the output terminals of the first semiconductor switch 111 and the second semiconductor switch 112 are reduced by the voltage applied by the multiple gate drivers 121 and 122 (i.e., the output voltage of the gate drivers), the current supplied by the power supply unit G can be applied to the supply target unit S via the first and second semiconductor switches 111 and 112.

[0190] On the other hand, the control unit 140, as described above, can limit the magnitude of the current flowing from one power grid to another via the semiconductor power switches 10 by using the property that a permissible holding current of the first and second semiconductor switches 111 and 112 is determined depending on the output voltage applied by the multiple gate drivers 121 and 122.

[0191] This means that the control unit 140 uses the first and second current sensors 131 and 132 to detect the current flowing from the power supply unit G to the supply target unit S and vice versa, whereby if an overcurrent greater than a predetermined value (normal current value) or the first reference current is detected, the control unit can control the multiple gate drivers 121 and 122 in such a way that the multiple gate drivers 121 and 122 apply a voltage lower than normal to the gate terminals of the first and second semiconductor switches 111 and 112.

[0192] In this case, the permissible holding current of the first and second semiconductor switches 121 and 122 is reduced due to the reduced output voltage of the gate drivers, which consequently allows the magnitude of the current output by the semiconductor switch unit 110 to be limited.

[0193] Accordingly, the electric current, which has a limited magnitude that may not be interrupted by the semiconductor power switch 10, is output by the semiconductor switch unit 110, so that it can be prevented that the connection between the power supply unit G and the supply target unit S is interrupted due to a temporary overcurrent, such as an inrush current or a noise-induced overcurrent.

[0194] Furthermore, the control unit 140 can connect a break switch 150 to the semiconductor power switch 10 to the power supply unit G (i.e., to turn on the break switch) or to break the connection between the two (i.e., to turn off the break switch).

[0195] If the semiconductor power switch 10 is connected to the power supply unit G, the power supply unit G and the supply target unit S can be electrically connected to each other via the electrical line through the semiconductor power switch 10, so that the current, which has a magnitude corresponding to the permissible holding current of the semiconductor switch unit 110, can be applied to another power network.

[0196] When the electrical connection between the power supply unit G and the supply target unit S is established, the control unit 140 can use the detection values ​​collected via the first and second current sensors 131 and 132 to determine whether an abnormal current has flowed from the power supply unit G or the supply target unit S to another power grid.

[0197] The abnormal current may include a noise-induced overcurrent, etc., which temporarily increases and then returns to a normal level.

[0198] Furthermore, this abnormal current may additionally include an overcurrent that exceeds the normal range, i.e., a short-circuit or earth fault current, which is due to an accident, etc., in the connection between the power supply unit G and the supply destination unit S.

[0199] In contrast to inrush current or noise-induced overcurrent (hereinafter collectively referred to as noise-induced overcurrent), which is temporarily applied and then returned to normal, short-circuit or earth fault current (hereinafter referred to as accident current) could damage the equipment of a load or other electrical network if it is applied to that load or other electrical network.

[0200] Therefore, if an abnormal current is detected, the control unit 140 can differentiate between the accidental current and the noise-induced overcurrent based on the magnitude of the detected overcurrent, the duration of the overcurrent, or similar factors.

[0201] And if the detected overcurrent is an accidental current, the semiconductor switch unit 110 and the interrupt switch 150 can be controlled so that the connection between the power supply unit G and the supply target unit S can be interrupted.

[0202] If, on the other hand, the detected overcurrent is a noise-induced overcurrent, the control unit 140 can limit the output voltage of the multiple gate drivers 121 and 122, as described above, so that it can also limit the permissible holding current of the semiconductor switch unit 110.

[0203] Since the magnitude of the current output by the semiconductor switch unit 110 is therefore suppressed to a value below the current magnitude permitted by the semiconductor power switch 10, an unnecessary circuit interruption of the semiconductor power switch 10 due to noise-induced overcurrent can be prevented.

[0204] On the other hand, if the control unit 140 determines, based on the detection results of the first and second current sensors 131 and 132, that the noise-induced overcurrent generated in one power network has disappeared, then it enables the restoration of the current flowing from one power network to the other power network to a normal value.

[0205] Then the control unit 140 can restore the output voltage of the multiple gate drivers 121 and 122 to a normal state and thereby restore the permissible holding current of the semiconductor switch unit 110.

[0206] Due to the nature of the temporarily occurring, noise-induced overcurrent, the control unit 140 can, of course, only limit the output voltages of the several gate drivers 121 and 122 for a predetermined period when the noise-induced overcurrent is detected.

[0207] If the specified period of time has elapsed sufficiently for the noise-induced overcurrent to disappear, the control unit 140 can in this case restore the output voltages of the several gate drivers 121 and 122 to their normal state.

[0208] For this purpose, the control unit 140 can be designed to include a timer (not shown) that can check whether the specified period has elapsed or not.

[0209] In the above description, the semiconductor switch is described as an example using an N-channel MOSFET element, but it is obvious that the present invention is not limited to this.

[0210] As an example, the first semiconductor switch 111 and the second semiconductor switch 112 can of course use any elements, such as IGBT, GTO, IGCT, etc., instead of the MOSFET element, which can be switched on and off by the voltages applied to the gate drivers by the control unit 140.

[0211] On the other hand, the interrupt switch 150 can interrupt the connection between one power network and the semiconductor circuit breaker 10 and the other power network.

[0212] In addition, the interrupt switch 150 can be a mechanical switch and can physically isolate the semiconductor power switch 10 to disconnect it from the power grid in the event of an accident.

[0213] The interrupt switch 150 can be arranged between the power supply unit G and the semiconductor switch unit 110, as shown in Fig. 1 shown.

[0214] It goes without saying that the position of the interrupt switch 150 is not limited to the one mentioned above, and that this interrupt switch can also be arranged at any other location without restriction (e.g. between the supply target unit S and the semiconductor switch unit 110).

[0215] Furthermore, the surge protection unit 160 can prevent an overvoltage from occurring at both ends of the semiconductor switch unit 110 due to residual current when the semiconductor circuit breaker 10 interrupts the circuit due to the accident current.

[0216] The surge protection unit 160 may include a snubber circuit or a surge protection element, e.g. a TVS (Transient Voltage Suppressor) element.

[0217] Alternatively, the surge protection unit 160 can consist of at least one diode and one resistor and have freewheeling circuits that are connected to both ends of the semiconductor switch unit 110.

[0218] The embodiments of the semiconductor power switch have been described so far, but these embodiments can, of course, be modified in various ways without departing from the scope of the present invention. Furthermore, the scope of the present invention should not be limited to the described embodiments and should be defined not only by the claims described below but also by the equivalents of those claims. List of reference symbols 10 semiconductor power switches 110 Semiconductor switch unit 111 First semiconductor switch 112 Second semiconductor switch 121 First Gate Driver 122 Second Gate Driver 131 First current sensor 132 Second current sensor 140 control unit 150 circuit breakers 160 surge protection unit

Claims

[1] Semiconductor power switch which is arranged between a power supply unit and a power supply destination unit, characterized by that it has the following characteristics: a semiconductor switching unit comprising several semiconductor switches in which a maximum magnitude of an electric current supplied from the power supply unit to the supply target unit is determined according to a gate voltage applied at the gate terminal; multiple gate drivers, each of which applies the gate voltage to each of the multiple semiconductor switches; one or more first current sensors, located at one or more points representing a front end of the semiconductor switch assembly, a second point located between the multiple semiconductor switches, and a rear end of the semiconductor switch assembly, third point are provided and thus detect an electrical inflow current flowing into the semiconductor switch unit; one or more second current sensors, which are provided at one or more points from the first, second and third points and thus detect the electrical inflow current, and which are of a different type than the first current sensors; and a control unit that uses the first measurement results from the first current sensors and the second measurement results from the second current sensors to assess whether the inflow current is a fault current or not, and thus controls the multiple gate drivers according to the resulting assessment result. [2] Semiconductor power switch according to claim 1, characterized by , that one of the first current sensor and the second current sensor is a sensor that performs a measurement using the Hall effect. [3] Semiconductor power switch according to claim 1, characterized by , that one of the first current sensor and the second current sensor is a sensor that performs a measurement in a magnetoresistive manner. [4] Semiconductor power switch according to claim 3, characterized by , that the sensor which performs a measurement in a magnetoresistive manner is provided at the second point, wherein the electrical inflow current between the multiple semiconductor switches is detected in a magnetoresistive manner. [5] Semiconductor power switch according to claim 1, characterized by that the first current sensor and the second current sensor are located at different points. [6] Semiconductor power switch according to claim 1, characterized by that the first current sensor and the second current sensor are located at the same point. [7] Semiconductor power switch according to claim 1, characterized by, that the control unit assesses whether the fault current is present or not by changing the assessment basis for the presence or absence of the fault current according to the section in accordance with the inflow time of the electrical inflow current. [8] Semiconductor power switch according to claim 7, characterized by , that the control unit assesses the presence or absence of the fault current based on one measurement result from the first and second measurement results during a first time interval from a first time point to a second time point after the inflow of the above inflow current, and that the control unit assesses the presence or absence of the fault current based on the other measurement result from the first and second measurement results during a second time interval from a second time point to a third time point after the first time interval. [9] Semiconductor power switch according to claim 1, characterized by , that the control unit, based on the first and second detection results, recognizes the rate of change of the inflow current and thus assesses the presence or absence of the fault current by changing the basis for assessing the presence or absence of the fault current according to the resulting detection result. [10] Semiconductor power switch according to claim 9, characterized by, that if the rate of change corresponds to a certain change criterion, then the control unit assesses the presence or absence of the fault current based on the one measurement result from the first and the second measurement result, and that if the rate of change does not correspond to the certain change criterion, then the control unit assesses the presence or absence of the fault current based on the other measurement result from the first and the second measurement result. [11] Semiconductor power switch according to claim 1, characterized by , that the control unit compares the first and second detection results with one or more of a first reference current and a second reference current that is larger than the first reference current, and thus assesses the presence or absence of the fault current based on the resulting comparison result. [12] Semiconductor power switch according to claim 11, characterized by , that if the first measurement result and the second measurement result are greater than or equal to the first reference current based on the comparison result, or if the first measurement result is less than the first reference current based on the comparison result, while the second measurement result is greater than or equal to the second reference current, then the control unit judges that the inflow current belongs to the fault current. [13] Semiconductor power switch according to claim 11, characterized by, that if the first measurement result and the second measurement result are less than the first reference current due to the comparison result, or if the first measurement result is greater than or equal to the first reference current due to the comparison result, while the second measurement result is less than the first reference current, then the control unit judges that the inflow current does not belong to the fault current. [14] Semiconductor power switch according to claim 1, characterized by , that if the control unit, based on a resulting assessment, judges that the inflow current belongs to the fault current, then it controls the multiple gate drivers in such a way that the inflow current is interrupted. [15] Semiconductor power switch according to claim 1, characterized by, that if one or more of the first and second current sensors are provided at the first and third points respectively, the control unit, based on the detection result at the first point and the detection result at the third point, recognizes whether the semiconductor switching unit is abnormal or not, and thus controls the multiple gate drivers according to the resulting detection result. [16] Semiconductor power switch according to claim 15, characterized by , that if the difference between the measurement result at the first point and the measurement result at the third point is greater than or equal to a reference difference, then the control unit recognizes that an anomaly has occurred in the semiconductor switching unit. [17] Semiconductor power switch according to claim 15, characterized by, that if the control unit detects, based on the resulting detection result, that an anomaly has occurred in the semiconductor switching unit, then it controls the multiple gate drivers in such a way that the inflow current is interrupted. [18] Semiconductor power switch according to claim 1, characterized by , that if one or more of the first current sensor and the second current sensor are each provided at at least two of the first to third points, the control unit monitors a residual electrical current at each of the at least two points based on the detection results at each of the at least two points while the inflow current is interrupted, and thus recognizes, based on the resulting monitoring results, whether the semiconductor switching unit is abnormal or not. [19] Semiconductor power switch according to claim 18, characterized by, that if one or more of the residual currents at each of the at least two points is greater than or equal to a reference residual current, then the control unit recognizes that an anomaly has occurred in a semiconductor switch connected to the corresponding point. [20] Semiconductor power switch according to claim 18, characterized by , that if the difference between any two residual currents at each of the at least two points is greater than or equal to a reference current difference, then the control unit recognizes that an anomaly has occurred in a semiconductor switch located between the corresponding points.

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