Resistance simulation circuit and resistance simulator board

Abstract

A resistance simulation circuit, characterized in that it comprises: several reference resistors connected in series; several magnetic latching relays, each set in parallel to the corresponding reference resistor, wherein each magnetic latching relay is adapted to receive the on or off control signal from the processor module to trigger the appropriate reference resistor to disconnect or connect, and to adjust the output resistance of the resistance simulation circuits.

Description

Cross-references to related applications

[0001] This application is based on and claims priority from Chinese Utility Model Application 2024214166124, filed on June 20, 2024. The entire contents of this application are incorporated herein by reference. Technical area

[0002] This utility model relates to resistance simulation technology. Specifically, it relates to resistance simulation circuits and resistance simulator boards. State of the art

[0003] The conventional resistance simulator board solution uses conventional relay control methods to achieve the selection of resistance values ​​within a wide range. The larger the resistance range of the resistor, the more relays are required. The operating state of conventional relays requires a continuous power supply. As the resistance value decreases and the number of channels increases, the number of relays also increases, doubling it. Thus, the power consumption of the individual board will continue to increase.

[0004] The fact that traditional resistance simulator boards need to be continuously supplied with power while maintaining the resistance value, which leads to high power consumption, is an urgent technical problem in this field. Content of the utility model

[0005] In order to solve the technical problems mentioned in the prior art, the utility model provides a resistance simulation circuit and a resistance simulator board.

[0006] The utility model provides a resistance simulation circuit comprising: several reference resistors connected in series; several magnetic latching relays, each of which is set in parallel with the corresponding reference resistor, wherein each magnetic latching relay is adapted to receive the on or off control signal of the processor module to trigger the corresponding reference resistor to disconnect or connect, and to adjust the output resistance of the resistor simulation circuits.

[0007] Furthermore, the utility model provides a resistance simulator board comprising: A resistor simulation circuit as previously described; a processor module that sends the on or off control signal to the magnetic latching relay.

[0008] The beneficial effects of the utility model are as follows: The resistance simulation circuit of this utility model replaces the conventional relay with a magnetic latching relay. It is sufficient to close or open the corresponding magnetic latching relay when adjusting the output resistance. It can be maintained even when the power is off without continuously supplying power to the relay. Since there is no need to consume power, the power consumption of resistance boards can be significantly reduced in application scenarios with multi-channels and large resistances. Description of the illustrations The present utility model will be discussed in more detail below using specific embodiments with reference to the attached illustrations. Fig. is a design diagram of a resistor simulation circuit provided in some embodiments. Fig. is a partial actual circuit diagram of a resistor simulation circuit provided in some embodiments; Fig. is a functional diagram of a resistor simulator board provided in some embodiments; Fig. is a circuit diagram of a drive module provided in some embodiments. Detailed embodiments

[0009] The utility model is described in detail below with reference to the attached figures. These figures are simplified schematic diagrams. The basic structure of the present utility model is explained only schematically. Therefore, only the structure relevant to the present utility model is shown.

[0010] In this specification: The phrases "in one embodiment," "according to an embodiment," "in some embodiments," etc. generally mean that a particular feature, structure, or feature following the phrase may be included in at least one embodiment of the disclosure. , A particular feature, structure, or feature may be included in more than one embodiment of the disclosure. These terms do not necessarily refer to the same embodiment. In this specification: The terms "example," "exemplary," etc., are used "as an example, example, or illustration." Any embodiment, aspect, or design described herein as an "example" or "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments, aspects, or designs. On the contrary, the use of the terms "example," "exemplary," etc., is intended to specifically illustrate concepts.

[0011] Please note that similar reference symbols and letters in the following drawings indicate similar elements. Once an element is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0012] Combined with the accompanying drawings below, some embodiments of the present invention are described in detail. Unless there is a conflict, the following embodiments and features of the embodiments can be combined with each other.

[0013] Referring to the Fig. 1 and Fig. 2, at least one embodiment provides a resistance simulation circuit comprising: a plurality of reference resistors (resistor R1, resistor R2, resistor R_N-1, resistor R_N) connected in series; a plurality of magnetic latching relays, each set in parallel with the corresponding reference resistor; each magnetic latching relay is adapted to receive the on or off control signal of the processor module to trigger the corresponding reference resistor to disconnect or connect, and to adjust the output resistance of the resistance simulation circuits. In the figure, end 1 and end 2 correspond to external circuits for outputting resistance values.

[0014] In particular, the resistance simulation circuit of this utility model replaces the conventional relay with a magnetic latching relay. It is sufficient to close or open the corresponding magnetic latching relay when adjusting the output resistance, without continuously supplying power to the relay. The power consumption of resistor boards can be significantly reduced in application scenarios with multiple channels and large resistances.

[0015] In particular, End 1 and End 2 are in Fig. each of the two ends of this resistor simulation circuit; RES_IN_CH1 in Fig. corresponds to end 1 in Fig. RES_IN_CH2 corresponds to end 2 in Fig. ; When a magnetic latching relay is turned on, the reference resistor connected in parallel is short-circuited. And when a magnetic latching relay is turned off, the reference resistor connected in parallel is not short-circuited, for connecting to the circuit, thus allowing the output resistance to be adjusted as needed.

[0016] Referring to the Fig. 3 and Fig. 4, some embodiments provide a resistance simulator board comprising: a resistance simulation circuit as previously described; a processor module that sends the on or off control signal to the magnetic latching relay.

[0017] In particular, the processor module can be, for example, an STM32 series microcontroller chip, but is not limited to this.

[0018] In some embodiments, the resistor simulator board further comprises: a plurality of drive modules, each corresponding one-to-one to the magnetic latching relays; wherein the processor module is configured to control each drive module to trigger the corresponding magnetic latching relay to control the connection or disconnection of the corresponding reference resistor.

[0019] Referring to Fig. In some embodiments, the normally closed terminals of the magnetic latching relay are each connected to both ends of the reference resistor. Specifically, the magnetic latching relay model is the HFD5 / 5 relay, with the fifth and sixth terminals of the HFD5 / 5 relay serving as normally closed terminals, each connected to both ends of the reference resistor.

[0020] Referring to the Fig. 3 and Fig.4, In some embodiments, the model of the drive module is the BL8023C driver chip, wherein the on or off signal of the processor module corresponds to the two pulse trigger signals and is respectively connected to the two input terminals of the BL8023C driver chip, wherein the two output terminals of the BL8023C driver chip are respectively connected to the normally closed terminals of the HFD5 / 5 relay.

[0021] In particular, this resistance simulator is particularly suitable for resistor boards in application scenarios that require multiple channels and large resistance values. Thanks to the properties of magnetic latching relays, the power consumption of the resistor board can be significantly reduced. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] CN 2024214166124

[0001]

Claims

[1] A resistance simulation circuit, characterized by that it includes: several reference resistors connected in series; several magnetic latching relays, each of which is set in parallel with the corresponding reference resistor, wherein each magnetic latching relay is adapted to receive the on or off control signal of the processor module to trigger the corresponding reference resistor to disconnect or connect, and to adjust the output resistance of the resistor simulation circuits. [2] A resistance simulator board, characterized by that it includes: the resistance simulation circuit according to claim 1, a processor module that sends the on or off control signal to the magnetic latching relay. [3] The resistance simulator board according to claim 2, characterized by that it includes: several driver modules, each of which corresponds one-to-one to the magnetic latching relays, wherein the processor module is configured to control each drive module to trigger the corresponding magnetic latching relay to control the connection or disconnection of the corresponding reference resistor. [4] The resistance simulator board according to claim 2, characterized by that the normally closed terminals of the magnetic latching relay are each connected to both ends of the reference resistor. [5] The resistance simulator board according to claim 4, characterized by , that the model of the magnetic latching relay is the HFD5 / 5 relay, The fifth and sixth terminals of the HFD5 / 5 relay are connected as normally closed terminals to the two ends of the reference resistor. [6] The resistance simulator board according to claim 5, characterized by , that The model of the driver module is the BL8023C driver chip, where the on or off signal of the processor module corresponds to the two pulse trigger signals and is connected to the two input terminals of the BL8023C driver chip, The two output terminals of the BL8023C driver chip are each connected to the normally closed terminals of the HFD5 / 5 relay.

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