Circuit for calibrating chopper switching mismatches in time-nested analog-to-digital converters

DE602020072859T2Active Publication Date: 2026-06-03XILINX INC

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
XILINX INC
Filing Date
2020-02-21
Publication Date
2026-06-03

AI Technical Summary

Technical Problem

Time-skew mismatches, gain mismatches, frequency offsets, and phase offsets between the individual channels of a time-interleaved ADC circuits adversely affect performance, leading to noise and interference in analog-to-digital conversion.

Method used

A time-interleaved ADC circuit with gain and time-skew calibration circuits, utilizing pseudorandom bit sequences to scramble and de-scramble input signals, and parallel offset calibration circuits to remove offsets associated with different types of switches, ensuring accurate conversion across the entire frequency spectrum.

Benefits of technology

The solution effectively compensates for gain, switching offsets, and time skews, removing flicker noise and interference without signal degradation, allowing for accurate conversion of input signals at any frequency, including multiples of the sampling frequency.

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