Clock signal generator for generating a reference signal and a clock signal, system having same, and method for synchronising a plurality of participants in a system

EP4533667A1Pending Publication Date: 2025-04-09TRUMPF PATENTABTEILUNG
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Patent Information

Application Number
EP2023730375
Authority / Receiving Office
EP · EP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-05-30
Filing Date
2023-05-25
Publication Date
2025-04-09

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Abstract

In a clock signal generator (10) for generating a reference signal (144) and a clock signal (142) for a plurality of microwave signal generators, in particular microwave solid state power amplifier modules, the clock signal generator has: a. a reference signal generator (12) for generating a reference signal (144) with a reference frequency, for example in the range of 1-50 MHz, preferably 30 MHz; b. a frequency divider arrangement (20) which is connected to the reference signal generator such that the reference signal (144) can be supplied to the frequency divider arrangement and is configured to generate from the reference signal (144) a clock signal (142) with a clock signal frequency that is lower than the reference frequency; c. at least one signal output (16, 30) at which the reference signal (144) and / or the clock signal (142) is output. Also disclosed is a system (100) having such a clock signal generator (10), and a method for synchronising a plurality of system participants (106, 108, 110, 112) in such a system (100). In this way, interference in a load is better able to be controlled and reproduced.
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Description

[0001] Clock signal generator for generating a reference signal and a clock signal, system with such a generator and method for synchronizing several participants of a system

[0002] The invention relates to a clock signal generator for generating a reference signal and a clock signal, a system with a clock signal generator according to the invention and a method for synchronizing several participants of a system.

[0003] Systems with multiple microwave signal generators, especially solid-state microwave power amplifier modules, where the generators and / or modules are connected together to a load, often pose problems. Interference in the load is often difficult to control and reproduce.

[0004] A microwave solid-state power amplifier module is an electronic amplifier suitable for amplifying a low-power microwave signal into a higher-power microwave signal. The amplifying element used is a solid-state device, particularly a semiconductor solid-state device, such as a transistor. The transistor can be a HEMT, a MOSFET, an LDMOS transistor, or a transistor based on GaN or SiC. This terminology is used in microwave technology to differentiate it from conventional non-solid-state amplifier types, such as tube and / or magnetron amplifiers, which can be controlled much less precisely in terms of power and frequency and are subject to high levels of wear. Such microwave solid-state power amplifiers are described, for example, in US Pat. Nos. 9,595,930 B2 and 11,222,770 B2 as "solid-state microwave power amplifiers" or "solid-state microwave power generators."

[0005] The object of the present invention is to provide a way to make interference in a load more controllable and reproducible.

[0006] This object is achieved according to the invention by a clock signal generator for generating a reference signal and a clock signal for a plurality of microwave signal generators, in particular microwave solid-state power amplifier modules, wherein the clock signal generator has: a. a reference signal generator for generating the reference signal with a reference frequency, in particular in the range from 1 MHz to 50 MHz, preferably 30 MHz, b. a frequency divider arrangement, connected to the reference signal generator in such a way that the reference signal can be fed to the frequency divider arrangement, and which is configured to generate the clock signal from the reference signal with a clock signal frequency that is lower than the reference frequency, c. at least one signal output at which the reference signal and / or the clock signal is output.

[0007] A phase-locked clock signal with a significantly lower clock signal frequency can be derived from the reference signal with the reference frequency. The clock signal can be used to synchronize system devices downstream of the clock signal generator. Using the reference signal generated by the signal generator, the system devices can, for example, generate microwave signals of the same frequency. This makes it possible to generate signals in the system devices that are firmly and reproducibly synchronized in frequency, time, and phase. Offsets can be defined for each parameter in the system devices.

[0008] A microwave signal, abbreviated to MW signal, refers to a signal with a frequency of 300 MHz to 20 GHz.

[0009] A microwave signal generator is a signal generator designed to generate such an MW signal.

[0010] A pulsed microwave signal refers to a microwave signal that is pulsed. The pulses can be very short. "Very short" here means pulses in the range of 10 ns to 500 ns. The pulses can be in the range of 10 ns to 40 ns, preferably in the range of 15 ns to 30 ns. This means that the pulses are shorter in time than most time constants for the recombination of ions with electrons. Particularly short pulses are particularly important for the generation of "non-equilibrium plasma," "non-thermal plasma," or "cold plasma," and all processes where such a plasma is used. These plasma forms are characterized by the fact that the electrons can follow the field, while the ionized atomic nuclei cannot follow the rapid field changes. The plasma remains "cold." One requirement is that the pulses are shorter in time than the time constant for the recombination of ions with electrons.

[0011] This time constant depends on many influencing factors such as pressure, temperature or the element type of the ionized atoms themselves.

[0012] Furthermore, a pulse can have a rise and / or fall time of < 10 ns. This ensures that the pulses have a sufficiently strong intensity, which is necessary to generate the plasma.

[0013] In particular, the pulses can be multi-stage, i.e., pulse between at least two power values, of which at least one value is not equal to zero, and in particular both are not equal to zero. This will be described further below.

[0014] A clock signal here refers to an electrical signal that specifies a clock frequency. The clock frequency can be in the range of 1 kHz to 500 kHz, in particular in the range of 1 kHz to 50 kHz, and particularly preferably in the range of 10 kHz. The clock signal can have different forms, for example, it can be sinusoidal or rectangular. It can be pulse-width modulated.

[0015] A signal generator here refers to a component designed to output a predetermined, particularly adjustable, electrical signal. This can have various forms, such as sinusoidal or rectangular. It can be pulse-width modulated.

[0016] A frequency divider arrangement is meant here as an arrangement which is designed to process an incoming signal and to output a signal at its output which has a lower frequency, in particular a frequency which is lower by a predeterminable divider.

[0017] Particular advantages arise when the reference signal and the clock signal are output at the same signal output. This allows both signals to be transmitted on a common line and distributed to all system participants.

[0018] A first filter, in particular a bandpass filter, can be provided between the reference signal generator and the signal output. The bandpass filter can reduce interference that reaches the signal generator from external signals or other signals from the clock signal generator. Filters here refer to electrical, usually passive, circuits that change the amplitude and phase of an electrical signal depending on the frequency. This can attenuate or suppress unwanted signal components. A bandpass filter here refers to a filter that attenuates an electrical signal above and below a frequency range known as the frequency band.

[0019] A second filter, particularly a low-pass filter, can be provided between the frequency divider arrangement and the signal output. The second filter can prevent external interference or other signals from the clock signal generator from reaching the frequency divider arrangement. A low-pass filter is a filter that attenuates an electrical signal above a predetermined frequency.

[0020] A particularly simple design of the reference signal generator results if it is designed as an oscillator or has one.

[0021] The frequency divider arrangement can comprise several cascaded frequency dividers. This allows a clock signal to be generated that has a significantly lower clock signal frequency than the reference signal. The clock signal frequency can be lower than the reference frequency by more than a factor of 10, preferably more than a factor of 100, in particular more than a factor of 1000. In particular, the clock signal frequency can be divided down until the clock signal period is significantly greater than the largest possible jitter or time offset in digital communication in the system with multiple participants. The time offset in real-time communication systems can be less than nanoseconds. In other communication systems, the time offset can even amount to several seconds.

[0022] Advantageously, the frequency divider arrangement can comprise an adjustable frequency divider. Thus, the clock signal frequency can be adjusted and does not have to be fixed.

[0023] A carrier signal generator may be provided which is configured to generate a carrier signal having a carrier frequency which is higher than the reference frequency, wherein a modulator is provided to which the clock signal and the signal having the carrier frequency are supplied and which is configured to modulate the signal of the carrier frequency with the clock signal.

[0024] The term modulation describes a process in which a transmitted signal changes a so-called carrier, or in other words, modulates it. This enables high-frequency transmission of the low-frequency signal. The transmitted signal occupies a bandwidth in the carrier frequency range that depends on the desired signal. The message is recovered at the receiving end by a demodulator.

[0025] This modulated signal can be output at the signal output. The modulated signal contains frequency and time information. The modulated signal can be demodulated in the system components, so that the clock signal is again available. Because the clock signal was generated from the reference signal, a fixed phase relationship exists between the reference signal and the clock signal. This allows system components, especially those designed as solid-state power generators that receive the clock signal and the reference signal, to generate microwave signals with a reproducibly fixed phase relationship to one another.

[0026] A filter, particularly a high-pass filter, can be provided between the modulator and the signal output. This can reduce interference with the modulator caused by external signals or other signals from the clock signal generator. A high-pass filter is a filter that attenuates an electrical signal below a specified frequency.

[0027] A further aspect of the invention relates to a system with a clock signal generator according to the invention, wherein the clock signal generator is connected to a splitter, which in turn is connected to several system participants and supplies the system participants with an output signal from the clock signal generator. A splitter here refers to an electronic, usually passive, circuit component designed to distribute a signal across several outputs. In particular, both the reference signal and the clock signal can be supplied to the system participants. System participants can, for example, be solid-state microwave generators of the same or different power class and / or the same or different frequency range. However, other system participants are also conceivable, such as measuring equipment or a camera. All system participants can be synchronized by the clock signal.

[0028] At least one system participant can have a microwave signal generator to which the reference signal is fed. The microwave signal generator can, for example, generate a signal with a higher frequency based on the reference signal. For example, a microwave signal with a frequency of 2,400 MHz - 2,500 MHz can be generated from a 30 MHz reference signal.

[0029] At least one system participant can have a synchronization circuit to which the clock signal is supplied. The synchronization circuit, in turn, can control a microwave signal generator to which the reference signal is supplied. Such an arrangement can be provided in multiple system participants, so that microwave signals synchronized in time, phase, and frequency can be generated by multiple system participants. A synchronization circuit refers here to an electronic circuit component configured to synchronize multiple signals. A variety of electrical circuits are known for this purpose, most of which have a triggerable clock signal generator.

[0030] The microwave signal generator may comprise a phase-locked loop (PLL), with the synchronization circuit connected to the phase-locked loop.

[0031] The microwave signal generator can include an oscillator, allowing an MW signal to be generated even without synchronization.

[0032] The output signal of the synchronization circuit can be fed to multiple components of the system participant. For example, the synchronization circuit can be connected to a module that also receives the microwave signal generated by the microwave signal generator. The module can generate a pulsed microwave signal. In particular, a multi-stage pulsed microwave signal can be generated.

[0033] In particular, this synchronizes the pulses or power changes of all generators in the system.

[0034] It can also be supplied to the module generating the MW signal, thus enabling a synchronous frequency change of all generators participating in the system. The invention also includes a method for synchronizing multiple participants in a system, in which a. a reference signal is generated, b. a clock signal related to the reference signal is generated, c. at least the clock signal is supplied to multiple system participants.

[0035] Thus, multiple system participants can be synchronized via the clock signal. Furthermore, the reference signal can be fed to multiple system participants. If the system participants are solid-state microwave power generators, the reference frequency can be used to generate microwave frequencies. The clock signal can synchronize time-critical functions if the commands or information for executing the functions arrive at the system participants with a time offset. The clock signal can ensure that the commands are executed synchronously. Thus, the microwave signals are time-synchronized. For example, phase-locked loops in all solid-state microwave power generators can be controlled synchronously.

[0036] In particular, due to the fixed phase relationship between the reference signal and the clock signal, several microwave solid-state power generators can generate microwave signals with a reproducibly fixed phase relationship.

[0037] It can check whether a system participant has been restarted or added. If so, a synchronization can be performed.

[0038] The clock signal can be generated from the reference signal by frequency division. This ensures that the clock signal and the reference signal are phase-synchronized.

[0039] As already mentioned, a signal with a higher frequency than the reference signal can be generated in at least two system participants based on the reference signal and the clock signal. In particular, synchronous signals can be generated in this way.

[0040] Individual system participants can constructively add their power outputs. This simplifies system design because standard modules can be used. Power generation can be located where it's needed, eliminating energy transport losses, power lines, and power dividers. Distributed systems with numerous small, distributed modules are possible.

[0041] The precisely reproducible phase relationship allows for virtually any interference pattern. Pulse width modulation with very fast pulses is possible. By synchronizing multiple system devices, the system devices can be positioned at large spatial distances. The high frequency is generated from a common low-frequency reference frequency. This eliminates the need to distribute the high-frequency signals. The use of low-loss and therefore expensive cable connections and assemblies for signal splitting is therefore unnecessary. Low-frequency signals have lower cable losses and are easy to handle. Attenuation losses do not affect the output power. Differences in cabling length have less influence. It is possible to synchronize solid-state power generators at different frequencies. These can then be synchronized with other devices.Radiation and radiation into the cables is less critical.

[0042] The number of solid-state power generators used is easily scalable. Phase synchronization eliminates the need for time-consuming tuning of individual modules, or only requires a single tuning during installation. This results in time savings and more precise, reproducible control in the target application, thus reducing power consumption.

[0043] Further features and advantages of the invention will become apparent from the following detailed description of exemplary embodiments of the invention, based on the figures of the drawing, which illustrate details essential to the invention, and from the claims. The features shown therein are presented in such a way that the special features of the invention can be clearly seen. The various features can be implemented individually or in combinations in variants of the invention.

[0044] The schematic drawing shows embodiments of the invention and explains them in more detail in the following description.

[0045] They show:

[0046] Fig. 1 is a schematic representation of a first embodiment of a clock signal generator;

[0047] Fig. 2 is a schematic representation of a second embodiment of a clock signal generator;

[0048] Fig. 3 a system with several system participants;

[0049] Fig. 4 shows a representation of a system participant. Figure 1 shows a clock signal generator 10 having a signal generator 12. The signal generator 12 can be configured to generate a reference signal 144. The signal generator 12 can comprise an oscillator or be configured as such. The reference signal 144 is applied to the signal output 16 via a filter 14, which is designed in particular as a bandpass filter. An additional buffer amplifier 21 can optionally be provided upstream of the filter 14.

[0050] A reference signal 144 can also be fed to a frequency divider arrangement 20 via a splitter 18. In the illustrated embodiment, the frequency divider arrangement 20 comprises two frequency dividers 22, 24, each with a fixed frequency division ratio. Furthermore, an adjustable frequency divider 26 is provided in the cascade of frequency dividers, in which the frequency division ratio is adjustable.

[0051] The reference signal 144 can optionally, as an alternative to the signal generator 12, also be supplied by an external source via a terminal 17 of the frequency divider arrangement 20 and / or the signal output 16. The desired signal can be selected via a, in particular controllable, selection unit 19, namely either the reference signal from the signal generator 12 or the reference signal from the terminal 17. The selection unit 19 can be a switching element, in particular an electronically controllable semiconductor switch.

[0052] A clock signal 142 is generated by the frequency divider arrangement 20. In a first embodiment, the clock signal 142 is passed to a signal output 30 via a filter 28, which is designed in particular as a low-pass filter. However, it is preferred if the clock signal 142 is also passed to the signal output 16 via the filter 28 and output there, so that the reference signal and the clock signal can be transmitted on the same signal line. An additional buffer amplifier 31 can optionally be provided upstream of the filter 28.

[0053] Furthermore, a modulator 32 can be provided, to which the clock signal 142 and a carrier signal generated by a carrier signal generator 34 are fed. It can be provided that the reference signal generator 12 generates the reference signal with a reference frequency. The clock signal 142 has a clock signal frequency that is lower than the reference frequency. The carrier signal generator 34 can generate a signal that has a carrier frequency that is higher than the reference frequency of the reference signal 144. The signal of the signal generator 34 can be modulated with the clock signal by the modulator 32. The modulated signal can also be passed to the signal output 16 and / or to the signal output 30 via a filter 36, which is designed in particular as a high-pass filter.

[0054] An additional buffer amplifier 33 can optionally be provided upstream of the filter 36. An additional buffer amplifier 35 can optionally be provided between the carrier signal generator 34 and the modulator 32.

[0055] The isolation amplifiers 21, 31, 33, and 35 serve to relieve the load on the upstream signal generators. They provide these signal generators with a high input impedance and place only a minimal load on them. However, the components downstream of the isolation amplifiers 21, 31, 33, and 35, such as the filters, can be supplied with a signal source capable of providing sufficient power. This allows the downstream components themselves to be designed with significantly lower impedance, and, for example, better filtering properties can be achieved.

[0056] Figure 2 shows a system 100 having clock signal generator 10. Clock signal generator 10 outputs the clock signal and the reference signal on line 102. The clock signal and the reference signal are sent to a splitter 104, to which several system devices 106, 108, 110, and 112 are connected. The clock signal 142 and the reference signal 144 are supplied to the system devices 106, 108, 110, and 112 through the splitter 104. The clock signal 142 is optionally supplied as a modulated signal.

[0057] System devices 106, 108, 110, 112 can be connected to a common load 114. For example, system devices 106, 108 can be configured as solid-state microwave power generators that output a microwave signal at a frequency of 2.45 GHz. System device 110 can, for example, be configured as a solid-state microwave power generator that delivers a microwave signal at a frequency of 10 GHz. System device 112 can be configured as a camera.

[0058] Because both the clock signal 142 and the reference signal 144 are supplied to the nodes 106, 108, 110, and 112, particularly to the nodes 106, 108, and 110, microwave signals can be applied to their outputs that are stably coupled in frequency, phase, and time. Thus, interference in the load 114 can be reproduced and controlled.

[0059] Figure 3 shows an alternative representation of the system 100, with the system participant 106 shown in detail.

[0060] The reference signal and the clock signal are first fed to a crossover network 120. The crossover network 120 supplies the reference signal to a microwave signal generator 122, which generates a signal with a higher frequency based on the reference signal.

[0061] Furthermore, the crossover network 120 supplies the clock signal to a synchronization circuit 124. If the clock signal is transmitted as a modulated signal, an optional demodulator 126 can be provided, in which the signal is demodulated and the clock signal is reproduced. The synchronization circuit 124 is also connected to the microwave signal generator 122 and ensures that the microwave signal is generated at a predetermined time determined by the clock signal. The synchronization circuit 124 can further be connected to a module 128, by which the microwave signal from the microwave signal generator 122 can be pulsed or amplitude-modulated. If necessary, a multi-stage pulsed microwave signal can be generated. The pulsed microwave signal can be fed to a solid-state amplifier 130.An embodiment of such a module for generating a pulsed microwave output signal is described, for example, in the DE102022113502.0 application entitled "Module and method for generating a pulsed microwave output signal," including reference numerals 10 or 10.1. The content of this patent application is incorporated by reference, and its disclosure is incorporated into the supplementary content of this application.

[0062] The microwave signal generator 122 and the module 128 can be controlled by a controller, in particular a digital controller 132.

[0063] The microwave signal generator 122 may comprise an oscillator and a phase-locked loop 123, wherein the signal of the synchronization circuit 124 may be supplied, in particular, to the phase-locked loop 123.

[0064] Figure 4 shows, at 140, the situation in which the communication and control commands at different system participants are not synchronized with each other, but arrive with jitter or a time offset. Microwave signals initiated by the microwave signal generators 122 of the system participants 106, 108, 110 through such time-delayed commands are generally not synchronous. Reference numeral 142 denotes a clock signal generated by the clock signal generator 10. By executing the time-delayed commands at the time of an incoming edge of the clock signal, the commands of all participants are executed synchronously. For this to happen, the time interval between two edges of the clock signal must be significantly greater than the largest typically possible jitter in the communication.For example, a faster clock can be selected for a communication connection, communication standard, or communication line with low jitter. It is also possible to set a lower clock signal frequency for a poor communication channel. This allows all generators to generate a MW pulse simultaneously, which can then constructively overlap in the load. Reference numeral 144 denotes a reference signal generated by the clock signal generator 10. Since the clock signal 142 was generated based on the reference signal 144, the signals are phase-synchronized. The phase-locked loop 123 of the microwave signal generators 122 of the various system participants 106, 108, 110 are synchronized by the clock signal 142. This ensures that the signals generated in the microwave signal generators 122 start at the same time and are thus coupled in frequency, phase, and time.In particular, the PLLs are not only started simultaneously. Rather, they are all started at the same reference signal phase every time, because the clock and reference are phase-locked, having been derived from one another. This allows the MW signal to be started reproducibly and reliably at the same phase. For example, microwave signal 146 is generated by system participant 106, and microwave signal 148 is generated by system participant 108. The microwave signals of all solid-state microwave power generators are frequency-locked, as they all use the same reference frequency. The microwave signals are in phase, as all microwave signals are started simultaneously, with an edge of the clock signal 142. The phase relationship is always the same, as the clock signal 142 is derived from the reference signal 144 and is thus phase-locked.This enables a reproducible constructive superposition of microwave signals from several solid-state power generators in one load.

Claims

Claims: Clock signal generator (10) for generating a reference signal (144) and a clock signal (142) for several microwave signal generators, in particular microwave solid-state power amplifier modules, wherein the clock signal generator comprises: a. A reference signal generator (12) for generating a reference signal (144) with a reference frequency, in particular in the range of 1 MHz to 50 MHz, preferably 30 MHz, b. A frequency divider arrangement (20) connected to the reference signal generator such that the reference signal (144) can be supplied to the frequency divider arrangement (20) and which is configured to generate a clock signal (142) from the reference signal (144) with a clock signal frequency that is lower than the reference frequency, c. At least one signal output (16, 30) at which the reference signal (144) and / or the clock signal (142) is output.Clock signal generator according to one of the preceding claims, characterized in that the reference signal (144) and the clock signal (142) are output at the same signal output (16). Clock signal generator according to one of the preceding claims, characterized in that a first filter (14), in particular a bandpass filter, is provided between the reference signal generator (12) and the signal output (16). Clock signal generator according to one of the preceding claims, characterized in that a second filter (28), in particular a low-pass filter, is provided between the frequency divider arrangement (20) and the signal output (16, 30). Clock signal generator according to one of the preceding claims, characterized in that the reference signal generator (12) is configured as an oscillator or comprises one. Clock signal generator according to one of the preceding claims, characterized in that the frequency divider arrangement (20) comprises an adjustable frequency divider (26). Clock signal generator according to one of the preceding claims, characterized in that a carrier signal generator (34) is provided which is configured to generate a carrier signal with a carrier frequency higher than the reference frequency, wherein a modulator (32) is provided to which the clock signal (142) and the signal with the carrier frequency are supplied and which is configured to modulate the signal of the carrier frequency with the clock signal (142). Clock signal generator according to one of the preceding claims, characterized in that a filter (36), in particular a high-pass filter, is provided between the modulator (32) and the signal output (16).System (100) with a clock signal generator (10) according to one of the preceding claims, characterized in that the clock signal generator (10) is connected to a splitter (104), which in turn is connected to several system participants (106, 108, 110, 112) and supplies an output signal of the clock signal generator (10) to the system participants (106, 108, 110, 112). System according to claim 9, characterized in that at least one system participant (106) has a synchronization circuit (124) to which the clock signal (142) is supplied. System according to claim 9 or 10, characterized in that at least one system participant (106) has a microwave signal generator (122) to which the reference signal (144) is supplied. System according to claim 11, characterized in that the microwave signal generator (122) has an oscillator and a phase-locked loop (123), wherein the synchronizing circuit (124) is connected to the phase-locked loop (123). A system according to any one of the preceding claims 10 to 12, characterized in that an output signal of the synchronization circuit (124) is supplied to several components of the system participant (106). A method for synchronizing several system participants (106, 108, 110, 112) of a system (100), wherein a. a reference signal (144) is generated, b. a clock signal (142) related to the reference signal (144) is generated, c. at least the clock signal (142) is supplied to several system participants (106, 108, 110, 112). A method according to claim 14, characterized in that the reference signal (144) is supplied to several system participants (106, 108, 110, 112). Method according to one of the preceding claims 14 or 15, characterized in that the clock signal (142) is generated from the reference signal (144) by means of frequency division.Method according to one of the preceding claims 14 to 16, characterized in that in at least two system participants (106, 108, 110) a signal with a higher frequency than the frequency of the reference signal (144) is generated based on the reference signal (144) and the clock signal (142).