Device for processing data by learning, method, program, and corresponding system

Abstract

The present invention relates to a method for determining implementation parameters of an electronic circuit configured to process an input signal, the electronic circuit comprising an analog portion comprising a plurality of parameterisable analog primitives and a digital portion comprising a plurality of parameterisable digital primitives, the digital portion being coupled to the analog portion by means of at least one analog-digital converter and / or at least one analog comparator with or without hysteresis, the method being characterised in that it comprises a phase of joint learning of the parameters of the plurality of parameterisable analog primitives and of the parameters of the plurality of parameterisable digital primitives.

Description

[0001] DESCRIPTION

[0002] Title: Data processing device by learning, method, program and corresponding system Technical field

[0003] The disclosure relates to the field of signal processing. More particularly, the invention relates to the field of signal processing in a constrained system, particularly in a system constrained in terms of energy consumption.

[0004] Prior art

[0005] Recent years have seen the Internet of Things (IoT) and remote data processing (cloud computing) revolutions. The number of IoT devices continues to grow annually, and it is expected that at least 30 billion devices will be operational worldwide within a few years. Most of these systems transmit raw data for remote processing. Often, remote processing methods use energy-intensive Artificial Intelligence (AI) algorithms: for example, the Convolutional Neural Network (CNN), which can have tens of thousands of neurons and a few million connections. Since most of the energy consumption is devoted to data transmission (and not for processing), the overall scheme for remote data management and processing is very energy-intensive.

[0006] It is therefore necessary to increase the semantic level of the information obtained locally within IoT devices. For example, in most cases of thermo-industrial monitoring, the temperature may normally be constant: there is no need to transfer this low-level data because the relevant events only occur when there is a significant change in the measurement. The detection of this event should be carried out locally, increasing the semantic level of the signal to be transferred remotely. In this case, an alert can be sent remotely, avoiding the need to transfer raw low-level data.This need for local processing, however, raises a problem: how can complex processing, particularly artificial intelligence-based processing, be implemented in embedded IoT architectures? Indeed, avoiding the constant transfer of all sensor data implies that it must be processed locally. This is necessary and was highlighted in the European Commission's text on communications and digital technology, which sets a target of 80% of data processing being carried out locally.

[0007] However, this raises multiple technical challenges: local data processing must be adapted to the hardware available in embedded systems, particularly in terms of memory and computing power. Moreover, the introduction of signal processing (or artificial intelligence) increases average power consumption, especially if advanced algorithms such as deep learning are used, even if it also reduces power consumption due to data transmission. Given that battery capacity is limited in many industrial or everyday products, using a significant portion of energy for artificial intelligence tasks also leads to a reduction in product lifetime in non-rechargeable applications, or the need to recharge the battery or use an external power supply.

[0008] There is thus a need for a solution to have autonomous devices capable of processing signals locally, with a significant reduction in the power consumption of such devices. The disclosed technique improves the situation.

[0009] Summary of the invention

[0010] The disclosed technique was designed with these prior art issues in mind. The proposed technique enables the implementation of embedded artificial intelligence with minimal energy cost. A mixed (analog-digital) processing technique is used to replace convolutional neural network solutions, while learning the global model parameters, these parameters including analog and digital parameters, from a labeled database. This mixed architecture is called a primitive neural network (PNN).

[0011] More particularly, the disclosure relates to a method for determining implementation parameters of an electronic circuit intended to be implemented by a computer or a data processor, said electronic circuit being configured to perform the processing of an input signal, the electronic circuit comprising an analog portion comprising a plurality of parameterizable analog primitives and a digital portion comprising a plurality of parameterizable digital primitives, the implementation parameters of the electronic circuit comprising parameters of the plurality of parameterizable analog primitives and parameters of the plurality of parameterizable digital primitives, the digital portion being coupled to the analog portion via at least one analog-to-digital converter and / or at least one analog comparator with or without hysteresis.Such a method comprises a phase of learning said parameters of the plurality of parameterizable analog primitives and said parameters of the plurality of parameterizable digital primitives, said learning phase being joint with the parameters of the plurality of parameterizable analog primitives and with the parameters of the plurality of parameterizable digital primitives.

[0012] It is therefore possible to configure the entire electronic circuit with values ​​that have been previously learned, and therefore to adapt the electronic circuit as needed, particularly in terms of reducing energy consumption.

[0013] According to a particular characteristic, the learning phase comprises at least one iteration of the following steps, carried out using a labeled signal learning database: loading current parameters of the plurality of parameterizable analog primitives and the plurality of parameterizable digital primitives; extraction, by the analog portion, as a function of the current parameters of the plurality of analog primitives, of time information from the input signals and / or frequency information from these same signals. The latter may correspond to a plurality of moments of the signals of the learning database; construction using the previously extracted time and / or frequency information, of an intermediate data structure.This intermediate data structure can be formed by the juxtaposition of the information extracted by the analog portion from the signals of the learning database; this structure is for example a tensor, classification, by the digital portion, according to the current parameters of the plurality of digital primitives, and from the intermediate data structure, of the plurality of detected events, delivering a plurality of portions of classified signals; calculation, from the plurality of portions of classified signals, of a classification error rate (Err); correction of the current parameters of the plurality of parameterizable analog primitives and of the plurality of parameterizable digital primitives according to the error rate (Err).

[0014] According to a particular characteristic, the learning phase ends when the classification error rate (Err) is lower than a predetermined threshold and / or when a target power consumption, in operational operation, of said electronic circuit is reached.

[0015] According to a particular characteristic, the step of correcting the current parameters of the plurality of parameterizable analog primitives and the plurality of parameterizable digital primitives comprises at least one iteration of the following joint optimization sequence: optimization of the digital portion by backpropagation, then optimization of the analog portion by iterative digital simulation methods.

[0016] According to a particular characteristic, the digital portion comprises at least one neural network adapted to classify the signals received via analog / digital converters and in that the parameters of the plurality of configurable digital primitives comprise at least weights and biases of said neural network.

[0017] According to a particular feature, the digital portion is, by default, on standby.

[0018] According to a particular characteristic, the analog portion comprises at least one band-pass filter, said band-pass filter making it possible to identify frequencies of interest and in that the parameters of the plurality of configurable analog primitives comprise at least cut-off frequencies of said band-pass filter and in that the analog portion comprises a plurality of trigger nodes for waking up said digital portion on the basis of an identification of said frequencies of interest.

[0019] According to another aspect, the disclosure also relates to an electronic circuit configured to perform the processing of an input signal according to the method of determining implementation parameters of said electronic circuit, said electronic circuit comprising an analog portion and a digital portion, the digital portion being coupled to the analog portion via one or more analog-digital converters, and / or analog comparators with or without hysteresis.In this electronic circuit, the analog portion comprises a plurality of analog primitives parameterized according to a first set of parameters and in that the digital portion comprises a plurality of digital primitives parameterized according to a second set of parameters, said first and said second sets of parameters belonging to the implementation parameters of said electronic circuit, said first and said second sets having been the subject of joint learning according to the method previously presented.

[0020] According to a particular characteristic, the plurality of configurable analog primitives comprises primitives belonging to the group comprising: passive and / or active filters, envelope detectors, multipliers, operational amplifier assemblies, diodes, analog convolutions, integrators, derivators, delay.

[0021] According to a particular characteristic, the analog portion of the electronic circuit is divided into a first part, called signal preprocessing and a second part called moment extraction, the output of the signal preprocessing part being connected to the input of the moment extraction part, the output of the moment extraction part being directly connected using at least one analog / digital converter and / or an analog comparator.

[0022] According to another aspect, the disclosure also relates to the use of an electronic circuit configured to perform the processing of an input signal according to a method for determining implementation parameters of this electronic circuit, said electronic circuit comprising an analog portion and a digital portion, the digital portion being coupled to the analog portion via at least one analog-digital converter or at least one analog comparator, the analog portion comprising a plurality of analog primitives configurable according to a first set of parameters and the digital portion comprising a plurality of digital primitives configurable according to a second set of parameters. This use is remarkable in that it comprises a step of loading the first and second sets of parameters having been the subject of joint learning according to the method previously presented.

[0023] According to a preferred implementation, the learning can be controlled / executed by a program, implemented within a processor, in particular to control the convergence of the learning parameters. The different steps of the methods according to the present disclosure are implemented by one or more software or computer programs, comprising software instructions intended to be executed by a data processor of an execution terminal according to the present technique and being designed to control the execution of the different steps of the methods, implemented at the level of a communication terminal, a remote server and / or a blockchain, within the framework of a distribution of the processing operations to be carried out and determined by a scripted source code or a compiled code.

[0024] Accordingly, the present technique also relates to programs, capable of being executed by a computer or by a data processor, these programs comprising instructions for controlling the execution of the steps of the methods as mentioned above. A program may use any programming language, and be in the form of source code, object code, or intermediate code between source code and object code, such as in a partially compiled form, or in any other desirable form.

[0025] The present technique also aims at an information medium readable by a data processor, and comprising instructions of a program as mentioned above.

[0026] The information carrier may be any entity or terminal capable of storing the program. For example, the carrier may include a storage medium, such as a ROM, for example a CD ROM or a microelectronic circuit ROM, or a magnetic recording medium, for example a mobile medium (memory card) or a hard disk or an SSD.

[0027] Furthermore, the information carrier may be a transmissible medium such as an electrical or optical signal, which may be conveyed via an electrical or optical cable, by radio or by other means. The program according to the present technique may in particular be downloaded over a network such as the Internet.

[0028] Alternatively, the information carrier may be an integrated circuit in which the program is incorporated, the circuit being adapted to perform or to be used in the performance of the method in question.

[0029] According to one embodiment, the present technique is implemented by means of software and / or hardware components. In this regard, the term "module" may correspond in this document to a software component, a hardware component or a set of hardware and software components.

[0030] A software component corresponds to one or more computer programs, one or more sub-programs of a program, or more generally to any element of a program or software capable of implementing a function or a set of functions, as described below for the module concerned. Such a software component is executed by a data processor of a physical entity (terminal, server, gateway, set-top-box, router, etc.) and is likely to access the hardware resources of this physical entity (memories, recording media, communication buses, electronic input / output cards, user interfaces, etc.).

[0031] Similarly, a hardware component corresponds to any element of a hardware assembly capable of implementing a function or a set of functions, as described below for the module concerned. It may be a programmable hardware component or one with an integrated processor for executing software, for example an integrated circuit, a smart card, a memory card, an electronic card for executing firmware, etc.

[0032] Each component of the system described above of course implements its own software modules.

[0033] The different embodiments mentioned above can be combined with each other for the implementation of the present technique.

[0034] Brief Description of the Drawings Other objects, characteristics and advantages of the disclosure will appear more clearly from the following description, given by way of simple illustrative, and non-limiting, example, in relation to the figures, among which:

[0035] [fig. 1] represents the general architecture of the network according to the present disclosure; ;

[0036] [fig. 2] illustrates the different digital and analog primitives of disclosure;

[0037] [fig. 3] is an example of the structure of the analog portion of the network according to the disclosure;

[0038] [fig. 4] illustrates a one-dimensional signal before manual labeling;

[0039] [Fig. 5] represents the one-dimensional signal of Figure 4 after manual labeling;

[0040] [fig. 6] illustrates the training of the network with the labeled input data and the intermediate data generated by the analog portion;

[0041] [fig. 7] illustrates the training of the network with the input labeled data and the sub-data generated by the analog portion. Optimizing the parameters of the analog portion to start filtering out data that are not part of the targets;

[0042] [fig. 8] illustrates a parameterizable analog primitive

[0043] [fig. 9] illustrates a parameterizable analog primitive;

[0044] [fig. 10] Illustrates a circuit according to the present disclosure;

[0045] [fig. 11] illustrates the architecture of a microcontroller according to the present disclosure;

[0046] [fig. 12] illustrates a portion of the input signal database and the corresponding labels;

[0047] [fig. 13] illustrates a network comprising three primitives;

[0048] [fig. 14] illustrates the convergence towards the target frequencies;

[0049] [fig. 15] shows three examples of the labeled raw data from the pressure sensor;

[0050] [fig. 16] presents an interface for constructing the network of primitives;

[0051] [fig. 17] shows the outputs of several primitives;

[0052] [fig. 18] illustrates a first network of primitives;

[0053] [fig. 19] illustrates a complete primitive network;

[0054] [fig. 20] illustrates a three-layer neural network, connectable to the complete primitive network of figure 19;

[0055] [fig. 21] illustrates a three-layer neural network, connectable to the complete primitive network of figure 19;

[0056] [fig. 22] Illustrates the method of learning parameters using an example.

[0057] Detailed description

[0058] Reminders of the principles

[0059] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different exemplary embodiments may have the same references and may have identical structural, dimensional and material properties. For the sake of clarity, only the steps and elements useful for understanding the exemplary embodiments described have been shown and are detailed. In particular, circuits for generating a signal and controlling the frequency or intensity of this signal, as well as circuits for controlling and receiving values ​​provided by sensors, are not described in detail, the exemplary embodiments described being compatible with such standard circuits.Unless otherwise specified, when two elements are connected together, this means directly connected without intermediate elements other than conductors, and when two elements are connected or coupled together, this means that these two elements can be connected or be connected or coupled through one or more other elements. In the following description, when absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or orientation qualifiers, such as the terms "horizontal", "vertical", etc., are referred to, unless otherwise specified, the orientation of the figures. Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean within 10%, preferably within 5%.

[0060] As explained above, the disclosure relates, in a first aspect, to a device comprising an electronic circuit which comprises an analog portion and a digital portion. The analog portion is remarkable in that it comprises configurable functionalities (FPAA, FPMA). This analog portion comprises a plurality of potentially usable functionalities (filters in particular), called "features" or "primitives". These functionalities are independently activatable and configurable so that the electrical consumption of these is limited to the uses made of them. The potential number of implementable configurable functionalities essentially depends on the complexity of the analog portion. The circuit also comprises a digital portion. This digital potion is interfaced with the analog portion via analog / digital converters.The digital portion, for its part, includes in particular a digitally implanted electronic decision-making circuit (such as an artificial neural network or expert system, for example). When it comes to a neural network, it typically includes a few hundred or more neurons depending on the intended application and the targeted power consumption.

[0061] In such an electronic circuit, according to the present invention, the input signals are therefore processed using a mixed architecture in which the analog portion is implemented to carry out a first series of data processing (processing of higher frequency signals, extraction of moments, etc.) and these data obtained from the analog input signals are provided to the neural network, on the digital portion for processing at lower frequencies and obtaining the results (for example classifications of the input signals). This architecture makes it possible to meet the needs of energy consumption limitations.An important feature of the disclosure relates to the general configuration of the proposed electronic circuit: the learning of the analog and digital parameters of such a circuit is carried out globally and includes both the learning of the parameters of the digital neural network and, at the same time, the learning of the parameters of the primitives of the analog portion. Thus, the circuit can be used in many situations and can have a single certification, which also reduces its implementation costs.

[0062] In other words, the network of primitives constitutes a mixed electronic architecture (analog and digital) intended to implement embedded artificial intelligence for decision-making or pattern identification, targeting ultra-low consumption applications with joint optimization of energy consumption and classification accuracy, with the following particularities:

[0063] The proposed technique differs from other classic architectures for embedded AI comprising a fixed analog front-end circuit and a digital portion implementing neural networks: the proposed technique allows joint end-to-end learning of the parameters of the analog and digital parts (Fig. 1).

[0064] The proposed technique allows for ultra-low power systems and limited-size networks.

[0065] The architecture is divided into two distinct portions (analog / digital) (Figure 1) corresponding to very different signal frequencies in order to optimize energy consumption. High-frequency processing is carried out in analog, resulting in a gain of a factor of 100 in power compared to digital, while low-frequency processing is carried out in digital. The transition from one to the other is done thanks to one or more analog-digital converters using data from moment extractors (these make it possible to drastically reduce the useful frequency of the signal (for example filters, averagers, peak detector)), one or more analog-digital converters making it possible to acquire portions of limited size of the high-frequency input signals or those processed by the analog network, the use of digital rising or falling edges from comparators with or without analog hysteresis.

[0066] The analog portion is composed of analog primitives: passive and / or active filters, envelope detectors, multipliers, operational amplifier assemblies (adders, subtractors, phase shifters, etc.), diodes, analog convolutions (wavelets for example). The concrete implementation is similar to an FPAA, with a structure successively coupling programmable analog input points ending with moment extractors, analog / digital converters (ADC), comparators and a digital processor optimized for neural calculations.

[0067] The architecture brings model diversity to the paradigm of classical neural networks / CNNs: learning can be performed on something other than neurons (Figure 2: "E": input, "PA1" to "PA7" (analog primitives), "PD1" to "PD7" (digital primitives) and "S" (output), and in particular on primitives that cannot be easily modeled by neurons, for example a multiplier, a filter, a correlator between signals or a time delay ("PA1" to "PA7").

[0068] The evaluation criterion for learning depends on the quality of classification, but also on the power consumed by the network and the complexity of the network at the electronic level. The way in which we learn is particular due to the presence of moment extraction operators which break or limit the possibility of doing gradient backpropagation. The optimization technique is therefore different from that of classical learning: we iterate a learning process optimizing the analog portion by gradient descent, after having previously optimized the digital network at each step of the calculation of the analog gradient. To do this at each step of the optimization:

[0069] We fix the analog portion of the network. For example, the circuit in Figure 13;

[0070] From a labeled data set (once and for all), we generate an intermediate labeled training data set at the output of the analog part and ADC / comparator (and therefore after the moment extraction operations), and this automatically.

[0071] This intermediate training data set, dependent on analog operations, is used for the classical training of the digital portion network. Once this training of the digital portion is carried out, the process is repeated by varying the parameters of the analog portion, so as to be able to calculate a gradient as a function of the parameters of the analog portion in order to optimize them. The global analog / digital optimization is potentially algorithmically expensive, but it remains computable given the fact that we target applications implemented in architectures with limited capacities. Moreover, this optimization being carried out "offline" the computing resources do not pose difficulties at this stage.

[0072] Moreover, thanks to this architecture, it is possible, during learning, to determine the order of the primitives automatically (insofar as the networks are ultimately of limited size and therefore limited combinatorics).

[0073] General description of the learning methodology

[0074] The learning and processing of the primitive network is generally presented in this section, in relation to Figure 22. In this example, the method for determining implementation parameters of an electronic circuit, the learning phase comprises at least one iteration of the following steps, carried out using a learning database of labeled signals:

[0075] Loading (Al) current parameters (PC) of the plurality of parameterizable analog primitives and the plurality of parameterizable digital primitives;

[0076] Extraction (A2), by the analog portion, as a function of the current parameters of the plurality of analog primitives, of time information (IT) from the input signals (Sig.E) and / or frequency information (IF) from these same signals; the latter may correspond to a plurality of moments of the signals of the learning database;

[0077] Construction (A3), using the previously extracted time and / or frequency information, of an intermediate data structure (SDI), formed for example by the juxtaposition of the information extracted by the analog portion from the signals of the learning database; the structure can be a tensor.

[0078] Classification (A4), by the digital portion, according to the current parameters of the plurality of digital primitives (PC), and from the intermediate data structure (SDI), of the plurality of events detected by the analog part, delivering a plurality of portions of classified signals (PSC);

[0079] Calculation (A5), from the plurality of portions of classified signals, of a classification error rate (Err);

[0080] Correction (A6) of the current parameters of the plurality of parameterizable analog primitives and the plurality of parameterizable digital primitives according to the error rate (Err). The training presented in relation to Figure 22 is exemplified by the following explanations. A starting point is a one-dimensional signal as shown in Fig. 4. The input signal can also be multi-channel. For the present description a single-channel signal is used. First, this signal is manually labeled as shown in Fig. 5. The labels define the targets to be detected in the input signal. This classic manual labeling operation is carried out for all the signals constituting the training database. Once the database is labeled, the training of the primitive network begins.

[0081] The labeled data are provided as input to the primitive network and the analog portion performs the first processing step for the extraction of signal moments. This analog portion also generates an intermediate data structure that constitutes the input to the digital portion as shown in Fig. 6. This intermediate data structure is automatically labeled according to the current parameters of the analog primitives. However, given that it is not (yet) optimized, it can lead to extracting information with non-optimal relevance. Then the digital portion performs a classification of the data extracted by the analog portion and, in training, it is therefore possible to calculate the error of the system (of the circuit as a whole) from the true and false detections according to the labels of the initial database.

[0082] Having calculated the error (i.e. the number of erroneous detections compared to the number of detections to be affected), an optimized backpropagation method is used to adjust the parameters (weight and bias) of the analog and digital portions using the gradient backpropagation algorithm (gradient backpropagation). In this situation, it is therefore necessary to calculate the derivative of the error with respect to each of the parameters of all the primitives, as in the case of a classic neural network, to be able to adjust these parameters of all the primitives using a learning rate hyperparameter.

[0083] This cycle represents one iteration (one epoch) of the learning process: generation of a self-labeled training set at the output of the analog part, then optimization of the digital part on this self-labeled training set, then optimization of the analog part to minimize the overall error. In the next iteration, the parameters of the analog and digital parts have already been adjusted once, so the error starts to decrease from the second iteration. Therefore, the first step of the analog processing of the second iteration already filters out events that are not part of the target, as exemplified in Fig. 7.

[0084] This learning method allows the optimization of the entire network of primitives (analog portion and digital portion) and also allows the calculation of an index of detection precision versus energy consumption since depending on the complexity of the network of primitives, the detection precision but also its energy consumption are increased.

[0085] Thus, the primitives of the primitive network consist of circuits and operators whose parameters are learned during training from a labeled database. Among the existing primitives, the following are exemplified:

[0086] Analog peak detector: This primitive can be implemented with a diode, a resistor and a capacitor as shown in Fig. 8 (left). This primitive is key for transient detection as shown in Fig. 8 (right). It can also be used after a bandpass filter to detect the energy level in the frequency band. The parameter to be learned during the training phase is the constant: Tau (RiCi).

[0087] Analog filters: These primitives can be implemented with one or more operational amplifiers, resistors and capacitors as shown in Fig. 9 (left) and Fig. 10 (left). They allow to select the frequency bands of interest, as shown in Fig. 9 (right) and Fig. 10 (right). They can also be used to calculate the average value of a signal, in the case of a low-pass filter. The parameters to be learned during training are the cutoff frequencies, in Fig. 9 and 10 a low-pass filter primitive and a high-pass filter primitive are presented, where the cutoff frequencies are defined by R2C2 and R3C3 respectively.

[0088] Analog correlator with respect to a configurable pattern (pre-established or capable of evolving over time) such as a wavelet or between different input signal channels.

[0089] Analog Delay: Allows the input signal to be shifted temporally with a constant but adjustable delay within a limited frequency band.

[0090] Integrator: This primitive integrates the input signal and amplifies the result. Derivative: This primitive differentiates the input signal and amplifies the result.

[0091] Digital filters: these primitives allow, in the same way as analog filters, to select the desired frequency band. However, they are implemented in digital form, and this makes them interesting for processing low-frequency signals (which are low-power digital).

[0092] Digital neuron: This primitive is the classic neuron. It can be used alone or grouped on a neural network in the last layers of a primitive network. The parameters to be learned are typically weights and biases.

[0093] Digital Fast Fourier Transform (FFT): This primitive allows the extraction of the frequency characteristics of a signal from their temporal evolution. State machine: Implements sequential signal processing mechanisms, which allows, for example, the implementation of expert rules that can be parameterized.

[0094] Example of primitive array implementation The primitive array architecture couples digital and analog primitives. The digital part can be implemented as a field-programmable gate array (FPGA), in a microcontroller as shown in Fig. 11, or in a dedicated silicon circuit. The architecture of the analog part of the primitive array requires a form of mixed-mode ultra-low-power oriented FPAA (Field Programmable Analog Array). The FPAA is the analog equivalent of the FPGA. Unlike FPGAs, FPAA circuits contain a smaller number of configurable analog blocks (CABs).

[0095] The use of analog and digital primitives allows us to consider different types of signal processing with very different frequency spectrums. Analog processing mainly targets high bandwidth signals because the potential gain in energy consumption is then two orders of magnitude (factor 100), while digital processing, more versatile, targets more classic classification operations using neural networks. In order to further optimize consumption, among the analog primitives, several operational amplifiers can be implemented with different "gain-bandwidth" products and are used according to the frequency of the signals to be processed. This is represented in fig. 11 with three types of analog and digital primitives (Analog Primitive / Digital Primitive). All these primitives can be switched off to minimize energy consumption.

[0096] In other words, we have again a mixed analog / digital architecture, which is neither quite an FPGA nor quite an FPAA. This architecture allows both digital primitives and analog primitives to be configured at the same time, by loading them with the parameters learned during training. These parameters are provided to each configurable block during a configuration phase subsequent to the training phase, as presented previously.

[0097] Description of an example of the implementation of the learning method

[0098] As previously explained, the method for learning the parameters of such a network of primitives is modified compared to the classical learning methods implemented for digital neural networks. As generally explained, this method includes a double optimization: optimization of the digital parameters and optimization of the analog parameters. An example of the implementation of such a mixed learning method is presented below. More specifically, we focus on the methodology for adjusting the parameters as the iterations are performed. This methodology is inspired by the classical backpropagation algorithm. However, when temporal primitives (such as filters) are used, it is no longer possible to apply the derivative of the output with respect to the parameters or weights to be learned to minimize the error. It is for this reason in particular that a new learning method is proposed.This new method has been implemented in simulation for learning parameters from a labeled database, the objective being to automatically learn the parameters of analog primitives, together with the digital parameters, from a single initial labeling. In this example, we therefore only present the learning of a simplified analog stage. Digital learning is not illustrated here, as this is otherwise classic.

[0099] First, as previously mentioned, a database was generated. It is composed of a large number of samples, each one including a sinusoidal signal with a constant amplitude equal to IV but whose frequencies vary from 10 to 180Hz. The sampling frequency is fixed at 400Hz. The database is partially illustrated in Fig. 12 (database of input signals and corresponding label). As illustrated, different labels were used to test the convergence of the model. They were generated by an algorithm. As can be seen, this database describes a bandpass filter centered at W1 + W] with a strip length equal to | wj - wi | .

[0100] After the database generation, a primitive network structure was proposed for learning the primitive parameters. This primitive network is presented in Fig. 13 and is composed of three primitives:

[0101] A band-pass filter: this filter is composed of a high-pass filter coupled with a low-pass filter. Their cutoff frequencies are fcHpret f C LPF, which must be learned during training;

[0102] A peak detector: this primitive is composed by a diode and a low-pass filter to maintain the voltage level for a period of time defined by ij, which must be learned during training but which, initially, is fixed to describe more simply the learning method;

[0103] A comparator: this primitive generates a high logic level when the voltage in the positive input corresponding to the voltage level at the output of the peak detector (and therefore to the energy of the signal in the filter bandwidth) is higher than that of the negative input (reference fixed initially, but optimized by learning) Based on this architecture of the network of primitives, the parameters are initialized as follows: fcHPF and fdPF are the two parameters to be learned. At the end of the training they will converge to the frequencies which will define the central frequency of the bandpass filter f o and its bandwidth. Therefore, the first frequency is initialized to: fSampling fcHPF = - - - SpectrumPercentagethe second frequency is initialized to fSampling fcLPF = - - - (1 - SpectrumPercentage)

[0104] SpectrumPercentage is a hyperparameter to be defined as the learning rate and in this case it is equal to 0.05. This makes the initial values ​​of fcHPF and f C LPF equal to 10 and 190 Hz respectively, since fsamping is equal to 400 Hz. ij is prefixed to make learning faster. It is equal to 250ms the value of the temporal length of each of the samples in the database to be able to maintain the voltage level until the end.

[0105] Threshold is also prefixed to simplify learning. It is equal to 0.7V since the amplitude of the sine waves in the database is equal to IV.

[0106] The first training iteration begins after initializing the primitive network parameters. The objective of successive iterations is to converge to the labeled frequencies in the database, as illustrated in Fig. 14. In this training, the derivative of the primitive network error after processing the database with respect to each frequency (f C HPF and f C LPF ) must be calculated. This bandpass filter type primitive has a kind of memory with respect to the input at time k. For simulation, the implemented filters are first-order, this memory demonstrates that the training method must be modified to be compatible with temporal primitives such as filters.

[0107] Thus, learning is carried out as follows:

[0108] First, each sample in the database is filtered and the output of the comparator is compared to the desired labeling (true or false detection).

[0109] Then, after presenting the complete learning base, the overall error of the primitive network, ErrorfcHPF-fcLPF is obtained by comparing the obtained labels and detections.

[0110] From this error calculation, the cutoff frequency of the high-pass filter is updated using eq. 1. Where Derivate PO rcentage is a hyper parameter to be prefixed like the learning rate. In this case it is equal to 0.1. fcHPF + Af = fcHPF + fSam P ling DerivatePercentage(1)

[0111] After updating the high-pass filter cutoff frequency, the database is presented again to determine the new overall error: Erropc + Af - F CLPF and be able to calculate the derivative of this error as a function of the variation of fcHPF as shown in the following eq. 2:

[0112] AError ErrorfcHPF _fcLPF — ErrorfcHPF + Af_fcLPF AfcHPF — fSampling .

[0113] 2 DerivatePercentage

[0114] After calculating the first derivative of the error, fcHPF is reset to its previous value and the same method is applied to calculate the derivative with respect to f C LPF, in order to obtain

[0115] Finally, after calculating all the derivatives, the gradient of the overall error with respect to the analog parameters is determined and allows the update of the filter cutoff frequencies with eq. 3 and eq. 4. fcHPF = fcHPF + LearningRate. fcLPF = fcLPF + LearningRate. This cycle representing an iteration is then repeated until convergence or until reaching the defined number of iterations. This method can be used for primitives whose output depends on the input at time i as well as at previous times. In the case of a multiplier or comparator for example, the output depends only on the current input and therefore this simplifies learning.

[0116] In this way the learning is implemented, the frequencies of the bandpass filter are learned from the database by a gradient descent algorithm, even if it is not formally calculable, not allowing to use a backpropagation type algorithm. The disadvantage of this method is that for each iteration, the complete database must be processed several times, a disadvantage counterbalanced by the use of the mini batch technique. The method is also sensitive to the setting of the hyperparameters of the model, at the risk of not converging. The most important are Spectrum P percentage for frequency initialization and Derivate Pe percentage To calculate the derivatives. The results obtained for this network of primitives are however very good.

[0117] Description of an example application

[0118] A case study of the application of the network architecture of primitives concerning leak detection on an oil installation is presented. The first step is the generation of a database using an analog sensor coupled to a recorder installed on site. Several operating modes were recorded to enrich this database and to be able to distinguish between correct operating modes and faults. For this, the database was labeled with the different classes to be identified in the second step. The third step consists of processing the data in analog form to obtain an intermediate data structure also labeled but dependent on the analog circuit for preprocessing. This intermediate data structure makes it possible to train the algorithms of the digital portion, for example convolutional neural networks.So in the fourth step the training is carried out and the results of the classification, in particular the ROC curve, are evaluated to modify the parameters of the analog portion and obtain the optimal configuration. These last two steps are iterated until the system converges if it occurs. These different steps are detailed below.

[0119] Step 1: Generate the database

[0120] The first step consists of retrieving data from the corresponding sensors for the detection of the desired events. This step is the most important since the reliability of the network of primitives depends mainly on the richness of the database on which the learning is carried out. In the application case, a pressure sensor was used to measure the behaviors of an oil installation with and without defects. So the goal is to identify these behaviors and notify the case of defects found. The data in this case are one-dimensional, the pressure is recorded over time. These data are recorded in a predefined format to be able to label them in the next step.

[0121] Step 2: Labeling the Database After obtaining a database, it must be labeled. In Fig. 15, three examples of the labeled raw data from the pressure sensor are shown. It is important that the data is labeled at the precise instants when the events occur because they are processed in analog form and not directly with a convolutional neural network (which takes the full sample as input).

[0122] These samples constitute the input to the primitive network which, together with the analog blocks it contains, generates the self-formed labeled intermediate data structure from those defined on the basic signals. This intermediate data structure constitutes the input to the algorithms implemented in digital form.

[0123] Step 3: Analog processing and learning.

[0124] After labeling the data, a network of primitives is predefined for analog processing that leads to obtaining the intermediate database. This network of primitives is, in this example, illustrated in Fig. 16. The analog primitives are defined and connected to each other according to the characteristics of the database knowing that several sensors can be used and processed in parallel.

[0125] At the output of the analog portion, intermediate data is generated from the output values ​​of the analog primitives, and is used to drive the digital portion, while retaining its initial labeling. Trigger nodes can be defined to wake up the digital portion and perform analysis on the analog data at a time when an interesting phenomenon is suspected to occur.

[0126] In Fig. 17, the outputs of several primitives are presented. The first graph "node input" shows the labeled raw data from the sensor, then the second "AbsValue" shows the output of the first primitive which performs an absolute value of the input. The third graph illustrates the output of a low-pass filter, this is the second primitive whose cutoff frequency must be learned and is connected to the output of the first. Finally we find the last two primitives and their graphs, "gain", an amplifier and "comparator" a comparator which compares the output of the amplifier with a voltage level to be learned.

[0127] In this case the simplified analog stage of the primitive network implemented is shown in Fig. 18. This stage of the primitive network wakes up (activates) the digital stage of the primitive network at each rising edge of the comparator output and triggers an analysis to confirm if it is a true positive. Accordingly, a trigger node and a tensor generation node are defined. The complete primitive network used is shown in Fig. 19, this schematic has four parallel channels independent of the main channel responsible for triggering from a transient. These four channels have a bandpass filter and a peak detector which are used to continuously measure the energy in the different frequency bands.

[0128] When the comparator is triggered by the presence of a peak in the signal that could correspond to a desired signal, the raw signal is acquired at 100 [Hz] for a defined time (here one second) and a second acquisition of the raw signal is carried out at 1 [KHz] for 0.1 second (one tenth of a second) offset by two (2) seconds after the trigger to measure the noise level. The digital stage is in charge of making the acquisitions but remains in deep sleep most of the time. Only the ultra-low power analog part of the primitive network will remain in "always on" mode. The four bandpass filters of this stage allow information to be stored on the past to enrich the analysis carried out on the digital stage with the frequency distribution corresponding to times before the trigger.These four energy level outputs on the different bands are sampled a second time with a predefined delay to have comparison data on the evolution of the frequency composition of the signal around the trigger. These are (important) indicators on the signal to be taken into account for subsequent analysis.

[0129] In this way, the information from the raw signal allows the detection of shocks and the spectral information of the energy levels on the four frequency bands after the event allows the frequency characterization of the signal before and during the phenomenon to be analyzed, a bit like an FFT would do (but without the need to perform such an energy-intensive FFT digitally). The combination of these two pieces of information delivers a tensor: a frequency and time signature of the event to be analyzed.

[0130] All of this processing is done in ultra-low power mode since the digital stage is in standby most of the time and the analog stage is designed to achieve minimal power consumption.

[0131] As explained previously, the learning of the weights of the analog stage is carried out by iterations after joint optimization of the digital stage.

[0132] Step 4: Digital processing and learning.

[0133] The digital stage of the primitive network learns from the intermediate data structure generated by the analog stage and can be in the form of an expert system, a shallow classical neural network as shown in Fig. 20 or a convolutional neural network as shown in Fig. 21. The digital algorithm to be implemented depends mainly on the difficulty of the problem to be solved and the targeted energy consumption.

[0134] Step 5: System Evaluation.

[0135] The system is evaluated and learned from the indicators on the detection rates (true positives TP, false positives FP, true negatives TN and false negatives FN), and therefore according to the initial labeling of the data for learning. These indicators make it possible to adjust the coefficients of the analog stage during training as well as in real time in dynamics. For example the detection threshold of the comparator: when there is a very noisy signal, many false positives are generated so the threshold of the comparator can be increased to reduce the number of false positives when there is noise.

[0136] Step 6: Integration and deployment.

[0137] The final step is to load the learned parameters and models into the analog / digital primitive network in production mode. The advantage of such an implementation is, on the one hand, to have a low-power, efficient circuit, whose parameters can be updated according to the evolution of the signals for example, and which can also be used in other use cases than that described in this example.

Claims

DEMANDS 1. Method for determining implementation parameters of an electronic circuit intended to be implemented by a computer or a data processor, said electronic circuit being configured to perform the processing of an input signal, the electronic circuit comprising an analog portion including a plurality of configurable analog primitives and a digital portion including a plurality of configurable digital primitives, the implementation parameters of the electronic circuit comprising parameters of the plurality of configurable analog primitives and parameters of the plurality of configurable digital primitives, the digital portion being coupled to the analog portion via at least one analog-to-digital converter and / or at least one analog comparator with or without hysteresis,said method being characterized in that it comprises a learning phase of said parameters of the plurality of configurable analog primitives and of said parameters of the plurality of configurable digital primitives, said learning phase being joint with the parameters of the plurality of configurable analog primitives and with the parameters of the plurality of configurable digital primitives.

2. A method for determining implementation parameters of an electronic circuit, according to claim 1, characterized in that the learning phase comprises at least one iteration of the following steps, carried out using a labeled signal training database: loading (A1) the current parameters of the plurality of configurable analog primitives and the plurality of configurable digital primitives; extraction (A2), by the analog portion, as a function of the current parameters of the plurality of analog primitives, of time information from the input signals and / or frequency information from these same signals, this information being able to correspond to a plurality of times of the signals in the training database; construction (A3), using the previously extracted time and / or frequency information, of an intermediate data structure;classification (A4), by the digital portion, as a function of the current parameters of the plurality of digital primitives, and from the intermediate data structure, of the plurality of detected events, delivering a plurality of classified signal portions; calculation (A5), from the plurality of classified signal portions, of a classification error rate (Err); correction (A6) of the current parameters of the plurality of configurable analog primitives and of the plurality of configurable digital primitives as a function of the error rate (Err).

3. A method according to any one of claims 1 or 2, characterized in that the learning phase ends when the classification error rate (Err) is below a threshold predetermined and / or when a target electrical consumption, in operational use, of said electronic circuit is reached.

4. A method according to any one of claims 2 or 3, characterized in that the step of correcting the current parameters of the plurality of parameterizable analog primitives and of the plurality of parameterizable digital primitives comprises at least one iteration of the following optimization sequence: optimization of the digital portion by backpropagation, then optimization of the analog portion.

5. A method according to any one of claims 1 to 4, characterized in that the digital portion comprises at least one neural network adapted to classify signals received via analog / digital converters and in that the parameters of the plurality of parameterizable digital primitives comprise at least weights and biases of said neural network.

6. A method according to any one of claims 1 to 5, characterized in that the digital portion is, by default, in standby mode.

7. A method according to any one of claims 1 to 6, characterized in that the analog portion comprises at least one bandpass filter, said bandpass filter enabling the identification of frequencies of interest, and in that the parameters of the plurality of parameterizable analog primitives comprise at least cutoff frequencies of said bandpass filter, and in that the analog portion comprises a plurality of trigger nodes for waking up said digital portion on the basis of an identification of said frequencies of interest.

8. Electronic circuit configured to perform the processing of an input signal according to the method of determining implementation parameters of said electronic circuit according to any one of claims 1 to 7, said electronic circuit comprising an analog portion and a digital portion, the digital portion being coupled to the analog portion via at least one analog-to-digital converter, and / or at least one analog comparator with or without hysteresis, the electronic circuit being characterized in that the analog portion comprises a plurality of analog primitives parameterized according to a first set of parameters and in that the digital portion comprises a plurality of digital primitives parameterized according to a second set of parameters, said first and said second set of parameters belonging to the implementation parameters of said electronic circuit,the said first and second group having been the subject of joint learning.

9. Electronic circuit according to claim 8, characterized in that the plurality of parameterizable analog primitives comprises analog primitives that belong to the group including: passive and / or active filters, envelope detectors, multipliers, operational amplifier circuits, diodes, analog convolutions, integrators, differentiators, delay.

10. Electronic circuit according to any one of claims 8 or 9, characterized in that the analog portion of the electronic circuit is divided into a first part, called signal preprocessing and a second part called moment extraction, the output of the signal preprocessing part being connected to the input of the moment extraction part, the output of the moment extraction part being directly connected using at least one analog / digital converter and / or an analog comparator.

11. Use of an electronic circuit configured to perform the processing of an input signal according to the method of determining implementation parameters of said electronic circuit according to any one of claims 1 to 7, said electronic circuit comprising an analog portion and a digital portion, the digital portion being coupled to the analog portion through at least one analog-to-digital converter or at least one analog comparator, the analog portion comprising a plurality of analog primitives configurable according to a first set of parameters and the digital portion comprising a plurality of digital primitives configurable according to a second set of parameters, characterized in that it comprises a step of loading the first and second sets of parameters having been jointly learned.

12. Product computer program downloadable from a communication network and / or stored on a computer-readable medium and / or executable by a microprocessor, characterized in that it includes program code instructions for the execution of a method for determining implementation parameters of an electronic circuit configured to perform the processing of an input signal according to any one of claims 1 to 7, when executed on a computer.

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