Semiconductor wafer
Patent Information
- Application Number
- EP2023809971
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-12-13
- Filing Date
- 2023-11-13
- Publication Date
- 2025-10-22
AI Technical Summary
The production of semiconductor components using Group III nitride layers, such as GaN, faces challenges with high defect rates and unintentional impurities like carbon and oxygen, which affect the quality and yield of these components, particularly due to the use of gas phase epitaxy processes like MOVPE.
A semiconductor wafer with a substrate and a stack-shaped buffer layer sequence comprising multiple sub-layers with intermediate layers having a larger bandgap than the buffer sub-layers, designed to suppress leakage currents and reduce defects, featuring a specific arrangement of buffer and intermediate layers with varying thicknesses and compositions to enhance the quality of the top semiconductor layer.
The solution effectively reduces defects and suppresses leakage currents, resulting in high-quality, low-defect Group III nitride layers suitable for forming semiconductor components, while maintaining cost-effectiveness by limiting the number of buffer sub-layers and maintaining wafer planarity.
Smart Images
Figure 1.1
Abstract
Description
[0001] semiconductor wafer
[0002] The invention relates to a semiconductor wafer for forming semiconductor components comprising a layer with a compound from the group III nitrides, in particular GaN or AIGaN.
[0003] Such semiconductor wafers primarily comprise a substrate with an overlying buffer layer system, wherein the uppermost semiconductor layer of the buffer layer system comprises, for example, a layer containing a compound from group III nitrides. For example, semiconductor components containing a compound from group III nitrides, in particular power transistors and / or power diodes and / or LEDs, are produced on a layer containing group III nitrides by growing and structuring additional layers.
[0004] The goal here is to ensure that the epitaxial growth, particularly of the layer or layer system comprising a Group III nitride compound, or at least the uppermost semiconductor layer made of a Group III nitride compound, is as dislocation-free and monocrystalline as possible. In other words, to reduce the number of defects, e.g., the number of thread-like dislocations, as much as possible and to deposit a defect-free monocrystalline semiconductor layer in order to achieve the highest possible yield in the production of the semiconductor components to be formed.
[0005] The production of the layers of the buffer layer system, including the top semiconductor layer made of a compound of group III nitrides, is usually carried out using vapor phase epitaxy processes, called MOVPE. Here, the respective semiconductor layers are created by deposition from the vapor phase. For example, for the production of GaN-comprising layers from the vapor phase, organic carrier gases such as trimethylgallium ((CH3)3Ga) and ammonia (NH3) are used with the addition of hydrogen as a carrier gas during the growth of gallium nitride, whereby the reaction proceeds according to the reaction formula can be described.
[0006] Due to the presence of large amounts of carbon and hydrogen, small amounts of hydrogen and carbon are inevitably incorporated into the semiconductor layers to be produced.
[0007] While hydrogen can be removed by annealing in an inert gas atmosphere or in vacuum, for example to avoid passivating the acceptors necessary for p-type conduction, the unavoidable and unintentional incorporation of carbon caused by the process generally leads to p-doping or an increase in the residual conductivity.
[0008] Despite complex procedures to avoid all impurities resulting from the use of devices and starting materials such as organometallics required for the production of group III nitride layers, unintentional and unavoidable impurities such as oxygen are found in the semiconductor layers to be produced.
[0009] It should be noted that MOVPE is a possible and common process for the production of Group III nitride layers. In particular, Group III nitride layers can also be produced using processes such as MBE, LPE, or HVPE.
[0010] Methods for producing layers comprising a compound of group III nitrides or, in particular, layers comprising GaN are known from DE 10 2006 008 929 A1, EP 2 767 620 A1, DE 102 56 911 A1, US 2006 / 0281284 A1, and US 2013 / 0087762 A1. Against this background, the object of the invention is to provide a device that further develops the prior art.
[0011] The object is achieved by a semiconductor wafer having the features of patent claim 1. Advantageous embodiments of the invention are the subject of subclaims.
[0012] According to the subject matter of the invention, a semiconductor wafer is provided, wherein the semiconductor wafer comprises in the order mentioned:
[0013] A substrate having a top surface and a bottom surface, with a single-crystal silicon layer formed on the top surface.
[0014] A nucleation layer is formed on top of the substrate, i.e. on top of the single-crystalline silicon layer.
[0015] A first buffer layer is formed above the nucleation layer, wherein a stacked semiconductor buffer layer sequence having a top side and a bottom side is formed above the first buffer layer.
[0016] The semiconductor buffer layer sequence comprises at least three sub-layer sequences, wherein each of the sub-layer sequences has at least one buffer sub-layer with a compound from the group III nitrides and an intermediate layer.
[0017] In this case, the intermediate layer is formed on a bottom side of the respective partial layer sequence, with a further intermediate layer being arranged on the top side of the semiconductor buffer layer sequence.
[0018] The thickness of the respective intermediate layers is at least a factor of 10 smaller than the thickness of the two buffer sublayers adjacent to the intermediate layer. One or more or all of the intermediate layers have a thickness between 2 nm and 50 nm or between 5 nm and 30 nm and furthermore have a larger band gap than the band gap of one or more or all of the buffer sublayers.
[0019] On top of the semiconductor buffer layer sequence, a low-defect top semiconductor layer comprising a compound from the group III nitrides is formed, wherein the top semiconductor layer comprising a compound from the group III nitrides is suitable for forming semiconductor components.
[0020] The thickness of the buffer sublayer formed on the underside of the semiconductor buffer layer sequence is greater than the thickness of the buffer sublayer formed on the top side of the semiconductor buffer layer sequence.
[0021] In the semiconductor buffer layer sequence, the distance between two consecutive intermediate layers near the top is smaller than the distance between two consecutive intermediate layers near the bottom. This effectively suppresses leakage currents through the buffer layer system.
[0022] It should be noted that the intermediate layers each comprise a compound with at least one or more elements of group III, such as Al, In, Sc, in combination with N. In a further development, the intermediate layers consist of a compound of at least one or more elements of group III, such as Al, In, Sc, in combination with N. In particular, the individual intermediate layer comprises or consists of a compound of Ga and N.
[0023] In other words, the intermediate layers each also have a Group III nitride layer or consist of a Group III nitride layer. However, it should be understood that the intermediate layers each have a different stoichiometry than the buffer sublayers. In particular, the intermediate layers have a higher band gap than the buffer sublayers.
[0024] It is understood, however, that in addition to the compound of the Group III elements in combination with N, the intermediate layers also include impurities and dopants.
[0025] In particular, for example, GaN layers produced by MOVPE generally have a carbon content of at least 1 • 10 13 cm 3 It should also be noted that the band gap of a GaN layer is approximately 3.4 eV, and the band gap can be increased, for example, by increasing the amount of Al.
[0026] It should be noted that the substrate has a diameter of 100 mm or 150 mm or 200 mm or 300 mm or 450 mm or larger.
[0027] An advantage of the device according to the invention is that, with the advantageous arrangement, both defect-free group III nitride layers can be formed on the upper side of the semiconductor wafer and the leakage currents can be suppressed by the buffer layer system.
[0028] In a further development, the semiconductor buffer layer sequence comprises a maximum of 10 sublayer sequences. Studies have shown that further increasing the number of sublayer sequences results in little or no further improvement in the quality of the topmost semiconductor layer. It is understood that increasing the number of buffer sublayers or sublayer sequences also increases the manufacturing costs of the semiconductor wafer.
[0029] In another embodiment, the radius of curvature of the semiconductor wafer is greater than 10 m. In other words, the wafer is virtually flat, at least after the production of the buffer sublayers or after the production of the top semiconductor layer. Good planarity of the semiconductor wafer is advantageous for further processing, for example, for the production of semiconductor components with a compound from group III nitrides.
[0030] In one embodiment, the first buffer layer has a thickness between 0.35 pm and 3 pm.
[0031] In a further embodiment, the thickness of the entire buffer layer system, comprising the nucleation layer, the first buffer layer and the semiconductor buffer layer sequence as well as the uppermost semiconductor layer, is in a range between 3 pm and 50 pm or 5 pm and 30 pm.
[0032] In another embodiment, the first buffer layer comprises a masking layer, and the thickness of the masking layer is between 0.05 pm and 1 pm. In this case, the masking layer is integrally bonded to the nucleation layer.
[0033] In a further development, the thickness of the buffer sublayer of the uppermost sublayer sequence is between 0.2 pm and 2 pm or between 0.5 pm and 1 pm.
[0034] In another embodiment, the thickness of the buffer sublayer of the lowest sublayer sequence is between 0.5 pm and 4 pm or between 0.1 pm and 2 pm.
[0035] In one embodiment, at least one of the intermediate layers or all intermediate layers contain aluminum, with the Al content being between 30% and 80% or 60% based on all elements contained in main group III of the Periodic Table. Preferably, all intermediate layers contain aluminum, with the Al content of the intermediate layers being either the same or different.
[0036] In other words, at least one of the intermediate layers or all of the intermediate layers comprise or consist of AIGaN.
[0037] By incorporating aluminum, i.e., an AlGaN compound, the band gap can be increased compared to, for example, GaN without aluminum. It should be noted that the band gap of GaN is 3.4 eV and that of AlN is 6.2 eV.
[0038] In a further development, the aluminum content in the AlGaN compound is increased such that the difference between the conduction band of AlGaN and the conduction band of, for example, GaN lies in a range of 0.5 eV to 2.0 eV. Preferably, the difference is 1.0 eV.
[0039] Because the conduction band of AIGaN is energetically higher than the conduction band of GaN, for example, leakage currents can be effectively suppressed by the buffer layer system.
[0040] An embodiment with more than three intermediate layers is designed such that the distance between two immediately adjacent intermediate layers in the direction of the upper side of the semiconductor buffer layer sequence initially remains the same and then decreases or continuously decreases or decreases in a step-like manner or the same, ie first decreases and then remains constant.
[0041] In one development, the first buffer layer comprises a layer of a compound from the group III nitrides or the first buffer layer consists of a compound from the group III nitrides or in another development, at least 80% of the thickness of the first buffer layer is formed from a group III nitride layer.
[0042] This can also be characterized in that the first buffer layer made of a compound from the group III nitrides comprises two sublayers or consists of exactly two sublayers and the two sublayers are materially bonded to each other.
[0043] In one embodiment, the nucleation layer comprises oxide patches, wherein the oxide patches are integrally bonded to the upper side of the substrate. In another embodiment, the nucleation layer has a thickness between 0.05 μm and 0.5 μm. In one embodiment, one or more or all intermediate layers are intentionally doped with carbon and / or with a metal from the group of transition metals VIII. The aforementioned group includes Fe, Ru, Os, and Hs.
[0044] In another embodiment, one or more or all intermediate layers have a carbon concentration and / or iron concentration in a range between 1»10 16 cm- 3 and l*10 2 ° cm- 3 or between l*10 17 cm- 3 and l«10 19 cm- 3 on.
[0045] In a further development, one or more or all buffer sublayers have a carbon concentration and / or an iron concentration below l*10 18 cm- 3 or below l*10 17 cm- 3 on.
[0046] In a further development, the ratio of the carbon concentration and / or iron concentration of at least one or more or all intermediate layers and at least one or more or all buffer sublayers is greater than 10:1 or greater than 100:1 or greater than 1000:1.
[0047] In another development, the partial layer sequences are each arranged materially bonded to one another and / or the buffer partial layers are each materially bonded to the respective intermediate layer.
[0048] In one embodiment, the substrate consists of single-crystal silicon.
[0049] The invention will be explained in more detail below with reference to the drawings. Similar parts are labeled with identical designations. The illustrated embodiments are schematic, ie the distances and the lateral and vertical extensions are not to scale and, unless otherwise stated, do not have any deducible geometric relationships to one another.
[0050] Figure 1a is a view of an embodiment of a semiconductor wafer with a buffer layer system, Figure 1b is a representation of a decrease in the distance between successive intermediate layers of the buffer layer system of Figure 1a,
[0051] Figure 2 is a plan view of a semiconductor wafer,
[0052] Figure 3a is a view of a further embodiment of a semiconductor wafer with a buffer layer system,
[0053] Figure 3b is a representation of the decrease in the distance between successive intermediate layers of the buffer layer system of Figure 3a,
[0054] Figure 4 shows different courses of the decrease in the distance between the successive intermediate layers of the buffer layer system.
[0055] For the sake of clarity, the compounds in the layers mentioned are limited to layers comprising or consisting of GaN or AlGaN. However, it is understood that some or all of the layers may additionally or alternatively comprise or consist of other Group III nitride compounds.
[0056] The illustration in Figure 1a shows a view of an embodiment of a semiconductor wafer 10 with a buffer layer system formed in a Z-direction and a profile of a band gap EG in the direction of the Z-direction.
[0057] The semiconductor wafer 10 comprises a substrate SUB with a top side OSSUB and a bottom side USSUB, wherein a single-crystal silicon layer SISUB is formed on the top side OSSUB.
[0058] A nucleation layer NUS is formed on the top side OSSUB of the substrate SUB, and a first buffer layer PF1 is formed above the nucleation layer NUS. Furthermore, a stacked semiconductor buffer layer sequence MP with a top side OSMP and a bottom side USMP is arranged above the first buffer layer PF1, wherein the semiconductor buffer layer sequence MP comprises at least three sublayer sequences MPT11, MPT12, and MPT13.
[0059] The three sublayer sequences MPT11, MPT12, MPT13 each have at least one GaN buffer sublayer GAN11, GAN12, GAN13 and an intermediate layer ZW11, ZW12, ZW13.
[0060] The intermediate layers ZW11, ZW12, ZW13 are each formed on a bottom side of the respective sub-layer sequence MPT11, MPT12, MPT13.
[0061] A further intermediate layer ZW2 is arranged on the top side OSMP of the semiconductor buffer layer sequence MP. The thicknesses of the intermediate layers ZW11, ZW12, ZW13, ZW2 are each at least a factor of 10 smaller than the thicknesses D11, D12, D13 of the respective buffer sublayers GAN11, GAN12, GAN13. Each intermediate layer ZW11, ZW12, ZW13, ZW2 has a thickness between 2 nm and 50 nm or between 5 nm and 30 nm.
[0062] Furthermore, each of the intermediate layers ZW11, ZW12, ZW13, ZW2 has a larger bandgap than the bandgap of each buffer sublayer GAN11, GAN12, GAN13.
[0063] A top semiconductor layer AS comprising low-defect GaN is formed on the top intermediate layer ZW2. The GaN layer is suitable for forming semiconductor components. The GaN layer is formed integrally on and with the top intermediate layer ZW2.
[0064] The thickness DU of the buffer sublayer GAN11 of the sublayer sequence MPT11 formed on the underside USMP of the semiconductor buffer layer sequence MP is greater than the thickness D13 of the buffer sublayer GAN13 formed on the top side OSMP of the semiconductor buffer layer sequence MP. In the semiconductor buffer layer sequence MP, the respective distance AB11, AB12, AB13 between successive intermediate layers ZW11, ZW12, ZW13, ZW2 near the top side OSMP is smaller than the distance between two successive intermediate layers ZW11, ZW12, ZW13, ZW2 near the bottom side USMP.
[0065] The band gap EG curve shows that the first value is constant in the substrate SUB and in the single-crystal layer SISUB. The first value corresponds to the band gap EG of silicon.
[0066] Subsequently, the band gap EG increases abruptly in the layers lying on the top surface of the OSSUB layer to the second value. The second value of the band gap EG essentially corresponds to the band gap of the GaN layer.
[0067] The otherwise constant course of the band gap EG is interrupted at the location of the intermediate layers ZW11, ZW12, ZW13 and ZW2 by delta-shaped increases of the band gap EG.
[0068] Since the intermediate layers comprise at least one AlGaN compound, the band gap is noticeably increased depending on the stoichiometry of the ternary compound of the intermediate layers ZW11, ZW12, ZW12 and ZW2.
[0069] In this case, all intermediate layers ZW11, ZW12, ZW13, ZW2 contain aluminum, with the Al content being between 30% and 80% or 60% based on all contained elements of the III main group of the periodic table.
[0070] An advantage of the distance between two successive intermediate layers decreasing towards the top is that it allows leakage currents through the buffer layer system to be suppressed.
[0071] While the thickness of the buffer sublayer GAN 11 of the lowest sublayer sequence MPT11 is between 0.5 µm and 4 µm or between 0.1 µm and 2.0 µm, the thickness of the buffer sublayer GAN 13 of the uppermost sublayer sequence MPT13 is between 0.2 µm and 2 µm or between 0.5 µm and 1.0 µm.
[0072] Figure 1b shows a progression of the distance in the Z direction between successive intermediate layers of the buffer layer system of Figure 1a. The progression shows a linear decrease in the distance AB11, AB12, AB13 between two immediately consecutive intermediate layers ZW11, ZW12, ZW13, and ZW2, with the first distance AB11 being smaller than the second distance AB12, and the second distance AB12 being smaller than the third distance AB13.
[0073] Figure 2 shows a top view of the semiconductor wafer 10. The semiconductor wafer 10 has a main extension direction in the XY plane. The top side of the semiconductor wafer 10 is formed by the GaN layer AS, with the GaN layer AS and the underlying layers each forming a full-surface layer. The Z direction points out of the image plane.
[0074] Figure 3a shows a view of another embodiment of a semiconductor wafer 10 with a buffer layer system. Only the differences from the illustration in Figure 1a are explained below.
[0075] In this case, the semiconductor wafer 10 has a semiconductor buffer layer sequence MP with seven sublayer sequences MPT11 to MPT17. For reasons of clarity, the respective intermediate layers are not shown.
[0076] The first buffer layer PF1 comprises a masking layer MAI. The thickness of the masking layer MAI is preferably between 0.1 μm and 1 μm. In this case, the masking layer MAI is bonded to the nucleation layer NUS.
[0077] In the present case, the nucleation layer comprises oxide patches OS, wherein the oxide patches OS are integrally bonded to the upper side OSSUB of the substrate SUB. Furthermore, the first buffer layer PF1 comprises precisely two GaN sublayers PF1GAN1 and PF1GAN2, or the buffer layer PF1 consists of precisely two GaN sublayers PF1GAN1 and PF1GAN2, wherein the two sublayers PF1GAN1 and PF1GAN2 are preferably integrally bonded to one another in the present case.
[0078] It should be noted that the structure of the first buffer layer PF1 or the nucleation layer NUS described above in connection with the buffer layer system of Fig. 3a is also included in the embodiment of Fig. 1a as an alternative to the embodiment described there.
[0079] Furthermore, it should be noted that the structure of the first buffer layer PF1 or the nucleation layer NUS described above in connection with the buffer layer system of Fig. 3a can also be part of other embodiments not shown.
[0080] Figure 3b shows the course of the distances between two successive intermediate layers AB11 to AB17 of the buffer layer system of Figure 3a in the Z direction.
[0081] Here, the first distance AB11 is equal to the second distance AB12. The second distance AB12 is greater than the third distance AB13, while the third distance AB13 is equal to the fourth distance AB14.
[0082] The fourth distance AB14 is greater than the fifth distance AB15. The fifth distance AB15, the sixth distance AB16, and the seventh distance AB17 are equal and have the shortest distance between two immediately consecutive sublayer sequences.
[0083] In other words, the distances AB11 to AB17 become gradually smaller in the Z direction.
[0084] Figure 4 shows a total of six different progressions a-e of the decrease in the distance between two immediately consecutive buffer sublayers. The largest distance is always the first distance AB11, while the last distance ABln is always the smallest. For example, in the present case, the distance towards the top side OSMP of the semiconductor buffer layer sequence MP initially remains the same and then decreases, or first decreases continuously, or decreases in a stepped manner, or decreases immediately and then remains constant. It is understood that other progressions with regard to the decrease in the distances between two consecutive intermediate layers are also possible.
Claims
Claims Semiconductor wafer (10) in the order mentioned comprising - a substrate (SUB) with a top side (OSSUB) and a bottom side (USSUB), wherein a single-crystal silicon layer is formed on the top side (OSSUB), - a nucleation layer (NUS) formed on the upper side (OSSUB) of the substrate (SUB), - a first buffer layer (PF1) formed above the nucleation layer (NUS) - a stacked semiconductor buffer layer sequence (MP) formed above the first buffer layer (PF1) with a top side (OSMP) and a bottom side (USMP), wherein the semiconductor buffer layer sequence (MP) has at least three partial layer sequences (MPT11, MPT12, MPT13), each with at least one buffer partial layer (GAN11, GAN12, GAN13) comprising group III nitrides, and an intermediate layer (ZW11, ZW12, ZW13), and the intermediate layer (ZW11, ZW12, ZW13) is formed on a bottom side of the respective partial layer sequence (MPT11, MPT12, MPT13), and a further intermediate layer (ZW2) is arranged on the top side (OSMP) of the semiconductor buffer layer sequence (MP), and the thickness of the intermediate layers (ZW11, ZW12, ZW13, ZW2) is at least a factor of 10 smaller than the respective thicknesses (DU, D12, D13) of the buffer sublayers (GAN11, GAN12, GAN13), and each intermediate layer (ZW11, ZW12, ZW13, ZW2) has a thickness between 2 nm and 50 nm or between 5 nm and 30 nm,and at least one intermediate layer (ZW11, ZW12, ZW13, ZW2) has a larger band gap than the band gap of each buffer sublayer (GAN11, GAN12, GAN13), - a top semiconductor layer (AS) comprising low-defect group III nitrides on the intermediate layer (ZW2) on the top side (OSMP) of the semiconductor buffer layer sequence (MP) suitable for forming semiconductor components, characterized in that - the thickness (D11) of the buffer sub-layer (GAN11) of the sub-layer sequence (MPT11) formed on the underside (USMP) of the semiconductor buffer layer sequence (MP) is greater than the thickness (D13) of the buffer sub-layer (GAN13) formed on the top side (OSMP) of the semiconductor buffer layer sequence (MP), - in the semiconductor buffer layer sequence (MP), the distance (AB11, AB12, AB13) between successive intermediate layers (ZW11, ZW12, ZW13, ZW2) near the top side (OSMP) is smaller than the distance between two successive intermediate layers (ZW11, ZW12, ZW13, ZW2) near the bottom side (USMP) in order to suppress leakage currents through the buffer layer system. Semiconductor wafer (10) according to claim 1, characterized in that the semiconductor buffer layer sequence (MP) comprises a maximum of 10 partial layer sequences (MPT11 to MPT20). Semiconductor wafer (10) according to claim 1 or claim 2, characterized in that the radius of curvature of the semiconductor wafer (10) is greater than 10 m. Semiconductor wafer (10) according to one of the preceding claims, characterized in that the first buffer layer (PF1) has a thickness between 0.35 pm and 3 pm.Semiconductor wafer (10) according to one of the preceding claims, characterized in that the first buffer layer (PF1) comprises a masking layer (MAI), and the thickness of the masking layer (MAI) is between 0.05 pm and 1 pm, and the masking layer (MAI) is integrally bonded to the nucleation layer (NUS). Semiconductor wafer (10) according to one of the preceding claims, characterized in that the thickness of the buffer sublayer (GAN13) of the uppermost sublayer sequence (MPT13) is between 0.2 pm and 2 pm or between 0.5 pm and 1.0 pm. Semiconductor wafer (10) according to one of the preceding claims, characterized in that the thickness of the buffer sublayer (GAN11) of the lowest sublayer sequence (MPT11) is between 0.5 µm and 4 µm or between 0.1 µm and 2.0 µm. Semiconductor wafer (10) according to one of the preceding claims, characterized in that at least one of the intermediate layers (ZW11, ZW12, ZW13, ZW2) or all intermediate layers (ZW11, ZW12, ZW13, ZW2) contain aluminum, and the Al content is between 30% and 80% or 60%, based on all contained elements of main group III of the periodic table. Semiconductor wafer (10) according to one of the preceding claims, characterized in that at least one of the intermediate layers (ZW11, ZW12, ZW13, ZW2) or all intermediate layers (ZW11, ZW12, ZW13, ZW2) comprise or consist of AIGaN.Semiconductor wafer (10) according to one of the preceding claims, characterized in that, with more than three intermediate layers (ZW11, ZW12, ZW13, ZW2), the distance between two immediately adjacent intermediate layers (ZW11, ZW12, ZW13, ZW2) in the direction of the upper side (OSMP) of the semiconductor buffer layer sequence (MP) initially remains the same and then decreases, or decreases continuously, or decreases in a step-like manner, or decreases immediately and then remains constant. Semiconductor wafer (10) according to one of the preceding claims, characterized in that at least one of the intermediate layers is doped with carbon and / or with a metal from the transition group. Semiconductor wafer (10) according to one of the preceding claims, characterized in that at least one of the intermediate layers has a carbon concentration and / or iron concentration in one. Range between l*10 16 cm' 3 and 1*1O 20 cm 3or between l*10 17 cm' 3 and l*10 19 cm' 3 Semiconductor wafer (10) according to one of the preceding claims, characterized in that at least one of the buffer sublayers has a carbon concentration and / or an iron concentration below 1*10 18 cm' 3 or below l*10 17 cm' 3 Semiconductor wafer (10) according to one of the preceding claims, characterized in that the ratio of the carbon concentration and / or an iron concentration of at least one of the intermediate layers and at least one of the buffer sublayers is greater than 10:1 or greater than 100:1 or greater than 1000:1.