Integrated circuit with integrated information system for simplified interactive programming by multi-agent system

Abstract

The invention relates to a method for programming an integrated circuit comprising one or more microprocessors, at least one random-access memory, at least one read-only memory and at least one non-volatile rewritable memory, at least one high-speed bus and one bus, and functional components, wherein a step of recording, in the non-volatile rewritable memory, a set of executable computer codes is carried out, the method comprising booting steps according to an execution mode or according to a programming mode comprising: • an original step of recording, in a non-erasable mass memory of the integrated circuit during the manufacture of the integrated circuit: • a set of static resources comprising the digital development tools forming an assisted development environment executable by a browser and the technical documentation relating to the programming of the integrated circuit; • and a boot code according to a programming mode; • wherein the booting step according to the programming mode consists in controlling: • querying the state of the hardware and software dynamic resources of the integrated circuit and a step of recording, in a local rewritable memory, the state for each of the hardware and software resources; • activating the transfer of the static resources and the dynamic resources to a connected external computer device.

Description

Integrated circuit with integrated information system for simplified interactive programming by multi-agent system. Field of invention

[0001] The present invention relates to the field of electronic circuits, and more particularly relates to the control of microprocessor integrated circuits. A microcontroller is an example of a programmable integrated circuit comprising, in addition to one or more microprocessors, memories (flash, ROM, EEPROM, RAM, OTP, etc.), interface peripherals, signal processing, etc. At startup, a microcontroller executes a boot program, consisting of code instructions capable of being executed by a microprocessor. Such a boot program is carried out in a non-volatile memory, for example a ROM memory (English acronym for "Read Only Memory"), and makes it possible to launch by default the execution of a more complex general program, often called "application", adapted to fulfill certain tasks by exploiting the different functions of the microcontroller.Particularly in embedded systems, the microcontroller can also be configured to execute a program for loading a specific program. The specific program allows in particular to modify the general program by modifying the contents of a non-volatile memory in which all or part of said general program is recorded.

[0002] The microcontroller is arranged to execute an operating program which is contained in the ROM and which comprises functional parts each defining a function of the processing unit. The data used by the microcontroller is generally contained in the programmable read-only memory, the operating program being recorded in the ROM at the time of manufacture of the integrated circuit and is no longer modifiable thereafter. The improvement of the operating program and, generally speaking, any modification thereof therefore requires the manufacture of new integrated circuits. State of the art

[0003] Known in the state of the art is European patent EP2252978 describing an integrated circuit comprising a processing unit associated with a ROM read-only memory and a programmable read-only memory, the ROM read-only memory containing an operating program which is executable by the processing unit and which comprises functional parts each defining a function of the processing unit. The program comprises an entry / exit point for each functional part and an identifier is associated with each functional part. The programmable read-only memory contains at least one functional part substitutable for one of the functional parts of the ROM read-only memory and associated with an identifier corresponding to that of the corresponding functional part of the ROM read-only memory. The processing unit is arranged to execute the substitutable functional part in place of the corresponding functional part of the ROM read-only memory.The entry / exit points of the operating program are thus arranged between each functional part so that the processing unit can bypass an original functional part of the operating program by executing in its place a substitutable functional part stored in the programmable read-only memory. In addition, the multiplicity of entry / exit points of the operating program makes it possible to limit the size of the program pieces constituting the substitutable functional parts stored in the programmable read-only memory to the size of the functional parts to be replaced. The size of the programmable read-only memory due to the substitutable functional parts is thus relatively small.

[0004] These substitutable functional parts can be stored in the programmable read-only memory not only by the manufacturer of the integrated circuit but also by the issuer of the cards, which simplifies its management. Advantageously, the substitutable functional part is loaded into a start area of ​​the programmable read-only memory. This makes it possible to accelerate the search for substitutable functional parts so that the execution of the operating program is not detrimentally slowed down. Preferably, the programmable read-only memory includes a substitutable functional part presence indicator. Thus, the processing unit can quickly detect whether it is necessary to read the programmable read-only memory in search of a substitutable functional part. Disadvantages of the prior art

[0005] Generally speaking, integrated circuits require the development of a computer program consisting of lines of code established in a specific language recognized by the integrated circuit's processor. "ASSEMBLER" type programming languages ​​have long been known, whose mnemonics are symbols representing the instruction set of a given processor, in order to allow programming. Assembler is called a "low-level language" because it is close to the language of the machine concerned, which is composed of binary words made up of a sequence of 1s and 0s. The lines of code can then be directly executed by the microcontroller, but developing such a program represents very technical and even daunting work.

[0006] We also know of so-called "high level of abstraction" programming languages ​​such as BASIC, FROTRAN, PASCAL, ANSI C, etc. which, unlike assembler, allow us to abstract from the instruction set of a given processor, microprocessor or microcontroller.

[0007] These languages ​​allow humans to write programs using a syntax that they can understand (often borrowed from English), and then translate the written program (the source code) into a language that can be understood by a given type of machine (a binary file made up of a sequence of 1s and 0s).

[0008] The process of translating language understandable by humans into language understandable by a machine is called "compilation". There are compilers that can translate the same high-level program source code into several "machine languages" depending on the targeted processor (Cross compilers in English).

[0009] We also know of software libraries called "libraries", considered as "program building blocks" capable of performing all sorts of generic or specific actions that can be complex, such as the use of certain peripherals (camera, sensors, etc.). Thus, the designer advantageously uses ready-to-use "software components" to maximize his time concentrating on the specificities of his program code.

[0010] Assembly programming depends on the prior choice of processor, while programming in high-level languages ​​(such as Basic, Pascal, C, C++, etc.) depends on the existence of the compiler required for the intended target.

[0011] When the target is not a simple sequentially programmable microprocessor, but is already configured to offer advanced functionalities (such as integrated circuits specialized in complex tasks or microcontrollers "MCUs" in English), the preliminary study of this type of hardware is essential in order to be able to use their functionalities either by directly programming their registers, or by doing so through libraries facilitating their implementation.

[0012] Before being able to program an integrated circuit, a familiarization step is essential: the operator must first study a technical manual ("Datasheet" or "Technical Reference manual" in English) which is several hundred - or even several thousand - pages long, which must be read with concentration. This can take a considerable amount of time, particularly if the operator has never worked with the integrated circuit in question before.

[0013] After studying the technical manual, the operator will be able to identify the integrated circuit resources that meet the needs of his project. Then the operator will have to identify the correct registers for configuring the desired resources. Each of the useful registers will have to be configured according to the technical manual, by writing a specialized integrated circuit operating program.

[0014] The next step is to install and master the software suite and the necessary tools that will allow the entry of the program code, then its uploading into the integrated circuit, and finally to test and debug its functionalities. This toolchain is often referred to by the generic term of Integrated Development Environment (IDE), where the toolchain is integrated and accessible from a single user interface.

[0015] It is clear that all these steps prior to programming are notoriously complex, resulting in a sometimes considerable loss of time and energy, depending on the nature of the project and the complexity of the required integrated circuit. (As an example with the MCU type integrated circuit "AM243x" from Texas Instruments, which requires the study of a 9305-page technical manual, in order to learn how to program the thousands of registers on this chip).

[0016] All this surrounding complexity alone represents two-thirds of the effort invested, while the bulk of the added value and know-how lies in programming, which is the main task. Ideally, the operator should be able to devote most of his time and energy to it, everything else being secondary, should only occupy a negligible part of it. To do this, it would be necessary to simplify handling, simplify the development environment, and above all, rethink programming methods that have never evolved for more than 50 years.

[0017] For example, if we consider an environment for experimenting with and programming dedicated integrated circuits, it would be very advantageous to have their functions and register parameters accessible within a high-level interactive language of abstraction and embedded intelligence aimed at instantly implementing them, thus avoiding all the current complexity.

[0018] Ultimately, even if a user knows the function(s) of an integrated circuit without knowing its instructions (technical manual or "datasheet" in English), it is still impossible for him to implement it.

[0019] The use of a state-of-the-art integrated circuit therefore requires high technical skills at the cost of a costly investment in energy and time, essential related documentation to exploit the functionalities of the integrated circuit, and finally a suite of complex hardware and software tools (Tollchain) to connect to it, experiment with it, program it, debug it to ultimately obtain a usable result, possibly Solution provided by the invention

[0020] In order to overcome these drawbacks, the present invention relates, in its most general sense, to an Integrated Circuit (IC) or "Chip". This Integrated Circuit, which is programmable, is fundamentally distinguished from a known integrated circuit by the implementation at the very heart of its architecture of: intelligent agents, an Information System, and an "Agent-Assisted Interactive Programming Environment" (AAPE). Among the agents, there are slave agents inserted between the chip registers and the Information System network responsible for informing a master agent that controls the chip by means of instructions entered by a human operator using said "AAPE", or instructions pre-recorded in a file that will be read to be executed, or finally according to the polarization of the pins / legs of the integrated circuit. Some agents include an integrated artificial intelligence device.

[0021] The invention relates in particular to a method for programming an integrated circuit having the characteristics set out in claim 1.

[0022] The integrated circuit for implementing this method comprises one or more microprocessors, at least one random access memory, at least one read-only memory and at least one non-volatile rewritable memory, at least one high-speed BUS and a bus, functional components consisting of recording in said non-volatile rewritable memory a set of executable computer codes

[0023] Characterized in that it comprises:An initial step, activated by powering up said integrated circuit, of interrogating all of said hardware and software resources of said integrated circuit, and recording in a local database, for each of said resourcesat least one digital descriptor of each of said resourcesa list of simplified programming commands for each of said resourcesA step of selecting between an execution or programming mode,In the case of selecting the programming mode,The transmission to a connected terminal of a web application executable by the browser of said terminal, said web application containingtechnical documentation and the specifications of said integrated circuit,a specific programming software suite for said integrated circuit, the transmission by said connected terminal of said list of simplified programming commands for each of said resources, In the case of selection of the execution mode, the loading of a system configuration file saved in the non-volatile memory consisting of a list of interpretable commands, the presence of each of said commands in said local database being checked to be compiled and executed on the fly.,

[0024] According to a variant, said initial step further comprises reading the state of pins of the integrated circuit to determine a “master” mode or a “slave” mode, and, in the case of the master mode, collecting the contents of the local databases of the interconnected “slave” integrated circuits.

[0025] The invention also relates to an integrated circuit comprising one or more microprocessors, at least one random access memory, at least one read-only memory and at least one non-volatile rewritable memory, at least one high-speed bus and a bus, functional constituents characterized in that it further comprises: A plurality of agents each constituted by a calculator each comprising a processor, a microprocessor of the artificial intelligence accelerator type, a read-only memory, a non-volatile memory, a random access memory,a router and a plurality of data exchange interfacesA bus for exchanging data between said agentsOne of said agents being an intelligence agent-R comprising:an interface for direct access to said RAM andan interface for exchanging data with a busOthers of said agents being simplification agents-S comprisingan interface for exchanging data via the bus with said plurality of agentsan interface for exchanging data with each of said functional constituents and for exchanging and exchanging data with a software applicationOne of said agents being a Master agent-Man interface for exchanging data via the bus with said plurality of agentsan interface for exchanging data with a connected peripheral terminal and for accessing programs and data recorded in said non-volatile rewritable memory.,

[0026] Advantageously, the integrated circuit further comprises configuration pins for controlling the state of said intelligence agent agent-R by applying a voltage.

[0027] Preferably, it further comprises a non-volatile memory containing: A first microcode, the execution of which controls the search, collection, processing and storage of data relating to each subset of the integrated circuit, said first microcode automatically generating requests routed to the internal components by at least one bidirectional configuration bus, these requests triggering responses by the internal components and peripherals available and operational in the integrated circuit, said responses being processed to construct a database identifying said internal resources and peripherals and listing their respective commands, said database, the execution of said first microcode being controlled during startup (BIOS) by writing in a register in startup RAM, a code defined by the polarity of one or more external pins dedicated to the initial configuration (Boot).

[0028] Advantageously, said boot RAM further comprises a register whose state indicates whether the MCU is designated master or slave, depending on the polarity of one or more external pins dedicated to the initial configuration (Boot).

[0029] Preferably, said subassemblies of the integrated circuit are associated with an autonomous agent comprising ROM, FLASH and RAM memories, microprocessor, and an input / output interface, a natural language micro-interpreter, a table containing the attributes and functionalities of the subassembly.

[0030] According to another variant, said non-volatile memory further comprises a second microcode controlling the interrogation of the communication buses to interrogate the presence of one or more additional slave integrated circuits, and where appropriate, the search and import of the command tables of each of said slave integrated circuits, and the recording in a second command table, said second command interpreter microcode ensuring, in response to a request in natural language transmitted by said remote terminal, the interrogation of said local command table and failing that the interrogation of said second command table, to ensure the configuration of the registers associated with the function corresponding to said interpreted command, depending, where appropriate, on the arguments of said request.

[0031] Advantageously, said database comprises information coded in natural language and communicates with said communication interface on the one hand and a binary code interpreter executing the actions ordered by the instructions of said language.

[0032] Advantageously, said database comprises an Information system associated with an intelligence agent, a subnetwork management agent comprising a packet communication network connecting a plurality of intelligent agents, interfaced with their subsets, a master agent for configuring the integrated circuit and its application program, a reconfigurable multi-layer network, controlled by agent and an Interactive Programming Environment Assisted by the master agent.

[0033] Detailed description of a non-limiting example of embodiment

[0034] The present invention will be better understood on reading the following description, concerning a non-limiting example of embodiment illustrated by the appended drawings where:

[0035] Larepresents a schematic view of the hardware architecture of the integrated circuit (950) according to an example of the invention

[0036] Larepresents a schematic view of the hardware architecture of the integrated circuit (1000) according to a more advanced version of the invention

[0037] It represents a schematic view of the hardware architecture of the master agent (500), referred to as the "system management agent"

[0038] It represents a schematic view of the hardware architecture of a simplification agent

[0039] The diagram represents a schematic view of the hardware architecture of the intelligence agent (250)

[0040] La represents a schematic view of the functional architecture of the integrated circuit (1000) according to the invention

[0041] The figure represents a schematic view specific to the invention, of the housing (1100) of the integrated circuit (1000) according to an exemplary embodiment. General principle of the invention

[0042] The invention relates to the incorporation into the integrated circuit (1000) of the digital resources necessary for its programming, these resources being downloadable onto external computer equipment to enable their use on this external equipment.

[0043] These resources (100, 220, 230, 10, 20, 410, 530, 540, 550, 560) and software (420) comprise, on the one hand, static information and, on the other hand, dynamic information. The static information is recorded in a non-volatile mass memory which retains the recorded information, even in the absence of a power supply, typically a Flash memory. They comprise an assisted development environment comprising the digital development tools executable by a browser as well as the technical documentation concerning the programming of the integrated circuit (1000) which is usually provided in the form of a written or digital manual to developers, with the disadvantage that this documentation must be updated during each evolution of the integrated circuits concerned, and that the developer must check the conformity of the documentation available to him with the integrated circuit (1000) which he plans to program.The invention provides a radical solution to this problem by the fact that the integrated circuit (1000) natively integrates, by manufacturing, its own documentation which is therefore necessarily up to date and adapted to the version of the integrated circuit (1000) in question. There is therefore no risk of discrepancy between the integrated circuit (1000) and the documentation available to the developer, nor any risk of unavailability of this documentation at the time of starting programming of an integrated circuit (1000). This static information forms a set of digital data designated in this patent by “EPIAA Assisted Programming Environment (800).This EPIAA Assisted Programming Environment (800) brings together the tools necessary to meet the Operator's needs, from the initial setup – advantageously including the functionalities comprising all or part of the programming, simulation, debugging, measurement bench and complete self-testing of the hardware – to the final functional result. The system files (810) of this environment are recorded in flash memory (220). The EPIAA (800) also preferably includes a human-machine interface (820) called "GUI" (for Graphical User Interface in English) displayed by a terminal (900) connected to the communication interface (340).The dynamic information is recorded in a rewritable RAM and is processed by the integrated circuit (1000) episodically, and describes the state of the hardware and software resources of the integrated circuit (1000) and optionally of its environment, when the integrated circuit (1000) is interconnected with other computer components. The preparation of this dynamic information is controlled by a process executed by a computer code recorded in RAM memory.Finally, the integrated circuit (1000) according to the invention comprises a communication circuit with external computer equipment, for transferring the static information and the aforementioned dynamic information to external computer equipment on the one hand, and for transferring digital programming files of the integrated circuit (1000) which have been prepared on the external computer equipment on the one hand from the dynamic static information and on the other hand from the processing carried out by the developer.

[0044] An integrated circuit according to the invention is also distinguished by the boot mode.

[0045] For a state-of-the-art integrated circuit, the processor is usually initialized to begin executing a boot code; the boot code instructions are stored, for example, starting at address 0xFFFF:0000h (the maximum address in real memory minus 16 bytes). This is where a boot code, usually called a BIOS, is located. The BIOS executes and initializes the integrated circuit before handing over to more elaborate code stored in an EEPROM memory.

[0046] The integrated circuit (1000) according to the invention is distinguished from its operation by two start-up modes, one corresponding to the usual start-up mode, known for integrated circuits of the state of the art, the other corresponding to a programming mode specific to the invention. This second mode is activated: automatically during the first use and more generally when the integrated circuit has not yet been programmed, when a physical action is applied to the integrated circuit (1000), for example by polarizing ports (pins, legs, "Strapping Pins in English") of the integrated circuit (1000), that is to say by applying signals to said ports, which will be interpreted by the microcontroller as a command to activate the programming mode.

[0047] This second boot mode activates the execution of a code recorded in a flash memory controlling the recording in a rewritable memory of the above-mentioned static and dynamic information and the transfer of this data to an external device via the above-mentioned communication circuit. This code controls for this purpose the process of collecting the dynamic information and the communication protocol, or the activation of a code controlling the communication layer.

[0048] In summary, the invention relates to a "Stand alone" type integrated circuit configured to be programmed alone, i.e. without technical documentation or additional knowledge, and the start-up of which provides an optional mode controlling the automatic export to external computer equipment of all the static and contextual information necessary for a developer to program it, before transferring from this computer equipment the digital files developed on the external equipment, in order to program the printed circuit for new functionalities, in perfect conformity with the type of integrated circuit (1000) and the state of its internal hardware resources and optionally of its digital environment.

[0049] From a hardware architecture point of view, the integrated circuit conventionally comprises one or more microprocessors (100), at least one random access memory (230), at least one read-only memory (200) and at least one non-volatile rewritable memory (220), at least one high-speed bus (10) and one bus (20), functional components (530, 540, 550, 560), consisting of recording in said non-volatile rewritable memory (220) a set of executable computer codes

[0050] The integrated circuit according to the invention also differs from the state of the art by the incorporation of a mass memory for recording at the time of its manufacture, for example by flashing, of its technical documentation, and by a wireless (optical, radiofrequency) or wired communication circuit via a pin of the integrated circuit, with external computer equipment for the bidirectional transfer of digital files between the integrated circuit and the external computer equipment.

[0051] Detailed description of non-limiting examples of implementation

[0052] To simplify the descriptions that follow by avoiding redundancy of details, the following Glossary constitutes a reference for the terms attributed to the fundamental devices that constitute the present invention:

[0053] 1- System on Chip or “SOC” and microcontroller or “MCU”

[0054] A System On Chip (SOC) is an integrated circuit (IC) in which all the components of a complex VLSI (Very Large Scale Integration) electronic system are integrated. Typically, this integrated circuit includes, by way of non-limiting example, digital functions, analog functions, mixed signal functions and radio frequency functions, assembled by photolithography on a single substrate (e.g. silicon) to form a "monolithic integrated circuit". Alternatively, these functions can be in the form of separate matrices (in English "Dies") which will be bonded and connected on a substrate forming a "hybrid integrated circuit".

[0055] Typically, the integrated circuit includes hardware (for example a microprocessor, a microcontroller, logic circuits, memories, etc.), but also the software to control its functionalities and implement an application on its hardware.

[0056] In modern terminology, a microcontroller (or MCU) is similar but less sophisticated than a SOC which can integrate more advanced peripherals, such as a graphics processing unit (GPU), a WIFI radio interface, an Ethernet interface, etc. However, systems on a chip and microcontrollers are intended for embedded applications, unlike computer microprocessors where each functionality is located in separate chips.

[0057] 2 - Information System (IS)

[0058] According to the invention, "the information system" is an independent device composed of a processor (CPU) executing an autonomous program recorded in a dedicated memory, which collects, stores, structures, models, manages, manipulates, analyzes, transports, exchanges and disseminates information.

[0059] Such information systems frequently operate within businesses. They are usually described as "a set of computing resources and devices" designed to perform all of the tasks listed above.

[0060] For the purposes of the present invention, such an information system is miniaturized to the extreme so that it can be implanted within an integrated circuit, in order to reproduce tasks identical to those listed above, to contribute to simplifying and accelerating the programming of said integrated circuit by the human operator, according to the invention.

[0061] 3 - agent and Intelligent agent

[0062] According to the invention, "an agent" comprises a computer consisting of ROM, RAM, and Flash memories, a dedicated CPU and NPU. This computer executes an independent program code (software), active in background tasks, capable of autonomous operations, capable of performing complex operations on behalf of an authority (which may be another software program, a computer file containing pre-recorded commands, the polarization of the pins / legs of the integrated circuit, or a human operator), this by means of interactive communication with its environment, via a common language ACL (from the English agent Communication Language).

[0063] To communicate via a language, the agent has an "interpreter device," consisting of a lexical analyzer, a syntactic analyzer (Parser in English), a dictionary of keywords, a translator, an interpreter, and an on-the-fly compiler. (A lexical analysis operates on the individual characters of the input, while a syntactic analysis operates on the stream of lexemes generated by the lexical analysis.)

[0064] According to a method specific to the invention, said compiler generates a binary code intended for programming the registers of a microprocessor peripheral microcircuit, whereas the binary code usually generated is machine language intended for the microprocessor itself.

[0065] According to the invention, this difference fundamentally distinguishes the interpreter from an agent – ​​from an interpreter embedded in a microcontroller (like the MCS-51 Basic in the INTEL 8051, or today Micro-Phython in an M4F from ARM).

[0066] Moreover, an "intelligent agent" perceives the context in which it operates, takes autonomous action to achieve goals while integrating constraints, and can improve its performance through learning and using knowledge and models.

[0067] Such agents and intelligent agents usually operate in the context of networked "WEB Applications" or artificial intelligence devices for computers.

[0068] For the purposes of the present invention, such agents and their hardware resources are miniaturized so that they can be integrated into the architecture of a microscopic integrated circuit, in order to reproduce the tasks identical to those described above, to contribute to simplifying and accelerating the programming of said integrated circuit by the human operator, according to the invention.

[0069] The present invention has defined at least three categories of intelligent agents: the intelligence agent operating the Information System, or "agent-R" the System on Chip (SOC) Management agent, or "master agent", or "agent-M" Simplification agents, or abbreviated "agent-S"

[0070] 4 - Networked Multi-Agent System, or “SMA”

[0071] According to the invention, "a Multi-agent System" refers to an organized set of agents as defined in the previous paragraph. There may be one or more organizations that structure the rules of collective tasks between agents. An agent may belong to several organizations. The agents are peripherals of a network integrated on the chip (Network On Chip in English) dedicated to them. They communicate with each other by packets, using a common language (ACL), either by sharing information via the environment (indirect communication), or by exchanging messages (Direct Communication). The agent can participate in a dialogue by being passive or active. A "passive agent" must accept questions from other agents and respond to them, while an "active agent" must propose and send queries.In a dialogue, agents alternate between active and passive roles, and their message exchanges follow very specific protocols, namely, (1) Coordination protocol, (2) Cooperation protocol, (3) Negotiation protocol.

[0072] Such "SMAs" are usually implemented in network communication infrastructures, for example in local, metropolitan or wide area wireless networks.

[0073] For the purposes of the present invention, such a networked SMA is miniaturized so that it can be integrated into the architecture of a microscopic integrated circuit, in order to reproduce the processes in accordance with those described above, to contribute to simplifying and accelerating the programming of said integrated circuit by the human operator, according to the invention.

[0074] 5 - Assisted Interactive Programming Environment (APIE) According to the invention, "Assisted Interactive Programming Environment" or "APIE" refers to a set of resources and software, used simultaneously, for handling, programming, debugging and commissioning the integrated circuit once completed. The APIE resources consist of technical documentation. The software suite is composed of a Console, a multi-language programming editor, a script interpreter and its on-the-fly compiler, a source code compiler, a JTAG probe and a memory programmer. According to the invention, intelligent agents as described above assist the operation of said software suite, to guide the operator in entering his instructions, but can also ask him questions in human language to help him in his choices.The aim is to simplify and speed up the task of programming said integrated circuit.

[0075] Such a programming environment is usually referred to as an "IDE" for Integrated Development Environment (or its English equivalent IDE). An IDE is usually intended to be installed on host computers, referred to in this context as "Workstations" by developers. The workstation hosting the software suite will then be connected by cable or radio to the card hosting the integrated circuit to be programmed by the operator.

[0076] For the purposes of the present invention, such an IDE is miniaturized to be integrated into the architecture of a microscopic integrated circuit, in order to offer the resources and functionalities identical to those described above, to contribute to simplifying and accelerating the programming of said integrated circuit by the human operator, according to the invention.

[0077] 6 - Subassemblies of the integrated circuit or “constituent”

[0078] According to the invention, “subassemblies of the integrated circuit” designates microcircuits (for example in the form of Dies packed on the silicon substrate of a “Hybrid SOC”, or etched on the same silicon substrate in a “Monolithic SOC”) which are constituents of the internal architecture, such as for example its peripherals, its interfaces, its memories, its measuring devices, its microprocessors, etc. The program codes associated with these components are also considered as “software subassemblies” of the integrated circuit.

[0079] 7 - Reconfigurable multi-layer network

[0080] According to the invention, "Switchable multi-layer network" means at least 2 serial data transmission networks that are superimposed and connected to the same devices. Each network has a software layer (Session, transport) and a hardware layer (packet, frame, network). Each layer can interconnect certain devices, while it can ignore others. The layers can be interconnected to exchange data, or distinct to isolate data. According to the invention, the different configurations are operated by an S-agent.

[0081] The following non-limiting detailed example descriptions of implementation refer to the Glossary above for all relevant terms. Hardware architecture

[0082] The invention relates, according to a non-limiting example of embodiment, to an integrated circuit consisting of a microcontroller unit (MCU) or a system on a chip (SOC) (1000) dedicated to a function, for example facial recognition, audio stream processing, video stream processing, information processing, etc. and comprising one or more microprocessors (100), random access memory (230) and non-volatile rewritable memory (220), and a plurality of peripherals (550) (e.g. interface, signal generation and processing, etc.), as well as at least one communication interface (340) (Ethernet, USB, WIFI, etc.), and at least one configuration bus (580),

[0083] The diagram represents a schematic view of the hardware architecture of a system-on-chip (“SOC”) integrated circuit for implementing the invention. Complex integrated circuits (950) of the MCU or SOC type generally integrate: one or more microprocessors (100) such as those for example offered by the company INTEL™ or ARM™ also designated by the English acronym CPU (“Central Processing Unit”); non-volatile, non-rewritable ROM (200) for recording and reading the boot microcode of the microprocessor (100); write-once OTP memory (210); non-volatile, rewritable flash memory (220) for storing data that must remain available even if the power supply to the integrated circuit is cut off; and RAM (230) for storing calculation variables and data to be processed by the microprocessor (100).peripheral components forming an integral part of the integrated circuit which are interconnected by buses (10, 20), such as communication input / output interfaces (560) (for example GPIO, serial bus, 8-bit, 16-bit parallel bus, etc.), as well as peripherals such as UART, I2C, SPI, USB, but also Timers / Counters, a controller (PWM) as well as analog peripherals (non-synthesizable) such as analog-to-digital converter ADC, digital-to-analog converter DAC constituting, in association with at least one microprocessor, a Microcontroller unit MCU or SOC, which can also integrate a GPU (120), see a Crypto-processor, an mpeg2 decoder, interfaces for additional memories (FLASH or SDRAM), a PCIe or Ethernet interface, etc. a clock generator and a reset function are often among the peripherals present within an MCU or SOC.It should be noted that this circuit is not necessarily integrated into the integrated circuit, but can be external, in the form of an additional component delivering a signal on one of the input pins of the integrated circuit, or in the form of a quartz connected to the pins linked to an internal oscillator.

[0084] The illustrates the hardware architecture of the integrated circuit which presents 5 additions compared to the architecture illustrated by the, namely: An Information System (260) and its integrated intelligence agent (250) An SMA comprising a packet communication network (580) connecting a plurality of intelligent agents (250, 421, 500, 570…574), interfaced to their subsets A master agent (500) for configuring the integrated circuit and its application program A reconfigurable multi-layer network (590), controlled by agent (573) An Interactive Programming Environment Assisted (800) by the master agent (500)

[0085] This integrated circuit (1000) starts up according to a radically different process from a known integrated circuit (950). Instead of executing in the usual way an initialization microcode in ROM (200) to then launch an application program recorded for example in Flash (220), the integrated circuit (1000) begins by executing according to the invention, the microcode engraved in a specific memory (260), in order to activate the intelligence agent (250) prior to any other action in the integrated circuit or the SOC chip.

[0086] First, the R-agent (250) queries all the simplification agents (421, 570 to 574) via the SMA network (580) in order to dynamically construct in RAM (230) a reference database (480) intended for the M-agent (500). This database indexes all the capacities and parameters of the integrated circuit (1000).

[0087] The agent-R (250) will then invoke the agent-S (573) to search for the presence of any integrated circuits of the same type configured in “Slave” mode, and connected to said integrated circuit (1000) which in this case will be configured in “master” mode. If necessary, said database (480) is enriched with all the capacities and parameters of each detected “slave” integrated circuit (450).

[0088] This database constitutes the entry point for all the resources of the integrated circuit (1000) which are controlled by the agent-M (500) so that it can fulfill its function of “global management of the SOC”, but also so that it can control, where appropriate, other interconnected SOCs of the same type.

[0089] The R-agent (250) then informs the System management agent (500) that the database is fully populated so that the latter can initialize the SOC with the configuration file (600).

[0090] If the "autorun" mode of the integrated circuit or SOC (1000) is activated, the agent-M (500) transmits the file (700) to the agent-S (421) of the application (420), to configure it and launch its execution on the fly. If the SOC is under development, the agent-M (500) waits to receive instructions from the human operator (the Coder or Developer) via a terminal (900) connected (330) to the EPIA (800).

[0091] Hardware architecture composing the master agent (500).

[0092] The details the hardware architecture that makes up the master agent (500), which can be indifferently called the “system management agent”.

[0093] According to the invention, each agent is made up on the hardware level of several interconnected components, some of which are common to all types of agents, namely: dedicated memories and more precisely a read-only memory (260, 261, 262) which contains the constituent program of each agent; A non-volatile Flash memory (270) which contains their database sometimes integrating a predefined artificial intelligence model; A RAM memory (280) to store the data used by its CPU (150) and its NPU (155) (NPU = Neural Processing Unit in English).

[0094] In particular, the M-agent (500) has an interface (355) with three bidirectional communication ports. The port (340) receives instructions - either from an Operator via the console of a terminal (830), - or from a file (600 or 700). The port (370) is connected to the dedicated network of the SMA (580) in order to address via the router (390) the simplification interpreter agents (570…574, 421) of the subassemblies of the integrated circuit, - or the R-agent (250) operating the Information System.

[0095] Via port (360) (DMA = Direct Memory Access in English), the agent directly accesses the central memory of the SOC (230), in particular to exploit the database (480).

[0096] Hardware architecture comprising a simplification agent.

[0097] The hardware architecture of a simplification agent is detailed (570…574, 421), and the following description describes the particular role of each of its components.

[0098] In particular, an S-agent (570…574, 420) has an interface (355) with two bidirectional communication ports. The port (370) is connected to the dedicated network of the SMA (580) in order to communicate with the other agents of the system which are addressed via the router (390).

[0099] The port (380) is connected to the registers of a subset of the SOC (530,…560), with which the agent-S is interposed to fulfill its interpreter function in order to simplify the configuration of the registers of said subset, according to the invention.

[0100] The non-volatile Flash memory (270) stores the correspondence table used by the agent-S to establish the link between “the complex programming of numerous registers to be carried out” and the reception of “a simple instruction to be processed”, according to one of the major mechanisms of the invention.

[0101] The non-volatile Flash memory (270) further contains the predefined artificial intelligence model of the S-agent. The read-only memory (262) contains the constituent program of the S-agent.

[0102] The port (380) of the agent-S is further interfaced with the registers of a software component, the application (420) via its API, which is distinguished by nature from the hardware components (410).

[0103] Hardware architecture composing the intelligence agent.

[0104] The hardware architecture of the intelligence agent (250) is detailed, and the following description describes the specific role of each of its components.

[0105] In particular, the R-agent (250) has an interface (355) with two bidirectional communication ports. The port (370) is connected to the dedicated network of the SMA (580) in order to communicate with the other agents of the system, which are addressed via the router (390).

[0106] Via the port (360) (DMA = Direct Memory Access in English), the agent-R directly accesses the central memory of the SOC (230), in particular to fill in the database (480) that it is responsible for creating, according to the invention.

[0107] The non-volatile Flash memory (270) stores a directory containing all the chip's resources, discovered during its first startup. If the discovery of resources at each startup of the SOC by the agent-R is disabled, the latter uses this directory or "database" to carry out its intelligence task. Activation or deactivation of the discovery of the SOC resources at each startup is carried out by applying a polarization of ports (pins, legs, "Strapping Pins in English") of the SOC, said pins (300) will be read by the agent-R (250) at power-up, as described in more detail below. Software Architecture

[0108] The present functional architecture of the integrated circuit according to the invention, which will be better understood thanks to the description below.

[0109] Step-by-step description of the initialization of the integrated circuit, from its power-up to its start-up, according to the invention.

[0110] When the integrated circuit (1000) starts up and before any other action, the intelligence agent (250) is activated by the automatic execution of its program code resident in dedicated memory (260), which has the effect of launching the tasks of the Information System (400, 430, 440, 460, 470, 480).

[0111] The first action (260-1) of the R-agent (250) consists of reading the state of the external configuration pins (300) (Strapping Pins in English) to know, (1) if the discovery of the SOC resources is activated, or if it must read the resources from its database stored in memory (270); (2) configure the external port of the data bus (310), the external port of the SMA network (580), the interfaces (320) and (340), and the main interpreter (500), in order to place the integrated circuit in an operating mode designated "master" or "Slave". The "master" integrated circuit will initiate the exchanges and take control of "Slave" integrated circuits (450) which could possibly be connected to its interface (320).

[0112] Querying the internal components of the integrated circuit and collecting their functions

[0113] The second action (260-2) of the agent-R (250) consists of listing (400) the resources of the internal constituents (410) of the integrated circuit, which are grouped into four categories (non-exhaustive list given as an example): Indicators and measurements (530) of the internal constituents of the integrated circuit, Configurator (540) of the customizable modular CPU(s) (100), Peripherals integrated into the integrated circuit (550), Configuration of the BUS and network interfaces (590), as well as the Inputs / Outputs (560),

[0114] To carry out the enumeration, the agent-R (250) via its router (390), launches on the SMA network (580) requests consisting of a command in natural language such as for example “local.constituents.detection (address)” intended to scan all the addresses of the SMA network to discover the functional subsets of the integrated circuit, such as identified at 530, 540, 550, 560 in the example proposed by the.

[0115] Each S-agent (570…573) inserted between the SMA network (580) and the subset it manages, will respond with a message containing the identity of the operational constituents. The R-agent records the responses in the table of a local dictionary (430), present in RAM (230).

[0116] It then sends a second request to the S-agents (570…573) of the constituents having responded, to collect the list of functions of each operational constituent (530, 540, 550, 560).

[0117] These groups of functions addressed to the R-agent by the S-agents are simplified programming commands, listed in human natural language. For example, the S-agent (571) of a sound processing chip has stored in its flash memory (270) the following list of functions in natural language, which it thus transmits to the R-agent operating the information system: audio.flux.play (On / Off) audio.volume.adjust (0, 100) audio.treble.adjust (0, 100) audio.bass.adjust (0, 100) audio.filter.activate (0, 10)

[0118] By pure convention and as a non-limiting example, these programming commands are presented in the form of a sequence of words designating (1) the object, (2) its capacity(ies), (3) the action to be performed, (4) possibly parameters to be transmitted or received.

[0119] Behind each of these seemingly simple commands, there is actually a great deal of complexity that the S-agent will ignore from the point of view of the data entry operator (or developer). For each of these commands received by the S-agent, a plurality of operations in the registers of said audio chip will be carried out by said S-agent, thus replacing the human operator with a task that was previously very complex, with a simple and rapid task, which instantly triggers the desired result.

[0120] These lists of functions transmitted by the agent-S to the agent-R (250) are then sorted, structured, ordered and then stored in RAM (230) by said agent-R, to form a dictionary which lists for each operational constituent, its exhaustive list of simplified functions made available to the human Operator in natural language (as opposed to symbolic languages)

[0121] In this example it is clear that simply informing the operator of the existence of the command "audio.flux.play (On / Off)" is sufficient to implement the SOC audio function without any other prior knowledge.

[0122] The operator no longer needs to study thousands of pages of documentation for the audio chip to find the registers involved in this action, let alone the locations of the binary data to be read or written in said registers. The benefits of the present invention are easily understood.

[0123] Querying the integrated circuit's application software and collecting its functions

[0124] According to an operating mode identical to the process of enumerating the internal constituents (410) specific to the invention, the agent-R executes the second part of the function (260-2) which consists of continuing the enumeration (400) by this time interrogating the Application (420) recorded in the flash memory (220) of the integrated circuit.

[0125] The Application (420) is software stored in flash memory (200), which is directly executable by the CPU (100) once loaded into RAM (230), to control the integrated circuit in order to specialize it in the accomplishment of various tasks, which can operate in multiple fields, such as, by way of non-limiting examples: artificial intelligence for the recognition of objects, animals, human beings, voice recognition, audio or video processing, surveillance, telecommunications, industrial control robots, etc.

[0126] Whatever the field of application considered, the function of the integrated circuit may, according to the invention, be configured and / or controlled through a list of commands in natural language.

[0127] To proceed with the enumeration (400) of the Application (420), the R-agent (250) launches on the SMA network (580) a request consisting of a command in natural language such as for example “application.description.notifier”, addressed via its router (390) to the S-agent (421) of the Application (420). The R-agent (250) receives in response a message indicating the nature of the Application, its unique identifier, its upload date, etc. The R-agent (250) adds this information to the local dictionary (430), then launches a second request to collect the functions of the Application in the form of simplified programming commands which are listed in natural language.

[0128] The R-agent (250) receives from the S-agent (421) via the SMA network (580) the list of commands made available by the application (420). At this stage of the startup of the integrated circuit, the R-agent (250) has collected, gathered, sorted, structured and added to the local dictionary (430) all the commands of the internal components (410) as well as all the commands of the Application software (420). A high level of abstraction metalanguage has thus been dynamically assembled, with the aim of bringing to the attention of the human Operator the resources made available to him by the chip, thus avoiding him having to search for them and study them himself, this in order to simplify and accelerate the programming of said integrated circuit, according to the invention.

[0129] Search for external integrated circuits, and collect their identities and dictionaries

[0130] According to the invention, the third function (260-3) of the agent-R (250) consists of listing integrated circuits of architectures identical to the master circuit (1000), but configured to operate in “slave” mode (450), possibly interconnected to the interface (320). It is specified that said interface may be, according to the invention, of the electronic or photonic type, that is to say, use electrons or photons to exchange information with other remote integrated circuits.

[0131] To carry out the enumeration (440) aimed at detecting possible interconnected slave integrated circuits (450), the R-agent (250) launches on the SMA network (580) of the interface (320) a request sent to the outside. This request is constituted by a command in natural language such as for example “chip.presence.detection(address)”, addressed via its router (390) to the M-agent (500) of the slave chips (450) possibly connected. If necessary, said request triggers a response from each of the chips (450) interconnected with the master integrated circuit (1000), which will reveal (1) their unique identifier, (2) the nature of their application determining their function (420).

[0132] In case of response, the R-agent (250) of the master integrated circuit (1000) will send a second request addressed in turn via its router (390) to the unique identifier of each of the listed Slaves, in order to collect and record in its RAM (230) a copy of the local dictionaries (430) of said Slaves, which will be identified as remote dictionaries (460) in the memory (230) of the master (1000). Then the R-agent (250) merges (470) its local dictionary (430) with the possibly collected remote dictionaries (460), then organizes, and structures the information to dynamically generate the global database (480).

[0133] The global database (480) thus groups together all the “internal components” and “applications” commands available according to the topology of a system considered as a whole, whether it is “single chip” or “multi-chip” which can be distributed over one or more interconnected cards, such as a printed circuit board (PCB in English). This “CDFL” (Dynamic Construction of Simplified Programming Language Functionalities) database (480) reflects the available resources of an infrastructure at each power-up.

[0134] To complete its initialization task, the agent-R (250) will read a special register present in its non-volatile flash memory (270), the role of which is to save the operating mode which is defined, so that the chip works either in “development mode” or in “production mode”.

[0135] Description of the “programming mode” of a “master” chip:

[0136] If the automatic startup function of the integrated circuit is active (Autorun in English), the main interpreter (500) is loaded into RAM (230) to be invoked by the configuration files (600) and (700), in order to perform batch processing in order to launch the integrated circuit or SOC (1000) to perform its tasks according to the Application (420). A pulse applied to the pins (300) of the chip (1000) will have the effect of stopping the Application currently running and activating the communication interface (340) in sleep mode, so that a connection attempt by an Operator will be detected by the integrated circuit (1000). If the "Autorun" function is not activated, the communication interface (340) is automatically activated in sleep mode, so that a connection attempt by an Operator will be detected by the integrated circuit (1000).

[0137] Description of the “programming mode” of a “Slave” chip:

[0138] If the automatic start function of the integrated circuit is active (Autorun in English), the main interpreter (500) is loaded into RAM (230) in order to scan the interface (320) in a loop while waiting for requests sent by an interconnected master chip. If the "Autorun" function is not active, the communication interface (340) is activated in standby mode, so that a connection attempt by an Operator will be detected by the integrated circuit (1000). Description of a chip's "execution mode":

[0139] The main interpreter (500) is loaded into RAM (230) to be invoked by the configuration files (600) and (700), in order to perform batch processing to configure and then launch the integrated circuit or SOC (1000) to perform its tasks according to the Application (420). However, a maintenance operator will be able to access the chip (1000) by applying a series of pulses to the pins (300), in order to stop the Application in execution, then activate the communication interface (340) to access the EPIAA by entering a key encrypted according to a complex algorithm, such as for example "DES or "AES".

[0140] Detailed description of the "System Management Agent", or "M-Agent"

[0141] While the language interpreters of the R-agent or S-agent refer to their database stored in memory (270), the interpreter of the M-agent has the particularity of referring to an external database (480) residing in main memory (230), which will have been previously constructed by the R-agent (250) dynamically. The syntactic analyzer or parser (510) of the M-agent uses this database (480) to search for and validate by comparison incoming commands which may come either from an entry made by an operator from a terminal (900); from entries pre-recorded in files (600, 700) stored in Flash memory (220), which are then processed in batches (batch processing in English) by the interpreter of the M-agent (500). Batch processing is an automatic sequence of commands (processes) without operator intervention.From a request from another agent routed through the SMA network (580)From an entry routed to the interpreter (500) via the interfaces (320, 340, 350).

[0142] If there is no match with the database (480), the parser (510) of the agent-M (500) generates an error message such as "Unknown command". If the match is verified, the agent-M routes the command to the address of the agent concerned to be executed.

[0143] A second particularity of the M-agent lies in its “dual operating mode”. In the above description, the M-agent operates within a decentralized system, where the processing of instructions is distributed over a plurality of networked computers (580) (consisting of at least three types of “agents” according to the invention). It can also be considered that the workload is distributed over a plurality of interpreters which carry out distributed processing of commands.

[0144] Conversely, the agent-M (500) has the ability to change language by loading a second database into memory (230) from the flash (220), in order to directly process commands via its on-the-fly compiler "JIT" (520) (English acronym for "just in time"), to generate microcode directly executable by the microprocessor unit (100). For example, an Application program written in Micro python can be launched according to a known operating mode.

[0145] By displaying the commands in its database (480) by category on a terminal (900), the agent-M considerably accelerates the programming of a specialized integrated circuit (MCU) by an operator who does not have training or prior knowledge of this type of integrated circuit, saving him in particular the tedious step of assimilating a specifications manual (datasheet) which can represent several thousand pages for a state-of-the-art integrated circuit (for example 9305 pages for the integrated circuit (AM64x / AM243x Processors Silicon, Revision 1.0, Texas Instruments Families of Products, Technical Reference manual).

[0146] The Intelligent Agent-Assisted Programming Environment

[0147] Another fundamental specificity of the invention concerns the integration within the architecture of the integrated circuit of an EPIAA Assisted Programming Environment (800), which alone brings together all the tools necessary to meet the needs of the Operator, from the handling – through functions such as programming, simulation, debugging, the complete hardware measurement and self-test bench – to the final functional result.

[0148] The system files (810) of this environment are stored in flash memory (220).

[0149] The EPIAA (800) comprises a human-machine interface (820) called "GUI" (for Graphical User Interface in English) displayed by a terminal (900) connected to the communication interface (340). The connection (330) between the interface (340) of the chip (1000) and the terminal (900) of the operator is established by a wired connection (for example Ethernet) or, in a preferred mode, by a wireless radio connection. The integrated circuit (1000) includes a wifi die or more generally a radio frequency die.

[0150] The graphical interface (820) is advantageously a “Web-Application” which can thus be transmitted to any WEB Browser, via the EPIAA micro-server integrated in the chip (1000). This micro-server is accessible by an IP address in “Access Point” mode for the initial connection, then in “Station” mode after WIFI has been configured for a connection to a local network, thus offering the Operator the possibility of accessing the Internet without changing environment, since he is already using his “Web Browser”. The operator thus accesses without prior effort, a suite of integrated software tools, to view the documentation, configure, configure, program, test, and debug the integrated circuit in complete autonomy, without any additional external equipment being necessary.

[0151] The graphical interface (820) of the EPIAA (800) presents a user menu which includes, by way of non-limiting example, all or part of the following tools: A Viewer (Viewer in English) of technical documentation of the integrated circuit, presenting its package, its pinout (Pinout in English), the wiring plan of an example of implementation of the chip, a lexicon of simplified commands in natural language which according to the invention is reduced to a few dozen pages, instead of several hundred. An input console with command prompt (830), which the Operator uses to communicate with the agent-M for managing the system on chip SOC, in order for example to ask it to display the commands and parameters of a subset of the chip to control it instantly. Advantageously, the agent-M ensures the auto-completion of the Operator's input, and the coloring of the keywords of the language commands.A file manager ensures the saving and loading of “batch files” so as to instantly have “predefined configuration models”. An editor capable of managing multiple programming languages ​​to exploit the APIs of the Applications (420), or to program an Application (420). An electronic design automation (EDA in English) assisted by remote or embedded artificial intelligence, capable of suggesting, verifying, correcting, and simulating the execution of software or hardware configuration (gateware in English) A system configurator, defining both the behavior of the chip at startup, optional features, data security and energy saving. A complete device for remote wireless programming of the integrated circuit A utility for system information, self-test of the integrated circuit, and measurement.A user account management module, displaying activated functions and the possibility of activating new optional functions via a micro-payment system integrated into the chip.

[0152] Beyond the plurality of functions present in the EPIAA (800), its integration at the microscopic scale at the heart of the integrated circuit (1000) contributes to the implementation of the simplification processes described previously, which would be complex or even impossible to carry out according to the known operating modes of a development environment with its suite of tools, such as a plurality of software installed on a host computer, dedicated cards, cables, programmers, simulators, etc. Mechanical part

[0153] The represents a schematic view of the housing (1100) of the integrated circuit (1000) according to an exemplary embodiment.

[0154] The housing (1100) of the integrated circuit (1000) comprises metal pins (1200) and two diametrically opposed lateral fixing grooves (1300, 1400) intended to hold it in a support specifically adapted to an innovative lateral locking, according to the invention.

[0155] Information coded by multi-colored light signals is transmitted to the outside world by means of translucent zones (1500, 1600, 1700, 1800) specific to the invention, cut out on the front face of said case so as to let the light pass through, translucent zones towards which the light emissions of four light-emitting diodes belonging to the group of indicators (530) of the internal components (410) of the integrated circuit (1000) are guided.

Claims

Method for programming an integrated circuit (1000) comprising one or more microprocessors (100), at least one random access memory (230), at least one read-only memory (200) and at least one non-volatile rewritable memory (220), at least one high-speed bus (10) and one bus (20), functional components (530, 540, 550, 560), consisting of recording in said non-volatile rewritable memory (220) a set of executable computer codes, the method comprising booting steps according to an execution mode or according to a programming mode. Characterized in that it comprises: an original step of recording in a non-erasable mass memory (200) of said integrated circuit (1000), during the manufacture of said integrated circuit (1000),of a set of static resources comprising the digital development tools forming an assisted development environment executable by a browser as well as the technical documentation concerning the programming of the integrated circuit (1000) and a boot code according to a programming mode, the boot step according to said programming mode, consisting of ordering the interrogation of the state of the dynamic hardware (100, 220, 230, 10, 20, 410, 530, 540, 550, 560) and software (420) resources of said integrated circuit (1000), and recording in a local rewritable memory (480), said state for each of said hardware (100, 220, 230, 10, 20, 410, 530, 540, 550, 560) and software (420) resources, the activation of the transfer of said static resources and said dynamic resources to connected external computing equipment (900)., Method for programming an integrated circuit (1000) according to claim 1 characterized in that said interrogation step also comprises interrogating the state of the resources of the connected electronic environment of said integrated circuit (1000), which are also recorded in said local rewritable memory (480). Method for programming an integrated circuit (1000) according to claim 1 or 2 characterized in that, when said integrated circuit (1000) is powered up, said booting step is activated according to said programming mode either when the recording memory (220) of the files transferred by the external computer equipment (900) is empty, or when a reference voltage is applied to a pin of said integrated circuit (1000), and in that otherwise said booting step is activated according to said execution mode. Method for programming an integrated circuit (1000) according to claim 1 or 2 characterized in that said interrogation step comprises, for each of said resources, the recording in said memory (480) of at least one digital descriptor of each of said resources of a list of simplified programming commands for each of said resources. Method for programming an integrated circuit (1000) according to claim 1 or 2 characterized in that said booting step according to said programming mode, further controls the transmission to a connected terminal (900) by an integrated development environment (800) of a web application (820) executable by the browser (910) of said terminal (900), said web application comprising technical documentation and the specifications of said integrated circuit, a specific programming software suite of said integrated circuit II. The transmission to said connected terminal (900) of said list of simplified programming commands for each of said resources. Method for programming an integrated circuit (1000) according to claim 1 or 2 characterized in that said booting step according to said execution mode, commands the loading of a system configuration file (600) and an application configuration file (700), recorded in the non-volatile memory (220), consisting of a list of interpretable commands, the presence of each of said commands in said local database (480) being verified to be compiled and executed on the fly. Method for programming an integrated circuit according to claim 1 characterized in that said initial step further comprises reading the state of pins of the integrated circuit (300) to determine:an execution mode or a programming modea "master" mode or a "slave" mode, and, in the case of the master mode, the collection (440) of the content (460) of the local databases (480) of the interconnected "slave" integrated circuits (450) (320).Activating the discovery of the resources of the integrated circuit (1000) at each startup. Integrated circuit comprising one or more microprocessors (100), at least one random access memory (230), at least one read-only memory (200) and at least one non-volatile rewritable memory (220), at least one high-speed bus (10) and one bus (20), a set (410) of functional components (530, 540, 550, 560) characterized in that it further comprises a communication circuit with connected external computer equipment (900), said communication circuit comprising a router (390) and a plurality of data exchange interfaces (355) (340, 360, 370, 380 and an interface (340) for exchanging data with a connected peripheral terminal (900) and for accessing programs and data recorded in said non-volatile rewritable memory (220), said non-erasable mass memory (200) of said integrated circuit (1000), during the manufacture of said integrated circuit (1000),of a set of static resources including digital simulation and test development tools forming an artificial intelligence-assisted development environment executable by a browser as well as technical documentation concerning the programming of the integrated circuit (1000) and a boot code according to a programming mode, Integrated circuit according to the preceding claim, characterized in that it further comprises: A plurality of agents (250, 421, 500, 570 to 574), each consisting of a computer, each comprising a processor (150), a microprocessor of the artificial intelligence accelerator type (155), a read-only memory (260 to 262), a non-volatile memory (270), a random access memory (280), a router (390) and a plurality of interfaces (355) for exchanging data (340, 360, 370, 380). A bus (580) for exchanging data between said agents (250, 421, 500, 570 to 574). One of said agents being an intelligence agent-R (250) comprising: an interface (360) for direct access to said random access memory (230) and an interface (370) for the exchange of data with a bus (580)Others of said agents being simplification S-agents (421;570 to 574)Comprising an interface (370) for exchanging data via the bus (580) with said plurality of agents (250, 421, 500, 570 to 574)Comprising an interface (380) for exchanging data with each of said functional constituents (530, 540, 550, 560, 120) and for exchanging data with a software application (420)One of said agents being a Master M-agent (500) comprisingan interface (370) for exchanging data via the bus (580) with said plurality of agents (250, 421, 500, 570 to 574)an interface (340) for exchanging data with a connected peripheral terminal (900) and for accessing programs and data stored in said memory non-volatile rewritable (220); Integrated circuit according to claim 9 characterized in that it further comprises configuration pins (300) for controlling the state of said intelligence agent-R agent (250) by applying a voltage. Integrated circuit according to claim 9 characterized in that it further comprises a non-volatile memory (260) containing:A first microcode whose execution controls the search, collection, processing and storage of data relating to each subset (530 to 560, 420) of the integrated circuitsaid first microcode automatically generating requests routed to the internal components (410) by at least one bidirectional configuration bus (580), these requests triggering responses by the internal components and peripherals available and operational in the integrated circuit, said responses being processed to construct a database (480) identifying said internal resources and peripherals and listing their respective simplified commands in said database (480)the execution of said first microcode being controlled during startup (BIOS) by writing in a register in startup RAM (280) of the agent-R,a code defined by the polarity of one or more external pins dedicated (300) to the initial configuration (Boot)., Integrated circuit according to the preceding claim, characterized in that said boot RAM (280) of the agent-R further comprises a register whose state indicates whether the execution mode or the programming mode is selected, and further a register whose state indicates whether the MCU is designated master or slave, depending on the polarity of one or more external pins (300) dedicated to the initial configuration (Boot). Integrated circuit according to the preceding claim, characterized in that said sub-assemblies of the integrated circuit are each associated with an autonomous agent comprising ROM (260 to 262), FLASH (270) and RAM (280) memories, a microprocessor (150), an artificial intelligence accelerator type microprocessor (155), an input / output interface (355), a natural language micro-interpreter, and a table containing the attributes and functionalities of the sub-assembly associated with said agent. Integrated circuit according to the preceding claim, characterized in that said non-volatile memory (260) further comprises a second microcode controlling the interrogation of the communication buses (310, 320) to interrogate the presence of one or more additional slave integrated circuits (450), and where appropriate, the search and import of the command tables (430) of each of said slave integrated circuits (450), and the recording in a second command table (460), said second command interpreter microcode ensuring, in response to a request in natural language transmitted, either by said remote terminal (900), or by reading a file (600 or 700) stored in memory (220), the interrogation of said local command table (430) and failing that the interrogation of said second command table (460), to ensure the configuration of the registers associated with the function corresponding to said interpreted command, depending where appropriate,arguments of the said request., Integrated circuit according to claim 8 in that said database (480) comprises information coded in natural language and communicates with said communication interface (340) on the one hand, and a binary code interpreter executing the actions ordered by the instructions of said language. Integrated circuit according to claim 9 characterized in that said database (480) comprises an information system (260) associated with an intelligence agent (250), a packet communication network (580) connecting a plurality of intelligent agents (250, 421, 500, 570…574), each interfaced to their sub-assemblies, a master agent (500) for configuring the integrated circuit and its application program, a reconfigurable multi-layer network (590), controlled by agent (573) and an interactive programming environment assisted by the master agent, EPIAA (800).

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